JP3057869B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a wiring.

[0002]

2. Description of the Related Art A conventional method of manufacturing a semiconductor device is as follows.
As shown in FIG. 4A, a contact hole 3 reaching the silicon substrate 1 is provided in an interlayer insulating film 2 provided on the silicon substrate 1.

[0003] Next, as shown in FIG.
The growth temperature is 550 to 650 ° C. by the D (low pressure CVD) method,
The flow rate of SiH ₄ gas is 1 to 3 liters / N ₂ gas conversion.
Flow at a flow rate equivalent to a minute, and a pressure of 0.2 to 0.5 Torr.
The polycrystalline silicon film 4 is deposited to a thickness of 30 to 40 nm under the conditions described above.

Then, as shown in FIG. 4C, an aluminum film 5 is formed on the polycrystalline silicon film 4 by sputtering.
After being deposited to a thickness of 5 to 1.0 μm, the aluminum film 5
Then, the polycrystalline silicon film 4 is selectively and sequentially etched to form a laminated wiring.

Next, as shown in FIG. 4D, a hydrogen alloy is applied at a temperature of 400 ° C. or more for 20 to 60 minutes to form a wiring 6 in which the polycrystalline silicon film 4 is dissolved in the aluminum film 5 by the hydrogen alloy. Although formed, the silicon that could not be melted remains as silicon nodules 7. When a huge silicon nodule 7 is generated in the contact portion, the resistance increases and a contact failure occurs.

[0006]

The conventional method of manufacturing a semiconductor device uses an aluminum film / polycrystalline silicon film.
When a wiring having a layered structure is alloyed with a hydrogen alloy to form a wiring, huge silicon nodules are likely to be generated in the aluminum film. Therefore, when silicon nodules are generated in the contact portion, there is a problem that the contact resistance increases and a contact failure occurs.

[0007]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of selectively opening an interlayer insulating film provided on a semiconductor substrate to form a contact hole, and forming a surface including the contact hole. Forming a polycrystalline silicon film by a reduced pressure vapor deposition method at a gas pressure of 0.5 Torr or more ;
A step of depositing an aluminum film on the polycrystalline silicon film, and a step of selectively etching the aluminum film and the polycrystalline silicon film sequentially and then alloying with a hydrogen alloy to form a wiring. . here,
The thickness of the polycrystalline silicon film is set to 30 to 60 nm.
It is good to be. In addition, the reaction gas in the reduced pressure vapor deposition method and
When monosilane gas and phosphine gas are used
Good.

[0008]

Next, the present invention will be described with reference to the drawings.

FIGS. 1A to 1C are sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, an interlayer insulating film 2 provided on a silicon substrate 1 is selectively opened to form a contact hole 3 reaching the silicon substrate 1, and then the contact hole 3 is formed. And a flow rate of SiH ₄ gas at a growth temperature of 550 to 650 ° C. at a flow rate corresponding to 1 to 3 liters / minute in terms of N ₂ gas by LPCVD, and a pressure in the chamber of 0.5 to 1.0 Torr. A polycrystalline silicon film is deposited to a thickness of 30 to 60 nm.

Next, as shown in FIG. 1B, an aluminum film 5 is deposited to a thickness of 0.5 to 1.0 μm by a sputtering method.

Next, as shown in FIG. 1C, the aluminum film 5 and the polycrystalline silicon film 4 are selectively and sequentially etched to form a wiring having a laminated structure of the polycrystalline silicon film 4 and the aluminum film 5. Next, a hydrogen alloy is applied at a temperature of about 400 ° C. for 20 to 60 minutes, and a wiring 6 in which the polycrystalline silicon film 3 is dissolved in the aluminum film 4 by the hydrogen alloy is formed.
To form Here, the silicon that could not be dissolved remains as a silicon nodule 7, but when the polycrystalline silicon film 3 is deposited at a pressure of 0.5 to 1.0 Torr,
The grain size of the polycrystalline silicon film 4 is reduced, the silicon nodule 7 is hardly deposited on the contact portion of the wiring 6, the contact resistance is stabilized, and there is no contact failure.

FIG. 2 shows LPCVD of the polycrystalline silicon film 4.
FIG. 9 is a diagram showing measurement result data of contact resistance between the wiring 6 and the diffusion layer when the pressure in FIG. When the pressure is in the range of 0.2 to 0.4 Torr, the variation in the contact resistance is large, and the pressure becomes 0.5 Torr or more, and the contact resistance starts to be stabilized. FIG. 3 shows LP
FIG. 4 is a diagram illustrating the occupation ratio of silicon nodules in a contact portion with respect to CVD pressure. The silicon nodule occupancy of the contact portion was defined as the silicon nodule area of the contact portion divided by the area of the contact portion. Thus, at 0.4 Torr or more, the occupation ratio of the silicon nodule in the contact portion becomes almost nil. It is considered that this causes the contact resistance in FIG. 2 to be stable.

The LPCVD growth of the polycrystalline silicon film 4 may be performed at a flow rate of 0.2 to 1.0 liter / minute with a dopant gas PH ₃ at a rate of 0.5 to 1.0 Torr. When the thickness of the crystalline silicon film 4 is increased, silicon nodules 7 are easily generated, but when doped, there is an advantage that the contact resistance can be reduced.

[0015]

As described above, according to the present invention, the pressure of LPCVD of a polycrystalline silicon film when forming a wiring having a laminated structure of an aluminum film and a polycrystalline silicon film is set to 0.5 to 0.5.
Performing at 1.0 Torr has the effect of reducing the size of the silicon nodule and preventing contact failure. By implementing the present invention, it is possible to reduce the contact failure by about 30%.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between pressure in LPCVD of a polycrystalline silicon film and contact resistance between a wiring and a diffusion layer.

FIG. 3 is a diagram showing the relationship between the pressure of LPCVD and the occupancy of silicon nodules in a contact portion.

FIG. 4 is a cross-sectional view of a semiconductor chip shown in the order of steps for describing a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate 2 interlayer insulating film 3 contact hole 4 polycrystalline silicon film 5 aluminum film 6 wiring 7 silicon nodule

Continuation of front page (56) References JP-A-60-46024 (JP, A) JP-A-49-96578 (JP, A) JP-A-53-108278 (JP, A) JP-A-63-9923 (JP) , A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01L 21/28 H01L 21/768

Claims (3)

(57) [Claims] A step of forming a contact hole by selectively opening an interlayer insulating film provided on a semiconductor substrate; and a method of forming a contact hole on the surface including the contact hole by a reduced-pressure vapor deposition method at a gas pressure of 0.5 Torr or more. Forming a polycrystalline silicon film by the above, a step of depositing an aluminum film on the polycrystalline silicon film, selectively etching the aluminum film and the polycrystalline silicon film sequentially, and then alloying with a hydrogen alloy to form a wiring. Forming a semiconductor device. 2. The polycrystalline silicon film has a thickness of 30 to 60 n.
2. The method for manufacturing a semiconductor device according to claim 1, wherein m is m. 3. A method as a reaction gas in the reduced pressure vapor phase epitaxy.
It is noted that silane gas and phosphine gas are used.
3. The manufacturing of the semiconductor device according to claim 1 or claim 2.
Construction method.