JP3065766B2 - Manufacturing method of multilayer printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to an additive method for forming at least an outermost conductive circuit, and a pin lamination method for laminating a multilayer substrate. The present invention relates to a method of manufacturing a multilayer printed wiring board in which the reference hole is used as a reference hole when drilling a through hole.

[0002]

2. Description of the Related Art Conventionally, as a method of forming a conductive circuit on a printed wiring board, a subtractive method of forming a conductive circuit by laminating a copper foil on an insulating substrate and then performing photoetching has been widely used. According to this method, it is possible to form a conductor circuit having excellent adhesion to the insulating substrate, but it is difficult to obtain a so-called undercut due to etching due to the thickness of the copper foil, and to obtain a highly accurate fine pattern.
There is a problem that it is difficult to cope with high density. Therefore, as an alternative to the subtractive method, an additive is formed by applying an adhesive to an insulating substrate to form an adhesive layer, roughening the surface of the adhesive layer, and applying electroless copper plating to form a conductor circuit. The law is drawing attention.

In recent years, miniaturization, high performance, and multi-functionality of electronic devices have been promoted, and multilayer printed wiring having a layer in which a conductive circuit is formed not only on both front and back surfaces of an insulating substrate but also inside. The board has been put to practical use. There is a pin lamination method as a method for manufacturing a multilayer printed wiring board. In the pin lamination method, an inner layer circuit board, an interlayer insulating material (prepreg), and an outer layer circuit substrate or metal foil, each having a reference hole formed therein, are laminated while positioning pins are inserted into the respective reference holes, and heated. Press to form a multilayer substrate.

[0004] Through holes are used for conduction between the inner and outer layers of the multilayer printed wiring board. At the time of drilling of a through hole by a drill, a resin, which is a material of the substrate, is softened by the generated frictional heat, and a phenomenon of attaching to the cut surface of the inner layer copper foil and the upper and lower copper foils, so-called smear, may occur.
When the additive method is used to form the outermost conductor circuit, the order of roughening and through-hole drilling of the adhesive layer applied to the outer circuit substrate differs depending on the type of the adhesive. That is, in the case of an adhesive that requires a small amount of etching for roughening the adhesive layer, a through-hole is drilled before the roughening of the adhesive layer, and the removal of the smear is performed by the roughening of the adhesive layer. Is performed at the same time as etching.
In addition, in the case of an adhesive that requires a large amount of etching required for roughening the adhesive layer, a through hole is drilled after the roughening of the adhesive layer, and roughening of the adhesive layer and removal of smear are performed. Going separately. This is because if the smear is removed simultaneously with the roughening of the adhesive that requires a large amount of etching, the etching agent penetrates between the inner conductor circuit and the base material or along the glass cloth of the base material, causing copper plating. This is because it becomes a defect that plating soak in the process increases.

[0005]

When drilling a through hole with a drill, a positioning reference hole or a target mark is required. When a multi-layer substrate is formed by the pin lamination method, it is convenient to share the reference hole at the time of lamination with the reference hole at the time of drilling a through hole. However, in the case of the additive method using an adhesive that requires a large amount of etching for roughening the adhesive layer, the hole wall of the reference hole is also etched at the time of roughening, and the hole diameter becomes large. When a reference hole having an increased hole diameter is used as a reference hole at the time of drilling a through-hole, there is a problem that a gap between the reference pin and the reference hole becomes large and accuracy of a drilling position is deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to use an additive method and a pin lamination method, and to use a reference hole at the time of lamination as a reference hole at the time of drilling a through hole. In the method of manufacturing a printed wiring board, when an adhesive that requires a large amount of etching necessary for roughening the adhesive layer is used, manufacturing a multilayer printed wiring board that can improve the positional accuracy of through-hole drilling It is to provide a method.

[0007]

According to the first aspect of the present invention, an additive method is used for forming at least the outermost conductive circuit, and a pin lamination method is used for laminating a multilayer substrate. In a method of manufacturing a multilayer printed wiring board in which a reference hole at the time of lamination is shared with a reference hole at the time of through-hole drilling, after forming a metal foil at least around the reference hole of the outermost layer, an adhesive to the surface of the multilayer substrate is formed. The layer was formed and the adhesive layer was roughened, and then a through-hole was formed.

Further, in the invention according to claim 2, as a method of forming a metal foil around the reference hole, a multilayer substrate is formed by laminating the metal foil in a state where the metal foil is arranged on the outermost layer, and then the reference hole of the reference hole is formed. The metal foil was formed around the reference hole in the outermost layer by removing the metal foil while leaving the surroundings.

According to the third aspect of the present invention, the outermost interlayer insulating material is cut off around the reference hole, and the metal foil is applied only to the cutout portion of the interlayer insulating material. After arranging and forming a multilayer substrate, an adhesive layer was formed on the surface of the multilayer substrate and the adhesive layer was roughened, and then a through-hole was formed.

[0010]

According to the method of the present invention, a multilayer substrate is formed with a metal foil formed around at least the outermost reference hole. Next, after an adhesive layer is formed on the surface of the multilayer substrate, the adhesive layer is roughened. The metal foil is not etched by the etching agent used for roughening the adhesive layer.
Therefore, the diameter of the reference hole does not change in the step of roughening the adhesive layer in the metal foil portion around the reference hole or in the hole wall. Next, through-hole drilling is performed. Since the diameter of the reference hole is held at a predetermined diameter corresponding to the reference pin in the metal foil portion, the accuracy of the drilling position is improved.

According to the second aspect of the present invention, the multilayer substrate is formed by laminating the metal foil on the outermost layer. Next, the metal foil is removed leaving the periphery of the reference hole, and the metal foil is formed around the reference hole of the outermost layer. After the formation of the adhesive layer, it is the same as above.

In the third aspect of the present invention, the outermost interlayer insulating material having a cutout around the reference hole is used. Then, the multi-layer substrate is laminated and formed in a state where the metal foil is arranged only in the cutout portion of the interlayer insulating material, and the metal foil is formed around the reference hole. After the formation of the adhesive layer, it is the same as above.

[0013]

(Embodiment 1) Hereinafter, the first embodiment of the present invention will be described.
An embodiment will be described with reference to FIGS.

The outermost layer is a copper foil (thickness: 70 μm) as a metal foil.
m) In the state where 1 was arranged, the inner-layer circuit board 2 and the prepreg 3 as an interlayer insulating material were laminated, and heated and pressed by a press device to form a multilayer board 4 as shown in FIG. Lamination was performed by a pin lamination method. That is, hot press molding was performed in a state where the positioning pins were inserted into the reference holes (diameter: 5 mm) 5 formed in the copper foil 1, the inner layer circuit board 2, and the prepreg 3, respectively.

Next, a resist layer 6 is formed at a position corresponding to the reference hole 5 of the copper foil 1 to a size of 1 cm square with the reference hole 5 as a center. The copper foil 1 other than the portion to be removed was removed (FIG. 1).
(State of (b)). Next, the resist layer 6 was peeled off. As a result, the copper foil 1 remains around the reference hole 5 of the multilayer substrate 4. Next, an adhesive was applied to the surface of the multilayer substrate 4 with a roll coater to form an adhesive layer 7 (the state of FIG. 1C). As the adhesive, bisphenol A type epoxy resin (manufactured by Yuka Shell, trade name: E-1001) 40 parts by weight, phenol novolak type epoxy resin (manufactured by Yuka Shell, trade name: E-154) 60 parts by weight, 5 parts by weight of an imidazole-type curing agent (manufactured by Shikoku Chemicals, trade name: 2PHZ), 10 parts by weight of epoxy resin fine particles (manufactured by Toray, trade name: Trepearl EP-B, average particle size: 0.5 μm), and epoxy resin fine particles ( Made by Toray, trade name: Trepal EP-B,
A mixture prepared by stirring and mixing 25 parts by weight (average particle size: 5.5 μm) and 75 parts by weight of butyl cellosolve acetate with a three-roller was used.

After the adhesive was completely cured, it was immersed in an aqueous solution of chromic acid as a solution to roughen the surface of the adhesive layer 7 (the state shown in FIG. 2A). The epoxy resin layer forming the adhesive layer 7 is hardly soluble in the dissolving solution, and the epoxy resin fine particles dispersed therein are soluble in the dissolving solution. Therefore, the fine particles are selected from the surface portion of the adhesive layer 7 by the dissolving solution. Is dissolved and removed to roughen the surface. Since the copper foil 1 is not etched by the solution used for roughening the adhesive layer 7, a portion of the hole wall of the reference hole 5 other than the copper foil 1 is slightly etched during the roughening treatment of the adhesive layer 7. However, the diameter of the reference hole 5 of the copper foil 1 does not change.

Next, a hole 8 for a through hole was formed by a drill (not shown) using the reference hole 5 at the time of lamination by the pin lamination method as a reference hole (the state of FIG. 2B).
As a result of measuring the positional accuracy of the hole 8, the positional deviation was ± 50 μm in both the X and Y directions. This value was equivalent to the accuracy when a multilayer printed wiring board was formed by the subtractive method.

(Comparative Example) The same inner layer circuit board 2 and prepreg 3 as in the above embodiment are laminated by a pin lamination method with release paper disposed on the outermost layer, and a multilayer having no copper foil on the outermost layer by hot press molding. Substrate 4 was formed. After forming and roughening the adhesive layer 7 on the multilayer substrate 4 in the same manner as in the above embodiment, through holes were drilled.
As a result of measuring the positional accuracy of the hole 8, the positional deviation was ± 60 μm in both the X and Y directions. That is, it was 20% worse than the position accuracy in the case of the above embodiment.

(Embodiment 2) Next, a second embodiment will be described. This embodiment differs from the previous embodiment in that the copper foil 1 around the reference hole 5 and the hole wall of the reference hole 5 are plated. After forming the multilayer substrate 4 having the copper foil 1 disposed on the outermost layer in the same manner as in the above embodiment, the multilayer substrate 4 is immersed in an electroless copper plating bath to surround the hole wall of the reference hole 5 and around the reference hole 5. Then, a copper plating layer 9 as a metal foil was formed (state of FIG. 3A). Next, the copper foil 1 was removed except for around the reference hole 5 in the same manner as in the above embodiment. Next, formation of the adhesive layer 7 on the surface of the multilayer substrate 4 and roughening of the adhesive layer 7 were performed (see FIG.
(State of (b)).

Next, a hole 8 for a through hole was formed by drilling using the reference hole 5 as a reference hole. The positional accuracy of the hole 8 was equivalent to the accuracy when the multilayer printed wiring board was formed by the subtractive method. In this embodiment, since the copper plating layer 9 is formed on the hole wall of the reference hole 5, the adhesive layer 7 is formed.
The diameter of the reference hole 5 does not change during the roughening process. That is, even if the thickness of the copper foil 1 is reduced, the diameter of the reference hole 5 is reliably maintained. Therefore, by reducing the thickness of the copper foil 1, the time for removing the copper foil 1 can be shortened and the amount of the removing solution used can be reduced.

(Embodiment 3) Next, a third embodiment will be described. This embodiment differs greatly from the previous embodiments in that the copper foil 1 is laminated only around the reference hole 5 without laminating the copper foil 1 on the entire surface of the multilayer substrate 4 when the multilayer substrate 4 is formed. I have.

The outermost prepreg 3 is shown in FIG.
As shown in FIG. 5, a notch 10 is formed around a positioning reference hole 5 when a multilayer substrate is formed by a pin lamination method and when a through hole is drilled. The prepreg 3 does not have the reference hole 5 but has a positioning hole 11 used only when the multilayer substrate 4 is formed. The reference holes 5 and the positioning holes 11 are formed in the prepreg 3 other than the prepreg 3 disposed on the inner layer circuit board 2 and the outermost layer.

The prepreg 3 (thickness: 100 μm) in which a cutout portion 10 is formed inside the release paper disposed on the outermost layer
And the prepreg 3 is also arranged between the prepreg 3 and the inner layer circuit board 2, and the copper foil 1 (thickness 100 μm) having the reference hole 5 is arranged at a position corresponding to the notch 10. , And press-molded with a press device to form a multilayer substrate 4 as shown in FIG. Next, after forming the adhesive layer 7 on the surface of the multilayer substrate 4 and roughening the adhesive layer 7, a hole 8 for a through hole was formed using the reference hole 5 as a reference hole (FIG. 5B). State). The positional accuracy of the hole 8 was equivalent to the accuracy when the multilayer printed wiring board was formed by the subtractive method.

In this embodiment, since the copper foil 1 is formed only around the reference hole 5, the copper foil 1 is different from the above two embodiments.
Is unnecessary. Therefore, it is easy to secure the diameter of the reference hole 5 by increasing the thickness of the copper foil 1.

Incidentally, the present invention is not limited to the above-mentioned embodiment. Instead of using a combination of an epoxy resin solution and epoxy resin fine particles as an adhesive, Japanese Patent Laid-Open No. 61-27687 is used.
Another combination of adhesives disclosed in US Pat. Further, the thickness of the copper foil 1 to be laminated on the outermost layer is changed, or the copper foil 1 is used as the outermost layer of the multilayer substrate by using a copper-clad laminate for the outermost layer at the time of lamination in the first and second embodiments. It may be arranged. In the second embodiment, the copper foil 1
May be formed on the periphery of the reference hole 5 and on the hole wall without laminating the outermost layer. Further, a metal foil other than the copper foil 1 may be used. Further, in the third embodiment, the positioning may be performed by the reference hole 5 without forming the positioning hole 11 as in the first and second embodiments, and the prepreg 3 of the second layer from the outermost layer may be used. It is also possible to form a so-called inner layer structure in which a notch 10 is formed in the notch 10 and a copper foil having a reference hole 5 is arranged in the notch 10.

[0026]

As described above in detail, according to the present invention, a multi-layer printed wiring board is manufactured by using an additive method and a pin lamination method, and sharing a reference hole for lamination with a reference hole for drilling a through-hole. In this case, even when using an adhesive that requires a large amount of etching required for roughening the adhesive layer, the positional accuracy of the through-hole drilling can be improved, and as a result, the high accuracy, which is an advantage of the additive method, is achieved. The property that a fine pattern can be formed can be utilized.

[Brief description of the drawings]

1A and 1B show a first embodiment, wherein FIG. 1A is a schematic partial sectional view showing a multilayer substrate, FIG. 1B is a schematic partial sectional view showing a state where a copper foil is etched, and FIG. FIG. 3 is a schematic partial cross-sectional view showing a state where an adhesive layer is formed.

FIG. 2A is a schematic partial cross-sectional view showing a state where the surface of an adhesive layer is roughened, and FIG. 2B is a schematic partial cross-sectional view showing a state where holes for through holes are formed.

3A and 3B show a second embodiment, in which FIG. 3A is a schematic partial cross-sectional view showing a state in which a copper plating layer is formed around a reference hole and a hole wall of a multilayer substrate, and FIG. FIG. 3 is a schematic partial cross-sectional view showing a roughened state.

FIG. 4 is a schematic plan view of a multilayer substrate according to a third embodiment.

FIG. 5A is a schematic partial sectional view showing a multilayer substrate,
(B) is a schematic partial cross-sectional view showing a state in which a hole for a through hole has been drilled.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Copper foil as a metal foil, 2 ... Interior circuit board, 3 ... Prepreg as an interlayer insulating material, 4 ... Multilayer board, 5 ... Reference hole, 7 ... Adhesive layer, 8 ... Hole, 9 ... Metal foil Copper plating layer, 10 ... notch.

Claims (3)

(57) [Claims] An additive method is used for forming at least the outermost conductive circuit, a pin lamination method is used for laminating a multilayer substrate (4), and a reference hole (5) for lamination is a reference hole for drilling a through hole. A method of manufacturing a multilayer printed wiring board commonly used for: a metal foil (1) at least around a reference hole (5) in an outermost layer;
Forming an adhesive layer (7) on the surface of the multilayer substrate (4), roughening the adhesive layer (7), and then drilling a through hole. Plate manufacturing method. 2. A multi-layer board (4) is laminated and formed with the metal foil (1) disposed on the outermost layer, and then the metal foil (1) is removed while leaving the periphery of the reference hole (5). The method according to claim 1, wherein the metal foil (1) is formed around the outermost reference hole (5). 3. An additive method is used for forming at least the outermost conductive circuit, a pin lamination method is used for laminating the multilayer substrate (4), and a reference hole (5) for laminating is a reference hole for drilling a through hole. In the method for manufacturing a multilayer printed wiring board commonly used for the above, the outermost interlayer insulating material (3) is provided with the reference hole (5).
Is cut out, and the metal foil (1) is arranged only in the cutout portion of the interlayer insulating material (3) to form a multilayer board (4). A method for manufacturing a multilayer printed wiring board, comprising forming an adhesive layer (7) on a surface, roughening the adhesive layer (7), and then drilling a through hole.