JP3085743B2 - Thyristor bridge bypass pair control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for controlling a bypass pair of a thyristor bridge used in, for example, AC / DC interconnection equipment such as DC power transmission.

[0002]

2. Description of the Related Art FIG. 2 shows one end of a conventional AC / DC interconnection facility used for DC power transmission and the like. 1 is a DC reactor, 2U, 2V, 2W, 2X, 2Y, 2Z are thyristors (thyristor valves), 3 is a transformer for a converter, 4
Reference numerals A and 4B denote a control panel for determining the thyristor ignition timing. Reference numeral 5 denotes a thyristor ignition instruction (referred to as a gate pulse GP) to each thyristor in response to an ignition timing instruction (referred to as a PHS signal) from the control panels 4A and 4B. A pulse generator (hereinafter referred to as PG). PG5 is composed of a single system. Reference numeral 6 denotes a gate pulse light guide.

The control panels 4A and 4B have a double structure of the A system and the B system.
Even if the S signal is not supplied to the PG 5, the PHS signal from the control panel 4A and the PHS signal from the control panel 4B are OR-circuited so that the gate pulse GP can be generated by the PHS signal from the sound control panel 4B. The PG5 is configured so as to be received by the (OR circuit).

FIG. 3 shows the configuration of one arm, in which 7 is an OR circuit, and 8 is a gate logic circuit.

[0005] In the AC / DC interconnection facility configured as described above, a bypass pair (hereinafter, referred to as BPP) operation may be performed when the system is started, stopped, or in an accident. BP
P is the thyristor of the converter, a state in which the high-side thyristor and the low-side thyristor connected to the same phase are conducting simultaneously, for example, 2U and 2X, 2V and 2Y or 2W and 2Z.
Refers to a state where is conducted.

There are several methods for determining the thyristor entering the BPP. As an example, as shown in FIG.
For a thyristor to which a PHS signal was last given before entering the BPP, there is a method of forming a BPP by giving a firing pulse to the next thyristor in the normal firing order. That is,
Finally, if the thyristor to which the PHS signal is applied is 2W, the PHS signal is applied to the thyristor 2U to turn on the thyristor 2U, and the thyristor 2U and the thyristor 2X become BPP.

[0007]

As shown in FIG. 2, when the control panel is duplicated with 4A and 4B, the following problems occur. It is assumed that an abnormality has occurred in one control panel, for example, a circuit for generating a 4A BPP command. At this time, the control panel 4
From B, a PHS signal is established only in the U and X phases, for example, so as to become a BPP, and no PHS signal is emitted in the other phases (V, W, Y, Z).

However, since the BPP circuit does not operate from the control panel 4A, the PHS signals are issued in the same order as in the normal operation. That is, V, W,
A PHS signal is also issued for the Y and Z phases.

Therefore, as shown in FIG. 3, the PG receives the signals of the control boards 4A and 4B in the OR circuit 7, so that when a PHS signal is issued from one of them, the gate logic circuit 8 operates accordingly. , The gate pulse is applied to the thyristor 2.

Therefore, the thyristors 2U, 2V, 2W, 2
The commutation operation of X, 2Y, and 2Z occurs due to the PHS signal from the control panel 4A, and the X, 2Y, and 2Z do not enter the BPP state.

When an AC system accident occurs, a thyristor 2U,
If the above-mentioned problem occurs during the inverter operation of 2V, 2W, 2X, 2Y, 2Z, the BPP state cannot be established, so that an overvoltage is generated in the AC system and the thyristor 2
There is a possibility that the U, 2V, 2W, 2X, 2Y, 2Z, the transformer 3, or an AC filter (not shown) may be broken.

[0012] An object of the present invention is to take the above problems into consideration, and to ensure that the thyristor can be replaced with a BPP even if one of the control systems has failed.
It is an object of the present invention to provide a method for controlling a thyristor bridge bypass pair that can be put into a thyristor bridge.

[0013]

SUMMARY OF THE INVENTION The present invention relates to a bypass pair control method for a thyristor bridge in which a thyristor bridge is operated in a bypass pair by a duplicated control system. Is a bypass pair control method for a thyristor bridge that locks a control signal supplied from the other control system to the thyristor bridge when a bypass pair command signal is output from the thyristor bridge.

[0014]

According to the present invention, if one control system issues a BPP command, the thyristor can be reliably turned into a BPP even if the other control system does not issue a BPP command.

[0015]

Embodiments of the present invention will be described below.

FIG. 1 shows an embodiment of the present invention. "1" when BPP operation is performed from control panel (control system) 4A, 4B
BPP-A and BPP-B are transmitted to the pulse generator (PG) 5. 7, 7A and 7B are OR circuits (OR circuits), 8 is a gate logic, 9A and 9B are AND circuits (AND circuits), and 10A and 10B are inversion circuits.

Next, the operation of the embodiment configured as described above will be described.

First, the normal operation will be described. BPP output from the control panels 4A and 4B during normal operation
Since the A and BPP-B signals are "0", the outputs of the inverting circuits 10A and 10B in the PG 5 are "1", and the outputs of the OR circuits 7A and 7B are also "1". One input of 9B is "1". Therefore, the gate logic circuit 8 outputs the gate pulse GP to the thyristor 2 by the PHS signal of the control panel 4A or 4B, and performs a normal operation.

Next, if there is an abnormality in the control panel 4A,
B operates to become BPP, but the control panel 4A does not operate BPP, and outputs the PHS signal in the same order as in normal operation.
It is assumed that an error has occurred in G5. At this time, B from the control panel 4B
Since the PP-B signal becomes "1", the output of the inverting circuit 10B becomes "0". Since the control panel 4A does not perform the BPP operation, the BPP-A signal is "0". Therefore, the output of the OR circuit 7B becomes "0". From the AND circuit 9
Since one input of A is “0”, the PHS signal output from the control panel 4A is not transmitted to the OR circuit 7.

On the other hand, since the output of the OR circuit 7A is "1", one input of the AND circuit 9B becomes "1" and the PHS signal from the control panel 4B passes through the OR circuit 7 and is input to the gate logic circuit 8. Will be done. Thus, the thyristor 2 can be BPP by the normal operation of the control panel 4B.

When both the control boards 4A and 4B are normally at BPP, both the BPP-A and BPP-B signals are "1", so that one input of the AND circuits 9A and 9B is "1". The thyristor 2 can be a BPP in accordance with the operation of the control panel 4A or 4B.

In the embodiment described above, the PG5 is described as a single system, but the same effect can be obtained with a double system.

[0023]

As described above, according to the thyristor bridge bypass pair control method of the present invention, if one control system issues a BPP command, the thyristor can be reliably mounted even if the other control system does not issue a BPP command. BPP is possible.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining one embodiment of the present invention.

FIG. 2 is a schematic configuration diagram of a conventional DC interconnection facility.

FIG. 3 is a configuration diagram showing signals between a control panel and a pulse generator per arm in FIG. 2;

FIG. 4 is a diagram for explaining a BPP state.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... DC reactor, 2U-Z ... Thyristor (thyristor valve), 3 ... Transformer, 4A, 4B ... Control panel, 5 ... Pulse generator, 6 ... Light guide for gate pulse, 7, 7
A, 7B: OR circuit, 8: Gate logic circuit, 9A,
9B: AND circuit, 10A, 10B: Inverting circuit.

Claims (1)

(57) [Claims] 1. A thyristor bridge bypass pair control method in which a thyristor bridge is operated in a bypass pair by a duplicated control system, wherein a bypass pair command signal is output from one of the duplicated control systems. A control signal supplied from the other control system to the thyristor bridge, wherein the control signal is locked.