JP3105574B2 - Sampling frequency control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control system for controlling a sampling frequency of an image coding apparatus reproduced on a receiving side by transmitting a sampling clock on a transmitting side as frequency information.

[0002]

2. Description of the Related Art Conventionally, a frequency control system of an image encoding apparatus extracts a frequency information difference between frequency information transmitted from a transmission side and reproduction frequency information reproduced on a reproduction side and integrates the difference by an integrator. The value output by the integrator is converted into an analog value by a digital / analog converter, and further the voltage controlled oscillator is controlled by the analog value to output a reproduction sampling frequency.

[0003]

In the above-mentioned conventional method, the voltage of the voltage controlled oscillator is controlled so that the frequency information on the transmitting side and the frequency information on the receiving side match. However, when an error occurs in the frequency information due to a transmission line error or the like. The voltage controlled oscillator is controlled so that the sampling frequency on the reproduction side follows the sampling frequency reproduced from the incorrect frequency information.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems inherent in the prior art, and an object of the present invention is to minimize the influence of an error in transmitted frequency information. It is an object of the present invention to provide a new sampling frequency control method which makes it possible to reproduce the sampling frequency on the reproduction side so as not to cause such a problem.

[0005]

In order to achieve the above object, a sampling frequency control method according to the present invention is characterized in that a clock obtained by dividing a sampling clock by N is divided by a period of a clock obtained by dividing a transmission line clock by M. The transmission result is transmitted from the transmitting side to the receiving side as frequency information from the transmitting side to the receiving side, and the receiving side of the transmitting apparatus that reproduces the sampling clock on the transmitting side using the frequency information on the receiving side converts the transmission line clock into M. A first frequency divider for dividing the frequency, a second frequency divider for dividing the reproduced sampling clock by N, and an output of the second frequency divider at a cycle of the output clock of the first frequency divider A counter for counting clocks,
An average value calculating circuit for calculating an average value of the frequency information transmitted from the transmitting side; and determining whether a difference between the average value output from the average value calculating circuit and the frequency information is within a certain range. A determination circuit, a selector for selecting either the value of the frequency information or the output value of the average value calculation circuit based on a determination result output from the determination circuit, and a counter for calculating the information output from the selector and the counter; A subtractor for taking a difference from a numerical value, an integrator for integrating a value output from the subtractor, a digital-analog converter for converting the value output from the integrator into digital-analog, and a digital-analog converter A voltage-controlled oscillator that oscillates the reproduced sampling clock by controlling the frequency in accordance with the value output from the converter.

[0006]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a preferred embodiment of the present invention.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In FIG. 1, a transmission line clock input from a terminal 1 is frequency-divided by a frequency divider 6 at a predetermined frequency division ratio M (M is a positive integer). As an example, assume that the frequency after frequency division is 31.25 MHz.

VC for generating a sampling clock on the reproduction side
Assuming that the frequency of the clock output from the O (voltage controlled oscillator) 12 is fsr = 14.32 MHz, the VCO
The frequency oscillated from 12 is frequency-divided by frequency divider 9 at a predetermined frequency division ratio N (N is a positive integer). Assuming that the frequency division ratio is N = 2, the counter 7 counts the period of the frequency divided by the frequency divider 6, that is, the number of clocks output from the frequency divider 9 at intervals of 32 msec. In this case, the numerical value per unit time output from the counter 7 is 229120.

Similarly, the frequency information sent from the transmission side is input to the average value calculation circuit 3, the judgment circuit 4 and the selector 5 through the terminal 2. The average value calculation circuit 3 calculates the average value of the transmission-side frequency information, and inputs this information to the determination circuit 4 and the selector 5. Average value calculation circuit 3
The average value of the transmission-side frequency information is obtained, and this information is input to the determination circuit 4 and the selector 5.

In the determination circuit 4, the transmission-side frequency information transmitted in a normal state always includes frequency information in the output range of the transmission-side oscillator (for example, ± 30 ppm). Therefore, when a transmission line error or the like occurs, the frequency information on the transmitting side suddenly fluctuates, so that the average value of the frequency information on the transmitting side up to A times before and the transmitting side transmitted this time Compared with the frequency information of
It is determined whether the value does not deviate more than the frequency information of the minute (however, the value of B is the upper limit of the fluctuation range of the oscillator on the transmission side + 30p).
pm, an arbitrary value within a range of frequency information of a lower limit of −30 ppm).

If the information determined and output by the determination circuit 4 is information that is within the range of ± B ppm,
If the transmission-side frequency information transmitted this time from the selector 5 is input to the subtracter 8, and if the out-of-range information is output from the determination circuit 4, similarly, the transmission-side frequency information up to the previous A times Is input from the selector 5 to the subtractor 8.

Next, the information output from the subtractor 8 is input to an integrator 10, and the integrated information is input to a digital / analog converter 11. The information converted into the analog value controls the oscillation frequency of the VCO 12 to change the frequency. Oscillated reproduction sampling frequency fsr
Is output to the terminal 13 and to the frequency divider 9.

In this way, even if erroneous frequency information is transmitted to the reproducing side, the sampling frequency on the reproducing side does not follow the erroneous frequency information.

[0015]

As described above, according to the present invention,
In an image encoding device that reproduces on the receiving side by transmitting the sampling clock on the transmitting side as frequency information,
If an error occurs in the transmitted frequency information, the average value of the previous frequency information is used instead of the erroneous frequency information, so that the sampling frequency on the reproduction side is not affected by the error. The effect is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Transmission line frequency input terminal 2 ... Transmission side frequency information input 3 ... Average value calculation circuit 4 ... Judgment circuit 5 ... Selector 6, 9 ... Divider 7 ... Counter 8 ... Subtractor 10 ... Integrator 11 ... Digital / analog Exchanger 12 VCO (voltage controlled oscillator) 13 Reproduction sampling frequency output terminal

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-311160 (JP, A) JP-A-4-207883 (JP, A) JP-A-2-27432 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H04L 7/00 H04N 1/00

Claims (1)

(57) [Claims] 1. A clock obtained by dividing a sampling clock by N is counted at a cycle of a clock obtained by dividing a transmission line clock by M, and the counting result is transmitted as frequency information from a transmitting side to a receiving side. On the receiving side of the transmission device that reproduces the sampling clock on the transmission side using the frequency information, a first frequency divider that divides the transmission line clock by M and a second frequency divider that divides the reproduction sampling clock by N A frequency divider, a counter for counting the output clock of the second frequency divider at the cycle of the output clock of the first frequency divider, and an average for calculating an average value of frequency information transmitted from the transmission side A value calculating circuit, a determining circuit for determining whether a difference between the average value output from the average value calculating circuit and the frequency information is within a certain range, and determining the frequency based on a determination result output from the determining circuit. Information value or previous A selector for selecting one of the output values of the average value calculation circuit, a subtractor for obtaining a difference between the information output from the selector and the count value of the counter, and integrating the value output from the subtractor A digital-to-analog converter that converts the value output from the integrator to digital-to-analog, and oscillates the reproduced sampling clock by controlling the frequency with the value output from the digital-to-analog converter. A sampling frequency control method, comprising: