JP3131165B2 - Method for manufacturing field electron emission type surge absorbing element - Google Patents
Method for manufacturing field electron emission type surge absorbing elementInfo
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- JP3131165B2 JP3131165B2 JP08355676A JP35567696A JP3131165B2 JP 3131165 B2 JP3131165 B2 JP 3131165B2 JP 08355676 A JP08355676 A JP 08355676A JP 35567696 A JP35567696 A JP 35567696A JP 3131165 B2 JP3131165 B2 JP 3131165B2
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- substrate
- frame member
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Description
【0001】[0001]
【発明の属する技術分野】この発明は、電源線や通信線
等を伝って侵入して来るサージ等の過電圧から電子機器
の電子回路を保護するために、線間あるは各線とグラン
ドとの間に挿入接続されるサージ吸収素子の製造方法に
係り、特に、電界電子放出現象を用いたサージ吸収素子
の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for protecting an electronic circuit of an electronic device from an overvoltage such as a surge that enters through a power line or a communication line, or between lines or between each line and a ground. More particularly, the present invention relates to a method for manufacturing a surge absorbing element using a field electron emission phenomenon.
【0002】[0002]
【従来の技術】従来、図8に示すように、電子機器の電
子回路60に通じる電源線や通信線等の線L1,L2間、あ
るいは各線とGND(グランド)との間にサージ吸収素
子62を接続し、誘導雷等のサージから電子回路60を保護
することが行われている。すなわち、線L1,L2間ある
いは線L1,L2−GND間に、サージ吸収素子62の定格
以上のサージ電圧が印加される場合には、上記サージ吸
収素子62が導通してサージをバイパスし、もって電子回
路60を保護する仕組みである。2. Description of the Related Art Conventionally, as shown in FIG. 8, a surge absorbing element 62 is provided between lines L1 and L2 such as a power supply line and a communication line leading to an electronic circuit 60 of an electronic device, or between each line and GND (ground). To protect the electronic circuit 60 from surges such as induced lightning. That is, when a surge voltage higher than the rating of the surge absorbing element 62 is applied between the lines L1 and L2 or between the lines L1 and L2 and GND, the surge absorbing element 62 conducts and bypasses the surge. This is a mechanism for protecting the electronic circuit 60.
【0003】このようなサージ吸収素子62としては、放
電間隙における放電現象を利用するガスアレスタや、電
圧非直線特性を備えた高抵抗体素子であるバリスタ、あ
るいはpn接合形半導体のアバランシェ(電子雪崩)効
果を利用したシリコンサージアブソーバなど様々な種類
が存在しているが、最近になって電界電子放出現象を用
いたサージ吸収素子が新たに加えられることとなった。As such a surge absorbing element 62, a gas arrester utilizing a discharge phenomenon in a discharge gap, a varistor which is a high-resistance element having a nonlinear voltage characteristic, or an avalanche (electron avalanche) of a pn junction type semiconductor is used. There are various types such as silicon surge absorbers utilizing the effect, but recently a surge absorbing element using a field electron emission phenomenon has been newly added.
【0004】この電界電子放出現象を用いたサージ吸収
素子は、特願平8−132728号に記載されている。図9及
び図10に示すように、そこで開示されている電界電子
放出型サージ吸収素子70は、n形半導体より成る第1の
基板部材12と第2の基板部材14とを所定の距離を隔てて
対向配置させ、両部材の対向面周縁をスペーサをも兼ね
た枠部材16を間に介して気密封止することによって形成
された外囲器18を備えており、該外囲器18内は10-6〜
10-8Torrの高真空状態に維持されている。[0004] A surge absorbing element using this field electron emission phenomenon is described in Japanese Patent Application No. 8-132728. As shown in FIGS. 9 and 10, the field emission type surge absorbing element 70 disclosed therein separates a first substrate member 12 and a second substrate member 14 made of an n-type semiconductor at a predetermined distance. And an outer envelope 18 formed by hermetically sealing the periphery of the opposing surface of both members via a frame member 16 also serving as a spacer. 10 -6 ~
It is maintained at a high vacuum of 10 -8 Torr.
【0005】また、上記第1の基板部材12の対向面に
は、n形半導体より成る多数のエミッタ・コーン20が、
所定の間隔をおいて突設されている。該エミッタ・コー
ン20は先端が尖った円錐または角錐形状をなしており、
その先端が第2の基板部材14の対向面に向いている。On the opposite surface of the first substrate member 12, a number of emitter cones 20 made of an n-type semiconductor are provided.
The projections are provided at predetermined intervals. The emitter cone 20 has a pointed cone or pyramid shape,
The front end faces the facing surface of the second substrate member 14.
【0006】エミッタ・コーン20の表面をも含んだ第1
の基板部材12の対向面と第2の基板部材14の対向面に
は、Nb、W、Mo、Cr、Ti、Th、Si、Ni、
La、Ge、Al等よりなる薄膜や、W及びZrの二層
構造、あるいは以上の各物質の中の少なくとも1種類を
含んだ炭化物、酸化物、窒化物、無機化合物より構成さ
れる保護膜22が被覆されている。The first including the surface of the emitter cone 20
The Nb, W, Mo, Cr, Ti, Th, Si, Ni,
A thin film made of La, Ge, Al or the like, a two-layer structure of W and Zr, or a protective film 22 made of carbide, oxide, nitride, or inorganic compound containing at least one of the above substances Is coated.
【0007】上記第1の基板部材12の外面には、第1の
層24aと第2の層24bとの二層構造を備えた第1の外部
電極層24が形成されており、この第1の外部電極層24に
はカソード端子28が接続されている。また、第2の基板
部材14の外面にも、第1の層26aと第2の層26bとの二
層構造を備えた第2の外部電極層26が形成されており、
この第2の外部電極層26にはアノード端子30が接続され
ている。そして、各端子28,30を線L1,L2あるいはG
NDに接続することにより、上記電界電子放出型サージ
吸収素子70は、図8に示したのと同様に、線L1,L2間
あるいは線L1,L2−GND間に挿入接続されることと
なる。On the outer surface of the first substrate member 12, a first external electrode layer 24 having a two-layer structure of a first layer 24a and a second layer 24b is formed. The cathode terminal 28 is connected to the external electrode layer 24. A second external electrode layer 26 having a two-layer structure of a first layer 26a and a second layer 26b is also formed on the outer surface of the second substrate member 14,
The anode terminal 30 is connected to the second external electrode layer 26. Then, connect each terminal 28, 30 to the line L1, L2 or G
By connecting to the ND, the field electron emission type surge absorbing element 70 is inserted and connected between the lines L1, L2 or between the lines L1, L2 and GND, as shown in FIG.
【0008】しかして、上記線L1,L2間あるいは線L
1,L2−GND間にサージ等の定格以上の過電圧が印加
され、カソード側のエミッタ・コーン先端部20aに強い
電界集中が生じると、量子力学的なトンネル効果によっ
て、n形半導体内の電子がポテンシャル障壁を越えて真
空中に放出される、いわゆる電界電子放出現象が生じ
る。放出された電子は高い電位のアノード側、すなわち
第2の基板部材14の対向面で捕捉される結果、第2の基
板部材14及び第1の基板部材12間に電流が流れる先駆放
電が生成され、この先駆放電はその後真空火花放電(真
空アーク放電)に移行することとなる。The line L1 and L2 or the line L
1. When an overvoltage exceeding a rating such as a surge is applied between L2 and GND, and strong electric field concentration occurs at the tip 20a of the emitter cone on the cathode side, electrons in the n-type semiconductor are caused by a quantum mechanical tunnel effect. A so-called field electron emission phenomenon that is emitted into a vacuum beyond the potential barrier occurs. The emitted electrons are captured on the anode side of the high potential, that is, on the facing surface of the second substrate member 14, so that a precursor discharge in which a current flows between the second substrate member 14 and the first substrate member 12 is generated. This precursor discharge then shifts to vacuum spark discharge (vacuum arc discharge).
【0009】上記先駆放電が真空火花放電に移行する仕
組みとしては、以下のものが考えられる。すなわち、上
記先駆放電時の電子放出によってエミッタ・コーン先端
部20aの電流密度が増加して生じた熱エネルギの作用
で、エミッタ・コーン20の表面を覆っている保護膜22を
構成する金属から金属蒸気が発生したり、先駆放電によ
る電子がアノード側に衝突する結果生じる熱エネルギに
よって、第2の基板部材14の対向面を覆っている保護膜
22の金属から同じく金属蒸気が発生し、これら電荷を帯
びた金属蒸気が電流を形成する素となって真空火花放電
が生起される。また、外囲器18内を完全な真空にするの
は実際上困難であり、放電空間を構成する物質の表面に
は僅かながらガス分子が吸着あるいは付着しているので
あるが、これらのガス分子が先駆放電の衝撃で空間内に
放出され、このイオン化されたガス分子が電流を形成す
る素となることも、真空火花放電を促進する要因として
挙げられる。The following is conceivable as a mechanism in which the precursor discharge shifts to a vacuum spark discharge. That is, due to the action of thermal energy generated by the increase in current density at the tip end portion 20a of the emitter cone due to electron emission during the precursor discharge, the metal constituting the protective film 22 covering the surface of the emitter cone 20 is changed from metal to metal. A protective film covering the opposing surface of the second substrate member 14 due to thermal energy generated as a result of generation of steam or collision of electrons due to the precursor discharge with the anode side.
Similarly, metal vapor is generated from the 22 metals, and these charged metal vapors serve as elements for forming an electric current to generate a vacuum spark discharge. Further, it is practically difficult to make the inside of the envelope 18 a complete vacuum, and gas molecules are slightly adsorbed or adhered to the surface of the material constituting the discharge space. Is released into the space by the impact of the precursor discharge, and the ionized gas molecules serve as elements for forming a current. This is also a factor promoting vacuum spark discharge.
【0010】上記の電界電子放出現象は、エミッタ・コ
ーン20に集中する電界強度が所定以上に高まった時点で
初めて生じるものであり、これは所定値以上の電圧が両
電極間に印加された場合にのみ両電極間に電流が流れる
ことを意味するものである。すなわち、両電極間に印加
される電圧の値と流れる電流との間には非直線的な関係
が現れるため、定格以上の過電圧が印加された場合にの
み導通して過電圧をバイパスするというサージ吸収作用
を発揮することが可能となる。The above-mentioned field electron emission phenomenon occurs only when the electric field intensity concentrated on the emitter cone 20 becomes higher than a predetermined value. This occurs when a voltage higher than a predetermined value is applied between both electrodes. Only means that a current flows between both electrodes. In other words, since a nonlinear relationship appears between the value of the voltage applied between the two electrodes and the flowing current, surge absorption occurs only when an overvoltage exceeding the rated voltage is applied and the overvoltage is bypassed. The function can be exerted.
【0011】しかも、半導体中の電子の速度に比べ、真
空中の電子は散乱を受けることなく進行するため、この
電界電子放出型サージ吸収素子70は極めて高速に動作可
能となる。また、p形半導体とn形半導体との接合構造
を有していないため、シリコンサージアブソーバのよう
に静電容量が大きくなるという問題も生じない。Furthermore, compared to the speed of electrons in a semiconductor, electrons in a vacuum travel without being scattered, so that the field electron emission type surge absorbing element 70 can operate at an extremely high speed. Further, since the semiconductor device does not have a junction structure between the p-type semiconductor and the n-type semiconductor, there is no problem that the capacitance is increased unlike the silicon surge absorber.
【0012】図11は、このような電界電子放出型サー
ジ吸収素子70によるサージ吸収特性を示すものであり、
ピーク電圧値が3kVの原サージ波形に対するサージ吸
収波形を示すグラフである。図示の通り、サージ電圧が
印加されると、瞬時にピークが約2.32kVの先駆放
電が生成した後、直ちに真空火花放電に移行して約40
0Vの安定したサージ吸収波形が得られる様子が示され
ている。FIG. 11 shows the surge absorption characteristics of such a field emission type surge absorbing element 70.
It is a graph which shows the surge absorption waveform with respect to the original surge waveform whose peak voltage value is 3 kV. As shown in the figure, when a surge voltage is applied, a precursor discharge having a peak of about 2.32 kV is instantaneously generated.
A state in which a stable surge absorption waveform of 0 V is obtained is shown.
【0013】図12は、電界電子放出型サージ吸収素子
の他の例を示すものである。この電界電子放出型サージ
吸収素子72は、n形半導体より成る第1の基板部材12と
第2の基板部材14とを所定の距離を隔てて対向配置し、
両部材の対向面周縁を枠部材16を間に介して気密封止す
ることによって外囲器18を形成し、該外囲器18の内部空
間を高真空状態となしている点で、上記の電界電子放出
型サージ吸収素子70と共通している。FIG. 12 shows another example of a field electron emission type surge absorbing element. In this field electron emission type surge absorbing element 72, a first substrate member 12 and a second substrate member 14 made of an n-type semiconductor are arranged to face each other at a predetermined distance,
The above-mentioned point is that the envelope 18 is formed by hermetically sealing the peripheral edges of the facing surfaces of both members with the frame member 16 interposed therebetween, and the internal space of the envelope 18 is in a high vacuum state. It is common to the field electron emission type surge absorbing element 70.
【0014】これに対し、第1の基板部材12の対向面
が、多数のエミッタ・コーン20が突設された第1の電子
放出部34と、エミッタ・コーン20が形成されずに平面状
を維持している第1の平面部35とに区分けされていると
共に、第2の基板部材14の対向面も、多数のエミッタ・
コーン20が突設された第2の電子放出部36と、エミッタ
・コーンが形成されずに平面状を維持している第2の平
面部37とに区分けされている点に特徴を有している。そ
して、第1の基板部材12の第1の電子放出部34が第2の
基板部材14の第2の平面部37と対向するように、また第
2の基板部材14の第2の電子放出部36が第1の基板部材
12の第1の平面部35と対向するように、両基板部材は位
置決めされている。On the other hand, the opposing surface of the first substrate member 12 has a first electron-emitting portion 34 having a large number of emitter cones 20 projecting therefrom, and a planar shape without the emitter cone 20 being formed. The second substrate member 14 is divided into a plurality of first flat portions 35 which are maintained, and a plurality of emitters
It is characterized in that it is divided into a second electron emitting portion 36 in which the cone 20 is protruded, and a second flat portion 37 in which an emitter cone is not formed and maintains a flat shape. I have. Then, the first electron emission portion 34 of the first substrate member 12 is opposed to the second plane portion 37 of the second substrate member 14, and the second electron emission portion of the second substrate member 14 is 36 is the first substrate member
The two substrate members are positioned so as to face the first flat portion 35 of the substrate 12.
【0015】両基板部材の対向面には、上記と同様の保
護膜22がそれぞれ形成されている。また、第1の基板部
材12の外面には、第1の外部電極層24が形成されてお
り、該第1の外部電極層24には第1の外部端子38が接続
されている。さらに、第2の基板部材14の外面には、第
2の外部電極層26が形成されており、該第2の外部電極
層26には第2の外部端子40が接続されている。On the opposing surfaces of the two substrate members, the same protective films 22 as described above are formed. A first external electrode layer 24 is formed on the outer surface of the first substrate member 12, and a first external terminal 38 is connected to the first external electrode layer 24. Further, a second external electrode layer 26 is formed on the outer surface of the second substrate member 14, and a second external terminal 40 is connected to the second external electrode layer 26.
【0016】この電界電子放出型サージ吸収素子72は、
上記のようにエミッタ・コーン20を第1の外部端子38側
及び第2の外部端子40側にそれぞれ設けることにより、
第1の外部電極層24と第2の外部電極層26との間で電子
を双方向に放出可能な構造を備えており、極性に気遣う
ことなく利用できると共に、何らかの理由によって逆方
向に過電圧が印加される場合にも対処できる利点を有す
るものである。The field electron emission type surge absorbing element 72
By providing the emitter cone 20 on the first external terminal 38 side and the second external terminal 40 side as described above,
It has a structure capable of bidirectionally emitting electrons between the first external electrode layer 24 and the second external electrode layer 26, and can be used without concern for polarity. This has an advantage that it can cope with the case where the voltage is applied.
【0017】ところで、電界電子放出型サージ吸収素子
の場合、外囲器18の内部を高真空状態に維持しておく必
要があり、そのためには第1の基板部材12と枠部材16の
一方の端面間の接合、及び第2の基板部材14と枠部材16
の他方の端面間の接合が、十分に高い気密性を保って実
現される必要がある。In the case of a field electron emission type surge absorbing element, it is necessary to maintain the inside of the envelope 18 in a high vacuum state. To this end, one of the first substrate member 12 and one of the frame members 16 is required. Joining between end faces, and second substrate member 14 and frame member 16
Is required to be realized while maintaining a sufficiently high airtightness.
【0018】第1の基板部材12及び第2の基板部材14と
枠部材16とを接合する方法としては、フリットガラスや
低融点ガラスを用いて融着させる方法、あるいはポリイ
ミド系の有機接着剤を用いて接着させる方法が一般的で
あるが、両者とも接合工程において余計なガスが発生す
るため、接合後に外囲器18内部のガスを排気する必要が
ある。そして、この脱ガス処理を施すには外囲器18に排
気管を接続しなければならず、例え排気後に当該排気管
を溶融・封止して切除するとしても、溶融封止部が突出
したまま残されるため、外囲器18全体の厚さが増大する
ことが避けられないものであった。また、特に有機接着
剤を用いた接合方法の場合には、使用の過程においても
徐々にガス放出が生じるのみならず、比較的高温の環境
下において使用すると、接合強度が低下するという問題
が指摘されていた。そこで、これらの接合方法の欠点を
克服するものとして、最近では陽極接合法を用いるケー
スが増えてきている。The first substrate member 12 and the second substrate member 14 are joined to the frame member 16 by fusing using frit glass or low-melting glass, or using a polyimide-based organic adhesive. The method of bonding is generally used, but in both cases, unnecessary gas is generated in the bonding step, so it is necessary to exhaust the gas inside the envelope 18 after bonding. In order to perform this degassing process, an exhaust pipe must be connected to the envelope 18, and even if the exhaust pipe is melted and sealed and cut off after evacuation, the melt-sealed portion protrudes. Since it is left as it is, it is inevitable that the thickness of the entire envelope 18 increases. In addition, particularly in the case of a bonding method using an organic adhesive, not only gas is gradually released during the use process, but also a problem that the bonding strength is reduced when used in a relatively high temperature environment. It had been. Then, in order to overcome the shortcomings of these bonding methods, the use of the anodic bonding method has recently been increasing.
【0019】この陽極接合法を用いて外囲器18を形成す
る工程を、図13〜図15に沿って説明する。まず、図
13に示すように、ホットプレート42上に第2の基板部
材14を、第2の外部電極層26を下にして載置すると共
に、内部にNa+やH+などの可動イオンを含むガラスに
よって構成した枠部材16の一方の端面を、第2の基板部
材14の対向面周縁14aに重ねる。この枠部材16の他方の
端面には、枠部材16の端面形状に対応した形状の電極板
74が圧着される。また、上記第2の基板部材14の第2の
外部電極層26には、ホットプレート42を経由して直流電
源46のプラス側が接続されると共に、上記電極板74には
直流電源46のマイナス側が接続される。そして、上記ホ
ットプレート42によって、第2の基板部材14及び枠部材
16が摂氏200〜600度に加熱された状態で、上記直
流電源より50〜1000Vの直流電圧が印加される。A process for forming the envelope 18 using the anodic bonding method will be described with reference to FIGS. First, as shown in FIG. 13, the second substrate member 14 is placed on the hot plate 42 with the second external electrode layer 26 facing down, and mobile ions such as Na + and H + are placed inside. One end surface of the frame member 16 made of glass is included on the peripheral edge 14a of the facing surface of the second substrate member 14. On the other end surface of the frame member 16, an electrode plate having a shape corresponding to the end surface shape of the frame member 16 is provided.
74 is crimped. The positive side of the DC power supply 46 is connected to the second external electrode layer 26 of the second substrate member 14 via the hot plate 42, and the negative side of the DC power supply 46 is connected to the electrode plate 74. Connected. Then, the second substrate member 14 and the frame member are
16 is heated to 200 to 600 degrees Celsius, and a DC voltage of 50 to 1000 V is applied from the DC power supply.
【0020】この結果、図14に示すように、一定時間
経過後には枠部材16中の陽イオン48がマイナス側(すな
わち枠部材16の上端面近傍)に移動すると共に、第2の
基板部材14の対向面周縁14a近傍にマイナスの電荷が集
中して空間電荷層50が現れ、大きな吸引力を伴う化学結
合が生じて陽極接合が実現される。As a result, as shown in FIG. 14, after a certain period of time, the cations 48 in the frame member 16 move to the minus side (ie, near the upper end surface of the frame member 16), and the second substrate member 14 The negative charge is concentrated near the periphery 14a of the opposed surface to form the space charge layer 50, and a chemical bond accompanied by a large attractive force is generated, thereby realizing anodic bonding.
【0021】以上のようにして、第2の基板部材の対向
面周縁14aと枠部材16の一方の当接面との強固な接合が
完了した後、図15に示すように、今度は真空雰囲気中
において、ホットプレート42上に第1の基板部材12を第
1の外部電極層24を下にして載置すると共に、枠部材16
の他方の端面を第1の基板部材の対向面周縁12aに当接
させる。また、上記第1の基板部材12の第1の外部電極
層24には、ホットプレート42経由して直流電源46のプラ
ス側が接続されると共に、第2の基板部材14の第2の外
部電極層26には直流電源46のマイナス側が接続される。
そして、上記ホットプレート42によって、第1の基板部
材12及び枠部材16が摂氏200〜600度に加熱された
状態で、上記直流電源46より50〜1000Vの直流電
圧が印加される。この結果、上記と同様のメカニズムに
よって、第1の基板部材の対向面周縁12aと枠部材16の
当接面との強固な陽極接合が実現され、高い気密性を備
えた外囲器18が完成するのである。After the solid bonding between the peripheral edge 14a of the second substrate member and one contact surface of the frame member 16 has been completed as described above, as shown in FIG. Inside, the first substrate member 12 is placed on the hot plate 42 with the first external electrode layer 24 facing down, and the frame member 16
Is brought into contact with the peripheral edge 12a of the opposing surface of the first substrate member. The positive side of the DC power supply 46 is connected to the first external electrode layer 24 of the first substrate member 12 via the hot plate 42, and the second external electrode layer 24 of the second substrate member 14 The negative side of the DC power supply 46 is connected to 26.
Then, while the first substrate member 12 and the frame member 16 are heated to 200 to 600 degrees Celsius by the hot plate 42, a DC voltage of 50 to 1000 V is applied from the DC power supply 46. As a result, a strong anodic bonding between the peripheral edge 12a of the first substrate member and the contact surface of the frame member 16 is realized by the same mechanism as described above, and the envelope 18 having high airtightness is completed. You do it.
【0022】[0022]
【発明が解決しようとする課題】上記の陽極接合法は、
溶融ガラスや接着剤を使用しないため、両基板部材と枠
部材とを高い位置精度で接合することができると共に、
接合後の脱ガス処理が不要である利点を備えている。し
かしながら、陽極接合法を用いて両基板部材と枠部材と
を接合する従来の製造方法には、以下のような欠点があ
った。The above-described anodic bonding method comprises:
Since no molten glass or adhesive is used, both the substrate member and the frame member can be joined with high positional accuracy,
It has the advantage that degassing after joining is unnecessary. However, the conventional manufacturing method of joining the two substrate members and the frame member using the anodic bonding method has the following disadvantages.
【0023】まず、第2の基板部材14と枠部材16との接
合、及び第1の基板部材12と枠部材16との接合を別々に
行うものであるため、製造効率が低いという問題があ
る。つぎに、枠部材16の厚さが薄い(例えば500μm
以下)場合には、第2の基板部材14と枠部材16との接合
時に(図13)、枠部材16内の陽イオン48が電極板74側
の端面近傍に蓄積され過ぎる結果、枠部材16を裏返して
当該端面を第1の基板部材12の対向面周縁12aに当接さ
せ(図15)、第2の基板部材14側にマイナスの電位を
加えても、図16に示すように陽イオン48が第2の基板
部材14側に移動できなくなる。このため、第1の基板部
材12との当接面近傍に空間電荷層を形成することができ
ず、第1の基板部材12と枠部材16間の陽極接合が困難と
なる場合が生じる。さらに、図12に示した両方向に放
電可能な電界電子放出型サージ吸収素子72の場合、図1
7に示すように、枠部材16と第1の基板部材12とを接合
する際には、第2の基板部材14側のエミッタ・コーン20
に対しては、電界電子放出を起こさせる方向に電圧の印
加がなされることとなる。したがって、この印加電圧が
当該サージ吸収素子72の定格電圧以上となる場合には、
第2の基板部材14のエミッタ・コーンの先端20aから電
子が放出してサージ吸収動作が開始され、第1の基板部
材12と第2の基板部材14間が外囲器18内で導通してしま
うため、枠部材16内に空間電荷層を形成することができ
ず、枠部材16と第1の基板部材12との陽極接合が不可能
となってしまう。このため、接合工程で印加される電圧
値よりも高い定格電圧を備えた素子以外には、この陽極
接合法を適用できないこととなる。First, since the joining between the second substrate member 14 and the frame member 16 and the joining between the first substrate member 12 and the frame member 16 are performed separately, there is a problem that the manufacturing efficiency is low. . Next, the thickness of the frame member 16 is thin (for example, 500 μm
In the following case, when the second substrate member 14 and the frame member 16 are joined (FIG. 13), the cations 48 in the frame member 16 are excessively accumulated near the end face on the electrode plate 74 side, and as a result, the frame member 16 And the end face is brought into contact with the peripheral edge 12a of the opposing surface of the first substrate member 12 (FIG. 15). Even if a negative potential is applied to the second substrate member 14 side, as shown in FIG. 48 cannot move to the second substrate member 14 side. For this reason, a space charge layer cannot be formed in the vicinity of the contact surface with the first substrate member 12, and it may be difficult to perform anodic bonding between the first substrate member 12 and the frame member 16. Further, in the case of the field electron emission type surge absorbing element 72 capable of discharging in both directions shown in FIG.
As shown in FIG. 7, when the frame member 16 and the first substrate member 12 are joined together, the emitter cone 20 on the second substrate member 14 side is used.
, A voltage is applied in a direction in which field electron emission is caused. Therefore, when the applied voltage is equal to or higher than the rated voltage of the surge absorbing element 72,
Electrons are emitted from the tip 20a of the emitter cone of the second substrate member 14 to start a surge absorbing operation, and the first substrate member 12 and the second substrate member 14 are electrically connected in the envelope 18 to be conducted. For this reason, a space charge layer cannot be formed in the frame member 16, and anodic bonding between the frame member 16 and the first substrate member 12 becomes impossible. For this reason, the anodic bonding method cannot be applied to devices other than devices having a rated voltage higher than the voltage value applied in the bonding step.
【0024】この発明は、従来の陽極接合法の欠点を解
消するために案出されたものであり、その目的とすると
ころは、第2の基板部材と枠部材との接合、及び第1の
基板部材と枠部材との接合を同時に達成することができ
ると共に、枠部材の厚さを比較的薄く設定した場合であ
っても接合不能となることがなく、しかも第1の基板部
材及び第2の基板部材の両方向に向けて電子放出が可能
なタイプの電界電子放出型サージ吸収素子の場合でも、
接合工程における電圧印加によってサージ吸収動作が生
じてしまうことのない接合方法を実現することにある。The present invention has been devised in order to solve the drawbacks of the conventional anodic bonding method, and its object is to bond the second substrate member to the frame member, and to achieve the first and second methods. The joining of the substrate member and the frame member can be achieved at the same time, and even when the thickness of the frame member is set to be relatively small, the joining does not become impossible, and the first substrate member and the second Even in the case of a field electron emission type surge absorption element of a type capable of emitting electrons in both directions of the substrate member,
An object of the present invention is to realize a joining method that does not cause a surge absorbing operation due to voltage application in a joining process.
【0025】[0025]
【課題を解決するための手段】上記の目的を達成するた
め、この発明に係るサージ吸収素子の製造方法は、半導
体より成り、一方の面に多数のエミッタ・コーンを一体
形成した電子放出部を備えると共に、他方の面に外部電
極層を形成してなる第1の基板部材と、半導体より成
り、一方の面に平面部を備えると共に、他方の面に外部
電極層を形成してなる第2の基板部材とを、上記第1の
基板部材のエミッタ・コーンの先端部と上記第2の基板
部材の平面部とが所定の距離を隔てて対向するように配
置し、真空雰囲気中において両基板部材の対向面周縁を
枠部材を間に介して気密封止することによって、内部が
高真空状態となされた外囲器を形成する電界電子放出型
サージ吸収素子の製造方法において、上記枠部材とし
て、内部に可動イオンを含む絶縁材より構成され、上記
第1の基板部材の対向面周縁と接する第1の当接面と、
上記第2の基板部材の対向面周縁と接する第2の当接面
と、対向配置された両基板部材の外側面から突出する外
周縁部とを備えたものを用い、上記第1の基板部材、枠
部材、第2の基板部材を順に積層載置すると共に、上記
枠部材の外周縁部端面に、該外周縁部端面に対応する形
状に折曲され、上記外周縁部端面を覆う金属帯よりなる
電極枠を圧着し、上記両基板部材の外部電極層には直流
電源のプラス側をそれぞれ接続すると共に、上記電極枠
には上記直流電源のマイナス側を接続し、所定の温度に
加熱された真空雰囲気中において、上記直流電源より電
圧を印加することにより、上記枠部材の外周縁部の端面
全体に均一に電圧を印加し、以て、上記第1の基板部材
の対向面周縁と上記枠部材の第1の当接面とを陽極接合
すると同時に、第2の基板部材の対向面周縁と上記枠部
材の第2の当接面とを陽極接合することを特徴とする。In order to achieve the above object, a method of manufacturing a surge absorbing element according to the present invention comprises an electron emitting portion made of a semiconductor and having a plurality of emitter cones integrally formed on one surface. A first substrate member having an external electrode layer formed on the other surface, and a second substrate formed of a semiconductor and having a flat portion on one surface and an external electrode layer formed on the other surface. Are arranged such that the tip of the emitter cone of the first substrate member and the plane portion of the second substrate member face each other at a predetermined distance, and the two substrates are placed in a vacuum atmosphere. In a method of manufacturing a field electron emission type surge absorbing element in which an outer peripheral surface of a member is hermetically sealed with a frame member interposed therebetween to form an envelope whose inside is in a high vacuum state, With mobile ions inside Consists of an insulating material including, a first contact surface in contact with the facing surface peripheral edge of the first substrate member,
The first substrate member is provided with a second contact surface in contact with a peripheral edge of the opposing surface of the second substrate member, and an outer peripheral portion protruding from the outer surfaces of both the substrate members disposed opposite to each other. , A frame member, and a second substrate member are sequentially stacked and mounted, and a metal band is formed on the outer peripheral edge end surface of the frame member so as to be bent into a shape corresponding to the outer peripheral edge end surface and covers the outer peripheral edge end surface. The electrode frame composed of the above-mentioned electrodes is press-bonded, and the external electrode layers of both the substrate members are connected to the positive side of the DC power supply, respectively, and the electrode frame is connected to the negative side of the DC power supply, and heated to a predetermined temperature. In a vacuum atmosphere, by applying a voltage from the DC power source, a voltage is uniformly applied to the entire end face of the outer peripheral edge of the frame member. At the same time as anodically bonding the first contact surface of the frame member to the first contact surface, An abutment surface second opposing surface perimeter and the frame member of the board members, characterized in that anodic bonding.
【0026】また、本発明に係る他の電界電子放出型サ
ージ吸収素子の製造方法は、半導体より成り、一方の面
に多数のエミッタ・コーンを一体形成した電子放出部と
エミッタ・コーンが形成されない平面部とを備えると共
に、他方の面に外部電極層を形成してなる第1の基板部
材と、同じく半導体より成り、一方の面に多数のエミッ
タ・コーンを一体形成した電子放出部とエミッタ・コー
ンが形成されない平面部とを備えると共に、他方の面に
外部電極層を形成してなる第2の基板部材とを、一方の
基板部材のエミッタ・コーンの先端部と他方の基板部材
の平面部とが所定の距離を隔てて対向するように配置
し、真空雰囲気中において両基板部材の対向面周縁を枠
部材を間に介して気密封止することによって、内部が高
真空状態となされた外囲器を形成する電界電子放出型サ
ージ吸収素子の製造方法において、上記枠部材として、
内部に可動イオンを含む絶縁材より構成され、上記第1
の基板部材の対向面周縁と接する第1の当接面と、上記
第2の基板部材の対向面周縁と接する第2の当接面と、
対向配置された両基板部材の外側面から突出する外周縁
部とを備えたものを用い、上記第1の基板部材、枠部
材、第2の基板部材を順に積層載置すると共に、上記枠
部材の外周縁部端面に、該外周縁部端面に対応する形状
に折曲され、上記外周縁部端面を覆う金属帯よりなる電
極枠を圧着し、上記両基板部材の外部電極層には直流電
源のプラス側をそれぞれ接続すると共に、上記電極枠に
は上記直流電源のマイナス側を接続し、所定の温度に加
熱された真空雰囲気中において、上記直流電源より電圧
を印加することにより、上記枠部材の外周縁部の端面全
体に均一に電圧を印加し、以て、上記第1の基板部材の
対向面周縁と上記枠部材の第1の当接面とを陽極接合す
ると同時に、第2の基板部材の対向面周縁と上記枠部材
の第2の当接面とを陽極接合することを特徴とする。In another method of manufacturing a field emission type surge absorbing element according to the present invention, an electron emission portion having a plurality of emitter cones integrally formed on one surface and an emitter cone are not formed. A first substrate member having a flat portion and an external electrode layer formed on the other surface; an electron emission portion formed of the same semiconductor and having a large number of emitter cones integrally formed on one surface; A second substrate member having an external electrode layer formed on the other surface, comprising: a front end portion of the emitter cone of one substrate member; and a flat portion of the other substrate member. Are arranged so as to face each other with a predetermined distance therebetween, and the inside is made to be in a high vacuum state by hermetically sealing the peripheral edges of the opposing surfaces of both substrate members in a vacuum atmosphere with a frame member interposed therebetween. The method of manufacturing a field electron emission type surge absorber forming the envelope, as the frame member,
It is composed of an insulating material containing movable ions inside,
A first contact surface in contact with the peripheral edge of the opposing surface of the substrate member, a second contact surface in contact with the peripheral edge of the opposing surface of the second substrate member,
The first substrate member, the frame member, and the second substrate member are sequentially stacked and mounted, and the frame member is provided with an outer peripheral portion protruding from the outer surface of both of the opposed substrate members. An electrode frame made of a metal band which is bent into a shape corresponding to the outer peripheral edge end face and is crimped to the outer peripheral edge end face, and a DC power supply is applied to the external electrode layers of both substrate members. By connecting the negative side of the DC power supply to the electrode frame, and applying a voltage from the DC power supply in a vacuum atmosphere heated to a predetermined temperature, thereby forming the frame member. A voltage is applied uniformly to the entire end surface of the outer peripheral edge of the first substrate member, whereby the peripheral edge of the opposing surface of the first substrate member and the first contact surface of the frame member are anodically bonded, and at the same time, the second substrate The periphery of the opposing surface of the member and the second contact surface of the frame member Characterized by polar bonding.
【0027】上記枠部材は、例えば内部にNa+を含む
硼珪酸ガラスによって構成される。The frame member is made of, for example, borosilicate glass containing Na + inside.
【0028】しかして、第1の基板部材及び第2の基板
部材と枠部材とを接合するために、直流電源より所定の
電圧を印加すると、電極枠を介して直流電源のマイナス
側が接続された枠部材の外周縁部に陽イオンが蓄積され
るのに対し、それぞれ直流電源のプラス側に接続された
第1の基板部材及び第2の基板部材との界面部分(すな
わち、枠部材の第1の当接面及び第2の当接面近傍)に
マイナスの電荷が集積して空間電荷層が発生し、第1の
基板部材及び第2の基板部材と枠部材との陽極接合が同
時に実現される。すなわち、従来のように一方の基板部
材と枠部材の一方の端面との接合が完了してから、他方
の基板部材と枠部材の他方の端面との接合に取りかかる
ものではないため、枠部材の一方の端面近傍に過蓄積さ
れたプラスの電荷が他方の基板部材との接合時に他方の
端面側にうまく移動できず、この結果陽極接合自体が困
難となるという問題は、はじめから生じることがない。
もちろん、第1の基板部材と枠部材との接合、及び第2
の基板部材と枠部材との接合が同時に実現できることに
より、製造効率の向上も達成できる。また、上記枠部材
の外周縁部端面に、該外周縁部端面に対応する形状に折
曲され、上記外周縁部端面を覆う金属帯よりなる電極枠
を圧着すると共に、該電極枠に上記直流電源のマイナス
側を接続することにより、上記外周縁部の端面全体に均
一に電圧を印加するため、枠部材中の陽イオンが外周縁
部の端面近傍に満遍なく集積され、枠部材の第1の当接
面及び第2の当接面に空間電荷層がムラなく形成され
る。このため、第1の基板部材の対向面周縁と枠部材の
第1の当接面との接合、及び第2の基板部材の対向面周
縁と枠部材の第2の当接面との接合を極めて強固なもの
にできる。上記枠部材として、第1の基板部材及び第2
の基板部材の外側面から突出した外周縁部を備えたもの
を採択したのは、直流電源のマイナス側を接続して電圧
を印加した際に、プラスの電荷を蓄積させるスペースを
確保するためである。また、枠部材の外周縁部が第1の
基板部材及び第2の基板部材の外側面から突出している
ため、第1の基板部材の外部電極層と第2の基板部材の
外部電極層間の沿面距離が、絶縁物質よりなる外周縁部
が突出する分長くなるため、サージ吸収素子として使用
中に、外囲器の内部で放電生成される代わりに、誤って
外囲器の外側面を通じて両外部電極層間が導通してしま
うことを有効に防止できる。 When a predetermined voltage was applied from the DC power supply to join the first substrate member and the second substrate member to the frame member, the negative side of the DC power supply was connected via the electrode frame. Positive ions are accumulated at the outer peripheral edge of the frame member, while the interface portion between the first substrate member and the second substrate member connected to the positive side of the DC power source (that is, the first portion of the frame member). Negative charges accumulate on the contact surface and the second contact surface) to generate a space charge layer, and anodic bonding of the first and second substrate members and the frame member is simultaneously realized. You. That is, since the joining between the other substrate member and the other end surface of the frame member is not started after the joining of the one substrate member and the one end surface of the frame member is completed as in the related art, Positive charges excessively accumulated in the vicinity of one end face cannot be moved to the other end face side at the time of joining with the other substrate member, so that the problem that anodic joining itself becomes difficult does not occur from the beginning. .
Of course, the joining between the first substrate member and the frame member, and the second
Since the bonding of the substrate member and the frame member can be realized at the same time, improvement in manufacturing efficiency can also be achieved. In addition, an electrode frame made of a metal band that is bent into a shape corresponding to the outer peripheral edge end face and is pressed on the outer peripheral edge end face of the frame member, and the direct current is applied to the electrode frame. By connecting the negative side of the power supply, a voltage is uniformly applied to the entire end face of the outer peripheral edge, so that the cations in the frame member are uniformly accumulated near the end face of the outer peripheral section, and the first of the frame member is The space charge layer is formed evenly on the contact surface and the second contact surface. For this reason, the joining of the peripheral edge of the facing surface of the first substrate member to the first contact surface of the frame member and the joining of the peripheral edge of the facing surface of the second substrate member to the second contact surface of the frame member are performed. It can be very strong. As the frame member, a first substrate member and a second substrate member
The reason for adopting the one with the outer peripheral edge protruding from the outer surface of the substrate member is to secure a space for storing a positive charge when a voltage is applied by connecting the negative side of the DC power supply. is there. Further, the outer peripheral edge of the frame member is the first edge.
Projecting from the outer surface of the substrate member and the second substrate member
Therefore, the external electrode layer of the first substrate member and the external electrode layer of the second substrate member
The creepage distance between the external electrode layers should be
Used as surge absorbing element
During the discharge, instead of being generated inside the envelope,
Conduction between the external electrode layers through the outer surface of the envelope
Can be effectively prevented.
【0029】また、接合時には第1の基板部材及び第2
の基板部材に対して同時に同電位の電圧が印加されるた
め、第1の基板部材及び第2の基板部材の両方にエミッ
タ・コーンを形成したタイプの電界電子放出型サージ吸
収素子であっても、印加電圧値の如何によらず外囲器内
で放電が発生することがない。したがって、例え接合時
に印加される電圧の値が当該電界電子放出型サージ吸収
素子の動作電圧以上であっても、サージ吸収動作が生じ
てしまうことはなく、有効に陽極接合を実現できる。Also, at the time of bonding, the first substrate member and the second
Since the same potential voltage is simultaneously applied to the first and second substrate members, even a field-emission-type surge absorbing element of a type in which an emitter cone is formed on both the first and second substrate members. In addition, no discharge occurs in the envelope regardless of the applied voltage value. Therefore, even if the value of the voltage applied at the time of joining is equal to or higher than the operating voltage of the field emission type surge absorbing element, surge absorbing operation does not occur, and anodic joining can be realized effectively.
【0030】[0030]
【発明の実施の態様】図1に示すように、本発明に係る
第1の電界電子放出型サージ吸収素子10は、第1の基板
部材12と第2の基板部材14とを所定の距離を隔てて対向
配置させ、第1の基板部材の対向面周縁12a及び第2の
基板部材の対向面周縁14aを枠部材16の第1の当接面16
a及び第2の当接面16bにそれぞれ気密に接合して外囲
器18を形成し、該外囲器18内を10-6〜10-8Torrの高
真空状態に維持して成る。上記枠部材16は、図2に示す
ように、長方形状のガラス板の真ん中部分を、長方形状
に大きく切り欠いた形状を備えている。この枠部材16の
縦寸法及び横寸法は、第1の基板部材12及び第2の基板
部材14の縦寸法及び横寸法よりも大きく設定されている
ため、上記第1の基板部材の対向面周縁12a及び第2の
基板部材の対向面周縁14aによって、枠部材16の切欠部
17を丁度塞ぐように各基板部材を接合すると、枠部材16
の外周縁部19が第1の基板部材12及び第2の基板部材14
の各外側面から鍔状に突出する形となる(図1)。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1, in a first field emission type surge absorbing element 10 according to the present invention, a first substrate member 12 and a second substrate member 14 are separated by a predetermined distance. The peripheral edge 12a of the opposing surface of the first substrate member and the peripheral edge 14a of the opposing surface of the second substrate member are separated from each other by the first contact surface 16 of the frame member 16.
a and the second contact surface 16b are hermetically bonded to each other to form an envelope 18, and the interior of the envelope 18 is maintained in a high vacuum state of 10 -6 to 10 -8 Torr. As shown in FIG. 2, the frame member 16 has a shape in which a middle portion of a rectangular glass plate is largely cut out in a rectangular shape. Since the vertical dimension and the horizontal dimension of the frame member 16 are set to be larger than the vertical dimension and the horizontal dimension of the first substrate member 12 and the second substrate member 14, the peripheral edge of the opposing surface of the first substrate member is set. The notch of the frame member 16 is formed by the peripheral edge 14a of the facing surface 12a and the second substrate member.
When each board member is joined so as to just block 17, the frame member 16
Of the first substrate member 12 and the second substrate member 14
(FIG. 1).
【0031】上記第1の基板部材12の対向面には、多数
のエミッタ・コーン20が、所定の間隔をおいて略全面に
亘って突設されている。図1は断面図であるため、一列
のエミッタ・コーン20のみが表されているが、実際には
一定の間隔をおいて縦横に整列配置されている(図
2)。上記第1の基板部材12は、Si中にPやAs等の
不純物を混入させて成るn形半導体によって形成されて
いる。また、エミッタ・コーン20も同様にn形半導体よ
り成り、第1の基板部材12と一体的に形成されている。
エミッタ・コーン20は先端が尖った円錐または角錐形状
をなしており、その先端部20aが第2の基板部材14の対
向面に向いている。ただし、エミッタ・コーン20の先端
部20aと第2の基板部材14の対向面との間には、所定の
間隙が保たれている。上記エミッタ・コーン20の高さは
約5μmに、底面の直径は約3〜10μmに、またエミ
ッタ・コーン20間のピッチは約7.5〜15μmに、先
端の角度は25〜30度に設定されている。On the opposing surface of the first substrate member 12, a large number of emitter cones 20 are provided projecting over substantially the entire surface at predetermined intervals. Although FIG. 1 is a cross-sectional view, only one row of emitter cones 20 is shown. However, in practice, the emitter cones 20 are arranged vertically and horizontally at regular intervals (FIG. 2). The first substrate member 12 is formed of an n-type semiconductor obtained by mixing impurities such as P and As into Si. The emitter cone 20 is also made of an n-type semiconductor and is formed integrally with the first substrate member 12.
The emitter cone 20 has a pointed cone or pyramid shape, and the tip 20 a faces the facing surface of the second substrate member 14. However, a predetermined gap is maintained between the tip 20a of the emitter cone 20 and the opposing surface of the second substrate member 14. The height of the emitter cone 20 is set to about 5 μm, the diameter of the bottom is set to about 3 to 10 μm, the pitch between the emitter cones 20 is set to about 7.5 to 15 μm, and the angle of the tip is set to 25 to 30 degrees. Have been.
【0032】エミッタ・コーン20の表面をも含んだ第1
の基板部材12の対向面には、保護膜22が被覆されてい
る。この保護膜22は、Nb、W、Mo、Cr、Ti、T
h、Si、Ni、La、Ge、Al、ダイヤモンド(ア
モルファス・カーボン)等よりなる薄膜や、W及びZr
の二層構造、あるいは以上の各物質の中の少なくとも1
種類を含んだ炭化物、酸化物、窒化物、無機化合物より
構成される。上記第1の基板部材12の外面には、Alま
たはCrを蒸着して形成した第1の層24aと、該第1の
層24aの表面にNiを蒸着して形成した第2の層24bか
ら成る第1の外部電極層24が形成されている。この第1
の層24aを構成するAlまたはCrと、第2の層24bを
構成するNiとは、良好なオーム接触(ohmic contac
t)を実現するものとして選定された。The first including the surface of the emitter cone 20
The facing surface of the substrate member 12 is coated with a protective film 22. This protective film 22 is made of Nb, W, Mo, Cr, Ti, T
h, Si, Ni, La, Ge, Al, diamond (amorphous carbon) and other thin films, W and Zr
Two-layer structure, or at least one of the above substances
It is composed of carbides, oxides, nitrides, and inorganic compounds containing various types. On the outer surface of the first substrate member 12, a first layer 24a formed by evaporating Al or Cr and a second layer 24b formed by evaporating Ni on the surface of the first layer 24a are formed. A first external electrode layer 24 is formed. This first
Al or Cr forming the second layer 24b and Ni forming the second layer 24b have good ohmic contact (ohmic contact).
t).
【0033】上記第2の基板部材14は、上記第1の基板
部材12と同じくn形半導体で構成されており、その対向
面には、上記エミッタ・コーン20の表面等を覆っている
のと同様の物質より成る保護膜22が形成されている。さ
らに、第2の基板部材14の外面には、AlまたはCrを
蒸着して形成した第1の層26aと、該第1の層26aの表
面にNiを蒸着して形成した第2の層26bから成る第2
の外部電極層26が形成されている。The second substrate member 14 is made of an n-type semiconductor similarly to the first substrate member 12, and has a facing surface covering the surface of the emitter cone 20 and the like. A protective film 22 made of a similar material is formed. Further, on the outer surface of the second substrate member 14, a first layer 26a formed by evaporating Al or Cr, and a second layer 26b formed by evaporating Ni on the surface of the first layer 26a. The second consisting of
The external electrode layer 26 is formed.
【0034】以上より明らかなように、この第1の電界
電子放出型サージ吸収素子10にあっては、第1の基板部
材12の対向面全域が電子放出部を構成していると共に、
第2の基板部材14の対向面全域が平面部を構成している
こととなる。なお、上記第2の基板部材14の構成材料と
しては、n形半導体以外にも、第1の基板部材12と熱膨
張係数が略等しい他の物質を用いることができ、例えば
Moがこれに該当する。As is clear from the above, in the first field electron emission type surge absorbing element 10, the entire area of the opposing surface of the first substrate member 12 constitutes an electron emission portion.
The entire opposing surface of the second substrate member 14 constitutes a plane portion. In addition, as the constituent material of the second substrate member 14, other than the n-type semiconductor, other substances having substantially the same thermal expansion coefficient as the first substrate member 12 can be used. For example, Mo corresponds to this. I do.
【0035】上記第1の外部電極層24及び第2の外部電
極層26は、必ずしも二層構造とする必要はなく、Niの
みを蒸着して形成してもよい。上記枠部材16の材質とし
ては、n形半導体と熱膨張係数が近く、可動イオンとし
てのNa+を含む硼珪酸ガラス(商品名:パイレックス
ガラス)等が用いられる。The first external electrode layer 24 and the second external electrode layer 26 do not necessarily have to have a two-layer structure, and may be formed by evaporating only Ni. As a material of the frame member 16, borosilicate glass (trade name: Pyrex glass) having a thermal expansion coefficient close to that of an n-type semiconductor and containing Na + as mobile ions is used.
【0036】上記第1の外部電極層24にはカソード端子
28が、また第2の外部電極層26にはアノード端子30が接
続される(図1)。そして、各端子を図8に示したのと
同様、線L1,L2あるいはGNDに接続することによ
り、第1の電界電子放出型サージ吸収素子10は、線L
1,L2間あるいは線L1,L2−GND間に挿入接続され
ることとなる。しかして、上記線L1,L2間あるいは線
L1,L2−GND間に定格以上のサージ電圧が印加され
ると、エミッタ・コーン20の先端部20aに強い電界集中
が生じ、量子力学的なトンネル効果によって電子が表面
のポテンシャル障壁を通過して真空中に放出される。こ
のいわゆる電界電子放出現象によって生じた電子は、第
2の基板部材14の対向面で捕捉されるため、第2の基板
部材14及び第1の基板部材12間に電流が流れる先駆放電
が生成され、この先駆放電が真空火花放電に移行するこ
とでサージの吸収が実現されるのである。The first external electrode layer 24 has a cathode terminal
28, and an anode terminal 30 is connected to the second external electrode layer 26 (FIG. 1). Then, by connecting each terminal to the line L1, L2 or GND in the same manner as shown in FIG.
1 and L2 or between lines L1 and L2 and GND. When a surge voltage exceeding the rated voltage is applied between the lines L1 and L2 or between the lines L1 and L2 and GND, a strong electric field concentration occurs at the tip 20a of the emitter cone 20, and a quantum mechanical tunnel effect occurs. As a result, electrons pass through a potential barrier on the surface and are emitted into a vacuum. Electrons generated by this so-called field electron emission phenomenon are captured on the opposing surface of the second substrate member 14, so that a precursor discharge in which a current flows between the second substrate member 14 and the first substrate member 12 is generated. By absorbing the precursor discharge into a vacuum spark discharge, the surge can be absorbed.
【0037】なお、図示の便宜上、図1及び図2におい
てはエミッタ・コーン20の大きさを強調して描かれてい
るが、実際には上記のようにエミッタ・コーン20はμm
単位の大きさであるのに対し、第1の基板部材12はmm単
位(例えば2〜6mm角)の大きさであり、エミッタ・コ
ーン20も数万〜数十万個以上形成されている。因みに、
第1の電界電子放出型サージ吸収素子10の全体の大きさ
は、6mm角で厚さが0.6mm程度である。For convenience of illustration, the size of the emitter cone 20 is illustrated with emphasis in FIGS. 1 and 2;
In contrast to the unit size, the first substrate member 12 has a size of mm unit (for example, 2 to 6 mm square), and tens to hundreds of thousands of emitter cones 20 are formed. By the way,
The overall size of the first field emission type surge absorbing element 10 is about 6 mm square and about 0.6 mm thick.
【0038】図3は、本発明に係る第2の電界電子放出
型サージ吸収素子32を示すものである。この第2の電界
電子放出型サージ吸収素子32は、n形半導体より成る第
1の基板部材12と第2の基板部材14とを所定の距離を隔
てて対向配置し、両部材の対向面周縁を枠部材16を間に
介して気密封止することによって外囲器18を形成し、該
外囲器18の内部空間を10-6〜10-8Torrの高真空状態
となしている点で、上記第1の電界電子放出型サージ吸
収素子10と共通している。また、枠部材16の外周縁部19
が、第1の基板部材12及び第2の基板部材14の外側面よ
りも突出している点でも共通している。FIG. 3 shows a second field emission type surge absorbing element 32 according to the present invention. In this second field emission type surge absorbing element 32, a first substrate member 12 and a second substrate member 14 made of an n-type semiconductor are arranged to face each other at a predetermined distance from each other. Is sealed in a hermetic manner with a frame member 16 interposed therebetween to form an envelope 18, and the internal space of the envelope 18 is in a high vacuum state of 10 -6 to 10 -8 Torr. And the first field-emission type surge absorbing element 10 described above. Also, the outer peripheral edge 19 of the frame member 16
However, they are also common in that they protrude from the outer side surfaces of the first substrate member 12 and the second substrate member 14.
【0039】これに対し、上記第1の基板部材12の対向
面は、多数のエミッタ・コーン20が所定の間隔をおいて
ドット・マトリクス状に突設配列された第1の電子放出
部34と、エミッタ・コーン20が形成されずに平面状を維
持している第1の平面部35とに区分けされている。ま
た、第2の基板部材14の対向面も、多数のエミッタ・コ
ーン20が所定の距離をおいてドット・マトリクス状に突
設配列された第2の電子放出部36と、エミッタ・コーン
20が形成されずに平面状を維持している第2の平面部37
とに区分けされている。図示の通り、第1の基板部材12
の第1の電子放出部34が第2の基板部材14の第2の平面
部37と対向するように、また第2の基板部材14の第2の
電子放出部36が第1の基板部材12の第1の平面部35と対
向するように、両基板部材は位置決めされている。そし
て、エミッタ・コーン20の先端部20aと各平面部35,37
との間には、所定の間隙が保たれている。On the other hand, the opposing surface of the first substrate member 12 is in contact with a first electron-emitting portion 34 in which a large number of emitter cones 20 are arranged in a dot matrix at predetermined intervals. , And a first flat portion 35 which maintains a flat shape without forming the emitter cone 20. Further, the opposing surface of the second substrate member 14 also includes a second electron-emitting portion 36 in which a large number of emitter cones 20 are arranged in a dot matrix at a predetermined distance, and an emitter cone.
The second flat portion 37 in which the flat shape is maintained without forming the 20
It is divided into and. As shown, the first substrate member 12
The first electron-emitting portion 34 of the second substrate member 14 faces the second plane portion 37 of the second substrate member 14, and the second electron-emitting portion 36 of the second substrate member 14 The two substrate members are positioned so as to face the first flat portion 35 of the first substrate. Then, the tip portion 20a of the emitter cone 20 and the flat portions 35, 37
A predetermined gap is maintained between the two.
【0040】両基板部材の対向面(第1の電子放出部3
4,第2の電子放出部36及び第1の平面部35,第2の平
面部37)には、上記と同様の物質より成る保護膜22がそ
れぞれ形成されている。また、第1の基板部材12の外面
には、AlまたはCrより成る第1の層24a及びNiよ
り成る第2の層24bの二層構造を備えた第1の外部電極
層24が形成されており、該第1の外部電極層24には第1
の外部端子38が接続されている。さらに、第2の基板部
材14の外面には、AlまたはCrより成る第1の層26a
及びNiより成る第2の層26bの二層構造を備えた第2
の外部電極層26が形成されており、該第2の外部電極層
26には第2の外部端子40が接続されている。The opposing surfaces of the two substrate members (the first electron-emitting portion 3
4, the second electron-emitting portion 36, the first flat portion 35, and the second flat portion 37) are each provided with a protective film 22 made of the same substance as described above. A first external electrode layer 24 having a two-layer structure of a first layer 24a made of Al or Cr and a second layer 24b made of Ni is formed on the outer surface of the first substrate member 12. The first external electrode layer 24 has the first
External terminals 38 are connected. Further, a first layer 26a made of Al or Cr is formed on the outer surface of the second substrate member 14.
And a second layer 26b made of Ni and Ni.
Is formed, and the second external electrode layer
26 is connected to a second external terminal 40.
【0041】この第2の電界電子放出型サージ吸収素子
32は、上記のようにエミッタ・コーン20を第1の基板部
材12側及び第2の基板部材14側にそれぞれ設けることに
より、第1の外部電極層24と第2の外部電極層26との間
で電子を双方向に放出可能な構造とした点に特徴を有す
るものであり、極性に気遣うことなく利用できると共
に、何らかの理由によって逆方向に過電圧が印加される
場合にも対処できる利点を有する。This second field electron emission type surge absorbing element
32, the emitter cone 20 is provided on the first substrate member 12 side and the second substrate member 14 side as described above, so that the first external electrode layer 24 and the second external electrode layer 26 It has the advantage of being able to emit electrons in both directions between the electrodes, and has the advantage that it can be used without concern for polarity and that it can cope with the case where an overvoltage is applied in the reverse direction for some reason. .
【0042】つぎに、上記第1の電界電子放出型サージ
吸収素子10における、第1の基板部材12及び第2の基板
部材14と枠部材16との接合方法について説明する。ま
ず、真空雰囲気中において、図4に示すように、ホット
プレート42の上面に、エミッタ・コーン20及び第1の外
部電極層24を形成済みの第1の基板部材12と、枠部材16
と、第2の外部電極層26を形成済みの第2の基板部材14
とを積層載置する。Next, a method of joining the first substrate member 12, the second substrate member 14, and the frame member 16 in the first field emission type surge absorbing element 10 will be described. First, in a vacuum atmosphere, as shown in FIG. 4, the first substrate member 12 on which the emitter cone 20 and the first external electrode layer 24 have been formed,
And the second substrate member 14 on which the second external electrode layer 26 has been formed.
And are stacked.
【0043】上記枠部材16の外周縁部端面19aには、電
極枠44が圧着されている。この電極枠44は、図5に示す
ように、可撓性を備えた良導性の金属帯を、枠部材16の
外周縁部19に対応するように矩形状に折曲して形成され
ている。この電極枠44の開閉端部44aを左右方向に開き
ながら、枠部材16の外周縁部19を電極枠44内に導き入れ
た後、上記開閉端部44aを閉じると、電極枠44自体が有
する復元力によって、枠部材16の外周縁部端面19aと電
極枠44の内面とが圧着されることとなる。そして、図4
に示すように、第2の基板部材14の第2の外部電極層26
には直流電源46のプラス側が接続されると共に、第1の
基板部材12の第1の外部電極層24にも、ホットプレート
42を経由して直流電源46のプラス側が接続される。ま
た、枠部材16の外周縁部端面19aを覆う電極枠44には、
直流電源46のマイナス側が接続される。An electrode frame 44 is crimped to the outer peripheral edge end surface 19a of the frame member 16. As shown in FIG. 5, the electrode frame 44 is formed by bending a flexible conductive metal band into a rectangular shape so as to correspond to the outer peripheral edge 19 of the frame member 16. I have. After opening and closing the open / close end 44a of the electrode frame 44 in the left-right direction and guiding the outer peripheral edge 19 of the frame member 16 into the electrode frame 44, and closing the open / close end 44a, the electrode frame 44 itself has By the restoring force, the outer peripheral edge end surface 19a of the frame member 16 and the inner surface of the electrode frame 44 are pressed. And FIG.
As shown in FIG. 3, the second external electrode layer 26 of the second substrate member 14 is formed.
Is connected to the positive side of the DC power supply 46, and the hot plate is also connected to the first external electrode layer 24 of the first substrate member 12.
The positive side of the DC power supply 46 is connected via 42. Further, the electrode frame 44 covering the outer peripheral edge end surface 19a of the frame member 16 includes:
The negative side of DC power supply 46 is connected.
【0044】しかして、上記直流電源46より50〜10
00Vの電圧が印加されると、図6に示すように、枠部
材16を構成するガラス内部の陽イオン(Na+)48が電
極枠44側に移動すると同時に、第1の基板部材12及び第
2の基板部材14との界面近傍に、マイナスの電荷が集中
して空間電荷層50が形成され、大きな吸引力が生じて第
1の基板部材12と第2の基板部材14は枠部材16に化学結
合される。すなわち、第1の基板部材の対向面周縁12a
と枠部材16の第1の当接面16aとの陽極接合、及び第2
の基板部材の対向面周縁14aと枠部材16の第2の当接面
16bとの陽極接合が同時に実現されることとなる。Thus, 50 to 10 from the DC power supply 46
When a voltage of 00 V is applied, as shown in FIG. 6, the cations (Na + ) 48 inside the glass constituting the frame member 16 move to the electrode frame 44 side, and at the same time, the first substrate member 12 and the The space charge layer 50 is formed in the vicinity of the interface with the second substrate member 14 by concentrating the negative charges, and a large attractive force is generated, so that the first substrate member 12 and the second substrate member 14 Chemically bonded. That is, the peripheral edge 12a of the opposing surface of the first substrate member
Anodic bonding between the first contact surface 16a of the frame member 16 and the second
Peripheral edge 14a of the opposing surface of the substrate member and the second contact surface of the frame member 16
The anodic bonding with 16b is realized at the same time.
【0045】上記のように、枠部材16の外周縁部19が第
1の基板部材12及び第2の基板部材14の外側面よりも突
出するように構成したのは、陽イオン48の移動・蓄積先
を確保するためであるが、その結果としてつぎのような
効果が生じる。すなわち、第1の基板部材12の第1の外
部電極層24と第2の基板部材14の第2の外部電極層26間
の沿面距離が、絶縁物質よりなる外周縁部19が突出する
分長くなるため、サージ吸収素子として使用中に、外囲
器18の内部で放電生成される代わりに、誤って外囲器18
の外側面を通じて両外部電極層間が導通してしまうこと
を有効に防止できる。As described above, the outer peripheral portion 19 of the frame member 16 is configured to protrude from the outer surfaces of the first substrate member 12 and the second substrate member 14 because of the movement of the cations 48. This is for securing the storage destination, and as a result, the following effects occur. That is, the creepage distance between the first external electrode layer 24 of the first substrate member 12 and the second external electrode layer 26 of the second substrate member 14 is longer than that of the outer peripheral edge 19 made of an insulating material. Therefore, during use as a surge absorbing element, instead of generating discharge inside the envelope 18, the envelope 18
The conduction between the two external electrode layers through the outer surface of the substrate can be effectively prevented.
【0046】また、枠部材16の外周縁部19を取り囲むよ
うに電極枠44を圧着させたのは、外周縁部の端面19a全
体に均一に電界が加わるようにするためである。なお、
上記の陽極接合をより強固なものとするためには、第1
の基板部材の対向面周縁12a、第2の基板部材の対向面
周縁14a、及び枠部材16の両当接面16a,16bを可能な
限り平滑化しておくことが必要であり、例えば表面の凹
凸を1μm以下に抑えることが望ましい。The reason why the electrode frame 44 is crimped so as to surround the outer peripheral edge 19 of the frame member 16 is to apply an electric field uniformly to the entire end face 19a of the outer peripheral edge. In addition,
In order to make the above anodic bonding more robust,
It is necessary to smooth as much as possible the peripheral edge 12a of the opposing surface of the substrate member, the peripheral edge 14a of the opposing surface of the second substrate member, and the contact surfaces 16a and 16b of the frame member 16 as much as possible. Is desirably suppressed to 1 μm or less.
【0047】第2の電界電子放出型サージ吸収素子32に
おける、第1の基板部材12及び第2の基板部材14と枠部
材16との接合についても、上記と同様に行われる。すな
わち、図7に示すように、真空雰囲気中において、ホッ
トプレート42の上面に、エミッタ・コーン20及び第1の
外部電極層24を形成済みの第1の基板部材12と、同じく
エミッタ・コーン20及び第2の外部電極層26を形成済み
の第2の基板部材14とが、枠部材16を間に介して積層載
置され、第1の外部電極層24及び第2の外部電極層26に
は、それぞれ直流電源46のプラス側が接続されると共
に、枠部材16の外周縁部端面19aに圧着された電極枠44
には、直流電源46のマイナス側が接続される。The bonding between the first substrate member 12, the second substrate member 14, and the frame member 16 in the second field emission type surge absorbing element 32 is performed in the same manner as described above. That is, as shown in FIG. 7, in a vacuum atmosphere, the first substrate member 12 on which the emitter cone 20 and the first external electrode layer 24 have been formed, And the second substrate member 14 on which the second external electrode layer 26 has been formed is stacked and mounted with the frame member 16 interposed therebetween, and the first external electrode layer 24 and the second external electrode layer 26 Are connected to the positive side of the DC power supply 46, and are connected to the electrode frame 44 which is crimped to the outer peripheral edge 19a of the frame member 16.
Is connected to the negative side of the DC power supply 46.
【0048】そして、上記ホットプレート42によって摂
氏200〜600度に加熱しながら直流電源46より所定
の直流電圧を印加すると、図示は省略したが、枠部材16
内の陽イオン(Na+)が電極枠44との接触面側に移動
すると共に、第1の基板部材12及び第2の基板部材14と
の界面近傍に空間電荷層が形成され、枠部材16の当接面
と各基板部材の対向面周縁との間の陽極接合が実現され
る。この第2の電界電子放出型サージ吸収素子32の接合
時には、第1の基板部材12側のエミッタ・コーン20と第
2の基板部材14側のエミッタ・コーン20の両者に、同時
に同電位の電界が付与されるため、両基板部材間で放電
生成が生じることがない。したがって、接合工程で印加
される電圧値が、第2の電界電子放出型サージ吸収素子
32の定格電圧以上であっても、陽極接合を有効に行うこ
とができる。When a predetermined DC voltage is applied from the DC power supply 46 while heating to 200 to 600 degrees Celsius using the hot plate 42, the frame member 16 is omitted from the drawing.
The cations (Na + ) inside move to the contact surface side with the electrode frame 44, and a space charge layer is formed near the interface between the first substrate member 12 and the second substrate member 14, and the frame member 16 Anodic bonding between the contact surface of the substrate member and the peripheral edge of the opposing surface of each substrate member is realized. At the time of joining the second field emission type surge absorbing element 32, the same electric potential is applied to both the emitter cone 20 on the first substrate member 12 and the emitter cone 20 on the second substrate member 14 at the same time. , No discharge is generated between the two substrate members. Therefore, the value of the voltage applied in the bonding step is the second field emission type surge absorbing element.
Even at a rated voltage of 32 or more, anodic bonding can be performed effectively.
【0049】上記においては、第1の基板部材12及び第
2の基板部材14の材質としてn形半導体を用いる例を示
したが、この発明はこれに限定されるものではなく、S
i中にホウ素等の不純物を混入させたp形半導体によっ
て形成された第1の基板部材12と第2の基板部材14と
を、枠部材16を間に介して陽極接合する際にも適用可能
である。In the above description, an example is shown in which an n-type semiconductor is used as the material of the first substrate member 12 and the second substrate member 14, but the present invention is not limited to this.
It is also applicable when the first substrate member 12 and the second substrate member 14 formed of a p-type semiconductor in which an impurity such as boron is mixed in i are anodically bonded through a frame member 16 therebetween. It is.
【0050】[0050]
【発明の効果】本発明に係る電界電子放出型サージ吸収
素子の製造方法にあっては、第1の基板部材と第2の基
板部材との接合を同時に実現することができるため、製
造の効率化を達成できるのみならず、枠部材の厚さを比
較的薄く構成した場合であっても、第1の基板部材の対
向面周縁と枠部材の第1の当接面との接合、及び第2の
基板部材の対向面周縁と枠部材の第2の当接面との接合
を確実に行うことができる。また、枠部材の外周縁部端
面に、該外周縁部端面に対応する形状に折曲された金属
帯よりなる電極枠を圧着すると共に、該電極枠に直流電
源のマイナス側を接続することにより、上記外周縁部の
端面全体に均一に電圧を印加するため、枠部材中の陽イ
オンが外周縁部の端面近傍に満遍なく集積され、枠部材
の第1の当接面及び第2の当接面に空間電荷層がムラな
く形成される。このため、第1の基板部材の対向面周縁
と枠部材の第1の当接面との接合、及び第2の基板部材
の対向面周縁と枠部材の第2の当接面との接合を極めて
強固なものにできる。さらに、第1の基板部材及び第2
の基板部材には、同時に同電位の電圧が印加されるた
め、第1の基板部材及び第2の基板部材の両方にエミッ
タ・コーンを形成したタイプの電界電子放出型サージ吸
収素子であっても、接合時の電圧印加によって外囲器内
で放電が発生することがなく、確実に陽極接合を実現で
きる。According to the method of manufacturing a field emission type surge absorbing element according to the present invention, the joining of the first substrate member and the second substrate member can be realized at the same time. Not only can be achieved, but also in the case where the thickness of the frame member is configured to be relatively thin, the joining between the peripheral edge of the opposing surface of the first substrate member and the first contact surface of the frame member, and The joining between the peripheral edge of the opposing surface of the second substrate member and the second contact surface of the frame member can be reliably performed. Also, by crimping an electrode frame made of a metal band bent into a shape corresponding to the outer edge portion end surface on the outer edge portion end surface of the frame member, and connecting the minus side of the DC power supply to the electrode frame. In order to apply a voltage uniformly to the entire end surface of the outer peripheral portion, the cations in the frame member are uniformly accumulated near the end surface of the outer peripheral portion, and the first contact surface and the second contact surface of the frame member. The space charge layer is formed evenly on the surface. For this reason, the joining of the peripheral edge of the facing surface of the first substrate member to the first contact surface of the frame member and the joining of the peripheral edge of the facing surface of the second substrate member to the second contact surface of the frame member are performed. It can be very strong. Further, the first substrate member and the second
Since the same potential voltage is applied to the substrate members at the same time, even if the field electron emission type surge absorbing element has an emitter cone formed on both the first substrate member and the second substrate member. In addition, anodic bonding can be reliably realized without generating a discharge in the envelope due to voltage application at the time of bonding.
【図1】本発明に係る第1の電界電子放出型サージ吸収
素子を示す断面図である。FIG. 1 is a sectional view showing a first field emission type surge absorbing element according to the present invention.
【図2】第1の電界電子放出型サージ吸収素子を示す分
解斜視図である。FIG. 2 is an exploded perspective view showing a first field electron emission type surge absorbing element.
【図3】本発明に係る第2の電界電子放出型サージ吸収
素子を示す断面図である。FIG. 3 is a sectional view showing a second field-emission-type surge absorbing element according to the present invention.
【図4】第1の電界電子放出型サージ吸収素子における
第1の基板部材、枠部材及び第2の基板部材の接合工程
を示す概略断面図である。FIG. 4 is a schematic cross-sectional view showing a joining step of a first substrate member, a frame member, and a second substrate member in the first field emission type surge absorbing element.
【図5】電極枠を示す斜視図である。FIG. 5 is a perspective view showing an electrode frame.
【図6】第1の基板部材、枠部材及び第2基板部材の接
合原理を示す概念図である。FIG. 6 is a conceptual diagram showing a principle of joining a first substrate member, a frame member, and a second substrate member.
【図7】第2の電界電子放出型サージ吸収素子における
第1の基板部材、枠部材及び第2の基板部材の接合工程
を示す概略断面図である。FIG. 7 is a schematic cross-sectional view showing a joining step of a first substrate member, a frame member, and a second substrate member in the second field-emission surge absorbing element.
【図8】サージ吸収素子の使用例を示す回路図である。FIG. 8 is a circuit diagram showing a usage example of a surge absorbing element.
【図9】従来の電界電子放出型サージ吸収素子を示す断
面図である。FIG. 9 is a cross-sectional view showing a conventional field emission type surge absorbing element.
【図10】従来の電界電子放出型サージ吸収素子を示す
分解斜視図である。FIG. 10 is an exploded perspective view showing a conventional field emission type surge absorbing element.
【図11】電界電子放出形サージ吸収素子のサージ吸収
特性を示す波形図である。FIG. 11 is a waveform chart showing surge absorption characteristics of a field emission type surge absorption element.
【図12】従来の電界電子放出型サージ吸収素子の他の
例を示す断面図である。FIG. 12 is a cross-sectional view showing another example of a conventional field emission surge absorbing element.
【図13】従来の電界電子放出型サージ吸収素子におけ
る第2の基板部材と枠部材との接合工程を示す概略断面
図である。FIG. 13 is a schematic cross-sectional view showing a step of joining a second substrate member and a frame member in a conventional field emission surge absorbing element.
【図14】陽極接合法の原理を説明する概念図である。FIG. 14 is a conceptual diagram illustrating the principle of the anodic bonding method.
【図15】従来の電界電子放出型サージ吸収素子におけ
る第1の基板部材と枠部材との接合工程を示す概略断面
図である。FIG. 15 is a schematic cross-sectional view showing a step of joining a first substrate member and a frame member in a conventional field emission surge absorbing element.
【図16】従来の陽極接合法の問題点を説明する概念図
である。FIG. 16 is a conceptual diagram illustrating a problem of a conventional anodic bonding method.
【図17】従来の電界電子放出型サージ吸収素子におけ
る第1の基板部材と枠部材との接合工程を示す概略断面
図である。FIG. 17 is a schematic cross-sectional view showing a step of joining a first substrate member and a frame member in a conventional field emission type surge absorbing element.
10 第1の電界電子放出型サージ吸収素子 12 第1の基板部材 12a 第1の基板部材の対向面周縁 14 第2の基板部材 14a 第2の基板部材の対向面周縁 16 枠部材 16a 枠部材の第1の当接面 16b 枠部材の第2の当接面 19 枠部材の外周縁部 19a 枠部材の該周縁部端面 18 外囲器 20 エミッタ・コーン 24 第1の外部電極層 26 第2の外部電極層 32 第2の電界電子放出型サージ吸収素子 34 第1の電子放出部 35 第1の平面部 36 第2の電子放出部 37 第2の平面部 44 電極枠 46 直流電源 48 陽イオン 10 First field electron emission type surge absorbing element 12 First substrate member 12a Peripheral edge of first substrate member facing opposite side 14 Second substrate member 14a Peripheral edge of second substrate member facing surface 16 Frame member 16a Frame member 16a First contact surface 16b Second contact surface of frame member 19 Outer peripheral edge of frame member 19a End surface of peripheral edge of frame member 18 Envelope 20 Emitter cone 24 First external electrode layer 26 Second External electrode layer 32 Second field-emission type surge absorbing element 34 First electron-emitting section 35 First plane section 36 Second electron-emitting section 37 Second plane section 44 Electrode frame 46 DC power supply 48 Cation
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01T 1/00 - 4/20 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H01T 1/00-4/20
Claims (3)
ッタ・コーンを一体形成した電子放出部を備えると共
に、他方の面に外部電極層を形成してなる第1の基板部
材と、半導体より成り、一方の面に平面部を備えると共
に、他方の面に外部電極層を形成してなる第2の基板部
材とを、上記第1の基板部材のエミッタ・コーンの先端
部と上記第2の基板部材の平面部とが所定の距離を隔て
て対向するように配置し、真空雰囲気中において両基板
部材の対向面周縁を枠部材を間に介して気密封止するこ
とによって、内部が高真空状態となされた外囲器を形成
する電界電子放出型サージ吸収素子の製造方法におい
て、上記枠部材として、内部に可動イオンを含む絶縁材
より構成され、上記第1の基板部材の対向面周縁と接す
る第1の当接面と、上記第2の基板部材の対向面周縁と
接する第2の当接面と、対向配置された両基板部材の外
側面から突出する外周縁部とを備えたものを用い、上記
第1の基板部材、枠部材、第2の基板部材を順に積層載
置すると共に、上記枠部材の外周縁部端面に、該外周縁
部端面に対応する形状に折曲され、上記外周縁部端面を
覆う金属帯よりなる電極枠を圧着し、上記両基板部材の
外部電極層には直流電源のプラス側をそれぞれ接続する
と共に、上記電極枠には上記直流電源のマイナス側を接
続し、所定の温度に加熱された真空雰囲気中において、
上記直流電源より電圧を印加することにより、上記枠部
材の外周縁部の端面全体に均一に電圧を印加し、以て、
上記第1の基板部材の対向面周縁と上記枠部材の第1の
当接面とを陽極接合すると同時に、第2の基板部材の対
向面周縁と上記枠部材の第2の当接面とを陽極接合する
ことを特徴とする電界電子放出型サージ吸収素子の製造
方法。1. A semiconductor device comprising: a first substrate member having an electron emission portion formed integrally with a plurality of emitter cones on one surface and having an external electrode layer formed on the other surface; A second substrate member having a plane portion on one surface and an external electrode layer formed on the other surface, and a tip portion of the emitter cone of the first substrate member and the second substrate member. It is arranged so that the flat part of the substrate member faces a predetermined distance, and the periphery of the facing surface of both substrate members is hermetically sealed with a frame member therebetween in a vacuum atmosphere, so that the inside of the substrate member has a high vacuum. In the method for manufacturing a field electron emission type surge absorbing element forming an envelope in a state, the frame member is formed of an insulating material containing movable ions therein, and is provided with a peripheral edge of a facing surface of the first substrate member. A first abutting surface in contact with the The first substrate member is provided with a second contact surface that is in contact with the peripheral edge of the opposing surface of the second substrate member, and an outer peripheral portion that protrudes from the outer surfaces of both the substrate members that are disposed opposite to each other. the frame member, the stacked mounting the second substrate member in order, the outer peripheral edge end face of the frame member is bent into a shape corresponding to the outer peripheral end face, the outer periphery end surface
An electrode frame made of a metal band to be covered is crimped, and a positive side of a DC power supply is connected to the external electrode layers of the both substrate members, respectively, and a negative side of the DC power supply is connected to the electrode frame at a predetermined temperature. In a vacuum atmosphere heated to
By applying a voltage from the DC power supply, a voltage is uniformly applied to the entire end surface of the outer peripheral edge of the frame member,
At the same time, the peripheral edge of the facing surface of the first substrate member and the first contact surface of the frame member are anodically bonded, and the peripheral edge of the facing surface of the second substrate member and the second contact surface of the frame member are simultaneously joined. A method for manufacturing a field electron emission type surge absorbing element, comprising anodic bonding.
ッタ・コーンを一体形成した電子放出部とエミッタ・コ
ーンが形成されない平面部とを備えると共に、他方の面
に外部電極層を形成してなる第1の基板部材と、同じく
半導体より成り、一方の面に多数のエミッタ・コーンを
一体形成した電子放出部とエミッタ・コーンが形成され
ない平面部とを備えると共に、他方の面に外部電極層を
形成してなる第2の基板部材とを、一方の基板部材のエ
ミッタ・コーンの先端部と他方の基板部材の平面部とが
所定の距離を隔てて対向するように配置し、真空雰囲気
中において両基板部材の対向面周縁を枠部材を間に介し
て気密封止することによって、内部が高真空状態となさ
れた外囲器を形成する電界電子放出型サージ吸収素子の
製造方法において、上記枠部材として、内部に可動イオ
ンを含む絶縁材より構成され、上記第1の基板部材の対
向面周縁と接する第1の当接面と、上記第2の基板部材
の対向面周縁と接する第2の当接面と、対向配置された
両基板部材の外側面から突出する外周縁部とを備えたも
のを用い、上記第1の基板部材、枠部材、第2の基板部
材を順に積層載置すると共に、上記枠部材の外周縁部端
面に、該外周縁部端面に対応する形状に折曲され、上記
外周縁部端面を覆う金属帯よりなる電極枠を圧着し、上
記両基板部材の外部電極層には直流電源のプラス側をそ
れぞれ接続すると共に、上記電極枠には上記直流電源の
マイナス側を接続し、所定の温度に加熱された真空雰囲
気中において、上記直流電源より電圧を印加することに
より、上記枠部材の外周縁部の端面全体に均一に電圧を
印加し、以て、上記第1の基板部材の対向面周縁と上記
枠部材の第1の当接面とを陽極接合すると同時に、第2
の基板部材の対向面周縁と上記枠部材の第2の当接面と
を陽極接合することを特徴とする電界電子放出型サージ
吸収素子の製造方法。2. An electronic device comprising: a semiconductor; an electron emission portion having a plurality of emitter cones integrally formed on one surface; and a flat portion having no emitter cone formed on one surface, and an external electrode layer formed on the other surface. A first substrate member, which is also made of a semiconductor, has an electron emission portion integrally formed with a large number of emitter cones on one surface, and a flat portion on which no emitter cone is formed, and has an external electrode layer formed on the other surface. And a second substrate member is formed such that the tip of the emitter cone of one substrate member and the plane portion of the other substrate member face each other at a predetermined distance, and are placed in a vacuum atmosphere. In the method for manufacturing a field electron emission type surge absorbing element forming an envelope in which a high vacuum state is formed by hermetically sealing the peripheral edges of the opposing surfaces of both substrate members with a frame member therebetween, The frame member is made of an insulating material containing movable ions therein, and has a first contact surface in contact with the peripheral edge of the opposing surface of the first substrate member, and a second contact surface in contact with the peripheral edge of the opposing surface of the second substrate member. 2, the first substrate member, the frame member, and the second substrate member are sequentially stacked and mounted. While being placed, the outer peripheral edge of the frame member is bent into a shape corresponding to the outer peripheral edge ,
An electrode frame made of a metal band covering the outer peripheral end face is crimped, and a positive side of the DC power supply is connected to the external electrode layers of both the substrate members, and a negative side of the DC power supply is connected to the electrode frame. Then, in a vacuum atmosphere heated to a predetermined temperature, by applying a voltage from the DC power supply, a voltage is uniformly applied to the entire end face of the outer peripheral edge of the frame member. At the same time that the peripheral edge of the facing surface of the substrate member and the first contact surface of the frame member are anodically bonded,
The peripheral edge of the opposing surface of the substrate member and the second contact surface of the frame member are anodically bonded.
硼珪酸ガラスより構成したものを用いることを特徴とす
る請求項1または2に記載の電界電子放出型サージ吸収
素子の製造方法。3. The method according to claim 1, wherein the frame member is made of a borosilicate glass containing Na + therein.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08355676A JP3131165B2 (en) | 1996-12-24 | 1996-12-24 | Method for manufacturing field electron emission type surge absorbing element |
| US08/939,217 US6052267A (en) | 1996-12-24 | 1997-09-29 | Electric field discharge surge absorbing element and method for making same |
| DE19743512A DE19743512A1 (en) | 1996-12-24 | 1997-10-01 | Electron discharge shock absorber element for electric field for over-voltage protection in electronic circuit |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08355676A JP3131165B2 (en) | 1996-12-24 | 1996-12-24 | Method for manufacturing field electron emission type surge absorbing element |
| US08/939,217 US6052267A (en) | 1996-12-24 | 1997-09-29 | Electric field discharge surge absorbing element and method for making same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10189207A JPH10189207A (en) | 1998-07-21 |
| JP3131165B2 true JP3131165B2 (en) | 2001-01-31 |
Family
ID=26580307
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP08355676A Expired - Fee Related JP3131165B2 (en) | 1996-12-24 | 1996-12-24 | Method for manufacturing field electron emission type surge absorbing element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3131165B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2959495B1 (en) * | 2013-02-22 | 2020-04-22 | Bourns Incorporated | Devices and methods related to flat gas discharge tubes |
-
1996
- 1996-12-24 JP JP08355676A patent/JP3131165B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10189207A (en) | 1998-07-21 |
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