JP3312015B2 - Field electron emission type surge absorbing element and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for protecting an electronic circuit of an electronic device from an overvoltage such as a surge that enters through a power line or a communication line, or between lines or between each line and a ground. The present invention relates to a surge absorbing element inserted and connected, and more particularly to a surge absorbing element using a field electron emission phenomenon and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG.
A surge absorbing element 72 is connected between D and ground to protect the electronic circuit 73 from surges such as induced lightning. That is, between the lines L1 and L2 or between the lines L1 and L2-
When a surge voltage higher than the rating of the surge absorbing element 72 is applied between GND, the surge absorbing element 72 conducts to bypass the surge and protect the electronic circuit 73.

As such a surge absorbing element 72, a gas arrester utilizing a discharge phenomenon in a discharge gap, a varistor which is a high-resistance element having a nonlinear voltage characteristic, or an avalanche (electron avalanche) of a pn junction type semiconductor is used. There are various types such as silicon surge absorbers utilizing the effect, but recently a surge absorbing element using a field electron emission phenomenon has been newly added.

A surge absorbing element using the field electron emission phenomenon is described in JP-A-9-298833, JP-A-10-285793, and the like. As shown in FIG. 26, in the field electron emission type surge absorbing element 74 disclosed therein, a first substrate member 75 and a second substrate member 76 made of an n-type semiconductor are opposed to each other at a predetermined distance. And an envelope 78 formed by hermetically sealing the peripheral edges of the opposing surfaces of both substrate members via a frame member 77 also serving as a spacer, and the inside of the envelope 78 is 10 ^−. It is maintained in a high vacuum state of ⁶ to 10 ^-8 Torr. On the inner surface of the first substrate member 75, a number of emitter cones 79 made of an n-type semiconductor are protruded at predetermined intervals. The emitter cone 79 has a pointed cone or pyramid shape, and the tip 79
a faces the inner surface of the second substrate member 76. The height of the emitter cone 15 is about 5 μm, and the diameter of the bottom is about 3 to
The pitch between the emitter cones 15 is set to about 7.5 to 15 .mu.m.

The first including the surface of the emitter cone 79
The inner surface of the substrate member 75 and the inner surface of the second substrate member 76 have N
b, W, Mo, Cr, Ti, Th, Si, Ni, La,
A thin film made of Ge, Al, etc., a two-layer structure of W and Zr,
Alternatively, a protective film 80 made of a carbide, oxide, nitride, or inorganic compound containing at least one of the above substances is coated. First external electrodes 81 are provided on the outer surfaces of the first substrate member 75 and the second substrate member 76, respectively.
A second external electrode 82 is formed, and a cathode terminal 83 and an anode terminal 84 are connected to the external electrodes 81 and 82, respectively. Then, each terminal 83, 84 is connected to the line L1, L2 or GND.
25, the field electron emission type surge absorbing element 74 becomes the same as the surge absorbing element 72 shown in FIG.
It is inserted and connected between the lines L1 and L2 or between the lines L1 and L2 and GND.

Thus, the line L1 and L2 or the line L
1. When an overvoltage exceeding a rating such as a surge is applied between L2 and GND and a strong electric field concentration occurs at the tip 79a of the emitter cone on the cathode side, electrons in the n-type semiconductor are caused by quantum mechanical tunnel effect. A so-called field electron emission phenomenon that is emitted into a vacuum beyond the potential barrier occurs. The emitted electrons are captured on the anode side of the high potential, that is, on the inner surface of the second substrate member 76, so that a precursor discharge in which a current flows between the second substrate member 76 and the first substrate member 75 is generated, This precursor discharge then shifts to vacuum spark discharge (vacuum arc discharge).

[0007] The following can be considered as a mechanism in which the precursor discharge shifts to a vacuum spark discharge. That is, by the action of thermal energy generated by the increase in current density at the emitter cone tip 79a due to the electron emission during the precursor discharge, the metal constituting the protective film 80 covering the surface of the emitter cone 79 is changed from metal to metal. The protective film 80 covering the inner surface of the second substrate member 76 is generated by heat energy generated as a result of generation of steam or collision of electrons by the precursor discharge with the anode side.
Similarly, metal vapor is generated from the metal, and these charged metal vapors serve as elements for forming an electric current, thereby generating a vacuum spark discharge. Further, it is practically difficult to make the inside of the envelope 78 a complete vacuum, and gas molecules are slightly adsorbed or adhered to the surface of the material constituting the discharge space. Is released into the space by the impact of the precursor discharge, and the ionized gas molecules serve as elements for forming a current. This is also a factor promoting vacuum spark discharge.

The above-mentioned field electron emission phenomenon occurs only when the electric field intensity concentrated on the emitter cone 79 rises above a predetermined value. This occurs when a voltage higher than a predetermined value is applied between both electrodes. Only means that a current flows between both electrodes. That is, since a non-linear relationship appears between the value of the voltage applied between both terminals 83 and 84 and the flowing current, conduction occurs only when an overvoltage exceeding the rating is applied, thereby bypassing the overvoltage. It is possible to exhibit the surge absorbing effect.

In addition, compared to the speed of electrons in a semiconductor, electrons in a vacuum travel without being scattered, so that the field electron emission type surge absorbing element 74 can operate at an extremely high speed. Further, since the semiconductor device does not have a junction structure between the p-type semiconductor and the n-type semiconductor, there is no problem that the capacitance is increased unlike the silicon surge absorber.

FIG. 27 shows the surge absorption characteristics of such a field electron emission type surge absorbing element 74.
It is a graph which shows the surge absorption waveform with respect to the original surge waveform whose peak voltage value is 3 kV. As shown in the figure, when a surge voltage is applied, a precursor discharge having a peak of about 2.32 kV is instantaneously generated.
A state in which a stable surge absorption waveform of 0 V is obtained is shown.

The emitter cone 79, which is the most important component of the field emission type surge absorbing element 74,
A circular oxide mask corresponding to each of the emitter cones 79 is formed on the surface of the n-type Si substrate, and the surface of the Si substrate is subjected to an etching process to slightly overetch portions not covered with the oxide mask. And finally removing the oxide mask.

[0012]

The operating voltage (rated voltage) of the field electron emission type surge absorbing element 74 is as follows.
The degree of vacuum in the envelope 78 and the work function of the emitter cone 79,
It is determined by the distance between the emitter cone tip 79a and the inner surface of the second substrate member 76 or the sharpness of the emitter cone tip 79a. That is, when it is necessary to set the operating voltage of the field electron emission type surge absorbing element 74 relatively low, a method of increasing the degree of vacuum in the envelope 78, a method of reducing the work function of the emitter cone 79, A method of shortening the distance between the tip portion 79a of the emitter cone and the inner surface of the second substrate member 76 or a method of sharpening the tip portion 79a of the emitter cone is theoretically conceivable.

However, there is a certain limit in improving the degree of vacuum in the envelope 78, and it is necessary to control the positional relationship between the tip 79a of the emitter cone and the second substrate member 76 on the order of μm. Is extremely difficult. Furthermore, in the conventional method of performing an etching process on the surface of the substrate member and integrally forming the emitter cone using an undercut by over-etching, there is a certain limit to increasing the sharpness of the emitter cone tip 79a. In addition, the work function of the emitter cone 79 itself could not be significantly reduced, and there was no other way than to select a protective film 80 having a work function as low as possible.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object the purpose of
An object of the present invention is to realize a field emission type surge absorbing element capable of setting an operation voltage to be relatively low by increasing an electric field concentration in a cone. Another object of the present invention is to realize a method of manufacturing such a field emission type surge absorbing element.

[0015]

In order to achieve the above object, a field emission type surge absorbing element according to the present invention comprises:
A first substrate member and a second substrate member made of a semiconductor are disposed to face each other, the peripheral edges of the opposing surfaces of both substrate members are hermetically sealed to form an envelope, and the inside of the envelope is brought into a high vacuum state. A plurality of emitter cones are formed on at least one of the opposing surface of the first substrate member and the opposing surface of the second substrate member;
In a field electron emission type surge absorption element in which a predetermined gap is formed between the emitter cone and the inner surface of the other substrate member or the emitter cone, and external electrodes are respectively formed on the outer surfaces of both substrate members, The above emitters
The cone has a sharp tip and 8 mm from the inner surface of the substrate member.
And a rising portion that stands at an angle of 0 degree or more and 90 degrees or less.
And the diameter of the bottom of the emitter cone
The pitch between the emitter cones (adjacent emitter
The ratio of the distance between the centers of the bottoms of the cones is 2 or more and 3 or less.
It is characterized by what has been done.

The field electron emission type surge absorbing element of the present invention has a rising portion in which the emitter cone stands at an angle of 80 ° or more and 90 ° or less from the inner surface of the substrate member. The so-called electric lines of force that occur sometimes do not cover the bottom of the emitter cone or the plane between the emitter cones, but rather concentrate on the tip of the emitter cone. The degree of electric field concentration can be increased. Also, the emitter
The distance between the emitter cone and the diameter of the bottom of the cone
(The distance between the centers of the bottoms of adjacent emitter cones)
Separation) ratio of 2 or more, and the emitter
By making the cone density relatively sparse, each emitter
-The electric field strength applied to the cone is increased. On the other hand, the unit surface
If the density of the emitter cone per product is too low,
The electric field strength applied to each emitter cone is too large
To reduce the life of the emitter.
The pitch ratio to the diameter of the cone bottom is 3 or less
I have.

It is desirable that the aspect ratio, which is the ratio of the height to the diameter of the bottom surface of the emitter cone, be 2 or more. The higher the aspect ratio, the more likely the electric field concentration occurs at the tip of the emitter cone. Therefore,
The aspect ratio of the emitter cone is set to 2 or more.
By setting the aspect ratio (about 0.5 to 1.67) of the emitter cone of the conventional field emission type surge absorbing element shown in FIG.
The electric field concentration at a can be easily caused.

In the emitter cone, a large number of circular oxide film masks are formed on a surface of a semiconductor substrate which is a base of a substrate member .
The pitch between the oxide mask and the diameter of the bottom of the oxide mask is
And the ratio of the switches is 2 or more and 3 or less .
By etching the surface of the semiconductor substrate and eroding a portion not covered with the oxide film mask, an angle of 80 degrees or more and 90 degrees or less from the surface of the semiconductor substrate is formed on the back surface of the oxide film mask. It has a rising portion to be erected, and forms a projection with an aspect ratio of 2 or more, which is the ratio of the height to the diameter of the bottom surface, and further erodes the surface of the projection to sharpen the tip portion. Can be formed by removing the oxide film mask.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1, a field electron emission type surge absorbing element 10 according to the present invention comprises a first substrate member 11;
And the second substrate member 12 are opposed to each other with a predetermined distance therebetween, and the inner peripheral edges of both substrate members are frame members serving also as spacers.
An envelope 14 is formed by hermetically sealing the space 13 therebetween, and the interior of the envelope 14 is maintained in a high vacuum state of 10 ⁻⁶ to 10 ⁻⁸ Torr.

The first substrate member 11 and the second substrate member
On the inner surface of 12, a large number of emitter cones 15 are protruded over a substantially entire surface at predetermined intervals. Although FIG. 1 is a cross-sectional view, only one row of emitter cones 15 is shown. However, the emitter cones 15 are actually arranged vertically and horizontally at regular intervals. The first substrate member
11 and the second substrate member 12 are formed of an n-type semiconductor in which impurities such as P and As are mixed in Si. The emitter cone 15 is also made of an n-type semiconductor and is formed integrally with the first substrate member 11 and the second substrate member 12.

The emitter cone 15 has a sharp tip 15a having a substantially conical shape, and a substantially cylindrical rising portion which stands substantially vertically from the inner surfaces of the first substrate member 11 and the second substrate member 12. 15b and both substrate members 11, 12
The tip 15a of the emitter cone 15 is positioned so as to face the emitter cone 15 of the other substrate member with a predetermined gap. Thus, in the field electron emission type surge absorbing element 10 of the present invention, by forming the rising portion 15b in the emitter cone 15,
The degree of concentration of the electric field at the emitter cone tip 15a is increased.

That is, in the case of the conventional emitter cone 79 shown in FIG. 26, as shown in FIG. Since it also covers the flat part between 79, the degree of electric field concentration at the tip of the emitter cone is reduced accordingly. On the other hand, when the rising portion 15b is formed in the emitter cone 15 as in the present invention, as shown in FIG. Since the light is concentrated on the tip portion 15a of the emitter cone without being applied to the portion, the degree of electric field concentration at the tip portion of the emitter cone can be increased. The rising part
Ideally, the rising angle of the substrate 15b from the inner surfaces of the substrate members 11 and 12 is desirably 90 degrees. Can be enhanced.

The height of the emitter cone 15 is 10 μm or more as a result of forming the rising portion 15b.
The aspect ratio, which is the ratio of the height to the diameter of the bottom surface set to 5 μm, is 2 or more. As this aspect ratio is larger, the electric field concentration at the emitter cone tip portion 15a is more likely to occur. In the field electron emission type surge absorbing element of the present invention, the emitter cone has an aspect ratio of 2 or more, Since the aspect ratio (about 0.5 to 1.67) of the emitter cone of the conventional field emission type surge absorbing element shown in FIG. 26 is set to be larger, the electric field concentration at the tip 15a of the emitter cone is made. Is more likely to occur.

The pitch X between the emitter cones 15 (the distance between the centers of the bottom surfaces of adjacent emitter cones) is 1
It is set in the range of 0 to 15 μm, and the ratio of the pitch to the diameter of the bottom surface is 2 or more and 3 or less. In the field electron emission type surge absorbing element 10 of the present invention, the ratio of the pitch to the diameter of the bottom surface of the emitter cone 15 is set to 2 or more, and the emitter cone density per unit area is relatively reduced. Each emitter cone 15
The electric field strength according to is increased. However, on the other hand, if the density of the emitter cones 15 per unit area is made too low, the electric field strength applied to each emitter cone 15 becomes too large and the life is shortened. The ratio of the pitch to the diameter of the bottom surface is set to 3 or less.

The first including the surface of the emitter cone 15
The inner surfaces of the substrate member 11 and the second substrate member 12 are provided with a protective layer.
22 are coated. This protective layer 22 is made of W, Mo, N
It is composed of a thin film made of i, La, Al, or the like, or a carbide, oxide, nitride, boride, or inorganic compound containing at least one of the above substances. On the outer surface of the first substrate member 11, a first layer 23a formed by evaporating Al or Cr and a second layer 23b formed by evaporating Ni on the surface of the first layer 23a are formed. A first external electrode 23 is formed. Also, on the outer surface of the second substrate member 12,
A first layer 24a formed by evaporating Al or Cr, and a second layer formed by evaporating Ni on the surface of the first layer 24a.
A second external electrode 24 consisting of 24b is formed. Al or Cr constituting the first layers 23a and 24a,
The Ni constituting the layers 23b and 24b is selected to realize a good ohmic contact.
However, the first external electrode 23 and the second external electrode 24
Need not necessarily have a two-layer structure, and may be formed by evaporating only Ni. As the material of the frame member 13,
The thermal expansion coefficient is close to that of an n-type semiconductor, and mobile ions (N
a ⁺ ) containing Pyrex (registered trademark) glass or the like is used.

The first external electrode 23 and the second external electrode
24 has a first external terminal 25 and a second external terminal, respectively.
26 is connected. Then, by connecting the terminals 25 and 26 to the lines L1 and L2 or GND, the first field emission type surge absorbing element 10 can be connected between the lines L1 and L2 similarly to the surge absorbing element 72 shown in FIG. Or line L1, L2-GND
It will be inserted and connected between them.

The line L1 and L2 or the line L
1, When a surge voltage higher than the rated voltage is applied between L2 and GND, a strong electric field concentration occurs at the tip 15a of the emitter cone 15, and electrons are emitted into a vacuum through a potential barrier on the surface. At this time, in the first field emission type surge absorbing element 10, the rising portion 15
Since b is formed, the lines of electric force generated when a surge voltage is applied are concentrated on the tip 15a of the emitter cone. Further, since the aspect ratio of the emitter cone 15 is set to 2 or more, the electric field concentration at the tip 15a of the emitter cone easily occurs. Further, since the pitch ratio to the diameter of the bottom surface of the emitter cone 15 is set to 2 or more and 3 or less, the electric field intensity applied to each emitter cone 15 is increased. As a result, in the first field emission surge absorbing element 10, electron emission can be realized by applying a relatively low voltage. The electrons generated by the so-called field electron emission phenomenon are captured on the inner surface of the opposing substrate member, so that a precursor discharge in which a current flows between the first substrate member 11 and the second substrate member 12 is generated. By absorbing the precursor discharge into a vacuum spark discharge, the surge can be absorbed.

This first field emission type surge absorbing element
In the case of 10, since the first substrate member 11 and the second substrate member 12 each have an emitter cone 15 and can emit electrons in both directions, their polarities are taken into consideration when connecting to the circuit. No need.

Although the size of the emitter cone 15 is emphasized in FIG. 1 for convenience of illustration, the emitter cone 15 is actually in a size of μm as described above. On the other hand, the first substrate member 11 and the second substrate member 12 have a size of mm unit (for example, 2 to 6 mm square),
Also, tens of thousands to hundreds of thousands of emitter cones 15 are formed. Incidentally, the overall size of the first field emission type surge absorbing element 10 is about 6 mm square and about 0.6 mm thick.

Next, a method of forming the emitter cone 15 will be described with reference to FIGS. First, an n-type Si substrate 27 having a resistivity of 0.01 to 5 (Ω · cm), which serves as an element of the first substrate member 11 and the second substrate member 12, is prepared, and its surface is oxidized to a thickness. A SiO ₂ thin film 28 of about 150-3000 Å is formed (FIG. 4). Next,
A photoresist 29 is uniformly applied to the entire surface of the SiO ₂ thin film 28 (FIG. 5). Further, a photomask 31 in which a light-shielding paint 30 is applied in a circular shape is placed over the photoresist 29, and an exposure process using ultraviolet rays UV is performed. As a result, the surface of the photoresist 29 is exposed except for the portion where the ultraviolet rays UV are blocked by the light-shielding paint 30. Next, the exposed portion of the photoresist 29 is removed using a predetermined chemical, and a circular photoresist mask 32 is formed on the surface of the SiO ₂ thin film 28 (FIG. 6).

Next, the portions of the SiO ₂ thin film 28 that are not covered with the photoresist mask 32 are removed by BHF (wet etching using buffered hydrofluoric acid), and then the photoresist mask 32 is removed. Thus, a circular dot-shaped oxide film mask 33 is formed (FIG. 7). The diameter of the oxide film mask 33 substantially matches the diameter of the bottom surface of the emitter cone formed by the present method, and is set to 5 μm. Although only one oxide film mask 33 is shown in FIG.
33 are actually formed in a matrix in a number corresponding to the number of the emitter cones 15. The pitch between the oxide film masks 33 (the distance between the centers of the bottom surfaces of adjacent oxide film masks) is set within a range of 10 to 15 μm.
The ratio of the pitch to the diameter of the oxide film mask bottom is 2 or more and 3
It is as follows. By setting in this way, the ratio of the pitch to the diameter of the bottom surface of the formed emitter cone can be set to 2 or more and 3 or less.

Next, RIE (reactive ion etching) is performed on the surface of the Si substrate 27 to form an oxide film mask.
Erosion of parts not covered by 33. RIE is performed between two parallel electrodes installed in a vacuum chamber (not shown).
After arranging the i-substrate 27, a predetermined gas medium is filled in the vacuum chamber, and a power of about 160 W is applied between both electrodes to generate a high-frequency plasma discharge. This is a method of performing etching by utilizing the action. In this case, it is desirable to use reactive O ₂ and SF ₆ as the gas medium, and the volume ratio of both is
Under a pressure of 2.2 × 10 ⁻² Torr, for example, SF ₆ : O ₂
= 9: 1. Since RIE is excellent in anisotropy, the degree of so-called undercut, in which etching proceeds on the back surface side of the oxide film mask 33, is relatively low. A substantially column-shaped projection 34 standing at an angle equal to or less than degrees is formed (FIG. 8). This RIE is performed, for example, for 20 minutes under the above conditions, and is stopped at a predetermined stage where the height of the bottom surface of the protrusion 34 reaches at least 2 in aspect ratio. Next, the pressure of O ₂ and SF ₆ was increased to 5.5.
By raising the pressure to × 10 ⁻² Torr and performing RIE, the tip of the protruding portion 34 is slightly eroded, and the substantially frustoconical tip 34 is formed.
a and a substantially cylindrical rising portion 34b are formed (FIG. 9).

RIE using reactive O ₂ and SF ₆ under the pressure of 2.2 × 10 ⁻² Torr is performed to erode the portion of the Si substrate 27 which is not covered with the oxide film mask 33. Instead, the projecting portion 34 in FIG. 8 may be formed by performing isotropic dry etching using CF ₄ . This isotropic dry etching using CF ₄ is performed by 1.0 ×
It is performed under a pressure of 10 ^-1 Torr. In addition, instead of CF ₄ alone, reactive O ₂ and CF ₄ (volume ratio is CF ₄ : O
₂ = 9: 1) may be performed. In this case, although a slight undercut occurs, the reaction speed can be increased as compared with the case of using CF ₄ alone. . 8 is formed by isotropic dry etching using CF ₄ or reactive O ₂ and CF ₄ , the gas is replaced with O ₂ and SF ₆ to obtain 5.5 × 10 RIE under pressure of ^-1 Torr
The tip of 34 is slightly eroded to form a generally frustoconical tip in FIG.
34a and a substantially cylindrical rising portion 34b are formed.

Thus, CF ₄ or reactive O ₂ and CF ₄
When the protruding portion 34 shown in FIG. 8 is formed by isotropic dry etching using RIE, RIE using reactive O ₂ and SF ₆ is performed.
The standing angle of the protruding portion 34 can be made closer to 90 degrees as compared with the case where the protruding portion 34 is formed. On the other hand, when the protrusion 34 shown in FIG. 8 is formed by RIE using reactive O ₂ and SF ₆ , the protrusion is formed by isotropic dry etching using CF ₄ or reactive O ₂ and CF _4. As in the case where the protrusions 34 are formed, there is no need to replace the gas for performing the RIE in the next step after the formation of the protrusions 34 in FIG. 8, and it is sufficient to simply increase the gas pressures of O ₂ and SF _6. Therefore, the manufacturing process can be simplified.

Next, the surface of the Si substrate 27 is subjected to anisotropic wet etching to further erode the surface of the protruding portion 34, thereby sharpening the substantially frustoconical tip portion 34a (FIG. 10). ). In general, wet etching is a method in which an object to be etched is immersed in a predetermined chemical and etching is performed using the chemical reaction, and has a strong isotropic property (that is, it is difficult to control the etching direction, and overetching is difficult). Easily occur).
On the other hand, in the anisotropic wet etching, by devising the selection of the etching solution, the isotropic property is reduced and the etching direction is easily controlled while the wet etching is performed. Here, a mixed aqueous solution of KOH and H ₂ O is used as an etchant for anisotropic wet etching, and the temperature of the solution is set to about 50 degrees Celsius. The mixing ratio of the two is, for example, 100
It can be mentioned mixing of KOH 50g respect ml of _{H 2} O.

When the above-described anisotropic wet etching progresses and a certain degree of undercut 35 occurs to sharpen the tip 34a of the projection 34, the oxide film mask 33 loses stability and drops (FIG. 11). ). At this stage, the angle of the tip 34a of the protruding portion 34 is sharpened to 25 to 30 degrees,
Since the emitter cone 15 is completed, the anisotropic wet etching is stopped. The time required for the anisotropic wet etching up to here is expected to be about 1 minute.

As described above, the emitter 15 having the tip portion 15a that is extremely sharp and having the rising portion 15b is provided.
The cone 15 can be formed, and the operating voltage of the first field emission surge absorbing element 10 can be set to a relatively low value depending on the purpose of use.

The first substrate member 11 and the second substrate member each having the emitter cone 15 formed on the surface as described above.
A first external electrode 23 and a second external electrode 24 are formed on the outer surface of the substrate 12, respectively. Further, a protective film 22 is formed on the inner surfaces of the two substrate members 11 and 12 and the surface of the emitter cone 15. Next, as shown in FIG. 12, the frame member 13 is superimposed on the surface of the first substrate member 11. This frame member 13 has a shape in which a middle portion of a rectangular glass plate is largely cut away in a rectangular shape, and a peripheral edge of the opposing surface of the first substrate member 11 is provided.
The first end surface (lower surface) 13a is superimposed on 40.

Next, as shown in FIG. 13, the first substrate member 11 is placed on the hot plate 42 with the first external electrode 23 facing down. Then, the electrode plate 43 is crimped to the second end face 13b of the frame member 13. The positive side of a DC power supply 44 is connected to the first external electrode 23 of the first substrate member 11 via a hot plate 42, and the electrode plate 43
Is connected to the negative side of the DC power supply 44. Next, a DC voltage of 50 to 1000 V is applied from the DC power supply 44 while the first substrate member 11 and the frame member 13 are heated to 200 to 600 degrees Celsius by the hot plate 42.

As a result, as shown in FIG. 14, after a certain period of time, the cations 45 in the frame member 13 move to the minus side (ie, the second end surface 13b side of the frame member 13), and
Negative charges are concentrated near the peripheral edge 40 of the first substrate member 14 to form the space charge layer 46, and a chemical bond with a large attractive force is generated to realize anodic bonding.

As described above, after the strong bonding between the peripheral edge 40 of the first substrate member 11 and the first end surface 13a of the frame member 13 is completed, as shown in FIG. The second end face 13b is polished by a grinding wheel 47 to adjust the frame member 13 to a required height (thickness). Since the protective film 22 is formed on the inner surface of the first substrate member 11 and the surface of the emitter cone 15, the polishing film is not damaged.

As shown in FIG. 16, this time, in a vacuum atmosphere, the second substrate member 12 is placed on the hot plate 42 with the second external electrode 24 facing down, and the second Is brought into contact with the peripheral edge 48 of the facing surface of the second substrate member 12. Further, the plus side of the DC power supply 44 is connected to the second external electrode 24 of the second substrate member 12 via the hot plate 42, and the second external electrode 24 of the first substrate member 11 is connected to the first external electrode 23 of the first substrate member 11. Is connected to the negative side of the DC power supply 44 via the electrode plate 43. Then, the second substrate member 12 and the frame member 13 are heated by the hot plate 42 to 200 to 60 degrees Celsius.
In the state of being heated to 0 degrees, 50 to 1
A DC voltage of 000 V is applied. As a result, the strong anodic bonding between the peripheral edge 48 of the second substrate member 12 and the second end surface 13b of the frame member 13 is realized by the same mechanism as described above, and the envelope having high airtightness is realized. 14 is completed.

Since the anodic bonding method does not use a molten glass or an adhesive, the two substrate members 11 and 12 and the frame member 13 can be bonded with high positional accuracy, and degassing after the bonding is unnecessary. It has the advantage of being. Also, the frame member 13
Must be made of Pyrex (registered trademark) glass or the like that contains mobile ions inside it, and if it is formed too thin, it will be easily broken. Considering the handling 1
Although there was a problem that it could not be less than 00 μm, as described above, after the frame member 13 was anodically bonded to the first substrate member 11, by providing a step of adjusting the height of the frame member 13 by polishing, The height of the frame member 13 can be set to 100 μm or less. Therefore, the operating voltage can be set low by reducing the distance between the inner surfaces of the two substrate members. Since the polishing step is performed after being once bonded to the first substrate member 11, for example, the thickness of the frame member 13 is 100 μm.
Even if it is below, it will not be easily broken, and there will be no inconvenience in handling.

FIG. 17 shows a second field emission type surge absorbing element 50 according to the present invention. In the case of the second field emission type surge absorbing element 50, concave portions 51 having a constant depth are formed on the opposing surfaces of the first substrate member 11 and the second substrate member 12 made of an n-type semiconductor. Along with
A large number of emitter cones 15 are integrally formed on the bottom surface of the concave portion 51. Further, the peripheral edge 40 of the facing surface of the first substrate member 11
Between the outer peripheral edge 48 of the second substrate member 12 and the frame member 13.
This is characterized in that, instead of joining via the frame, the frame-like oxide films 52, 52 are joined via an intervening portion. Other configurations are substantially the same as those of the first field emission type surge absorbing element 10.

A method of manufacturing the second field emission type surge absorbing element 50 will be described with reference to FIGS. First,
An n-type Si substrate 55 having a resistivity of 0.01 to 5 (Ω · cm), which is an element of the first substrate member 11 and the second substrate member 12, is oxidized in an oxidizing atmosphere to have a surface of about 150 Å. After forming a SiO ₂ thin film 56 having a thickness of about ₂ μm,
A photoresist 57 is uniformly applied to the entire surface of the iO ₂ thin film 56 using a spinner (FIG. 18). Next, a photomask 60 provided with a frame-shaped light-shielding pattern 58 and a number of dot-shaped light-shielding patterns 59 is placed over the photoresist 57, and an exposure process using ultraviolet UV is performed (FIG. 19). As a result, the surface of the photoresist 57 is exposed except for the portion where the ultraviolet rays are blocked by the light shielding patterns 58 and 59. Next, the exposed portion of the photoresist 57 is removed using a predetermined chemical, and a frame-shaped photoresist mask 61 and a dot-shaped photoresist mask 62 are formed on the surface of the SiO ₂ thin film 56 (FIG. 20). Next, by BHF,
After removing portions of the SiO ₂ thin film 56 that are not covered with the frame-shaped photoresist mask 61 and the dot-shaped photoresist mask 62, the photoresist masks 61 and 62 are removed.
By stripping, a frame-shaped oxide film 52 along the surface periphery of the Si substrate 55 and a number of dot-shaped oxide films 64 are formed (FIG. 21).

Next, as in the case of the first field electron emission type surge absorbing element, 2.2 × 2.2 ×
RIE under a pressure of 10 ⁻² Torr (or 1.0 × 1
CF ₄ or reactive O ₂ and CF under pressure of 0 ⁻¹ Torr
₄ ) 5.5 × 10
^By performing RIE under a pressure of ^-2 Torr and anisotropic wet etching, a portion not covered with the oxide films 52 and 64 is eroded to a required depth, thereby forming the concave portion 51 and the emitter cone 15 ( Not shown). At this time, due to the sharpening of the emitter cone 15, the dot-shaped oxide film 64 loses balance and falls naturally (see FIG. 11), but the frame-shaped oxide film 52 is left as it is. Next, the concave portion 51 and the emitter cone
A protective film 22 is formed on the surface of 15

Thus, the frame-shaped oxide film is formed on the peripheral edge of the facing surface.
52 remains, recess 51, many emitter cones
15 and a first substrate member 11 (second
As shown in FIG. 22, the substrate member 12) is immersed in a first tank 65 filled with a mixed solution of sulfuric acid and peroxide water, heated by a heater (not shown), and boiled for about 5 minutes. The concentration of the sulfuric acid peroxide water is set to 5 to 20%.
As a result, the surface of the frame-shaped oxide film 52 reacts to form a predetermined rough surface. Note that the protective film 22 formed on the surfaces of the emitter cone 15 and the concave portion 51 does not react with the sulfuric acid-peroxide solution, and is not roughened.

Next, the first substrate member 11 (second substrate member 12) is taken out of the first tank 65 and transferred into the second tank 66 as shown in FIG. The second tank 66 is filled with pure water. On the back side of the bottom surface of the second tank 66, an ultrasonic oscillation member 67 made of a piezoelectric element is arranged in close contact. When the ultrasonic oscillation member 67 is driven for 30 seconds to 60 seconds, the surface of the first substrate member 11 (second substrate member 12) is cleaned, and the surface of the frame-shaped oxide film 52 becomes hydrophilic. Become.

Next, as shown in FIG. 24, in the vacuum chamber 68, the first substrate member 11 is placed on the base 69, and the second substrate member 12 is disposed to face each other. The frame-shaped oxide films 52 left on the peripheral edge of the surface are brought into contact with each other. After that, the heater 70 is turned on to set the temperature from 1000 to 1 Celsius.
Heat at 400 degrees. As a result, the frame-shaped oxide films 52 of the two substrate members 11 and 12 are covalently bonded to each other, thereby forming the envelope 14 hermetically sealed.

This second field electron emission type surge absorbing element
According to the manufacturing method of 50, it is not necessary to use a frame member in joining the two substrate members 11 and 12, and the members can be air-tightly joined via the frame-shaped oxide films 52 formed on the peripheral edges of the opposing surfaces of the two substrate members. Therefore, the distance between the tips of the emitter cones 15 can be further reduced, and the operating voltage can be set lower accordingly. By making the surface of the frame-shaped oxide film 52 hydrophilic through the washing step as described above, the wettability of the surface is improved and the covalent bond is facilitated.

In the above, the frame-shaped oxide films 52, 52 are formed on the peripheral edges of the opposing surfaces of the first substrate member 11 and the second substrate member 12, respectively.
Although an example in which 52 is formed has been shown, since a covalent bond can be formed between SiO _{2 and} Si, it is sufficient to form the frame-shaped oxide film 52 on one of the substrate members.

The first field emission type surge absorbing element
The 10 and the second field emission type surge absorbing element 50 are both of the type in which the emitter cone 15 is formed on the opposing surface of both substrate members 11 and 12. It is not limited to the type surge absorbing element.
That is, as described in the prior art, the present invention can also be applied to a field emission type surge absorbing element in which the emitter cone formed on the facing surface of one substrate member faces the inner surface of the other substrate member. . Further, the emitter cone is not limited to the case where the emitter cone is integrally formed with the silicon substrate member as described above, and can be applied to a field electron emission type surge absorbing element of a type in which the emitter cone is formed by a diamond crystal. .

[0053]

In the field electron emission type surge absorbing element according to the present invention, the emitter cone has a rising portion which stands from the inner surface of the substrate member at an angle of not less than 80 degrees and not more than 90 degrees. As a result, the degree of electric field concentration at the tip of the emitter cone increases, and as a result, electron emission can be realized by applying a relatively low voltage.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first field emission type surge absorbing element according to the present invention.

FIG. 2 is an explanatory diagram showing a distribution state of lines of electric force in the case of a conventional emitter cone.

FIG. 3 is an explanatory diagram showing a distribution state of lines of electric force in the case of the emitter cone of the present invention.

FIG. 4 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 5 is a partial sectional view showing a process of forming an emitter cone.

FIG. 6 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 7 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 8 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 9 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 10 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 11 is a partial cross-sectional view showing a process of forming an emitter cone.

FIG. 12 is a perspective view showing a joining process between the first substrate member and the frame member.

FIG. 13 is an explanatory diagram showing a joining process between the first substrate member and the frame member.

FIG. 14 is a conceptual diagram showing the principle of joining the first substrate member and the frame member.

FIG. 15 is an explanatory view showing a polishing step of the frame member.

FIG. 16 is an explanatory diagram showing a joining process between the second substrate member and the frame member.

FIG. 17 is a sectional view showing a second field-emission-type surge absorbing element according to the present invention.

FIG. 18 is a partial cross-sectional view showing a process of forming an emitter cone and a concave portion.

FIG. 19 is a partial cross-sectional view showing a process of forming an emitter cone and a concave portion.

FIG. 20 is a partial cross-sectional view showing a process of forming an emitter cone and a concave portion.

FIG. 21 is a partial cross-sectional view showing a process of forming an emitter cone and a concave portion.

FIG. 22 is an explanatory diagram showing a state where a substrate member is immersed in a first tank.

FIG. 23 is an explanatory view showing a state where a substrate member is immersed in a second tank.

FIG. 24 is an explanatory diagram showing a joining process of the first substrate member, the frame member, and the second substrate member.

FIG. 25 is a circuit diagram showing a general use example of a surge absorbing element.

FIG. 26 is a cross-sectional view showing a conventional field emission type surge absorbing element.

FIG. 27 is a waveform chart showing surge absorption characteristics of a general field emission type surge absorber.

[Explanation of symbols]

 10 First field emission type surge absorbing element 11 First substrate member 12 Second substrate member 13 Frame member 13a First end face of frame member 13b Second end face of frame member 14 Envelope 15 Emitter cone 15a Tip of emitter cone 23 First external electrode 24 Second external electrode 40 Peripheral edge of first substrate member facing surface 42 Hot plate 44 DC power supply 48 Peripheral edge of second substrate member facing surface 50 Second electric field Electron emission type surge absorbing element 52 Frame-shaped oxide film 65 First tank 66 Second tank 67 Ultrasonic oscillation member 68 Vacuum chamber 70 Heater

Continued on the front page (72) Inventor Masayoshi Misawa 449, Tara Nakatsubo, Ina-shi, Nagano Prefecture JP-A-3-62482 (JP, A) JP-A-10-50205 (JP, A) JP-A-9-298833 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB Name) H01J 9/02 H01T 4/12 H02H 9/04

Claims (3)

(57) [Claims] A first substrate member and a second substrate member made of a semiconductor are disposed to face each other, and the peripheral edges of the opposing surfaces of both substrate members are hermetically sealed to form an envelope. Is formed in a high vacuum state, and a number of emitter cones are formed on at least one of the opposing surface of the first substrate member and the opposing surface of the second substrate member, and the inner surfaces of the emitter cone and the other substrate member are formed. Alternatively, in a field electron emission type surge absorbing element in which a predetermined gap is formed between the emitter and the cone, and external electrodes are formed on the outer surfaces of both substrate members, respectively.
The emitter-cone, and a sharp tip, has a rising portion which upright at 80 degrees 90 degrees from the inner surface of the substrate member, also the bottom of the emitter cone
Pitch between emitter cones (adjacent to face diameter)
The distance between the centers of the emitter cones
A field emission type surge absorbing element characterized in that the number is 2 or more and 3 or less . 2. The field emission type surge absorbing element according to claim 1, wherein an aspect ratio which is a ratio of a height to a diameter of a bottom surface of the emitter cone is 2 or more. 3. A method of manufacturing a field electron emission type surge absorbing element of the second aspect, the surface of the semiconductor substrate underlying the substrate member, a plurality of circular oxide film mask, oxide film
Pitch between oxide masks to diameter of mask bottom
The ratio is set to 2 or more and 3 or less, and then, the surface of the semiconductor substrate is subjected to an etching process to erode a portion that is not covered with the oxide film mask. The semiconductor device has a rising portion that stands at an angle of 80 degrees or more and 90 degrees or less from the surface of the semiconductor substrate, and forms a projection having an aspect ratio, which is a ratio of height to the diameter of the bottom surface, of 2 or more. A method for manufacturing a field electron emission type surge absorbing element, wherein the emitter cone is formed by eroding a surface of a portion to sharpen a tip portion and finally removing the oxide film mask.