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JP3147157B2 - Electronic circuit device including semiconductor element - Google Patents
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JP3147157B2 - Electronic circuit device including semiconductor element - Google Patents

Electronic circuit device including semiconductor element

Info

Publication number
JP3147157B2
JP3147157B2 JP35233297A JP35233297A JP3147157B2 JP 3147157 B2 JP3147157 B2 JP 3147157B2 JP 35233297 A JP35233297 A JP 35233297A JP 35233297 A JP35233297 A JP 35233297A JP 3147157 B2 JP3147157 B2 JP 3147157B2
Authority
JP
Japan
Prior art keywords
resin layer
semiconductor element
protective resin
circuit board
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP35233297A
Other languages
Japanese (ja)
Other versions
JPH11176882A (en
Inventor
茂雄 吉崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP35233297A priority Critical patent/JP3147157B2/en
Publication of JPH11176882A publication Critical patent/JPH11176882A/en
Application granted granted Critical
Publication of JP3147157B2 publication Critical patent/JP3147157B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はバンプ電極(突起電極)
を有する半導体素子を含む電子回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bump electrode (bump electrode).
The present invention relates to an electronic circuit device including a semiconductor element having:

【0002】[0002]

【従来の技術】図1に示すようにバンプ電極1を備えた
半導体素子2を回路基板3上に搭載した電子回路装置は
公知である。半導体素子2はバンプ電極1を回路基板3
の配線導体4に半田付けすることによって取付けられ、
外部から水分等の異物が侵入することを防止するために
第1及び第2の保護樹脂層5、6によって被覆されてい
る。第1の保護樹脂層5はシリコーンゲルから成り、バ
ンプ電極1を被覆し且つ半導体素子2の本体部2aの下
面と回路基板3との間を充填するように設けられてい
る。第2の保護樹脂層6はシリコーンラバーから成り、
半導体素子2の本体部2aの上面及び第1の保護樹脂層
5を被覆すると共に高集積化のために半導体素子2の近
傍に配置された別の回路素子に接続された金属細線8の
接続部分も被覆するように形成されている。回路基板3
は上面に金属細線接続用の配線導体9を有し、下面に金
属層10を有する。なお、半導体素子2の下面を含めて
全体を被覆するようにシリコーンラバーから成る第2の
保護樹脂層6を設けないのは、半導体素子2の下面にシ
リコーンラバーを注入すると、シリコーンラバーは比較
的大きな弾性を有するために半導体素子2を上方に持ち
上げてバンプ電極1を破断するおそれがあるためであ
る。また、半導体素子2の上面も含めて全体を被覆する
ようにシリコーンゲルから成る第1の保護樹脂層5を設
けないのは、シリコーンゲルはシリコーンラバーに比べ
て粘度が十分に小さいため、シリコーンゲルのみでは半
導体素子2の全体を良好に被覆することができないため
である。
2. Description of the Related Art As shown in FIG. 1, an electronic circuit device in which a semiconductor element 2 having a bump electrode 1 is mounted on a circuit board 3 is known. The semiconductor element 2 connects the bump electrode 1 to the circuit board 3
Attached by soldering to the wiring conductor 4 of
It is covered with first and second protective resin layers 5 and 6 to prevent foreign matter such as moisture from entering from the outside. The first protective resin layer 5 is made of silicone gel, and is provided so as to cover the bump electrode 1 and fill the space between the lower surface of the main body 2 a of the semiconductor element 2 and the circuit board 3. The second protective resin layer 6 is made of silicone rubber,
A connection portion of the thin metal wire 8 which covers the upper surface of the main body 2a of the semiconductor element 2 and the first protective resin layer 5 and is connected to another circuit element arranged near the semiconductor element 2 for high integration. It is also formed so as to cover. Circuit board 3
Has a wiring conductor 9 for connecting a fine metal wire on the upper surface and a metal layer 10 on the lower surface. The reason why the second protective resin layer 6 made of silicone rubber is not provided so as to cover the entire surface including the lower surface of the semiconductor element 2 is that when silicone rubber is injected into the lower surface of the semiconductor element 2, the silicone rubber becomes relatively This is because the semiconductor element 2 may be lifted upward to break the bump electrode 1 due to the large elasticity. Further, the reason why the first protective resin layer 5 made of silicone gel is not provided so as to cover the entire surface including the upper surface of the semiconductor element 2 is that silicone gel has a sufficiently smaller viscosity than silicone rubber. This is because it is not possible to cover the entire semiconductor element 2 satisfactorily by using only the semiconductor element 2.

【0003】[0003]

【発明が解決しようとする課題】ところで、図1に示す
電子回路装置ではバンプ電極1にクラックが発生し断線
に至ることがあった。これはシリコ−ンラバ−の線膨張
係数が大きいことに起因すると考えられる。即ち、シリ
コ−ンラバ−から成る第2の保護樹脂層6は回路基板3
と樹脂封止体(図示せず)とで囲まれて密閉された状態
にあるため、樹脂封止体が例えば温度サイクル試験等で
高温(125℃以上)になることで第2の保護樹脂層6
が膨張すると、回路基板3と第2の保護樹脂層6とで挟
まれた半導体素子2に機械的応力が加わる。このため、
バンプ電極1が押しつぶされる。一方、樹脂封止体が低
温状態に置かれると、第2の保護樹脂層6が収縮し、半
導体素子2の保護樹脂層6による押さえ付けが解かれ
る。この押さえ付けと、その解除との繰り返しによって
バンプ電極1にクラックが発生し、最終的には断線に至
る。半導体素子に加わる機械的応力を開放するために、
樹脂封止体にその上面から第2の保護樹脂層6に通じる
孔を形成することが考えられる。この構造によれば、熱
膨張時に第2の保護樹脂層6がこの孔に侵入するので、
半導体素子2に加わる機械的応力を低減することができ
る。しかし、この構造では孔を通じて樹脂封止体の内部
に湿気等を取り込み易くなるため信頼性の点で問題があ
る。
By the way, in the electronic circuit device shown in FIG. 1, cracks may occur in the bump electrodes 1 and lead to disconnection. This is considered to be due to the large linear expansion coefficient of the silicone rubber. That is, the second protective resin layer 6 made of silicone rubber is
And a resin-sealed body (not shown), so that the resin-sealed body becomes high in temperature (125 ° C. or more) by, for example, a temperature cycle test. 6
Expands, a mechanical stress is applied to the semiconductor element 2 sandwiched between the circuit board 3 and the second protective resin layer 6. For this reason,
The bump electrode 1 is crushed. On the other hand, when the resin sealing body is placed in a low temperature state, the second protective resin layer 6 contracts, and the pressing of the semiconductor element 2 by the protective resin layer 6 is released. Cracks occur in the bump electrode 1 due to the repetition of the pressing and the release, and finally the disconnection occurs. In order to release the mechanical stress applied to the semiconductor element,
It is conceivable to form a hole from the upper surface of the resin sealing body to the second protective resin layer 6. According to this structure, the second protective resin layer 6 penetrates into this hole during thermal expansion.
The mechanical stress applied to the semiconductor element 2 can be reduced. However, this structure has a problem in reliability because moisture and the like are easily taken into the resin sealing body through the holes.

【0004】そこで、本発明は、バンプ電極を有する半
導体素子を良好に保護することができると共に耐湿性等
にも優れ、電気的特性が長期間にわたって良好に得るこ
とができる電子回路装置を提供することを目的とする。
Therefore, the present invention provides an electronic circuit device that can protect a semiconductor element having a bump electrode well, has excellent moisture resistance, and can obtain good electrical characteristics over a long period of time. The purpose is to:

【0005】[0005]

【課題を解決するための手段】上記課題を解決し、上記
目的を達成するための本発明は、バンプ電極を備えた半
導体素子と、回路基板と、第1及び第2の保護樹脂層
と、樹脂封止体とから成り、前記半導体素子の平板状の
本体部は前記バンプ電極によって前記回路基板の配線導
体に接続され、前記第1の保護樹脂層は、前記半導体素
子の前記バンプ電極を被覆し且つ前記半導体素子の前記
本体部の一方の主面と前記回路基板との間を充填するよ
うに設けられ、前記第2の保護樹脂層は、前記半導体素
子の前記本体部の他方の主面とを被覆するように設けら
れ、前記樹脂封止体は前記第2の保護樹脂層を介して前
記回路基板を覆うように設けられ、前記第1の保護樹脂
層は液状エポキシ樹脂に基づいて形成され、前記第2の
保護樹脂層はシリコ−ンラバ−(弾性を有するシリコ−
ン樹脂)から成り、前記第1の保護樹脂層は前記第2の
保護樹脂層よりも大きい硬度(かたさ)を有しているこ
とを特徴とする電子回路装置に係わるものである。な
お、本発明において、半導体素子とはトランジスタ、ダ
イオード、サイリスタ、集積回路、混成集積回路等の半
導体を含む全ての素子又は部品を意味する。また、電子
回路装置は、半導体集積回路装置、混成集積回路装置、
複合半導体素子、半導体装置等の種々の回路装置を意味
する。
SUMMARY OF THE INVENTION In order to solve the above problems and to achieve the above object, the present invention provides a semiconductor device having a bump electrode, a circuit board, first and second protective resin layers, A flat body of the semiconductor element is connected to a wiring conductor of the circuit board by the bump electrode, and the first protective resin layer covers the bump electrode of the semiconductor element. And a gap between one main surface of the main body of the semiconductor element and the circuit board is provided, and the second protective resin layer is provided on the other main surface of the main body of the semiconductor element. And the resin sealing body is provided so as to cover the circuit board via the second protective resin layer, and the first protective resin layer is formed based on a liquid epoxy resin. And the second protective resin layer is made of silicon. Nraba - (silicone having an elastic -
The first protective resin layer has a higher hardness (hardness) than the second protective resin layer. In the present invention, a semiconductor element means all elements or components including a semiconductor such as a transistor, a diode, a thyristor, an integrated circuit, and a hybrid integrated circuit. The electronic circuit device may be a semiconductor integrated circuit device, a hybrid integrated circuit device,
It means various circuit devices such as a composite semiconductor element and a semiconductor device.

【0006】[0006]

【発明の作用及び効果】本発明は次の作用及び効果を有
する。液状エポキシ樹脂から成る第1の保護樹脂層が半
導体素子のバンプ電極を被覆し且つ半導体素子の本体部
の一方の主面と回路基板との間を充填しているので、温
度サイクルが多数繰り返されてもバンプ電極にクラック
が生じて断線することがない。即ち、液状エポキシから
成る第1の保護樹脂層は半導体素子と回路基板の両方に
対して良好に密着し、且つシリコンゲルやシリコ−ンラ
バ−から成る保護樹脂層に比べて硬度及び剛性が大きく
半導体素子に対して硬い台座として機能する。このた
め、第2の樹脂層の熱膨張によって半導体素子に対して
下向き(回路基板側に向う方向)の押さえ付けが加わっ
たとき、この応力を第1の保護樹脂層が支持し、バンプ
電極に大きな応力(圧縮力)が加わることが阻止され
る。この結果、バンプ電極のクラック及び破断が防止さ
れる。
The present invention has the following functions and effects. Since the first protective resin layer made of a liquid epoxy resin covers the bump electrodes of the semiconductor element and fills the gap between one main surface of the main body of the semiconductor element and the circuit board, a number of temperature cycles are repeated. Even if the bump electrodes are not cracked, they are not broken. That is, the first protective resin layer made of liquid epoxy adheres well to both the semiconductor element and the circuit board, and has a higher hardness and rigidity than the protective resin layer made of silicon gel or silicone rubber. Functions as a hard pedestal for the element. Therefore, when the semiconductor element is pressed downward (toward the circuit board) by the thermal expansion of the second resin layer, the stress is supported by the first protective resin layer and the bump electrode is supported by the bump electrode. Large stress (compression force) is prevented from being applied. As a result, cracks and breaks of the bump electrodes are prevented.

【0007】[0007]

【実施形態及び実施例】次に、図2を参照して本発明の
実施例に係わる電子回路装置を説明する。図2に示す電
子回路装置は混成集積回路であって、図1と同様に金属
突起から成るバンプ電極1を有する半導体素子2と例え
ばセラミックから成る絶縁性回路基板3と電子回路素子
7と内部リード細線としての金属細線8とを備えてい
る。半導体素子2のバンプ電極1は回路基板3上の配線
導体4に半田付けされている。即ち半導体素子2のPN
接合等を含む平板状の本体部2aの一方の主面が回路基
板3の主面に所定の間隔を有して対向するようにフェー
スダウンボンディングされている。例えば直径200μ
mのAlワイヤから成る金属細線8の一端は半導体素子
2の近傍に配置された回路基板3上の配線導体9に周知
のワイヤボンディング法によってステッチボンディング
され、この他端は電子回路素子7の上面の電極にワイヤ
ボンディング法によってステッチボンディングされてい
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an electronic circuit device according to an embodiment of the present invention will be described with reference to FIG. The electronic circuit device shown in FIG. 2 is a hybrid integrated circuit, as in FIG. 1, a semiconductor element 2 having a bump electrode 1 made of a metal projection, an insulating circuit board 3 made of, for example, ceramic, an electronic circuit element 7, and internal leads. And a thin metal wire 8 as a thin wire. The bump electrode 1 of the semiconductor element 2 is soldered to a wiring conductor 4 on a circuit board 3. That is, the PN of the semiconductor element 2
Face-down bonding is performed such that one main surface of the plate-shaped main body 2a including a joint or the like faces the main surface of the circuit board 3 at a predetermined interval. For example, 200μ in diameter
One end of a thin metal wire 8 made of Al wire is stitch-bonded to a wiring conductor 9 on a circuit board 3 arranged near the semiconductor element 2 by a known wire bonding method, and the other end is an upper surface of the electronic circuit element 7. Are stitch-bonded to the electrodes by a wire bonding method.

【0008】この実施例においても、バンプ電極1を囲
み且つ半導体素子2の本体部2aと回路基板3との間を
充填するように第1の保護樹脂層5aが設けられ、ま
た、半導体素子2の本体部2aの上面と第1の保護樹脂
層5aと少なくとも金属細線8の配線導体9に対する接
続部を被覆するように第2の保護樹脂層6が設けられて
いる。しかし、この第1の保護樹脂層5aの材料及び製
造方法が図1の従来の第1の保護樹脂層5と相違してい
る。本実施例の第1の保護樹脂層5aは第2の保護樹脂
層6を形成するためのシリコ−ンラバ−に比べて粘度が
低く、従来の第1の保護樹脂層5を形成するシリコ−ン
ゲルに近い粘度を有する液状エポキシ樹脂を半導体素子
2の本体部2aと回路基板3との間に充填し、しかる
後、硬化することによって形成したものである。また、
硬化した後において、第1の保護樹脂層5aの硬度及び
剛性は第2の保護樹脂層6及び従来の第1の保護樹脂層
5のこれ等よりも大きい。このため第1の保護樹脂層5
aは硬化前においては、半導体素子2と回路基板3との
対向する比較的狭い領域に良好に注入してこれを充填す
ることができ、硬化後においてはバンプ電極1を押し付
け力から保護するための台座として良好に機能する。
Also in this embodiment, a first protective resin layer 5a is provided so as to surround the bump electrode 1 and fill the space between the main body 2a of the semiconductor element 2 and the circuit board 3. The second protective resin layer 6 is provided so as to cover the upper surface of the main body 2a, the first protective resin layer 5a, and at least the connection portion of the thin metal wire 8 to the wiring conductor 9. However, the material and manufacturing method of the first protective resin layer 5a are different from those of the conventional first protective resin layer 5 of FIG. The first protective resin layer 5a of this embodiment has a lower viscosity than the silicone rubber for forming the second protective resin layer 6, and the silicone gel for forming the conventional first protective resin layer 5 is used. It is formed by filling a liquid epoxy resin having a viscosity close to that between the main body 2a of the semiconductor element 2 and the circuit board 3 and then curing the liquid epoxy resin. Also,
After curing, the hardness and rigidity of the first protective resin layer 5a are larger than those of the second protective resin layer 6 and the conventional first protective resin layer 5. Therefore, the first protective resin layer 5
Before hardening, a can be satisfactorily injected into a relatively narrow area between the semiconductor element 2 and the circuit board 3 and filled therein, and after hardening, the bump electrode 1 is protected from pressing force. Works well as a pedestal.

【0009】半導体素子2が固着された回路基板3は放
熱性を有する金属支持板11の上に配置され、この下面
の金属層10が半田(導電性接合材)12によって支持
板11に結合され、これ等はエポキシ樹脂から成る樹脂
封止体13によって一体に成形されている。樹脂封止体
13は、回路基板3、第2の保護樹脂層6、電子回路素
子7、金属細線8及び支持板11を覆うように金型を使
用した周知のトランスファモールドで形成されている。
なお、図2には示されていないが、回路基板3上の端子
(電極)を外部回路に接続するための外部リードも設け
られており、この外部リードと回路基板3の端子とが金
属細線(内部リード)で接続され、これも樹脂封止体1
3で被覆されている。樹脂封止体13の硬度は第2の保
護樹脂層6の硬度よりも大きく、第1の保護樹脂層5a
の硬度と同一又はこれよりも大きいことが望ましい。
The circuit board 3 to which the semiconductor element 2 is fixed is disposed on a metal support plate 11 having heat dissipation, and the metal layer 10 on the lower surface is joined to the support plate 11 by solder (conductive bonding material) 12. These are integrally formed by a resin sealing body 13 made of epoxy resin. The resin sealing body 13 is formed by a well-known transfer mold using a mold so as to cover the circuit board 3, the second protective resin layer 6, the electronic circuit element 7, the fine metal wires 8 and the support plate 11.
Although not shown in FIG. 2, an external lead for connecting a terminal (electrode) on the circuit board 3 to an external circuit is also provided, and the external lead and the terminal of the circuit board 3 are connected to a thin metal wire. (Internal lead), which is also a resin-sealed body 1
3 coated. The hardness of the resin sealing body 13 is greater than the hardness of the second protective resin layer 6, and the first protective resin layer 5a
It is desirable that the hardness is equal to or greater than the hardness.

【0010】上記の本実施例の電子回路装置によれば、
第1の保護樹脂層5aが台座として機能するため、バン
プ電極1のクラック及び断線を良好に防止することがで
きる。
According to the electronic circuit device of the present embodiment,
Since the first protective resin layer 5a functions as a pedestal, cracking and disconnection of the bump electrode 1 can be favorably prevented.

【0011】[0011]

【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 (1) 図2では金属細線8を電子回路素子7に接続し
ているが、この代りに外部リード(図示せず)に接続す
ることができる。 (2) 第2の保護樹脂層6を電子回路素子7及び金属
細線8の全部を被覆するように形成することができる。 (3) 支持板11の下面を樹脂封止体12で被覆しな
いように構成することができる。
[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) Although the thin metal wires 8 are connected to the electronic circuit element 7 in FIG. 2, they can be connected to external leads (not shown) instead. (2) The second protective resin layer 6 can be formed so as to cover the entire electronic circuit element 7 and the thin metal wires 8. (3) The lower surface of the support plate 11 can be configured not to be covered with the resin sealing body 12.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来の電子回路装置を示す断面図である。FIG. 1 is a cross-sectional view illustrating a conventional electronic circuit device.

【図2】本発明の実施例に係わる電子回路装置を示す断
面図である。
FIG. 2 is a sectional view showing an electronic circuit device according to the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 バンプ電極 2 半導体素子 3 回路基板 5a 第1の保護樹脂層 6 第2の保護樹脂層 8 金属細線 11 支持板 13 樹脂封止体 DESCRIPTION OF SYMBOLS 1 Bump electrode 2 Semiconductor element 3 Circuit board 5a 1st protective resin layer 6 2nd protective resin layer 8 Fine metal wire 11 Support plate 13 Resin sealing body

フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 23/29 H01L 23/31 H01L 25/00 H01L 23/36 H01L 21/60 Continuation of the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 23/29 H01L 23/31 H01L 25/00 H01L 23/36 H01L 21/60

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 バンプ電極を備えた半導体素子と、回路
基板と、第1及び第2の保護樹脂層と、樹脂封止体とか
ら成り、 前記半導体素子の平板状の本体部は前記バンプ電極によ
って前記回路基板の配線導体に接続され、 前記第1の保護樹脂層は、前記半導体素子の前記バンプ
電極を被覆し且つ前記半導体素子の前記本体部の一方の
主面と前記回路基板との間を充填するように設けられ、 前記第2の保護樹脂層は、前記半導体素子の前記本体部
の他方の主面を被覆するように設けられ、 前記樹脂封止体は前記第2の保護樹脂層を介して前記回
路基板を覆うように設けられ、 前記第1の保護樹脂層は液状エポキシ樹脂に基づいて形
成され、 前記第2の保護樹脂層はシリコ−ンラバ−から成り、 前記第1の保護樹脂層は前記第2の保護樹脂層よりも大
きい硬度を有していることを特徴とする電子回路装置。
1. A semiconductor device having a bump electrode, a circuit board, first and second protective resin layers, and a resin encapsulant. The first protective resin layer covers the bump electrode of the semiconductor element and is provided between the one main surface of the main body of the semiconductor element and the circuit board. The second protective resin layer is provided so as to cover the other main surface of the main body of the semiconductor element, and the resin sealing body is the second protective resin layer The first protective resin layer is formed based on a liquid epoxy resin, the second protective resin layer is made of silicone rubber, and the first protective resin layer is provided so as to cover the circuit board. The resin layer is the same as the second protective resin layer. Electronic circuit device, characterized in that a is also large hardness.
JP35233297A 1997-12-05 1997-12-05 Electronic circuit device including semiconductor element Expired - Fee Related JP3147157B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35233297A JP3147157B2 (en) 1997-12-05 1997-12-05 Electronic circuit device including semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35233297A JP3147157B2 (en) 1997-12-05 1997-12-05 Electronic circuit device including semiconductor element

Publications (2)

Publication Number Publication Date
JPH11176882A JPH11176882A (en) 1999-07-02
JP3147157B2 true JP3147157B2 (en) 2001-03-19

Family

ID=18423340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35233297A Expired - Fee Related JP3147157B2 (en) 1997-12-05 1997-12-05 Electronic circuit device including semiconductor element

Country Status (1)

Country Link
JP (1) JP3147157B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8955418B2 (en) 2013-03-08 2015-02-17 Black & Decker Inc. Threaded fastener driving tool

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5143451B2 (en) 2007-03-15 2013-02-13 オンセミコンダクター・トレーディング・リミテッド Semiconductor device and manufacturing method thereof
JP5921723B2 (en) * 2013-01-11 2016-05-24 三菱電機株式会社 Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8955418B2 (en) 2013-03-08 2015-02-17 Black & Decker Inc. Threaded fastener driving tool

Also Published As

Publication number Publication date
JPH11176882A (en) 1999-07-02

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