JP7524564B2 - Semiconductor device manufacturing method - Google Patents

Description

This invention relates to a method for manufacturing a semiconductor device.

A power semiconductor module is a power semiconductor device that incorporates one or more power semiconductor chips, forms part or all of a DC-AC conversion, DC-DC conversion, or AC-AC voltage/current conversion connection, and has a structure in which the power semiconductor chip is electrically insulated from the laminated substrate or metal substrate. Power semiconductor modules are used in industrial applications such as motor drive control inverters for elevators and the like. In recent years, they have also become widely used in vehicle motor drive control inverters. Vehicle inverters must be small and lightweight to improve fuel efficiency, and long-term reliability is required at high temperatures because they are placed near the drive motor in the engine room.

Compared to industrial power semiconductor modules, automotive power semiconductor modules are required to be smaller and lighter due to space restrictions. In addition, as the output power density for driving the motor increases, the temperature of the semiconductor chip during operation increases, and the demand for long-term reliability during high-temperature operation is also increasing. For this reason, there is a demand for a power semiconductor module structure that can operate at high temperatures and has long-term reliability.

However, in conventional metal wire wiring methods using metal wires, the wire thickness affects the current density when electricity is passed through it, and it is necessary to increase the number of wires to pass the current required for operation. For this reason, in metal wire wiring methods, it is necessary to connect the top surface of the semiconductor chip to the electrode pattern with multiple metal wires, and the wire bonding area of the power semiconductor module increases, making the power semiconductor module itself larger.

In order to solve these problems, the lead frame wiring method is being considered instead of the conventional metal wire wiring method. The lead frame wiring method uses lead frame wiring formed by molding a metal plate to support and fix the semiconductor chip and connect the semiconductor chip to the electrode pattern.

Figure 15 is a cross-sectional view showing the configuration of the electrode part of a power semiconductor module with a conventional structure. As shown in Figure 15, an AlSi (aluminum silicon) electrode 121 serving as a source electrode is provided on a semiconductor element 120 on a semiconductor substrate. The semiconductor element 120 on the semiconductor substrate is a semiconductor element in which a MOS gate (insulated gate made of metal-oxide film-semiconductor) structure (element structure) is formed on the semiconductor substrate.

A first protective film (passivation film) 122 is formed on the AlSi electrode 121 around the electrodes of the semiconductor element to prevent ion diffusion into the semiconductor element and insulate the semiconductor element. Conventionally, SiN (silicon nitride) film and inorganic materials have been used as the first protective film 122, but polyimide film, which is an organic material, is also widely used. Polyimide films are formed by wet methods such as spin coating and inkjet methods, and have the advantage that polyimide films are easier to form than inorganic materials.

In addition, a NiP (nickel phosphorus) upper electrode film 124 is provided to facilitate joining of the lead frame wiring (not shown) to the AlSi electrode 121 with solder 125. The first protective film 122 functions as a mask so that when the upper electrode film 124 is formed of NiP or the like by plating, the plating of the upper electrode film 124 is selectively deposited on the AlSi electrode 121.

In addition, in a power semiconductor module such as an IGBT (Insulated Gate Bipolar Transistor), a second protective film 123, which is a polyimide film, is provided to selectively cover the portion where the upper electrode film 124 and the first protective film 122 contact each other. The second protective film 123 covers the gap between the upper electrode film 124 and the first protective film 122, and has a function of preventing, for example, solder 125 and the like from penetrating into the semiconductor element side. The second protective film 123 functions as a mask when forming the solder 125.

Conventionally, in a power semiconductor module, a power semiconductor chip is sealed in a case by a sealing resin such as an overcoat resin. A technique is known in which a first conductive wiring layer is covered with an overcoat resin, and the surface of the overcoat resin is roughened by irradiating the overcoat resin with plasma, thereby improving adhesion between the overcoat resin and the sealing resin layer (see, for example, Patent Document 1 below).

JP 2004-186461 A

In the conventional structure, the polyimide film (first protective film 122) is in contact with both the NiP upper electrode film 124 and the AlSi electrode 121, and is in contact with different materials. The applied polyimide film has high chemical and electrical stability after curing, and is heat resistant and insulating, so it has good properties as a protective film. In general, polyimide films have high chemical and electrical stability, and therefore low reactivity with other materials and may have poor adhesion.

Here, when NiP is used as the upper electrode film 124, peeling may occur at the interface between the first protective film 122 of the polyimide film and the upper electrode film 124 due to the poor adhesion of the polyimide film. For this reason, in addition to functioning as a solder mask as described above, a second protective film 123 of the polyimide film is applied by the inkjet method or the like so as to further cover the interface between the first protective film 122 and the upper electrode film 124.

However, the poor adhesion of the polyimide film remains, and peeling may occur at the interface between the second protective film 123 and the upper electrode film 124 due to thermal stress during soldering or operation of the semiconductor module. If this peeling progresses, peeling between the second protective film 123 and the first protective film 122 may also progress.

The present invention aims to provide a method for manufacturing a semiconductor device that can improve the adhesion between a first protective film and a second protective film, both of which are made of heat-resistant, insulating films, and also improve the adhesion between the sealing resin and the first protective film, thereby reducing the progression of peeling, in order to solve the problems associated with the conventional technology described above.

In order to solve the above-mentioned problems and achieve the object of the present invention, the manufacturing method of the semiconductor device according to the present invention has the following features. First, a first step of forming a semiconductor element on a semiconductor substrate is performed. Next, a second step of forming an electrode layer electrically connected to the semiconductor element on the front surface of the semiconductor element is performed. Next, a third step of selectively forming a first protective film on the electrode layer is performed. Next, a fourth step of forming a recess on a portion of the first protective film where a second protective film covering a portion where the first protective film and an upper electrode film are to be formed is performed. Next, a fifth step of forming an upper electrode film so as to be in contact with the first protective film on a portion of the electrode layer other than the first protective film is performed. Next, a sixth step of forming the second protective film on a portion where the upper electrode film and the first protective film are to be in contact with the first protective film is performed. In the fourth step, a plurality of the recesses are formed, and the recesses are formed so that the distance between the recesses is 10 μm or more and 30 μm or less. In order to solve the above-mentioned problems and achieve the object of the present invention, the manufacturing method of the semiconductor device according to the present invention has the following features. First, a first step of forming a semiconductor element on a semiconductor substrate is performed. Next, a second step is performed to form an electrode layer electrically connected to the semiconductor element on the front surface of the semiconductor element. Next, a third step is performed to selectively form a first protective film on the electrode layer. Next, a fourth step is performed to form a recess on a portion of the first protective film where a second protective film is formed to cover the portion where the first protective film and the upper electrode film contact. Next, a fifth step is performed to form an upper electrode film so as to contact the first protective film on a portion of the electrode layer other than the first protective film. Next, a sixth step is performed to form the second protective film on the portion where the upper electrode film and the first protective film contact. In the fourth step, the recess is formed so that the depth of the recess is 30% to 80% of the thickness of the first protective film.

The manufacturing method of the semiconductor device according to the present invention is characterized in that in the fourth step, the recess is formed by pressing a jig having a protrusion against the first protective film.

The manufacturing method of the semiconductor device according to the present invention is characterized in that in the fourth step, the recess is formed when the viscosity of the first protective film is 300 Pa·s or more and 1000 Pa·s or less.

The manufacturing method of the semiconductor device according to the present invention is characterized in that in the fourth step, the diameter of the recess is formed to be 10 μm or more and 30 μm or less.

The manufacturing method of the semiconductor device according to the present invention is characterized in that in the fourth step, the recess is formed in a trapezoidal shape with the front surface of the first protective film as its base.

The manufacturing method of the semiconductor device according to the present invention is characterized in that in the fourth step, the recess is formed at a distance of 10 μm to 30 μm from the portion where the first protective film and the upper electrode film contact each other.

The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above-mentioned invention, the first protective film and the second protective film are polyimide films.

The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above-mentioned invention, the upper electrode film is nickel phosphorus (NiP).

According to the above-mentioned invention, a recess is formed in the first protective film, and the second protective film is applied to the area where the recess is formed. This allows the second protective film to penetrate into the recess, increasing the contact area between the first protective film and the second protective film, and enhancing the anchor effect. Therefore, even if peeling occurs between the upper electrode film and the first protective film, it is possible to prevent the peeling from progressing to the first protective film and the second protective film.

The method for manufacturing a semiconductor device according to the present invention has the effect of improving the adhesion between the first protective film and the second protective film, which are made of a heat-resistant, insulating film, and reducing the progression of peeling.

1 is a cross-sectional view showing a configuration of a power semiconductor module according to an embodiment; 2 is a cross-sectional view showing a configuration of an electrode portion of the power semiconductor module according to the embodiment; FIG. 1 is a cross-sectional view showing a state during manufacturing of an electrode portion of a power semiconductor module according to an embodiment (part 1). FIG. 11 is a cross-sectional view showing a state during manufacturing of the electrode portion of the power semiconductor module according to the embodiment (part 2). FIG. 11 is a cross-sectional view showing a state during manufacturing of the electrode portion of the power semiconductor module according to the embodiment (part 3). FIG. 4 is a top view showing details of an electrode portion of the power semiconductor module according to the embodiment; FIG. 4 is a cross-sectional view showing details of an electrode portion of the power semiconductor module according to the embodiment; FIG. 1 is a cross-sectional view showing an example of a cross-sectional shape of a recess of a power semiconductor module according to an embodiment (part 1). FIG. FIG. 2 is a cross-sectional view showing an example of a cross-sectional shape of a recess of a power semiconductor module according to an embodiment (part 2). FIG. 4 is a cross-sectional view showing an example of a cross-sectional shape of a recess of a power semiconductor module according to an embodiment (part 3). 11 is a table showing the relationship between the interval of recesses and adhesion of the power semiconductor module according to the embodiment. 11 is a table showing the relationship between the diameter of a recess and adhesion of the power semiconductor module according to the embodiment. 11 is a table showing the relationship between the cross-sectional shape of a recess and adhesion of the power semiconductor module according to the embodiment. FIG. 2 is a perspective view showing a print test of the power semiconductor module according to the embodiment; FIG. 1 is a cross-sectional view showing a configuration of an electrode portion of a power semiconductor module having a conventional structure.

A preferred embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings. Figure 1 is a cross-sectional view showing the configuration of a power semiconductor module according to the embodiment.

(Embodiment)
As shown in FIG. 1 , the power semiconductor module 50 includes a power semiconductor chip 1, an insulating substrate 2, bonding materials 3a, 3b, and 3c, an electrode pattern 4, a metal substrate 5, lead frame wiring 6, a terminal case 7, a sealing resin 8, a metal terminal 9, and a metal wire 10.

The power semiconductor chip 1 is a semiconductor element such as an IGBT or a diode chip. An electrode pattern 4 made of a copper (Cu) plate or the like is provided on the front surface (the power semiconductor chip 1 side) and back surface (the metal substrate 5 side) of an insulating substrate 2 such as a ceramic substrate that ensures insulation. A substrate on which the electrode pattern 4 is provided on at least one side of the insulating substrate 2 is referred to as a laminated substrate 12. The power semiconductor chip 1 is bonded to the electrode pattern 4 on the front surface with a bonding material 3b such as solder. A metal substrate 5 provided with a heat dissipation fin (not shown) is bonded to the electrode pattern 4 on the back surface with a bonding material 3c such as solder. In addition, one end of a lead frame wiring 6 is bonded to the top surface of the power semiconductor chip 1 (the surface opposite to the surface in contact with the bonding material 3b) with a bonding material 3a such as solder as wiring for electrical connection. The other end of the lead frame wiring 6 is bonded to the electrode pattern 4 with the bonding material 3b.

The resin case 7 is combined with a laminated assembly in which the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5 are laminated. For example, the resin case 7 is bonded to the laminated assembly via an adhesive such as silicone. The inside of the resin case 7 is filled with a sealing resin 8 such as a hard resin such as epoxy to insulate and protect the power semiconductor chip 1 on the laminated substrate 12. In the embodiment, a hard resin such as epoxy is used as the sealing resin 8, and no lid is used. A metal wire 10 connects between the power semiconductor chip 1 and the metal terminal 9. The metal terminal 9 penetrates the resin case 7 and protrudes to the outside.

Figure 2 is a cross-sectional view showing the configuration of the electrode part of the power semiconductor module according to the embodiment. Figure 2 is an enlarged view of the part surrounded by the dotted line in Figure 1. As shown in Figure 2, an AlSi electrode 21 serving as an emitter electrode (when the semiconductor element 20 is an IGBT) is provided on a semiconductor element 20 (corresponding to the power semiconductor chip 1 in Figure 1) on a semiconductor substrate. A first protective film 22 made of a polyimide film is formed on the AlSi electrode 21. Solder 25 (corresponding to the bonding material 3a in Figure 1) for joining the lead frame wiring 6 (see Figure 1) is provided on an upper electrode film 24 made of NiP. In addition, a second protective film 23 made of a polyimide film is provided around the upper electrode film 24 so as to selectively cover the part where the upper electrode film 24 and the first protective film 22 are in contact. In the embodiment, a polyimide film is used as an example of the first protective film 20 and the second protective film 23, but films other than polyimide films can also be used for the first protective film 22 and the second protective film 23 as long as they have high chemical and electrical stability, low reactivity with other materials, weak adhesion, and heat resistance and insulating properties.

In the embodiment, the first protective film 22 is provided with recesses 26 in which the size, width, and spacing of the unevenness are controlled. The recesses 26 are provided at least in the portion where the second protective film 23 comes into contact. By applying the second protective film 23 onto the recesses 26, the second protective film 23 enters the recesses 26, and the contact area between the first protective film 22 and the second protective film 23 increases. This increases the anchor effect between the first protective film 22 and the second protective film 23. Therefore, even if peeling occurs between the upper electrode film 24 and the first protective film 22, it is possible to prevent the peeling from progressing to the portion between the first protective film 22 and the second protective film 23.

(Method of Manufacturing a Semiconductor Device According to an Embodiment)
Next, a method for manufacturing a semiconductor device according to an embodiment will be described. Figures 3 to 5 are cross-sectional views showing the electrode part of the power semiconductor module according to the embodiment in the middle of manufacturing. First, a semiconductor element 20 is formed on a semiconductor substrate, similar to the conventional semiconductor device manufacturing method. For example, if the semiconductor device is an IGBT, a drift layer and a base layer are formed on the semiconductor substrate by epitaxial growth, and an emitter region is formed on the front surface by injecting impurity ions by ion implantation, and a collector region is formed on the back surface. Next, a gate insulating film is selectively formed on the front surface by thermal oxidation or the like.

Next, an AlSi electrode 21 (also called a front electrode) is formed as a metal electrode electrically connected to the emitter region of the semiconductor element, for example, by a sputtering method. This electrode is not limited to AlSi. Next, a first protective film 22 is selectively formed on the AlSi electrode 21. When viewed from the top, it is formed so as to surround the AlSi electrode 21 (metal electrode), and a predetermined area of the electrode is exposed. An upper metal film (upper electrode film) mainly composed of Ni or a Ni alloy is formed on the exposed part of the metal electrode by a plating method or the like. The first protective film 22 is formed from a material that is chemically and electrically stable and has excellent heat resistance and insulation properties. As the first protective film, a material such as a thermosetting resin or an ultraviolet curing resin is used, and the curing state can be changed depending on the conditions, and a material that can be brought into a semi-cured state so that a concave portion can be formed by pressing a convex mold as described later is preferable. For example, the first protective film 22 is formed using a polyimide film, polyamide film, polyamideimide film, epoxy resin, phenolic resin, or the like, which is a polymer resin containing imide bonds. The state up to this point is shown in FIG. 3. The first protective film 22 is formed in a predetermined location by a method such as photolithography or coating with a dispenser. In addition, the thickness of the first protective film 22 is thicker than the thickness of the upper electrode film 24, preferably 2 μm to 15 μm, more preferably 5 μm to 12 μm, in view of insulation properties, etc.

Next, when the first protective film 22 is heat-cured, a jig 27 having convex portions of a predetermined size, width, and interval is pressed against at least the portion where the first protective film 22 contacts the second protective film 23 in the semi-cured state, forming concave portions 26 in the first protective film 22, and then the main curing is performed. Alternatively, the main curing may be performed after the second protective film 23 is formed. For example, the first protective film 22 (polyimide) is heated at 70°C to 150°C for 30 to 60 minutes to be in a semi-cured state (temporary curing), and then heated at 150°C to 220°C for 30 to 60 minutes to be fully cured. At that time, in FIG. 4, the jig 27 may be pressed so that all of the convex portions are embedded in the first protective film 22. If the base of the convex portion is pressed against the surface of the first protective film 22, when the jig 27 is released, a concave portion 26 of a predetermined shape is formed, and the shape is uniform in depth. On the other hand, when a part of the protrusion of the jig 27 in the depth direction is pressed and pressed to a predetermined depth and then released, a protrusion with a height of 0.2 μm to 1 μm is formed around the recess 26 due to plastic deformation. In this case, the surface area is also increased, so the adhesion is improved. In addition, by selecting a jig 27 having protrusions of a predetermined size, width, and interval, the recess 26 can be realized in any shape. In this way, a strong anchor effect can be realized by applying the second protective film 23 to the area where the recess 26 is formed. In addition, as shown in FIG. 7, the recess 26 may be formed to the outside of the second protective film 23. Since the inside of the resin case is finally filled with the sealing resin 8, the surface and side of the first protective layer 22 are also in contact with the sealing resin 8. When the sealing resin 8 is formed so as to cover the recess 26 of the first protective layer 22, the adhesion between the first protective film 22 and the sealing resin 8 is improved, so that peeling due to thermal stress is reduced and the reliability of the semiconductor module is improved. The second protective film 23 is formed in a predetermined location by a method such as photolithography or application with a dispenser.

Here, the specific viscosity of the semi-cured state is preferably 300 Pa·s or more and 1000 Pa·s or less. The viscosity of polyimide resins and the like increases with time when they are heated and cured after application. Therefore, by determining in advance the time when the viscosity is 300 Pa·s or more and 1000 Pa·s or less when heated and cured, it is possible to determine that the semi-cured state is in this time. The semi-cured state may also be determined by the hardness and elastic modulus of the first protective film 22. In this case, the semi-cured state is determined when the elastic modulus is 1 or more and less than 2.5 GPa. Alternatively, the penetration is 70 or more and 100 or less. The penetration is a measure of the hardness of a viscoelastic body, and is specified in JIS K2207. Under test conditions, the length of 0.1 mm of a specified needle that penetrates vertically into the sample is expressed as 1. The measurement was performed at 25°C. The state up to this point is shown in Figure 4.

Next, using the first protective film 22 as a mask, the upper electrode film 24 is selectively formed on the portion of the AlSi electrode 21 where the first protective film 22 is not provided. The upper electrode film 24 is formed by electroless plating of NiP (nickel phosphorus), etc., but since the first protective film 22 is an insulator and the AlSi electrode 21 is a metal, the upper electrode film 24 is not deposited on the first protective film 22 but is selectively deposited on the AlSi electrode 21. The state up to this point is shown in FIG. 5. The plating method is often used because it is inexpensive and can selectively form a thick film (1 to 10 μm) on a metal electrode. In addition, Ni or Ni alloys such as NiP (nickel phosphorus) and NiB (nickel boron) may be used, or copper, aluminum, or gold may be used. A laminated film of these may also be used. In particular, a NiP alloy film with a P concentration of 7 wt% to 12 wt% by plating method is amorphous and is preferable. The upper electrode film 24 is provided from the viewpoint of adhesion and strength for connecting the front surface electrodes such as the AlSi electrodes 21 of the element to the connection terminals, and the total thickness is 1 μm to 10 μm, and more preferably 3 μm to 5 μm. For example, an Au plating film may be further formed on the Ni plating film. By forming the Au plating film, the electrode part including the Ni plating film can be prevented from oxidation, and it is also preferable because it has good wettability with solder. The thickness of the Ni plating film is preferably 1 μm to 10 μm, and more preferably 3 μm to 5 μm, from the viewpoint of connection by solder or the like and strength. The thickness of the Au plating film is preferably 0.02 μm to 1 μm, and more preferably 0.04 μm to 0.1 μm, from the viewpoints of oxidation prevention, wettability, and cost. However, the upper electrode film 24 is not limited to a plating film, and may be formed by sputtering. In this case, a metal mask is used to form the film on the exposed part of the metal electrode.

Next, the second protective film 23 is selectively formed so as to cover the portion where the upper electrode film 24 and the first protective film 22 are adjacent. Since it is formed so as to cover the interface between the first protective film 22 and the upper electrode film 24, it is formed so as to surround the upper electrode film 24 when viewed from the top. The second protective film 23 is preferably formed using a film of the same material as the first protective film 22. Different materials may be used, but the same material is preferable because it has better adhesion. Next, when a conductive connection member such as a lead frame is joined to the upper electrode film 24, the first protective film 22 and the second protective film 23 are used as a mask during soldering to form solder 25 on the upper electrode film 24. In this manner, the power semiconductor chip 1 is formed.

The manufacturing method of the power semiconductor module in FIG. 1 is the same as that of the power semiconductor module according to the conventional technology. In the manufacturing method of the power semiconductor module, first, the power semiconductor chip 1 is mounted on the laminated substrate 12, and the power semiconductor chip 1 and the electrode pattern 4 provided on the insulating substrate 2 are electrically connected by the lead frame wiring 6 via the solder 25 (bonding material 3b). Next, these are bonded to the metal substrate 5 to assemble a laminated assembly consisting of the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5. A resin case 7 is bonded to this laminated assembly with a silicone-based adhesive or the like.

Next, the power semiconductor chip 1 and the metal terminal 9 are connected with metal wires 10, and the resin case 7 is filled with sealing resin 8, such as hard resin such as epoxy resin. This completes the power semiconductor module according to the embodiment shown in FIG. 1. If the sealing resin 8 is not hard resin such as epoxy resin, a lid is attached to prevent the sealing resin 8 from leaking out. As the sealing resin 8, thermosetting resins such as epoxy resin, polyimide resin, polyamide resin, and maleimide resin can be used. Also, particles such as silica or alumina can be added as a filler to adjust the linear expansion coefficient with other components. Also, soft resins such as silicone can be used.

6 is a top view showing the details of the electrode part of the power semiconductor module according to the embodiment. The interval T of the recesses 26 is preferably 10 μm or more and 30 μm or less. In FIG. 6, the interval T of the recesses 26 is equal, but it may be unequal. The interval T of the recesses 26 is the distance between the edge of the outer periphery of the recess 26 and the edge of the outer periphery of the adjacent recess 26, as shown in FIG. 6. The shape (top surface shape) of the recess 26 viewed from the upper side (second protective film 23 side) is circular, and in this case, the diameter of the opening of the recess is preferably 10 μm or more and 30 μm or less. In addition, when the top surface shape is circular, the size of the opening of the recess is the diameter, but in the case of an ellipse, the major axis is used. In addition, when the top surface shape is a polygon such as a rectangle (excluding a triangle), the size of the opening is the length of the diagonal, and in the case of a triangle, the length of the longest perpendicular line. In addition, when the top surface shape is a polygon such as a triangle or a rectangle, the interval T is the shortest distance.

Figure 7 is a cross-sectional view showing details of the electrode portion of the power semiconductor module according to the embodiment. The first protective film 22 is, for example, about 100 μm wide and about 10 μm thick, and the second protective film 23 is, for example, about 100 μm wide and about 10 μm thick. Half of the second protective film 23 (about 50 μm) is in contact with the first protective film 22, and the remaining half (about 50 μm) is in contact with the upper electrode film 24.

The depth h of the recess 26 is preferably 30% to 80% of the thickness of the first protective film 22. In particular, 30% to 50% is preferable. In other words, when the thickness of the first protective film 22 is 10 μm as shown in FIG. 7, the depth h of the recess 26 is preferably 3 μm to 5 μm. In this range, the insulation is maintained and the adhesion is improved. In addition, the recess 26 is preferably a certain distance S away from the interface between the first protective film 22 and the upper electrode film 24. When the width of the first protective film 22 is 100 μm as shown in FIG. 7, the distance S is preferably 10 μm to 30 μm. If the distance S is short, the end of the first protective film 22 is easily deformed when the recess is formed, and if it is too long, the contact surface between the second protective film 23 and the recess 26 is reduced. In addition, the width W of the region in which the recess 26 is provided is preferably 40% to 80% of the width of the first protective film 22. When the width of the first protective film 22 is 100 μm as shown in FIG. 7, the width W is preferably 40 μm or more and 80 μm or less. The recess 26 may be provided outside the region in contact with the second protective film 23. In this case, the sealing resin 8 enters the recess 26, and the contact area between the first protective film 22 and the sealing resin 8 increases. This can increase the anchor effect between the first protective film 22 and the sealing resin 8.

Figure 7 shows an example of the cross-sectional shape of the recess 26 of the power semiconductor module according to the embodiment being an inverted triangle and the three-dimensional shape being an inverted cone, but other cross-sectional shapes may be used. Also, the top surface shape of the recess 26 shown in Figure 7 is a circle or an ellipse, but it may be a polygon such as a triangle or a square, and in that case, the three-dimensional shape may be a pyramid such as an inverted triangular pyramid or an inverted square pyramid. However, a cone shape is preferable because it is easier to fill the material for the second protective film 23 uniformly. In the case of a pyramid, the corners may not be formed uniformly, and the resin of the second protective film 23 or the sealing resin 8 may not be formed uniformly, which may result in a slight increase in the variation in adhesion strength. Figures 8 to 10 are cross-sectional views showing examples of the cross-sectional shape of the recess of the power semiconductor module according to the embodiment. Figure 8 shows an example of the cross-sectional shape of the recess 26 being rectangular and the three-dimensional shape being cylindrical. The rectangular shape means that the width from the entrance to the bottom of the recess 26 is almost constant. The three-dimensional shape may be a prism such as a triangular prism or a square prism, but a cylindrical shape is preferable because the material for the second protective film 23 is easily filled uniformly. In the case of a prism, the corners may not be filled uniformly as in the case of a pyramid, and the variation in adhesion strength may be slightly increased. FIG. 9 shows an example in which the cross-sectional shape of the recess 26 is a circle and the three-dimensional shape is a hemisphere. FIG. 10 shows an example in which the cross-sectional shape of the recess 26 is a trapezoid and the three-dimensional shape is a truncated cone. The trapezoid shape means that the entrance of the recess 26 is a long base of the trapezoid and the bottom of the recess 26 is a short base of the trapezoid. The three-dimensional shape may be a truncated pyramid, but a cone (inverted cone) is preferable because the material for the second protective film 23 is easily filled uniformly. In the case of a truncated pyramid, the corners may not be filled uniformly as in the case of the pyramid and the prism described above, and the variation in adhesion strength may be slightly increased. To obtain a sufficient anchoring effect, it is preferable that the cross-sectional shape of the recess 26 be trapezoidal.

FIG. 11 is a table showing the relationship between the interval of the recesses and the adhesion of the power semiconductor module according to the embodiment. The comparative example of FIG. 11 is a result of measuring the adhesion strength of a conventional case where the recesses 26 are not provided. Other than the comparative example of FIG. 11, the diameter of the recesses 26 is 20 μm, the cross-sectional shape is an inverted triangle, the depth is an inverted cone shape of 5 μm, and the interval between the recesses 26 is changed to 10 μm, 20 μm, and 30 μm, and the adhesion strength is measured by a pudding test described later. The adhesion strength (PI/PI) indicates the adhesion strength with the second protective film 23, and is expressed in MPa. The adhesion strength (PI/epoxy) indicates the adhesion strength with the sealing resin 8, and is expressed in MPa. Note that PI indicates polyimide, which is a typical material of the first protective film 22 and the second protective film 23. Also, epoxy is a typical material of the sealing resin 8, and contains 70 wt % of SiO ₂ filler relative to the epoxy resin in order to adjust the linear expansion coefficient. In addition, in Figs. 11, 12 and 13, "adhesion strength (PI/PI)" refers to the adhesion strength between polyimide and polyimide, and "adhesion strength (PI/epoxy)" refers to the adhesion strength between polyimide and epoxy resin.

As shown in FIG. 11, whether the spacing between the recesses 26 is 10 μm, 20 μm, or 30 μm, both the adhesion strength with the second protective film 23 and the adhesion strength with the sealing resin 8 are higher than those of the comparative example. Furthermore, the adhesion strength with the second protective film 23 is highest when the spacing between the recesses 26 is 20 μm. On the other hand, the adhesion strength with the sealing resin 8 is highest when the spacing between the recesses 26 is 30 μm. The spacing T between the recesses showed the same tendency regardless of the top surface shape of the recesses 26.

Figure 12 is a table showing the relationship between the diameter of the recesses and adhesion of the power semiconductor module according to the embodiment. The comparative example in Figure 12 is the result of measuring the adhesion strength of a conventional method in which no recesses 26 are provided. All the examples except the comparative example in Figure 12 are the results of measuring the adhesion strength by the pudding test described below, with the recesses 26 spaced 10 μm apart, with a cross-sectional shape of an inverted triangle and an inverted cone with a depth of 5 μm, and with the diameter of the recesses 26 changed to 10 μm, 20 μm, and 30 μm. The adhesion strength (PI/PI) and adhesion strength (PI/epoxy) are the same as in Figure 11.

As shown in FIG. 12, whether the diameter of the recess 26 is 10 μm, 20 μm, or 30 μm, both the adhesion strength with the second protective film 23 and the adhesion strength with the sealing resin 8 are higher than those of the comparative example. In addition, both the adhesion strength with the second protective film 23 and the adhesion strength with the sealing resin 8 are highest when the diameter of the recess 26 is 10 μm. The size of the opening of the recess showed the same tendency regardless of the top surface shape of the recess 26.

Figure 13 is a table showing the relationship between the cross-sectional shape of the recess of the power semiconductor module according to the embodiment and adhesion. The comparative example in Figure 13 is the result of measuring the adhesion strength of a conventional method in which the recess 26 is not provided. Other than the comparative example in Figure 13, the diameter of the recess 26 is 20 μm, the interval is 10 μm, and the depth is 5 μm, and the cross-sectional shape of the recess 26 is changed to an inverted triangle (three-dimensional shape is an inverted cone), a semicircle (three-dimensional shape is a hemisphere), a trapezoid (three-dimensional shape is an inverted truncated cone), and a rectangle (three-dimensional shape is a cylinder), and the adhesion strength was measured by the pudding test described below. The adhesion strength (PI/PI) and adhesion strength (PI/epoxy) are the same as in Figure 11.

As shown in FIG. 13, the adhesive strength with the second protective film 23 and the adhesive strength with the sealing resin 8 are both highest when the cross-sectional shape of the recess 26 is trapezoidal. For this reason, a trapezoidal cross-sectional shape is preferable. It was found that each adhesiveness is affected by the cross-sectional shape, regardless of the top surface shape.

Figure 14 is a perspective view showing a pudding test for evaluating the adhesion (adhesion strength) between the first protective layer 22 and the second protective film 23, and between the first protective layer 22 and the sealing resin 8 in a power semiconductor module according to an embodiment. The pudding test is a test in which a resin molded into a pudding mold is bonded to a plate, the resin is pressed with a constant force laterally, for example in the direction of arrow T in Figure 14, and the force (adhesion force) applied until the resin is removed is measured, which indicates the adhesion (adhesion strength) between the plate and the resin. Adhesion is also indicated by adhesion force and adhesion force per unit area. The greater the measured force, the higher the adhesion.

Specifically, when the material of the first protective layer 22 and the material of the second protective film 23, or the adhesion between the first protective layer 22 and the sealing resin 8, is evaluated by the pudding test, a square aluminum substrate with a side of 10 mm is cleaned with ethanol, dried at 100° C. for 1 hour, and then a polyimide film is formed on the substrate surface as the first protective layer 22. In the embodiment, a recess is formed in the polyimide film, and a dedicated pudding mold is fixed on the polyimide film. A polyimide resin as the second protective film 23 or an epoxy resin as the sealing resin 8 is injected into the pudding mold, and cured under predetermined conditions to form a cured product on the substrate with an adhesive area of 10 mm ² (φ3.57 mm), an upper surface φ3 mm, and a height of 4 mm. The cured product is fixed and pressed parallel to the substrate surface at 1 mm/sec to measure the maximum breaking load. The test is performed five times, and the load measurement value per unit bonding area is taken as the adhesion force. It is measured at room temperature, and the unit is MPa. Although polyimide was used as the first protective layer 22 and the second protective film 23, and epoxy resin was used as the sealing resin 8, the same tendency was observed in other cases, and the adhesion was improved.

As described above, according to the semiconductor device manufacturing method of the embodiment, a recess is formed in the first protective film, and the second protective film is applied to the area where the recess is formed. This allows the second protective film to enter the recess, increasing the contact area between the first protective film and the second protective film, and enhancing the anchor effect. Therefore, even if peeling occurs between the upper electrode film and the first protective film, it is possible to prevent the peeling from progressing to the first protective film and the second protective film. Furthermore, when a recess is formed at the location where the first protective film and the sealing resin contact, the sealing resin enters the recess, improving the adhesion between the first protective layer and the sealing resin.

The present invention can be modified in various ways without departing from the spirit of the invention, and in each of the above-mentioned embodiments, for example, the dimensions of each part and the impurity concentration are set in various ways according to the required specifications. Furthermore, in each of the above-mentioned embodiments, the semiconductor can be applied to wide band gap semiconductors such as silicon carbide and gallium nitride (GaN) in addition to silicon.

As described above, the manufacturing method of the semiconductor device according to the present invention is useful for power semiconductor devices used in power conversion devices such as inverters, power supply devices for various industrial machines, igniters for automobiles, etc.

REFERENCE SIGNS LIST 1 Power semiconductor chip 2 Laminated substrate 3a, 3b, 3c Bonding material 4 Electrode pattern 5 Metal substrate 6 Lead frame wiring 7 Terminal case 8 Sealing resin 9 Metal terminal 10 Metal wire 12 Laminated substrate 20, 120 Semiconductor element on semiconductor substrate 21, 121 AlSi electrode 22, 122 First protective film 23, 123 Second protective film 24, 124 Upper electrode film 25, 125 Solder 26 Recess 27 Jig 50 Power semiconductor module

Claims (9)

A first step of forming a semiconductor element on a semiconductor substrate;
a second step of forming an electrode layer on a front surface of the semiconductor element, the electrode layer being electrically connected to the semiconductor element;
a third step of selectively forming a first protective film on the electrode layer;
a fourth step of forming a recess in a portion of the first protective film where a second protective film is to be formed, the second protective film covering a portion where the first protective film and the upper electrode film are in contact with each other;
a fifth step of forming an upper electrode film on the electrode layer other than the first protective film so as to be in contact with the first protective film;
a sixth step of forming the second protective film at a portion where the upper electrode film and the first protective film are in contact with each other;
Including,
The fourth step comprises forming a plurality of the recesses, and the recesses are formed so that the distance between the recesses is 10 μm or more and 30 μm or less. A first step of forming a semiconductor element on a semiconductor substrate;
a second step of forming an electrode layer on a front surface of the semiconductor element, the electrode layer being electrically connected to the semiconductor element;
a third step of selectively forming a first protective film on the electrode layer;
a fourth step of forming a recess in a portion of the first protective film where a second protective film is to be formed, the second protective film covering a portion where the first protective film and the upper electrode film are in contact with each other;
a fifth step of forming an upper electrode film on the electrode layer other than the first protective film so as to be in contact with the first protective film;
a sixth step of forming the second protective film at a portion where the upper electrode film and the first protective film are in contact with each other;
Including,
The method for manufacturing a semiconductor device, wherein in the fourth step, the recess is formed so that its depth is 30% to 80% of the thickness of the first protective film. 3. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the recess is formed by pressing a jig having a protrusion against the first protective film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the recess is formed when the viscosity of the first protective film is 300 Pa·s or more and 1000 Pa·s or less. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, characterized in that in the fourth step, the recess is formed to have a diameter of 10 μm or more and 30 μm or less. 6. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the recess is formed in a trapezoidal shape with the front surface of the first protective film as a base. 7. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the recess is formed at a distance of 10 μm to 30 μm from a portion where the first protective film and the upper electrode film contact each other. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the first protective film and the second protective film are polyimide films. 9. The method for manufacturing a semiconductor device according to claim 1, wherein the upper electrode film is made of nickel phosphorus (NiP).

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