JP3152807B2 - Orbiting cycle accuracy judgment device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for determining the cycle accuracy of a periodically generated trigger signal, and more particularly, to a simple configuration which does not use a timer.
The present invention relates to an orbiting cycle accuracy determination device capable of achieving downsizing.

[0002]

2. Description of the Related Art In recent years, in order to confirm the accuracy of a cycle of a trigger signal generated periodically, it is determined whether a deviation of a measurement cycle from a reference cycle is within a predetermined% accuracy. The orbiting cycle accuracy determination device is widely used.

FIG. 4 is a block diagram showing the configuration of this kind of orbiting cycle accuracy determination device. In the circulation period accuracy determination device, a setting register 1 in which a period reference value of an external trigger is set in time units of 1 ms loads this period reference value into a down counter 2. Here, the cycle reference value is 1
(Ms).

A 1/100 ms timer 3 has a 1/100 ms timer corresponding to an external timing clock applied from outside.
An output clock is applied to the down counter 2 every 0 ms. When the down counter 2 receives an enable signal from the outside through the OR circuit 4 and then receives the first external trigger from the outside through the OR circuit 4, the down counter 2 is loaded 1 (ms).
1 / 100ms corresponding to the output clock
Count down every time. In this case, when the output clock is received once, the down-counting ends.

When the down counter 2 finishes counting down, it applies a borrow to the up counter 5 and
The cycle reference value is loaded again from the setting register 1 and the down count is performed. In the down counter 2, each operation from the above-described loading to down counting and borrow application is repeated.

The up-counter 5 counts up the count value each time it receives a borrow, and applies the count value to the determination circuit 6. The determination circuit 6 compares the count value of the up-counter 5 with the detection timing of the external trigger based on a preset accuracy, and determines the cycle accuracy of the external trigger. That is, as described above, the down count is 1
Since the process ends every / 100 ms and the cycle reference value is 1 ms, it is sufficient to detect an external trigger when the count value of the up counter 5 is around 100.

For example, when the set accuracy is ± 1%,
As shown in FIG. 5, when the count value of the up counter 5 is 99 to 101, the determination circuit 6 determines that the accuracy has passed if an external trigger is detected, and determines that the accuracy has failed if no external trigger is detected. In addition, when the set accuracy is ± 2%,
The determination circuit 6 determines that the count value of the up counter 5 is 98 to 10
In the case of 2, when an external trigger is detected, it is determined that the accuracy is passed,
Others are judged to be disqualified.

[0008]

However, in the above-described circuit for determining the cycle accuracy, the time unit set in the setting register 1 does not match the generation timing of the external timing clock. / 100 ms timer 3 is required.

That is, the 1/100 ms timer 3 generates an output clock every 1/100 ms corresponding to the external timing clock. In this way, a counter (1/100 ms timer 3) for only timing adjustment is used. The necessity causes a problem that the circuit itself becomes complicated and huge.

In some cases, the circulation period of the external trigger does not require high precision, but a highly accurate and complicated device using a 1/100 ms timer 3 is used uniformly. The present invention has been made in consideration of the above-described circumstances, and has as its object to provide a circulating cycle accuracy determination device that can realize a simple configuration that does not use a timer and that can be reduced in size.

[0011]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a circuit for judging and outputting the period accuracy of a periodically generated trigger signal, wherein the period is shorter than the period of the trigger signal. A counting clock generating means for generating a counting clock of a period; and a cycle reference value of the trigger signal is set to a predetermined number of bits based on a ratio between a generation cycle of the counting clock by the counting clock generating means and a circulation cycle of the trigger signal. And a reference value setting circuit that is set in the first storage unit and a shift-out value that is bit-shifted corresponding to the cycle accuracy of the trigger signal among the cycle reference values set in the reference value setting circuit. A reference value distribution storage circuit that stores a shift value that is not stored in the first storage unit and stores the shift value in the second storage unit; Among the cycle reference values stored in the distribution memory circuit, the shift-out value stored in the first storage unit is down-counted once in accordance with a count clock received from the count clock generation unit, and is stored in the second storage unit. A down counter that counts down the stored shift value a plurality of times in accordance with a count clock received from the count clock generating means; an up counter that counts a borrow sent from the down counter in response to the end of each down count; When the count value of the counter and the trigger signal next to the certain trigger signal are detected in correspondence with the cycle accuracy, it is determined that the cycle of the trigger signal is within the cycle accuracy, and the detection is not performed. When it is determined that the cycle of the trigger signal is not within the cycle cycle accuracy, the determination result is transmitted. A recirculation period the accuracy determination device and a that determination circuit.

[0012]

According to the present invention, by taking the above means, the counting clock generating means generates a counting clock having a period shorter than the cycle of the trigger signal, and the reference value setting circuit generates the counting clock. The reference value of the cycle of the trigger signal is set by a predetermined number of bits based on the ratio between the generation cycle of the count clock by the means and the cycle of the trigger signal, and the reference value distribution storage circuit is set in the reference value setting circuit. Of the cycle reference values, a shift-out value that is bit-shifted in accordance with the cycle accuracy of the trigger signal is stored in the first storage unit, and a shift value that is not stored in the first storage unit is stored in the second storage unit. The down counter counts the shift-out value stored in the first storage unit among the cycle reference values stored in the reference value distribution storage circuit when a certain trigger signal is applied. The count value is down-counted once according to the count clock received from the lock generation means, and the shift value stored in the second storage unit is down-counted a plurality of times according to the count clock received from the count clock generation means. The borrow transmitted in response to the end of the down-counting is counted, and when the count value of the up-counter and a trigger signal next to a certain trigger signal are detected in accordance with the cycle accuracy, the determination circuit detects the borrow. When it is determined that the cycle is within the cycle accuracy, and when the detection is not performed, it is determined that the cycle of the trigger signal is not within the cycle accuracy, and the determination result is transmitted. It can be realized and downsized.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a circulation period accuracy determination device according to one embodiment of the present invention. In this circuit, a setting register (reference value setting circuit) 11 in which a cycle reference value of an external trigger (trigger signal) is set by a predetermined number of bits is used by a bit shift register (reference value distribution). (Storage circuit) 12. The cycle reference value is set by a counter number indicating how many times the cycle of the external trigger is greater than the cycle of the external timing clock generated by the count clock generator 13.

The bit shift register 12 includes first and second shift registers (first and second storage units) 12a,
12b, the cycle reference value sent from the setting register 11 is bit-shifted based on a predetermined determination accuracy, and the shifted out value is stored in the first shift register 12a. The shift values not stored in the shift register 12a are stored in the second shift register 12b.

For example, when the judgment accuracy is ± 25%, 2
The shift-out value shifted out by bits is stored in the first shift register 12a, and the remaining shift values are stored in the second shift register 12b. Similarly, when the determination accuracy is ± 12.5%, 3 bits, ±
For a determination accuracy of 6.25%, 4 bits, and ±
When the determination accuracy is 3.125%, the shift-out values for 5 bits are stored in the first shift register 12a, and the remaining shift values are stored in the second shift register 1a.
2b. That is, the number of bits to be shifted and the determination accuracy have the relationship shown in the following equation (1). Determination accuracy = {1 / [2 (the number of bits to be shifted)]} × 100 (1) Further, the bit shift register 12
1 or 2 based on the load request signal received from
Has a function of loading the values stored in the shift registers 12a and 12b into the down counter 14.

When the down counter 14 receives the first external trigger through the OR circuit 15 after receiving the enable signal from the outside through the OR circuit 15, the down counter 14 loads the shift-out value into the first shift register 12a only once. The shift-out value is down-counted in accordance with an external timing clock received from the count clock generator 13, and the shift value is repeatedly loaded a plurality of times into the second shift register 12b to receive the shift value from the count clock generator 13. The counter counts down according to an external timing clock, and has a function of applying a borrow to the up counter 16 in response to the end of the down count.

The up counter 16 is a down counter 1
The number of borrows applied from 4 is counted and the counted value is sent to the judgment circuit 17. The determination circuit 17 determines when the count value of the up-counter 16 and an external trigger next to a certain external trigger are detected in accordance with the cycle accuracy.
If the cycle of the external trigger is within the cycle accuracy, it is determined to be acceptable. If no detection is made, the external trigger is judged to be disqualified if the cycle is not within the cycle accuracy, and the determination result is transmitted.

For example, when the judgment accuracy is ± 25%, when the next external trigger is detected when the count value of the up counter 16 indicates “4” or “5”, the pass is judged. When the count value of the up counter 16 indicates “8” or “9” when the judgment accuracy is ± 12.5%,
Up counter 16 when the judgment accuracy is ± 6.25%
When the count value of “.” Indicates “16” or “17”, ± 3.
If the count value of the up counter 16 indicates “32” or “33” when the determination accuracy is 125%, the pass determination is performed when the next external trigger is detected.

That is, the count value of the up counter 16 and the number of shift bits corresponding to the determination accuracy have the relationship shown in the following equation (2). Count value = 2 raised to the power of (the number of bits to be shifted) and 1 + 2 (2) Next, the operation of such a circulation period accuracy determination apparatus will be described with reference to FIGS.

Here, the setting of the value required for the determination will be described, and then the determination operation will be described. Now, the circulation period of the external trigger is 100 (ms), and the counting clock generator 1
3 is 100.
(Μs).

At this time, the cycle reference value obtained by the following equation (3) is set in the setting register 11. The cycle reference value is the number of counters of the external timing clock indicating how many times the external timing clock occurs during one cycle of the external trigger.

Period reference value = circulation period of external trigger / generation period of external timing clock (3) = 100 ms ÷ 100 μs = 1000 (times) This period reference value is (1000) ₁₀ = (0011 111)
0 1000) ₂ is converted into a binary number, and the converted value is set in the setting register 11 by the operation of the operator.
The setting register 11 sends the cycle reference value to the bit shift register 12.

At this time, for example, the accuracy of the determination of the circulation cycle is ±
Assuming 6.25%, the bit shift register 12 shifts the cycle reference value by 4 bits as described above, and shifts the shift-out value (1000) ₂ to the first value as shown in FIG.
And stores the remaining shift values (0
011 1110) ₂ is stored in the second shift register 12b.

As a result, in the apparatus of this embodiment, a value required for the operation of determining the cycle accuracy is set. The cycle reference value, the number of shift bits, the shift-out value, and the shift value have the relationship shown in the following equation (4). Period reference value = shift value × 2 to the power of (shift bit number) + shift-out value (4) That is, the shift-out value is counted only once according to the external timing clock, and the shift value is further shifted to 2 (shift bit number). When the number of times is counted only by the power, a time equal to the cycle of the external trigger corresponding to the cycle reference value elapses. In addition, the number of powers of 2 (the number of shift bits) increases in proportion to the determination accuracy, and the shift value decreases.

Next, the operation of determining the cycle accuracy will be described. When receiving an enable signal from the OR circuit 15 and detecting an external trigger, the down counter 14 loads a shift-out value from the first shift register 12a and counts down the shift-out value according to an external timing clock.

When one count of the external timing clock before the end of the down count is reached, the down counter 14 sends a borrow to the up counter 16 and the second shift register 12b. The up counter 16 counts the number of borrows and sends the counted value to the determination circuit 17.

The second shift register 12b loads the shift value into the down counter 14 by the borrow, and the down counter 14 counts down the shift value according to an external timing clock.

Subsequently, similarly, the down counter 14 sends a borrow to the up counter 16 and the second shift register 12b one external timing clock before the end of the down counting.

Thereafter, as shown in FIG. 3, the down counter 14 repeatedly executes the down count of the shift value and the transmission of the borrow, and the up counter 16 increments the count value by 1 every time a borrow is received, and makes a determination. Send it to the circuit 17.

When the count value of the up counter 16 is 16, 17, the determination circuit 17 detects the presence or absence of an external trigger,
When the external trigger is detected, the accuracy is determined to be passed, and when the external trigger is not detected, the accuracy is determined to be disqualified.

Thereafter, the determination circuit 17 outputs the result of the determination. As described above, according to the present embodiment, the setting register 11 sets the cycle reference value of the external trigger by the number of counters of the external timing clock, and the first and second shift registers 12a and 12b set the cycle reference value. The value is bit-shifted based on the determination accuracy, distributed and stored, and the down counter 14 counts down the shift-out value stored in the first shift register 12a and the shift value stored in the second shift register 12b. The borrow is sent out by the up counter 16, the borrow is counted by the up counter 16, and when the count value of the up counter 16 corresponding to the determination accuracy is detected by the determination circuit 17, the presence or absence of an external trigger is detected to determine the circulation period accuracy, Since the pass / fail of the circulation cycle accuracy is output based on this determination result, a simple configuration without using a timer is realized. And, it is possible to shrink.

In the above embodiment, the case where only the pass / fail of the circulation period accuracy is determined has been described. However, the present invention is not limited to this, and the determination circuit 17 is connected to the first and second counters.
When an external trigger is detected at the first count value of the two count values of the up counter 16 at the time of the determination, the first counter indicating the advance of the circulation cycle is counted up,
When the external trigger is detected at the last count value, the second counter indicating the delay of the circulation cycle is counted up to store the advance / delay state of the external trigger within the accuracy as statistical information. The invention can be carried out in the same manner and the same effects can be obtained.

In the above embodiment, the case where the presence or absence of the external trigger is detected when the count value of the up-counter 16 corresponding to the determination accuracy is detected is described.
The present invention can be implemented in the same manner and the same effect can be obtained by determining whether or not the count value of the up counter 16 when the external trigger is detected corresponds to the determination accuracy and determining the circulation period accuracy. be able to. In addition, the present invention can be implemented with various modifications without departing from the scope of the invention.

[0034]

As described above, according to the present invention, the counting clock generating means generates a counting clock having a cycle shorter than the cycle period of the trigger signal, and the reference value setting circuit performs counting by the counting clock generating means. A cycle reference value of the trigger signal is set by a predetermined number of bits based on a ratio between a clock generation cycle and a cycle period of the trigger signal, and the reference value distribution storage circuit stores the cycle reference value set in the reference value setting circuit. And storing a shift-out value bit-shifted in accordance with the cycle accuracy of the trigger signal in the first storage unit, and storing a shift value not stored in the first storage unit in the second storage unit. When a certain trigger signal is applied to the down counter, the shift-out value stored in the first storage unit among the cycle reference values stored in the reference value distribution storage circuit is counted by the counting clock generation means. The count value is down-counted once according to the received count clock, and the shift value stored in the second storage unit is down-counted a plurality of times according to the count clock received from the count clock generating means. The borrow transmitted in response is counted, and when the count value of the up counter and the trigger signal next to the certain trigger signal are detected in accordance with the circulation cycle accuracy, the determination circuit determines the rotation cycle of the trigger signal. If it is determined that it is within the cycle accuracy, and if the detection is not performed, it is determined that the cycle of the trigger signal is not within the cycle accuracy, and the determination result is transmitted, so that a simple configuration without using a timer is realized and reduced. It is possible to provide an orbiting cycle accuracy determination device capable of realizing.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a circulation period accuracy determination device according to one embodiment of the present invention.

FIG. 2 is a diagram for explaining a bit shift operation in the embodiment.

FIG. 3 is an exemplary view for explaining a determination operation in the embodiment.

FIG. 4 is a block diagram showing a configuration of a conventional circulation period accuracy determination device.

FIG. 5 is a diagram for explaining a conventional determination operation.

[Explanation of symbols]

11 setting register, 12 bit shift register, 1
2a: first shift register, 12b: second shift register, 13: counting clock generator, 14: down counter, 15: OR circuit, 16: up counter, 17 ...
Judgment circuit.

Claims (1)

(57) [Claims] An apparatus for determining and outputting a cycle period accuracy of a periodically generated trigger signal, a count clock generating means for generating a count clock having a cycle shorter than the cycle of the trigger signal, A reference value setting circuit for setting a cycle reference value of the trigger signal with a predetermined number of bits based on a ratio between a generation cycle of a count clock by a clock generation means and a circulation cycle of the trigger signal; A shift-out value that is bit-shifted corresponding to the cycle accuracy of the trigger signal among the cycle reference values set in the first storage unit, and a shift value that is not stored in the first storage unit A reference value distribution storage circuit that stores the reference value in a second storage unit, and when a certain trigger signal is applied, among the cycle reference values stored in the reference value distribution storage circuit, 1 counts down the shift-out value stored in the first storage unit once in accordance with the count clock received from the count clock generator, and counts the shift value stored in the second storage unit from the count clock generator. A down counter that counts down a plurality of times in accordance with the following: an up counter that counts borrows transmitted from the down counter in response to the end of each down count; and a count value of the up counter and a trigger signal next to the certain trigger signal. When detected corresponding to the cycle period accuracy, it is determined that the cycle period of the trigger signal is within the cycle period accuracy, and when the detection is not performed, the cycle period of the trigger signal is within the cycle period accuracy. A circulating cycle, comprising: a determination circuit that determines that there is no result and sends the determination result. Degree determination device.