JP3158551B2 - Non-volatile storage device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology effective when applied to a nonvolatile memory using a Schottky barrier diode.

[0002]

2. Description of the Related Art As shown in FIG. 3, reference numeral 1 denotes a semiconductor substrate, 2 denotes a first insulating film, 3 denotes a lower wiring layer (such as polycrystalline silicon containing a high concentration of impurities), and 4 denotes a semiconductor. Membrane (1 ×
Such as 10 ¹⁷ atoms · cm ^-3 approximately polycrystalline silicon film containing impurities), the second insulating film 5, 6 is a metal film (such as titanium or platinum), 7 will not intentionally injected silicon film (impurity Reference numeral 8 denotes a wiring layer (such as an aluminum film).

One of the non-volatile memories using a diode and a silicon film as one cell is shown in FIG.
There is a structure in which a silicon film 7 is formed on a Schottky barrier diode composed of a metal film 6 and a semiconductor film 4, and these are arranged in a lattice as shown in FIG. However, FIG. 3 shows a cross-sectional view of three cells for better explanation. One cell is formed by a switch and a diode, and information is determined based on ON / OFF of the switch. This structure is called 1 TIMEPROM (read-only memory that is electrically writable only once). FIG.
In, the diode is a Schottky barrier diode. The diodes, when arranged in a grid, serve to block current from other cells. The switch plays a role of the silicon film 7.

That is, before electrical writing, the resistance of the silicon film 7 is high. That is, since only a small amount of current flows even when a voltage of about 5 V is applied, the switch is turned off (OFF state). When writing electrically, that is, when a voltage of about 20 V is applied to the silicon film 7, the silicon film 7 is destroyed and a current easily flows, and the switch is turned on (ON state).

[0005] The 1 TIMEPROM extracts information based on the magnitude of the current before and after the destruction of the silicon film 7.

[0006]

However, in the prior art, the impurities of the lower wiring layer 3 flow into the semiconductor film 4 which is a Schottky barrier diode during the heat treatment.
There is a problem that the characteristics of the Schottky barrier diode are deteriorated.

In order to miniaturize the cell, the lower wiring layer 3 to the silicon film by implanting impurities at a high concentration (1 la 10 ²¹ atoms · cm ^-3 or more) is common. This is because the silicon film can be processed to be thin. The semiconductor film 4 is also implanted with a small amount of impurities. Heat treatment is performed to activate those impurities. However, at this time, the impurity of the lower wiring 3 is
And the metal film 6 is reached. This is because the distance between the lower wiring 3 and the metal film 6 (the semiconductor film 4
This is because the film thickness is short. The impurity (phosphorus, boron, arsenic, etc.) concentration of the semiconductor film 4 is 1 l
^A suitable value is ²⁰ atoms · cm ⁻³ . If the concentration is too high, there is a problem that the reverse current (diffusion current) of the Schottky barrier diode increases.
According to the experiment of the present invention, the difference between the absolute values of the ON current and the OFF current was about six digits. However, when the impurities reached the metal film, they fell to one digit or less. Further, if such a cell is a 1 TIMEPROM cell, current from other cells cannot be blocked. Therefore,
The difference between the ON current and the OFF current is also small,
There is a problem that it is impossible to sense nothing.

Therefore, the present invention solves such a problem, and an object of the present invention is to provide a good property that impurities of the lower wiring 3 are not allowed to reach the metal film 6 even when heat treatment is performed. It is an object of the present invention to provide a Schottky barrier diode and a cell for a TIMEPROM.

[0009]

According to the present invention, there is provided a nonvolatile memory device comprising: a first insulating layer provided on a semiconductor substrate; a first silicon layer containing impurities provided on the first insulating layer; A second insulating layer provided on the first silicon layer and having a first opening in a predetermined portion; and a second insulating layer provided above the first silicon layer and provided at the first opening in the first silicon layer. A second silicon layer directly contacted, a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening;
A metal silicide film provided on the second silicon layer in the second opening, a third silicon film provided on the metal silicide film, and a wiring film provided above the third silicon film. And applying a high voltage to the third silicon film at the time of writing.

The nonvolatile memory device according to the present invention also includes a first insulating layer provided on a semiconductor substrate, a first silicon layer containing impurities provided on the first insulating layer, and a first silicon layer containing impurities. A second insulating layer disposed on the first insulating layer and having a first opening at a predetermined portion; and a second insulating layer disposed above the first silicon layer and directly contacting the first silicon layer at the first opening. A second silicon layer, a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening, and a second silicon layer in the second opening. A metal silicide film provided on the layer, a silicon nitride film provided on the metal silicide film, and a wiring film provided above the silicon nitride film. Applying to the silicon nitride film , Characterized by.

Further, in the nonvolatile memory device according to the present invention, a first insulating layer provided on a semiconductor substrate; a first silicon layer containing impurities provided on the first insulating layer;
A second insulating layer provided on the silicon layer and having a first opening in a predetermined portion; and a second insulating layer provided above the first silicon layer and directly contacting the first silicon layer at the first opening. A second silicon layer, a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening, and the third insulating layer in the second opening. A metal silicide film provided on the silicon layer, a silicon oxide film provided on the metal silicide film, and a wiring film provided above the silicon oxide film. Applying a voltage to the silicon oxide film.

[0012]

FIG. 1 is a sectional view of a semiconductor device according to one embodiment of the present invention. 2 (a) to 2 (d)
It is a principal sectional view for every manufacturing process. In all the drawings of the embodiments, those having the same functions are denoted by the same reference numerals, and the repeated description thereof will be omitted. 1 and FIGS. 2A to 2D show cross-sectional views of three cells for better explanation. Hereinafter, description will be given according to FIGS. 2A to 2D. Here, for convenience of explanation, an example using a Schottky barrier barrier diode will be described.

First, as shown in FIG. 2A, a first insulating film 2 is formed on a semiconductor substrate 1 by a CVD method (chemical vapor deposition). A thickness of about 200 nm for an SiO ₂ film would be appropriate. Then, CVD is performed on the first insulating film 2 as a lower wiring.
A first polycrystalline silicon film 9 is formed to a thickness of about 300 nm by a method. Usually, polycrystalline silicon 9 is deposited by thermal decomposition of monosilane gas. Then, the first polycrystalline silicon film 9
In order to reduce the resistance, 6 × 10 ¹⁵ atoms · cm ⁻² or more is implanted using, for example, a phosphorus element by ion implantation. Arsenic may be used instead of phosphorus. Then, the first polycrystalline silicon film 9 is formed into a predetermined shape by a photo and etching method.

Then, a second insulating film 10 is formed on the first polycrystalline silicon film 9 by a CVD method. SiO
_A thickness of about 300 nm for _two films would be appropriate. Then, a first contact hole is formed by a photo and etching process to connect to a Schottky barrier diode to be formed thereafter. Note that the first contact hole is not formed immediately below a Schottky barrier diode to be formed later.

Next, as shown in FIG. 2C, a third insulating film 12 is formed as an interlayer insulating film. For example, it would be appropriate to form a SiO ₂ film of about 300 nm by a CVD method. Then, the third insulating film 12 where the Schottky barrier diode is to be formed is removed by photo and etching. Etching is performed using hydrofluoric acid or the like using an organic resist that is usually used when manufacturing a semiconductor device.

On the entire surface, for example, a titanium film 13 is formed by a sputtering method, and a titanium film 13 is formed using a halogen lamp.
Heat at 00 ° C for about 60 seconds. As a result, the titanium film 13 where the third insulating film 12 has been removed reacts with the second polycrystalline silicon film 11 therebelow to become titanium salicide. Thereafter, the titanium film 13 other than the titanium salicide portion is etched with a mixed solution of ammonia, water, and hydrogen peroxide solution. Next, as shown in FIG. 2D, a silicon film 14 serving as a switch is formed. Similarly to the first polycrystalline silicon film 9 and the second polycrystalline silicon film 11, a 200 nm
Form. Then, unnecessary portions are removed by a photo and etching method.

Finally, as shown in FIG. 1, the third insulating film 12
A lead wiring 15 is formed on the silicon film 14. A general method would be to form aluminum by a sputtering method and remove unnecessary portions by a photo and etching method.

Through the above steps, one embodiment of the present invention is obtained.

By not forming a contact hole with the lower wiring immediately below the Schottky barrier diode, the distance from the lower wiring layer to the Schottky barrier diode becomes longer. Therefore, the impurity of the lower wiring (the first polycrystalline silicon film 9) is changed to the impurity of the semiconductor film of the Schottky barrier diode (the second polycrystalline silicon film 9) by a thermal process such as annealing for activation. The semiconductor film of the Schottky barrier diode (the second
Even if it is slightly diffused into the polycrystalline silicon film 11), it does not reach the titanium film and can maintain good Schottky barrier diode characteristics. Further, even in the arrangement of 1 TIMEPROM, the reverse current of the Schottky barrier diode is small, and the difference between the ON current and the OFF current is large.

Although the invention made by the inventor has been specifically described based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and may be modified without departing from the scope of the invention. Of course you can. For example, in the present embodiment, the description has been given with respect to the one-time EEPROM. However, the present invention is also effective for a TTL input circuit and a memory cell using a bipolar Tr and a Schottky barrier diode. In the embodiment, the polycrystalline silicon film is used for the lower wiring, but it goes without saying that the same applies to the case of the impurity diffusion layer formed in the semiconductor substrate. In this embodiment, a silicon film is used as a switch. However, it is more effective to use a silicon nitride film, a silicon oxide film, or a laminated film of these, which has a large difference between an ON current and an OFF current.

[0021]

As described above, according to the present invention, by connecting to the lower wiring below and below the Schottky barrier diode, impurities in the lower wiring reach the Schottky barrier diode even through a heat process. do not do. Therefore, a Schottky barrier diode having good electric characteristics can be manufactured without increasing the reverse current (diffusion current).
Also, even if it is adopted for 1 TIMEPROM, ON current and O
The difference from the FF current is large, stable operation is possible, and reliability is improved.

[Brief description of the drawings]

FIG. 1 is a main sectional view showing one embodiment of a semiconductor device of the present invention.

FIGS. 2A to 2D are main cross-sectional views for explaining an example of a method for manufacturing a semiconductor device of the present invention in the order of steps.

FIG. 3 is a main cross-sectional view showing a conventional semiconductor device.

FIG. 4 is a circuit diagram of a one-time electrically writable nonvolatile memory using a diode.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... 1st insulating film 3 ... Lower wiring diagram 4 ... Semiconductor film 5 ... 2nd insulating film 6 ... Metal film 7 ... Silicon film 8 ... Upper wiring film 9 first polycrystalline silicon film 10 second insulating film 11 second polycrystalline silicon film 12 third insulating film 13 titanium film 14 silicon Film 15 ・ ・ ・ Wiring 16 ・ ・ ・ Impurity ion beam

Claims (3)

(57) [Claims] A first insulating layer disposed on the semiconductor substrate; a first silicon layer containing impurities disposed on the first insulating layer; and a predetermined portion disposed on the first silicon layer. First
A second insulating layer having an opening, a second insulating layer provided above the first silicon layer and directly contacting the first silicon layer at the first opening;
A silicon layer; a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening; and a second silicon layer in the second opening. A metal silicide film disposed on the metal silicide film, a third silicon film disposed on the metal silicide film, and a wiring film disposed above the third silicon film. Is applied to the third silicon film. A first insulating layer disposed on the semiconductor substrate; a first silicon layer containing impurities disposed on the first insulating layer; and a predetermined portion disposed on the first silicon layer. First
A second insulating layer having an opening, a second insulating layer provided above the first silicon layer and directly contacting the first silicon layer at the first opening;
A silicon layer; a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening; and a second silicon layer in the second opening. A metal silicide film provided thereon, a silicon nitride film provided on the metal silicide film, and a wiring film provided above the silicon nitride film. A nonvolatile memory device, wherein the voltage is applied to a silicon nitride film. A first insulating layer disposed on the semiconductor substrate; a first silicon layer containing impurities disposed on the first insulating layer; and a predetermined portion disposed on the first silicon layer. First
A second insulating layer having an opening, a second insulating layer provided above the first silicon layer and directly contacting the first silicon layer at the first opening;
A silicon layer; a third insulating layer provided on the second silicon layer and having a second opening at a position not overlapping with the first opening; and a second silicon layer in the second opening. A metal silicide film provided thereon, a silicon oxide film provided on the metal silicide film, and a wiring film provided above the silicon oxide film. A nonvolatile memory device, wherein the voltage is applied to a silicon oxide film.