JP3174605B2 - Semiconductor position detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting a position where external light, ultraviolet rays, .gamma.
The present invention relates to a semiconductor position detecting element for realizing distance measurement, focus detection, and other optical measurements.

[0002]

2. Description of the Related Art Conventionally, as such a semiconductor position detecting element, a p-type resistance layer is uniformly laminated on the front side of an I layer made of flat silicon, and an n ⁺ layer is laminated on the back side. Further, a pair of output electrodes are provided at both ends of the p-type resistive layer at a predetermined interval, and the n ⁺ layer is biased at a predetermined voltage. In some devices, a photocharge proportional to light energy was generated by a diode formed by a pIn ⁺ layer, and this was converted into a photocurrent that passed through a p-type resistive layer and was output from an output electrode.

Here, a photocurrent is proportional to a first resistance value proportional to a distance from a position where a light spot hits to one output electrode, and is proportional to a distance from a position where the light spot hits to another output electrode. Since the current is diverted according to the ratio to the second resistance value, the incident position of the light spot can be obtained by detecting the output current obtained from each output electrode.

The above-described method in which a pair of output electrodes is provided at both ends of the p-type resistance layer realizes one-dimensional position detection. In addition, two output electrodes are provided at four corners of the p-type resistance layer. Are provided so that they are opposed to each other, and a method of two-dimensionally detecting the incident position of the light spot, and a method of two-dimensionally detecting by providing an output electrode also on the n ⁺ layer are known. I have.

[0005] However, these analog type position detecting elements have the advantage of a simple structure. However, since the photocurrent flows through the resistance from the position where the light spot is incident to the output electrode, this resistance and the parasitic capacitance There is a problem that detection takes a long time due to the influence of the time constant caused by the above. Particularly, in a large-area semiconductor position detecting element in which the area of the light receiving surface is widened and the position detection range of the incident spot is expanded, the time constant is further increased. It was a big problem.

In order to solve such a problem, a semiconductor position detecting element has been developed which realizes high-speed position detection by reading out a photoelectric charge generated at an incident position of a light spot as a binary signal. This is a binary optical semiconductor position detecting element or BPD.
Called S.

That is, as shown in FIG. 14, for example, a plurality of signal read lines X _{1 to} X ₈ and Y _{1 to} Y ₈ are arranged in a grid so as not to contact each other in the vertical and horizontal directions. as shown, the amorphous silicon layer is provided sandwiched between the surface plane and the signal line Y ₁ to Y _8, which signal lines X ₁ to X ₈ are provided is formed.

The signal lines X _{1 to} X ₈ are connected to transparent electrodes (I
Formed by TO), the signal lines Y ₁ to Y ₈ is formed of aluminum. Further, these signal lines X _{1 to} X ₈ , Y ₁
〜Y ₈ and the amorphous silicon layer are laminated on a transparent glass substrate, and a light spot is made incident from the back side of the glass substrate.

With such a structure, the signal lines X ₁ -X
₈ and Y _{1 to} Y ₈ are equivalently shown in FIG.
The light receiving diodes shown in FIG. 3 are distributed, and the intersections serve as pixels for detecting light. And
When a light spot is incident on a position (pixel) at a certain intersection, a photocharge is generated only at that portion, so that the signal line X ₁
~X _8, Y ₁ ~Y ₈ can detect the photocharge by the scanning at a predetermined timing, further, it is possible to detect the incident position of the light spot on the basis of the scanning timing.

As described above, the BPDS does not detect the photocharge via a resistor as in the conventional analog system, but directly detects the photocharge via a signal line having a small resistance value.
High-speed detection is possible, and photocharges generated at any incident position can be detected at the same detection speed, so that it has excellent functions such as realizing a position detection element with a large light receiving area. are doing.

[0011]

By the way, in a conventional BPDS having a structure as shown in FIG. 16, when formed by a semiconductor manufacturing technology, signal lines X _{1 to} X ₈ of transparent electrodes are formed on a glass substrate. Is formed, and about 1-2 μm
Amorphous silicon layer of about thickness is laminated,
Since an aluminum signal lines Y ₁ to Y _8, step of the intersection portion of the signal line _{X 1 ~X 8, Y 1 ~Y} 8 ( part of the pixel) increases.

As a result, there arise problems that the leak current of the amorphous silicon layer becomes extremely large and the amorphous silicon layer is destroyed by breakdown.
Particularly, in a BPDS having a large light receiving area and high resolution, the yield is reduced. Further, when surface contamination occurs in the etching process for forming the transparent electrode, there is a problem that a dark current generated in the amorphous silicon layer laminated on the transparent electrode increases and a withstand voltage decreases.

The present invention has been made in view of such a conventional problem, and eliminates the step at the intersection of the signal lines, that is, the pixel, thereby providing a large light receiving area with excellent yield and the like. It is an object to provide a position detecting element.

[0014]

According to the present invention, a transparent electrode layer is laminated on a transparent substrate having transparency, such as a glass plate. The semiconductor layers are stacked, and a plurality of signal lines are stacked in a grid pattern in the vertical and horizontal directions on the upper surface of the semiconductor layer via an appropriate insulating layer, and the plurality of signal lines in the vertical direction and the plurality of signal lines in the horizontal direction are mutually connected. A plurality of signal lines in the vertical direction and a plurality of signal lines in the horizontal direction are connected to the semiconductor layer at positions that are geometrically symmetrical in the vicinity of a position where they intersect without direct contact.

[0015]

With such a structure, the transparent electrode layer and the semiconductor layer are always laminated in a uniform flat shape, so that it is possible to realize an improvement in breakdown voltage, a reduction in dark current, a high density, and the like.

[0016] A plurality of vertical signal lines and a plurality of horizontal signal lines intersect each other without directly contacting each other, and the plurality of signal lines in the vertical direction are located at positions geometrically symmetric in the vicinity thereof. And a plurality of horizontal signal lines are connected to the semiconductor layer, thereby forming a light receiving diode corresponding to each pixel, thereby realizing a position detecting element.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the position detecting element according to the present invention will be described below with reference to the drawings. In this embodiment, as shown in FIG. 14, signal lines are provided in a grid pattern in the vertical and horizontal directions of the light-receiving surface, and are generated at the incident position of the light spot via these signal lines. This is to detect photocharge.

FIG. 1 shows the structure of a part of the light receiving surface. In FIG. 1, a transparent electrode layer 2 is uniformly laminated by a sputtering technique on an upper surface of a substrate 1 formed of a glass plate having a light-transmitting property or another material having a light-transmitting property. A semiconductor layer 3 of amorphous silicon or a semiconductor equivalent thereto is laminated on the upper surface.

Further, on the upper surface of the impurity layer 3, a plurality of signal lines X _{1 to} X _n (only the n-th signal line Xn is shown in the figure) are formed in parallel at predetermined intervals. These signal lines are formed, for example, by patterning an aluminum layer.

Here, the signal lines X _{1 to} X _n are formed in a wiring portion extending in the longitudinal direction (X _na in the signal line X _n ).
When, in the board-shaped portion (signal line X _n which Shutcho' alternately, X
_nb ) has an integrally formed shape.

Further, the semiconductor layer 3 and these signal lines X _1
Xn are covered with an insulating film 4 such as a silicon oxide film, and a plurality of contact holes 5 are formed at predetermined positions of the insulating film 4.

The signal line X ₁ is provided on the upper surface of the insulating film 4.
During plurality of signal lines Y ₁ to Y _m (Fig perpendicular to to X _n,
Shows the (m-1) th and m-th signal line Y _m-1, Y _m)
Are formed in parallel at predetermined intervals. These signal lines are formed by, for example, etching a second aluminum layer.

Here, the plurality of signal lines Y _{1 to} Y _m are connected to a wiring portion extending in the longitudinal direction (in the signal lines Y _{m -1} and Y _m ,
Y _{(m-1) a} , Y _ma ) and a board-like portion (Y _{(m-1) b} , Y _{mb in} signal lines Y _m-1 , Y _m ) which travel alternately are formed integrally. These board-shaped portions are connected to the semiconductor layer 3 via contact holes 5 formed at predetermined positions in the insulating film 4.

Therefore, as shown in FIG. 2 showing a longitudinal section along the virtual plane A in FIG. 1, the signal lines X _{1 to} X _n and the signal lines Y
₁ to Y _m has been separated by the insulating film 4 from each other, further, Figure 3 shows a longitudinal section along the virtual plane B in FIG. 1
, The signal lines X _{1 to} X _n are directly connected to the semiconductor layer 3, and the signal lines Y _{1 to} Y _m are connected to the semiconductor layer 3 through a hole 5 in which a board-shaped portion is formed at a predetermined position in the insulating film 4. 3 are connected to other portions of the signal lines X _{1 to} X _n and Y _{1 to} Y
_m has a structure connected to the transparent electrode 2 via the semiconductor layer 3.

As shown in FIG. 1, the signal lines X _{1 to} X _n
And the signal lines Y _{1 to} Y _m ,
Since disk-shaped portion of the disk-shaped portion of the signal line X ₁ to X _n and the signal line Y ₁ to Y _m side are arranged in point symmetry, and four disk-shaped portion positioned on the periphery of these intersections The semiconductor layer 3 and the transparent electrode layer 2 constitute four light receiving diodes.

When a light spot is incident near the intersection of the XY matrix, photocharge is generated. The photocharge amount is X
Collected in the vertical photodiode near the intersection of the Y matrix. Since these diodes are connected to the X or Y electrodes, the amount of photocharge is divided into two parts, each X
Or, it flows to the external circuit through the Y electrode. By detecting the addresses of the X and Y electrodes at which the current exceeds a certain threshold value by a signal reading section described later, the incident position of the light spot can be detected two-dimensionally.

The incident light spot is received on the back surface of the substrate 1.

Further, the thickness of each layer of the laminated structure is as shown in FIG. 4 or FIG. 5, FIG. 4 shows a case where the signal line is realized by an aluminum layer, and FIG. And a case where another semiconductor is applied. Further, the signal line may be realized by a polysilicon layer.

Next, the structure of a signal readout portion formed around the light receiving surface of such a structure will be described with reference to FIG.

The signal lines X _{1 to} X _n are connected to the multiplexer 6 via bonding pads connected to the respective terminations, and are synchronized with a scanning pulse signal output from the X-direction shift register 7 at a predetermined timing. Te, the switching transistors in the multiplexer 6 by the sequential conduction state exclusively, signal lines X ₁ to X _n are scanned sequentially.

On the other hand, the signal lines Y _{1 to} Y _m are similarly connected to the multiplexer 8 via bonding pads connected to the respective terminations, and the scanning output from the Y-direction shift register 9 at a predetermined timing. In synchronization with the pulse signal, the switching transistors in the multiplexer 8 are exclusively and sequentially turned on, so that the signal line Y ₁
ＹY _m are sequentially scanned.

The signals Sx and Sy indicating the charge amounts read out through the multiplexers 6 and 8 are supplied to the voltage signals V and V by the amplifier circuits 10 and 11 for impedance conversion, respectively.
The values are converted into x and Vy, and are further binarized by being compared with a predetermined threshold value T _H by the comparators 12 and 13, and transferred to the microprocessor 15 via the interface 14.

The microprocessor 15 has synchronous clock pulses CKx and CKy for setting the shift timing of the X-direction shift register 7 and the Y-direction shift register 9.
And these synchronous clock pulses CKx and CKy
, The scanning pulse signals of the multiplexers 7 and 8 are formed in synchronization with the signal line X _1.
Determines whether it has received a read signal from any signal line of the to X _n and the signal line Y ₁ to Y _m, further intersections of the determined signal line determined as the incident position of the light spot I do. For example, if a signal is received when scanning the i-th signal line Xi and the j-th signal line Yj, it is determined that the light spot has entered the position (Xi, Yj) on the XY coordinates.

Although the signal reading section shown in FIG. 6 is applied to a relatively small-scale position detector, the signal reading section has a larger scale, that is, a large light receiving area and a large number of pixels. In such a case, it takes time to scan all the signal lines X _{1 to} X _n and Y _{1 to} Y _m once, which causes a time delay in signal reading. Department applies.

That is, in FIG. 7, n × i X-direction signal lines X _{11 to} X _ni are divided into i lines, and each set of i signal lines is connected to multiplexers MX _{1 to} MX _n . Have been. Then, each of the multiplexers MX _{1 to} MX _n is
By switching in parallel in synchronization with the scanning pulse signals from the corresponding X-direction shift registers SX _{1 to} SX _n , n signal lines are simultaneously scanned in parallel.

Furthermore, the output lines of the multiplexers MX ₁ ~MX _n includes an amplifier circuit AX ₁ to A to impedance conversion
Is converted into binary voltage signal via a comparator CX ₁ ~CX _n and X _n, is transferred to the encoder circuit EX, the encoder circuit EX signal to any signal line of the signal line X ₁₁ to X _ni Is encoded into digital data Dx indicating whether or not the error has occurred, and transferred to the microprocessor 15 via the interface 14x. Further, the microprocessor 15 has a synchronization clock pulse CK for synchronizing the scanning timing.
By supplying x to the X-direction shift registers SX _{1 to} SX _n , it is possible to determine which signal line the digital data Dx is when scanning.

Note that each of the multiplexers MX _{1 to} MX _n and X
Direction shift registers SX _{1 to} SX _n and amplification circuit AX ₁
To AX _n and the comparators CX _{1 to} CX _n correspond to the multiplexer 6, the X-direction shift register 7, and the amplifying circuit 10 shown in FIG.
And the same configuration as the comparator 12.

On the other hand, m × j signal lines Y _{11 to} Y _mj are similarly divided into j lines, and each set of j signal lines is connected to multiplexers MY _{1 to} MY _m . And
Each multiplexer MY ₁ ~MY _m is, Y corresponding to the respective
By switching in parallel in synchronization with the scanning pulse signals from the direction shift registers SY _{1 to} SY _m , j signal lines are simultaneously scanned in parallel.
Further, the output lines of each multiplexer MY ₁ ~MY _m is converted into binary voltage signal via a comparator CY ₁ ~CY _m an amplifier circuit AY ₁ ~AY _m to impedance conversion,
The signal is transferred to the encoder circuit Ey, and the encoder circuit Ey encodes into the digital data Dy indicating which of the signal lines Y _{11 to} Y _mj the signal is generated, and sends the digital data to the microprocessor 15 via the interface 14 y. Forward. Further, the microprocessor 15 supplies a synchronous clock pulse CKy for synchronizing the scanning timing to the Y-direction shift registers SY _{1 to} SY _m , so that the digital data Dy is data when any signal line is scanned. Can be determined.

Note that each of the multiplexers MY _{1 to} MY _m and X
Direction shift registers SY _{1 to} SY _m and amplifier circuit AY ₁
AY _m and the comparators CY _{1 to} CY _m also include the multiplexer 6, the X-direction shift register 7, and the amplifying circuit 10 shown in FIG.
And the same configuration as the comparator 12.

According to the signal reading section having such a configuration, the light receiving surface is divided into a plurality of regions, and the divided regions are simultaneously scanned in parallel to determine the incident position of the light spot. This enables signal reading and is suitable for high-density and large-scale position detection elements.

Next, a second embodiment will be described with reference to FIGS. 8 is a plan view showing the structure of a part of the light receiving unit, FIG. 9 is a longitudinal sectional view taken along line L1-L1 in FIG. 8, and the same or corresponding parts as those in FIG. .

This embodiment is a further improvement of the previous embodiment shown in FIG. That is, although in the previous embodiment shown in FIG. 1 has a structure in which signal lines X ₁ to X _n is in direct contact with the semiconductor layer 3, an increase in the dark current according to the structure becomes a problem, the problem It is a further improvement.

8 and 9, the difference from the structures shown in FIGS. 1 to 3 is that the upper surface of the semiconductor layer 3 is covered with an insulating layer 4a such as a silicon oxide film and the signal lines X _{1 to} X _n. leave the form holes for discoidal portion contacts a portion corresponding to, then, by laminating the signal lines X ₁ to X _n, connected to the semiconductor layer 3 discoidal portion through the hole in the contact It has a structure to do. And next, while laminating the insulating layer 4b,
Signal lines Y ₁ to Y semiconductor layer 3 in the portion corresponding to the disk-shaped portion of the _m
After forming a hole 5 for contact with the signal lines Y _{1 to} Y _1
m are stacked so that the board-shaped portion is connected to the semiconductor layer 3 through the contact hole 5.

Therefore, the signal lines X _{1 to} X _n and the signal line Y
₁ to Y _m are connected together, is separated from the semiconductor layer 3 by an insulating layer, disk-shaped portion of the respective through holes for contact with the semiconductor layer 3.

The opening areas of the contact holes are equal to each other and have the same shape, so that the junction area between the disc-shaped portion and the semiconductor layer 3 is equal.

As described above, the signal lines X _{1 to} X _n and the signal line Y ₁
To Y _m is separated from the semiconductor layer 3 together, since a structure to be connected to the semiconductor layer 3 only in part, the generation of the dark current is greatly reduced, it is possible to improve the characteristics.

Next, a third embodiment will be described with reference to FIGS. 10 is a plan view showing the structure of a part of the light receiving unit, FIG. 11 is a longitudinal sectional view taken along a virtual line L2-L2 in FIG. 10, and FIG. 12 is a longitudinal sectional view taken along a virtual line L3-L3 in FIG. It is a figure and the part which is the same or equivalent to FIG. 1 is shown with the same code | symbol.

In FIGS. 10 to 12, a transparent electrode 2 and a semiconductor layer 3 such as amorphous silicon are sequentially laminated on an upper surface of a transparent substrate 1 made of a transparent glass flat plate or the like. Then, the insulating layer 4a, such as a silicon oxide film is laminated on the upper surface of the semiconductor layer 3, a contact part corresponding to the disk-shaped portion of the circular are provided at predetermined intervals in the signal lines X ₁ to X _n Are formed, and then the signal lines X ₁ -X
_n are stacked, and these board-shaped portions are connected to the semiconductor layer 3 through contact holes.

Next, the insulating layer 4b is laminated, and a portion corresponding to a circular disk-shaped portion provided at predetermined intervals on the signal lines Y _{1 to} Y _m is provided for contact with the semiconductor layer 3. After the holes 5 are formed, the signal lines Y _{1 to} Y _m are stacked, and these board-shaped portions are connected to the semiconductor layer 3 via the contact holes 5.

The opening areas of the contact holes are equal to each other and have the same shape, so that the junction area between the disc-shaped portion and the semiconductor layer 3 is equal.

According to the position detecting element having such a structure,
Four circular disk-shaped portions are arranged geometrically symmetrically around a point where the signal lines X _{1 to} X _n and Y _{1 to} Y _m intersect each other, and these disk-shaped portions and the transparent electrode are arranged. A light receiving diode is formed between the semiconductor layer 2 and the semiconductor layer 3. Then, when a light spot is incident near the intersection of the XY matrix, photocharge is generated. The amount of photocharge is collected by the light receiving diodes in the vertical direction near the intersection of the XY matrix. Since these diodes are connected to the X or Y electrodes, the photocharge is divided into two parts, each flowing to the external circuit through the X or Y electrodes. The incident position of the light spot can be detected two-dimensionally by detecting the addresses of the X and Y electrodes at which the current exceeds a certain threshold value by the signal reading unit shown in FIG. 6 or FIG.

Further, a fourth embodiment will be described with reference to FIG.

[0053] This example is one in which a circular disk-shaped portion of the signal line X ₁ to X _n and the signal lines Y ₁ to Y _m shown in FIGS. 10 to 12 were a rectangular board shape portion. The vertical cross-sectional structure along the imaginary line L2-L2 in FIG. 13 is the same as FIG. 11, and the vertical cross-sectional structure along the virtual line L3-L3 in FIG. 13 is the same as FIG. I have.

Incidentally, the opening area of each contact hole is equal and the same shape, so that the junction area between each disc-shaped portion and the semiconductor layer 3 is equal.

Further, in the embodiments shown in FIGS. 10 to 12 and 13, the case where a signal line having a circular disk-shaped portion and a rectangular disk-shaped portion is applied has been described, but the present invention is not limited to this. Absent. In short, the respective board-shaped portions are arranged and arranged in a geometrically symmetrical shape around a point where signal lines provided in a grid in the vertical and horizontal directions intersect, and the shape of the connection surface with the semiconductor layer 3 is further changed. Any shape may be used as long as they are equal.

According to these embodiments, unlike the conventional structure (see FIG. 16) in which semiconductor layers are stacked in a sandwich manner between signal line groups provided in a grid pattern, the semiconductor layer 3 These signal lines are arranged in a grid and stacked,
As shown in FIG. 1, FIG. 8, FIG. 10, and FIG. 13, by connecting to the semiconductor layer 3 so as to be geometrically symmetric near the intersection of these signal lines, a step is formed in the semiconductor layer 3. Does not occur.

Accordingly, breakage due to leakage current and breakdown is greatly reduced, and high density can be achieved.

Further, since the transparent electrode layer 2 is not formed by the etching process, it is sufficient to simply laminate the semiconductor layer 3 uniformly between the substrate 1 and the semiconductor layer 3. Therefore, surface contamination is greatly reduced, and dark current and the like are reduced. It is greatly reduced.

Although this embodiment detects the incident position of a light spot, the present invention can be applied not only to light but also to an incident position detecting element for ultraviolet rays, γ rays and other electromagnetic waves.

[0060]

As described above, according to the present invention,
Since the structure is such that the transparent electrode layer and the semiconductor layer are uniformly laminated, the step on the light receiving surface can be greatly reduced. As a result, AP
It is possible to realize a position detecting element such as a D film and a superlattice film which has a strong demand for surface flatness.

Further, since the transparent electrodes are laminated without being etched, a semiconductor layer can be laminated directly on a thin metal film, for example, as in a position detecting element for detecting the incidence of X-rays. Contamination can be significantly reduced.

Furthermore, a high-density and large-area position detecting element can be manufactured with high accuracy and stability, and the yield can be greatly improved.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a main part structure of an embodiment, partially cut away.

FIG. 2 is a longitudinal sectional view showing a structure of a section A in FIG. 1;

FIG. 3 is a longitudinal sectional view showing a structure of a section B in FIG. 1;

FIG. 4 is a longitudinal sectional view showing dimensions of each laminated portion of one embodiment.

FIG. 5 is a longitudinal sectional view further illustrating the dimensions of each laminated portion of the embodiment.

FIG. 6 is a circuit diagram illustrating a configuration of a signal reading unit.

FIG. 7 is a circuit diagram showing a configuration of another signal reading unit.

FIG. 8 is a plan view showing a main part of the second embodiment, partially cut away.

FIG. 9 is a longitudinal sectional view showing a sectional structure along a virtual line L1-L1 in FIG. 8;

FIG. 10 is a plan view showing a main part structure of the third embodiment, partially cut away.

11 is a longitudinal sectional view showing a sectional structure along a virtual line L2-L2 in FIG.

FIG. 12 is a longitudinal sectional view showing a sectional structure along a virtual line L3-L3 in FIG. 10;

FIG. 13 is a plan view showing a main part structure of a fourth embodiment, partially cut away.

FIG. 14 is an explanatory diagram for explaining a schematic structure of a conventional semiconductor position detecting element.

FIG. 15 is an explanatory diagram for explaining the principle of forming a conventional light receiving diode.

FIG. 16 is a partial sectional perspective view for explaining the structure of a conventional semiconductor position detecting element.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate, 2 ... Transparent electrode layer, 3 ... Semiconductor layer, 4, 4a,
4b ... insulating layer, holes for 5 ... contacts, X ₁ to X _n ... signal line, X ₁₁ to X _ni ... signal line, Y ₁ to Y _m ... signal line, Y ₁₁
... Y _mj ... signal lines, 6, 8 multiplexers, 7 ... X-direction shift registers, 9 ... Y-direction shift registers, 10, 1
DESCRIPTION OF SYMBOLS 1 ... Amplifier, 12, 13 ... Comparator, 14, 14a, 14
b: interface, 15: microprocessor, M
X _{1 to} MX _n , MY _{1 to} MY _m ... Multiplexer, SX
_{1 to} SX _n , SY _{1 to} SY _m ... shift register, AX ₁
.. AX _n , AY _{1 to} AY _m ... Amplifier, CX _{1 to} CX _n ,
CY ₁ ~CY _m ... comparator, EX, EY ... encoder.

Claims (3)

(57) [Claims] A transparent substrate having transparency, a transparent electrode layer laminated on the transparent substrate, a semiconductor layer laminated on the transparent electrode layer, and a first insulating layer on the semiconductor layer. A plurality of first signal lines connected to the semiconductor layer via contact holes formed at predetermined positions of the first insulating layer at predetermined intervals, and a plurality of first signal lines; The first signal line and the first signal line are interposed at right angles via a second insulating layer laminated on the upper surface of the first signal line and the first signal line, and the first signal line and the first signal line are arranged at predetermined intervals. And a plurality of second signal lines respectively connected to the semiconductor layer via contact holes formed at predetermined positions in the second insulating layer. 2. A portion where the first signal line is connected to the semiconductor layer via the contact hole and a portion where the second signal line is connected to the semiconductor layer via the contact hole. 2. The semiconductor position detecting element according to claim 1, wherein the portions are provided so as to be geometrically symmetric about a position where each of the first signal line and the second signal line intersect. . 3. A transparent substrate having transparency, a transparent electrode layer laminated on the transparent substrate, a semiconductor layer laminated on the transparent electrode layer, and a plurality of first layers laminated on the semiconductor layer. One signal line, and an insulating layer laminated on the upper surface of the semiconductor layer and the first signal line. And a plurality of second signal lines respectively connected to the semiconductor layer via contact holes formed at predetermined positions of the layer.