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JP3203346B2 - Electronic component manufacturing method - Google Patents
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JP3203346B2 - Electronic component manufacturing method - Google Patents

Electronic component manufacturing method

Info

Publication number
JP3203346B2
JP3203346B2 JP31224298A JP31224298A JP3203346B2 JP 3203346 B2 JP3203346 B2 JP 3203346B2 JP 31224298 A JP31224298 A JP 31224298A JP 31224298 A JP31224298 A JP 31224298A JP 3203346 B2 JP3203346 B2 JP 3203346B2
Authority
JP
Japan
Prior art keywords
sealing resin
electronic component
circuit board
gap
vacuum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP31224298A
Other languages
Japanese (ja)
Other versions
JP2000138244A (en
Inventor
敦史 奥野
紀隆 大山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyu Rec Co Ltd
Original Assignee
Sanyu Rec Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyu Rec Co Ltd filed Critical Sanyu Rec Co Ltd
Priority to JP31224298A priority Critical patent/JP3203346B2/en
Publication of JP2000138244A publication Critical patent/JP2000138244A/en
Application granted granted Critical
Publication of JP3203346B2 publication Critical patent/JP3203346B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、回路基板上に半導
体部品、例えばフリップチップ,BGA,CSP等を突
起状電極、例えばパンプ,導電性ボール(例えば半田ボ
ール)等を介し搭載するタイプの電子部品の製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device of the type in which a semiconductor component, for example, a flip chip, a BGA, a CSP, etc., is mounted on a circuit board via projecting electrodes, for example, a pump, a conductive ball (for example, a solder ball) or the like. The present invention relates to a method for manufacturing a component.

【0002】[0002]

【従来技術】上記電子部品の製造に際し、例えばフリッ
プチップの実装はフリップチップの電極と回路基板の電
極とをバンプを介し接続固定することにより行われ、接
続固定には半田や導電ペーストなどの接着接続手段が適
用されている。回路基板と該基板上に搭載されたフリッ
プチップとの間には、バンプに基づく隙間が生じ、この
隙間内には熱サイクル寿命の向上を目的として封止樹脂
が充填されている。
2. Description of the Related Art In the production of the above electronic components, for example, mounting of a flip chip is performed by connecting and fixing electrodes of the flip chip and electrodes of a circuit board via bumps. Connection means are applied. A gap based on the bump is formed between the circuit board and the flip chip mounted on the board, and the gap is filled with a sealing resin for the purpose of improving the thermal cycle life.

【0003】従来、この様な封止樹脂の充填は、図4
(イ)〜(ハ)に概略的に示すように、ディスペンサー
aを適用して回路基板bとフリップチップcとの間のバ
ンプdに基づく隙間eに所定量の液状の封止樹脂fを供
給し、該封止樹脂fを毛細管現象を利用して上記隙間e
内にしみ込ませることにより行われていた。この従来法
は次の通りの問題点があった。
Conventionally, such a filling of the sealing resin is performed as shown in FIG.
As schematically shown in (a) to (c), a predetermined amount of liquid sealing resin f is supplied to a gap e based on a bump d between a circuit board b and a flip chip c by applying a dispenser a. Then, the sealing resin f is separated from the gap e by utilizing the capillary phenomenon.
It was done by soaking inside. This conventional method has the following problems.

【0004】イ 隙間e内に封止樹脂fがしみ込んで完
全に充填されるまでにかなりの放置時間を要し、実装工
程中、最も時間のかかる工程になっており、生産効率の
低下の原因になっていた。特に最近、上記隙間eは、例
えば20〜100μmと相当に狭くなってきていること
に加えフリップチップcのサイズも大型化する傾向にあ
るために、より一層、時間のかかる工程になっている。
(A) It takes a considerable amount of time for the sealing resin f to penetrate into the gap e and completely fill the gap e, which is the most time-consuming step in the mounting process, and causes a reduction in production efficiency. Had become. In particular, recently, the gap e has become considerably narrower, for example, 20 to 100 μm, and the size of the flip chip c tends to be larger.

【0005】ロ 高密度化によりフリップチップc下面
のパンプ数が増加し、該パンプdは隙間e内への封止樹
脂fの流れ込みを妨げるので、どうしても封止樹脂f中
に多くの気泡が残存し、品質面の信頼性に乏しい。
(B) The number of pumps on the lower surface of the flip chip c increases due to the high density, and the pump d prevents the sealing resin f from flowing into the gap e, so that many bubbles remain in the sealing resin f. And poor quality reliability.

【0006】ハ 封止樹脂fの粘度は、これを低くしな
ければ充填されにくいために、通常100ポイズ以下に
制限される。そのために、封止樹脂f中の充填材の含有
率は、例えば60重量%以下に抑えなければならず、使
用できる樹脂や硬化剤の種類に制限を受け、信頼性の高
い樹脂配合が難しい。
(C) The viscosity of the sealing resin f is usually limited to 100 poise or less because the viscosity of the sealing resin f is difficult to fill unless the viscosity is reduced. For this reason, the content of the filler in the sealing resin f must be suppressed to, for example, 60% by weight or less, and the types of resins and curing agents that can be used are limited, and it is difficult to mix highly reliable resins.

【0007】[0007]

【発明が解決しようとする課題】本発明者等は、上記隙
間への封止樹脂の供給を孔版印刷手段を適用して真空下
で行い且つ供給封止樹脂の隙間内への充填を真空による
吸引作用を利用して強制的に行うようにすれば、上記従
来法の問題点を解消できるのではないかとの着想のもと
に、上記隙間内への封止樹脂の充填に真空孔版印刷装置
を適用することを試みたところ、予想通り好結果が得ら
れた。ところが、真空吸引による強制充填に拘わらず、
樹脂充填層の中央領域にボイドが残存し未充填部が発生
し、特にこの傾向は、フリップチップのサイズが大きく
なりまた隙間が狭くなるほど顕著となり、品質面の信頼
性に一抹の不安があることが判明した。因みに、ボイド
ひいては未充填部の発生は、真空下での操作と言えども
僅かながら空気が残存していることに起因するものと思
われ、かかる観点から言えば、中,高真空下での操作で
あれば上記問題点はなくなるかもしれないが、中,高真
空下での操作を可能とするためには、装置が耐圧仕様と
なり設備費が膨大となるばかりでなく、真空復帰に時間
がかかり生産性を低下させる原因にもなり、好ましい解
決策でない。
SUMMARY OF THE INVENTION The present inventors have applied a stencil printing means to supply the sealing resin to the gap under vacuum, and filled the gap with the supply sealing resin by vacuum. The vacuum stencil printing machine is used to fill the gap with the sealing resin, based on the idea that the problem of the above-mentioned conventional method may be solved if the suction is performed forcibly. Attempts to apply were successful as expected. However, despite the forced filling by vacuum suction,
Voids remain in the central region of the resin-filled layer, causing unfilled portions.This tendency becomes more pronounced as the size of the flip chip becomes larger and the gap becomes narrower. There was found. Incidentally, it is considered that the voids and the formation of the unfilled portion are caused by the presence of a small amount of air even though the operation is performed under vacuum, and from this viewpoint, the operation under medium and high vacuum is considered. If this is the case, the above problem may be eliminated. However, in order to enable operation under medium or high vacuum, the equipment must be pressure-resistant and not only will the equipment cost be enormous, but it will take time to return to vacuum. This is also not a preferable solution because it causes a decrease in productivity.

【0008】本発明は、一般仕様(低真空)の真空孔版
印刷装置を適用して、高生産性のもとに高品質,高性能
の製品を製造することができる、電子部品の製造方法を
提供することを目的としてなされたものである。
[0008] The present invention provides a method of manufacturing an electronic component which can manufacture a high quality and high performance product under high productivity by applying a vacuum stencil printing apparatus having a general specification (low vacuum). It was made for the purpose of providing.

【0009】[0009]

【課題を解決するための手段】本発明は、回路基板上に
半導体部品を突起状の接続電極を介し搭載した後に、上
記基板と半導体部品との間の突起状接続電極に基づく隙
間内に封止樹脂を充填する電子部品の製造方法に於い
て、回路基板及び半導体部品の少なくとも一方が、搭載
領域の略々中央部に上記隙間に臨み且つ真空下での孔版
印刷で液状の封止樹脂中に残存する空気を収容し得る大
きさに設定された有底凹所を備え、回路基板上に搭載さ
れた半導体部品の周側部の全周に孔版印刷手段を適用し
且つ真空下で上記封止樹脂を供給し、該封止樹脂により
上記隙間を外気雰囲気から遮断し、次に真空から略々大
気圧に戻すことにより、上記封止樹脂を基準に内外に圧
力差を発生させ、この圧力差により、上記隙間内に上記
封止樹脂を強制的に充填する一方、僅かに残存する上記
空気を上記封止樹脂により上記搭載領域の略々中央部に
追いやって上記有底凹所内に封じ込めることを特徴とす
る電子部品の製造方法に係る。
According to the present invention, after a semiconductor component is mounted on a circuit board via a protruding connection electrode, the semiconductor component is sealed in a gap defined by the protruding connection electrode between the substrate and the semiconductor component. in the method for manufacturing the electronic component of filling the sealing resin, at least one circuit board and semiconductor components, stencil in and under vacuum see extraordinary in the gap in a substantially central portion of the mounting area
Large enough to contain air remaining in the liquid sealing resin during printing
Comprising a bottom recess which is set to is come, supplies the sealing resin all around by applying the stencil printing means and under a vacuum of peripheral sides of the semiconductor components mounted on a circuit board, encapsulating By shutting off the gap from the outside air atmosphere with a sealing resin, and then returning from vacuum to substantially atmospheric pressure, a pressure difference is generated between the inside and the outside with respect to the sealing resin. while forcibly filling the sealing resin, the <br/> air slightly remaining in a substantially central portion of the mounting region by the sealing resin
The present invention relates to a method for manufacturing an electronic component, characterized in that the electronic component is sealed in the bottomed recess.

【0010】本発明において、半導体部品としては、フ
リップチップその他BGA,CSP等のような半導体パ
ッケージ部品を例示でき、また突起状接続電極としてパ
ンプその他半田ボールなどの導電性ボールを例示でき
る。
In the present invention, examples of the semiconductor component include flip-chip and other semiconductor package components such as BGA and CSP, and examples of the protruding connection electrodes include pumps and other conductive balls such as solder balls.

【0011】[0011]

【発明の実施の形態】以下に、本発明の一実施形態を添
付図面に基づき説明する。本実施形態によれば、半導体
部品としてフリップチップ、突起状接続電極としてバン
プが適用されている。図1(イ)〜(ニ)は、本発明製
造方法の工程を概略的に示す説明図であり、図1(イ)
は電子部品本体1の構成をを示し、該電子部品本体1
は、回路基板2と該基板2上にバンプ3を介し接続固定
状態に搭載されたフリップチップ4を備え、回路基板2
とフリップチップ4との間には、バンプ3に基づく隙間
5が生じている。回路基板2はフリップチップ4の搭載
領域の中央部乃至その付近に、有底凹所6を備えてる。
電子部品本体1の構成は、有底凹所6を備えている以外
は、従来品と実質的に異なるところがない。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. According to the present embodiment, a flip chip is applied as a semiconductor component, and a bump is applied as a protruding connection electrode. FIGS. 1A to 1D are explanatory views schematically showing the steps of the production method of the present invention.
Shows the configuration of the electronic component body 1;
Comprises a circuit board 2 and a flip chip 4 mounted on the board 2 via bumps 3 in a connected and fixed state.
A gap 5 based on the bump 3 is generated between the flip chip 4 and the flip chip 4. The circuit board 2 has a bottomed recess 6 at or near the center of the mounting area of the flip chip 4.
The configuration of the electronic component body 1 is substantially the same as that of the conventional product except that the electronic component main body 1 includes the bottomed recess 6.

【0012】図1(ロ)は、電子部品本体1に搭載のフ
リップチップ4に対する液状の封止樹脂7の供給工程の
状況を示している。上記封止樹脂7の供給には、孔版印
刷手段が適用され、孔版8上に供給された封止樹脂7
は、スキージ9の作動をして、孔版通孔10と該通孔1
0内収納のフリップチップ4との間の周隙11内に押し
込み充填される。孔版印刷手段による封止樹脂7の供給
は、真空発生装置の作動をして真空雰囲気に保持された
ケーシング(図示せず)内で行われ、このような封止樹
脂7の孔版印刷には、例えば市販の真空孔版印刷装置を
適用できる。
FIG. 1B shows the state of the process of supplying the liquid sealing resin 7 to the flip chip 4 mounted on the electronic component body 1. A stencil printing unit is applied to supply the sealing resin 7, and the sealing resin 7 supplied on the stencil 8 is supplied.
Operates the squeegee 9 to make the stencil through holes 10 and the through holes 1
It is pushed into the space 11 between the flip chip 4 and the flip chip 4 stored therein. The supply of the sealing resin 7 by the stencil printing means is performed in a casing (not shown) held in a vacuum atmosphere by operating a vacuum generator. For example, a commercially available vacuum stencil printing machine can be applied.

【0013】図1(ハ)は、上記周隙11内への封止樹
脂7の押し込み充填後、孔版8を離型した後の状況を示
し、この孔版8の離型操作は、真空雰囲気を保持した状
態のまま、若しくは真空雰囲気を解除した後に行われ
る。供給された封止樹脂7はフリップチップ4の全周側
部を層状に取り囲み、回路基板2とフリップチップ4間
の隙間5を外気から遮断している。
FIG. 1 (c) shows a situation after the sealing resin 7 has been pressed into the above-mentioned gap 11 and filled, and then the stencil 8 has been released. This is performed while the state is maintained or after the vacuum atmosphere is released. The supplied sealing resin 7 surrounds the entire periphery of the flip chip 4 in a layered manner, and blocks the gap 5 between the circuit board 2 and the flip chip 4 from the outside air.

【0014】封止樹脂7の孔版印刷時に於ける真空度
は、広い範囲から選択できるが、中,高真空度の保持に
は耐圧仕様の真空孔版印刷装置の適用が必要になり、設
備費面の負担が大きくなることに加え真空復帰に時間が
かかり、生産性を低下させる原因にもなるので、例えば
10torr以下の低真空で充分であり、通常は10〜0.
1torr、好ましくは2〜0.1torr程度の低真空に保
持される。因みに真空度が10torrを超えると、樹脂中
に気泡を残存させる恐れがあるので好ましくない。
The degree of vacuum at the time of stencil printing of the sealing resin 7 can be selected from a wide range, but it is necessary to apply a pressure-resistant vacuum stencil printing apparatus to maintain a medium or high vacuum degree. In addition to the increased load, it takes a long time to return to a vacuum, which may cause a decrease in productivity. For example, a low vacuum of 10 torr or less is sufficient.
It is maintained at a low vacuum of 1 torr, preferably about 2 to 0.1 torr. Incidentally, if the degree of vacuum exceeds 10 torr, it is not preferable because bubbles may remain in the resin.

【0015】図1(ニ)は、真空雰囲気から解放した後
の状況を示している。真空雰囲気からの解放により、フ
リップチップ4の周囲を囲繞している封止樹脂7を基準
に内外で圧力差が発生し、この圧力差により封止樹脂7
は回路基板2とフリップチップ4との間の隙間5内に強
制的に従って瞬時に充填される。上記隙間5内に強制充
填された封止樹脂7の一部は有底凹所6内に浸入して行
き、この浸入につれ残留空気を有底凹所6内に追いやっ
て行き、該凹所6が空気溜まり12を収納する働きをす
る。このように有底凹所6が空気溜まり12を収納する
役目を果たすので、たとえ低真空下での操作であって
も、隙間5内充填の封止樹脂7中にボイドひいては未充
填部が残留するということがなくなる。
FIG. 1 (d) shows the situation after release from the vacuum atmosphere. By releasing from the vacuum atmosphere, a pressure difference is generated between the inside and outside of the sealing resin 7 surrounding the periphery of the flip chip 4.
Is forcibly and instantaneously filled in the gap 5 between the circuit board 2 and the flip chip 4. A part of the sealing resin 7 forcibly filled in the gap 5 intrudes into the bottomed recess 6, and pursues residual air into the bottomed recess 6 with this intrusion. Serve to house the air pocket 12. Since the bottomed recess 6 serves to store the air pool 12 in this manner, even if the operation is performed under a low vacuum, voids and unfilled portions remain in the sealing resin 7 filled in the gap 5. You will not have to.

【0016】因みに、回路基板2面に有底凹所6を形成
しない場合には、図3に示すように、隙間5内に充填さ
れた封止樹脂7中にボイドひいては未充填部12が残留
する。これは真空雰囲気下での孔版印刷といえども僅か
の空気は残っており、この残留空気の逃げ場がないため
に中央部に集まり空気溜まりとなり、ボイドひいては未
充填部を発生させるものと思われる。
When the bottomed recess 6 is not formed on the surface of the circuit board 2, as shown in FIG. 3, voids in the sealing resin 7 filled in the gaps 5 and unfilled portions 12 remain. I do. This is because even in stencil printing in a vacuum atmosphere, a small amount of air remains, and since there is no escape for the residual air, the air gathers in the center to form an air pocket, and it is considered that voids and unfilled portions are generated.

【0017】本発明者らの実験によれば、隙間50μ
m、フリップチップ寸法15mm×15mmの場合、有底凹
所を設けない場合には、真空度5torrの場合、直径0.
8〜1.0mmのボイドひいては未充填部が発生し、また
真空度1torrの場合、直径0.4〜0.6mmのボイドひ
いては未充填部の発生がみられたが、本発明のように有
底凹所6を形成しておくと、残留空気が該凹所6内に収
納され、その結果隙間5内充填の封止樹脂7中には、ボ
イドひいては未充填部が残留することがなくなる。
According to the experiments of the present inventors, the gap 50 μm
m, flip chip dimensions 15 mm x 15 mm, no bottomed recess, vacuum 5 torr, diameter 0.
Although voids of 8 to 1.0 mm and unfilled portions were generated, and voids of 0.4 to 0.6 mm in diameter and unfilled portions were observed when the degree of vacuum was 1 torr, as shown in the present invention. When the bottom recess 6 is formed, residual air is stored in the recess 6, and as a result, voids and, therefore, unfilled portions do not remain in the sealing resin 7 filled in the gap 5.

【0018】本発明に於いては、孔版印刷手段による液
状封止樹脂の供給を図1(ロ)、(ニ)に示すように、
フリップチップ4の上面上にも行うようにすれば、図1
(ハ)に示すように、封止樹脂によるオーバーコートを
同時に施すことができる。
According to the present invention, the supply of the liquid sealing resin by the stencil printing means is as shown in FIGS.
If it is performed also on the upper surface of the flip chip 4, FIG.
As shown in (c), overcoating with a sealing resin can be simultaneously applied.

【0019】封止樹脂によるオーバーコートは必ずしも
必要でなく、図2(イ)〜(ハ)に示すように、隙間内
5への封止樹脂7の充填だけを行うようにしてもよい。
図2に於いて、8aはフリップチップ4の上面を覆う孔
版8の天蓋部である。図1に用いるオーバーコート兼用
型の孔版8には、このような天蓋部8aは備えられてい
ない。
The overcoating with the sealing resin is not always necessary, and only the filling of the sealing resin 7 into the gap 5 may be performed as shown in FIGS.
In FIG. 2, reference numeral 8 a denotes a canopy of the stencil 8 that covers the upper surface of the flip chip 4. The overcoat / stencil 8 used in FIG. 1 is not provided with such a canopy portion 8a.

【0020】図示の実施形態では、半導体部品としてフ
リップチップ4、また突起状の接続電極としてバンプ3
を用いた場合が示されているが、半導体部品としてBG
AやCSP等のようなパッケージ部品が用いられ、また
突起状接続電極として半田ボールなどのような導電性ボ
ールが使用された場合であっても、図示の実施形態と同
様の作用,効果が得られる。
In the illustrated embodiment, a flip chip 4 is used as a semiconductor component, and a bump 3 is used as a protruding connection electrode.
Is shown, but BG is used as a semiconductor component.
Even when a package component such as A or CSP is used and a conductive ball such as a solder ball is used as the protruding connection electrode, the same operation and effect as those of the illustrated embodiment can be obtained. Can be

【0021】本発明に於いて、有底凹所6は、回路基板
2及びフリップチップ4(半導体部品)の少なくとも一
方に形成されていればよいが、加工面や回路への悪影響
等を考慮すると、有底凹所6の形成は回路基板2側だけ
で充分である。
In the present invention, the bottomed recess 6 may be formed on at least one of the circuit board 2 and the flip chip 4 (semiconductor component). The formation of the bottomed recess 6 is sufficient only on the circuit board 2 side.

【0022】有底凹所6の寸法は、回路(図示せず)の
形成に支障がない範囲で広い範囲から選択できるが、直
径は最大でも3mm程度あれば充分であり、通常は0.1
〜3mm程度の範囲内から適宜選択決定される。因みに直
径が0.1mmに達しない場合には、残留空気の収納スペ
ースが不十分となり好ましくない。また深さは、残留空
気を収納するために少なくとも0.01mmは必要であ
り、回路基板2の場合、最大で回路基板2の厚みに略々
相当する深さにすることができる。凹所6が基板2を貫
通してしまうと、差圧による封止樹脂の強制充填に悪影
響を及ぼす恐れがあるので、基板2を貫通する場合に
は、テープ等を用いて凹所6に底を形成し、凹所6の底
側を密閉しておくことが必要である。凹所6を深くし、
該凹所6内にも封止樹脂を充填することにより、樹脂封
止の信頼性をより一層向上できる。
The size of the bottomed recess 6 can be selected from a wide range as long as it does not hinder the formation of a circuit (not shown), but a diameter of at most about 3 mm is sufficient, and usually 0.1 mm.
It is appropriately selected and determined from a range of about 3 mm. Incidentally, if the diameter does not reach 0.1 mm, the storage space for the residual air is insufficient, which is not preferable. Further, the depth needs to be at least 0.01 mm in order to store the residual air, and in the case of the circuit board 2, it can be set to a depth substantially corresponding to the thickness of the circuit board 2 at the maximum. If the recess 6 penetrates the substrate 2, there is a possibility that the sealing resin is forcibly filled due to the pressure difference. It is necessary that the bottom side of the recess 6 be sealed. Deepen recess 6
By filling the recess 6 with the sealing resin, the reliability of the resin sealing can be further improved.

【0023】液状の封止樹脂の粘度は、差圧による強制
充填であるので10ポイズ程度の低粘度のものから1
0,000ポイズ程度の高粘度のものまで使用可能であ
り、信頼性の高い樹脂配合が可能になる。2000ポイ
ズを超える封止樹脂を用いる場合には、30〜80℃に
加熱し、粘度を下げて樹脂封止操作を行うことが好まし
い。
The viscosity of the liquid encapsulating resin may be from a low viscosity of about 10 poise to 1
It is possible to use a resin having a high viscosity of about 0000 poise, and a highly reliable resin compounding becomes possible. When using a sealing resin exceeding 2,000 poise, it is preferable to heat to 30 to 80 ° C. to lower the viscosity and perform the resin sealing operation.

【0024】[0024]

【発明の効果】本発明によれば、次の効果が得られる。According to the present invention, the following effects can be obtained.

【0025】イ 真空下で印刷封止を行った後、大気圧
に戻すことにより、瞬時に樹脂封止を行うことができ
る。
(B) After printing and sealing under vacuum, by returning to atmospheric pressure, resin sealing can be performed instantaneously.

【0026】ロ 真空下で印刷封止を行うことに加え、
残留空気の収納用の有底凹所を形成したので、半導体部
品(フリップチップ,BGA,CSPなど)と回路基板
との間の隙間をボイドを発生させること無しに樹脂封止
することが可能になる。
(B) In addition to performing printing and sealing under vacuum,
Since a bottomed recess for storing residual air is formed, the gap between the semiconductor component (flip chip, BGA, CSP, etc.) and the circuit board can be sealed with resin without generating voids. Become.

【0027】ハ 圧力差を利用した強制充填であるの
で、封止樹脂の粘度は10000ポイズ程度まで使用可
能であり、信頼性の高い樹脂配合が可能になり、効果ロ
と相俟って信頼性の高い樹脂封止が可能になる。
(C) Because of the forced filling using the pressure difference, the viscosity of the sealing resin can be used up to about 10,000 poise, and a highly reliable resin compounding becomes possible. Resin encapsulation can be achieved.

【0028】ニ 10torr以下の低真空での実施が可能
なので、例えば一般仕様の真空孔版印刷装置の適用が可
能であり、設備費面の負担を低減できる。
(D) Since the operation can be performed in a low vacuum of 10 torr or less, for example, a vacuum stencil printing apparatus having a general specification can be applied, and the burden on equipment costs can be reduced.

【0029】ホ 低真空下での実施が可能であるので、
真空復帰を速やかに行うことができ、効果イと相俟って
生産性を向上できる。
(E) Since operation under a low vacuum is possible,
The vacuum recovery can be performed promptly, and the productivity can be improved in combination with the effect (1).

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の製造方法を工程順に示す概略説明図で
ある。
FIG. 1 is a schematic explanatory view showing a manufacturing method of the present invention in the order of steps.

【図2】本発明製造方法の変更例を工程順に示す概略説
明図である。
FIG. 2 is a schematic explanatory view showing a modified example of the manufacturing method of the present invention in the order of steps.

【図3】比較例の概略説明図である。FIG. 3 is a schematic explanatory view of a comparative example.

【図4】従来法の概略説明図である。FIG. 4 is a schematic explanatory view of a conventional method.

【符号の説明】[Explanation of symbols]

1 電子部品本体 2 回路基板 3 パンプ 4 フリップチップ 5 隙間 6 有底凹所 7 封止樹脂 8 孔版 9 スキージ 10 孔版通孔 11 周隙 12 空気溜まり REFERENCE SIGNS LIST 1 electronic component main body 2 circuit board 3 pump 4 flip chip 5 gap 6 recess with bottom 7 sealing resin 8 stencil 9 squeegee 10 stencil through hole 11 peripheral gap 12 air pocket

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 21/56,21/60,23/28 ────────────────────────────────────────────────── ─── Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 21 / 56,21 / 60,23 / 28

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 回路基板上に半導体部品を突起状の接続
電極を介し搭載した後に、上記基板と半導体部品との間
の突起状接続電極に基づく隙間内に封止樹脂を充填する
電子部品の製造方法に於いて、回路基板及び半導体部品
の少なくとも一方が、搭載領域の略々中央部に上記隙間
に臨み且つ真空下での孔版印刷で液状の封止樹脂中に残
存する空気を収容し得る大きさに設定された有底凹所を
備え、回路基板上に搭載された半導体部品の周側部の全
周に孔版印刷手段を適用し且つ真空下で上記封止樹脂を
供給し、該封止樹脂により上記隙間を外気雰囲気から遮
断し、次に真空から略々大気圧に戻すことにより、上記
封止樹脂を基準に内外に圧力差を発生させ、この圧力差
により、上記隙間内に上記封止樹脂を強制的に充填する
一方、僅かに残存する上記空気を上記封止樹脂により上
記搭載領域の略々中央部に追いやって上記有底凹所内に
封じ込めることを特徴とする電子部品の製造方法。
An electronic component for mounting a semiconductor component on a circuit board via a protruding connection electrode and then filling a sealing resin in a gap defined by the protruding connection electrode between the substrate and the semiconductor component. in the production method, at least one circuit board and semiconductor components, remaining in the liquid sealing resin in stencil printing in and under vacuum see extraordinary in the gap in a substantially central portion of the mounting area
Lies with a bottomed recess which is set to a size capable of accommodating of the air, the sealing resin all around and under vacuum to apply the stencil printing means to the peripheral side portion of the semiconductor components mounted on the circuit board Is supplied, the gap is shut off from the outside air atmosphere by the sealing resin, and then the pressure is returned to substantially the atmospheric pressure from the vacuum, thereby generating a pressure difference between the inside and the outside with respect to the sealing resin. , while forcibly filling the sealing resin into the gap, over the air slightly remaining by the sealing resin
A method for manufacturing an electronic component, characterized in that the electronic component is driven into a substantially central portion of the mounting area and is sealed in the recess having the bottom.
【請求項2】回路基板は有底凹所有り、半導体部品は有
底凹所無しであり、半導体部品はフリップチップ、突起
状接続電極はバンプであることを特徴とする請求項1記
載の製造方法。
2. The manufacturing method according to claim 1, wherein the circuit board has a bottomed recess, the semiconductor component has no bottomed recess, the semiconductor component is a flip chip, and the protruding connection electrode is a bump. Method.
【請求項3】回路基板は有底凹所有り、半導体部品は有
底凹所無しであり、半導体部品はBGAやCSP等のよ
うなパッケージ部品、突起状接続電極は導電性ボールで
あることを特徴とする請求項1記載の製造方法。
3. The circuit board has a bottomed recess, the semiconductor component has no bottomed recess, the semiconductor component is a package component such as BGA or CSP, and the protruding connection electrode is a conductive ball. The method according to claim 1, wherein:
【請求項4】孔版印刷手段適用による封止樹脂の供給
を、0.1〜10torr程度の低真空下で行うことを特徴
とする請求項1〜3のいずれかに記載の電子部品の製造
方法。
4. The method for manufacturing an electronic component according to claim 1, wherein the supply of the sealing resin by applying the stencil printing means is performed under a low vacuum of about 0.1 to 10 torr. .
【請求項5】液状の封止樹脂の粘度が10〜10,00
0ポイズであることを特徴とする請求項1〜4のいずれ
かに記載の電子部品の製造方法。
5. A liquid sealing resin having a viscosity of 10 to 10,000.
The method for producing an electronic component according to claim 1, wherein the electronic component has zero poise.
【請求項6】有底凹所の寸法が、直径が0.1〜3.0
mm、深さが少なくとも0.01mmであることを特徴とす
る請求項1〜5のいずれかに記載の電子部品の製造方
法。
6. The size of the recessed bottom having a diameter of 0.1 to 3.0.
The method for manufacturing an electronic component according to claim 1, wherein the thickness is at least 0.01 mm.
JP31224298A 1998-11-02 1998-11-02 Electronic component manufacturing method Expired - Lifetime JP3203346B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31224298A JP3203346B2 (en) 1998-11-02 1998-11-02 Electronic component manufacturing method

Publications (2)

Publication Number Publication Date
JP2000138244A JP2000138244A (en) 2000-05-16
JP3203346B2 true JP3203346B2 (en) 2001-08-27

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ID=18026887

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Application Number Title Priority Date Filing Date
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Country Link
JP (1) JP3203346B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6513236B2 (en) * 2000-02-18 2003-02-04 Matsushita Electric Industrial Co., Ltd. Method of manufacturing bump-component mounted body and device for manufacturing the same
JP5335286B2 (en) * 2008-05-29 2013-11-06 キヤノン株式会社 Semiconductor device manufacturing method and semiconductor device

Also Published As

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JP2000138244A (en) 2000-05-16

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