JP3223387B2 - Field effect transistor with current detection function - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transistor having a current detection function.

[0002]

2. Description of the Related Art In general, a power transistor used for high-power switching or high-power amplification, due to the nature of its application, when an overcurrent exceeding a rated value flows,
A function is provided for protecting the connected load and the transistor itself. As one of such power transistors, a MOS type field effect transistor (MOS type F) having a current detection function of a single gate multi source structure is used.
ET) is known.

A MOS transistor with a current detection function having a single-gate multi-source structure has a main transistor portion for flowing a main current substantially equal to a current flowing to a connected load and a sense transistor portion for detecting an overcurrent. Are provided. The main transistor section usually comprises a plurality of MOS type FET cells provided in parallel, and the sense transistor section usually comprises one MOS type F cell.
Consists of ET cells. The ratio of the main current flowing through the main transistor section to the detection current flowing through the sense transistor section is determined by the MOS type F provided in the main transistor section.
Number of ET cells and MOS FET in sense transistor section
Matches the ratio of the number of cells. Therefore, by measuring the magnitude of the detection current flowing through the sense transistor,
The magnitude of the main current or the magnitude of the current flowing to the load can be detected.

FIG. 7 shows a conventional single-channel, multi-source N-channel MOSFET 11 with a current detection function. In the MOSFET 11 having a current detection function having a single-gate multi-source structure shown in FIG.
And the gate G are common, and only the source is provided independently for each of the transistor units 12 and 13. Generally, the common drain D is connected to a load, and the common gate G is connected to an output of a transistor driving circuit. The source S of the main transistor section 12 is directly grounded, and the source S _S of the sense transistor section 13 is connected to a sense resistor R
_Grounded via _S.

Next, the single gate multi-saw having the above structure
The operation of the N-channel MOS type FET having the semiconductor structure will be described.
First, a transistor (not shown) is connected to the gate G of the MOSFET 11.
A positive gate voltage is applied from a transistor drive circuit. this
The positive gate voltage is equal to the threshold V of the MOSFET 11 _THAbove
If there is, the MOSFET 11 is turned on and the drain
Current I begins to flow through a load (not shown) connected to
You. At this time, the main power flowing through the main transistor section 12
Style I_DAnd the detection current flowing through the sense transistor section 13
I_dIs the ratio of the MOS type F provided in each transistor section.
Calculate in advance as it matches the ratio of ET cells
Can be. Therefore, the sense resistor R_SVoltage drop due to
That is, the sense voltage V_SBy measuring the main current
I_DAlternatively, it is necessary to detect the magnitude of the current I flowing through the load.
Can be. By the way, overcurrent detection and protection operation are as follows.
It is performed as follows. That is, load or MOS type F
Sense resistor R when the maximum allowable current of ET11 flows_STo
Reference voltage V which is the voltage drop_REFAnd sense electric
Pressure V_SCompare with If for some reason the load is short
As a result, the maximum allowable current
When an overcurrent exceeding
Voltage V_SIs the reference voltage V_REFGreater than
And it is determined that an overcurrent has occurred. Tiger
The transistor drive circuit determines the MOS type F according to the determination result.
MOS type FE of both transistor sections 12 and 13 of ET11
The gate voltage applied to the gate of the T cell is a threshold voltage V_THThan
To reduce the size of both transistors of the MOSFET 11
The MOS type FET cell is turned off. By this
If an overcurrent flows through the load or the MOSFET 11
Immediately, the main transistor portion of the MOSFET 11
12 and all the MOS transistors of the sense transistor section 13
ET cell is turned off and load or MOS FET 11
Is protected from overcurrent.

[0006]

However, FIG.
Conventional single gate multi-source current detection function
The attached MOS type FET 11 is
The gate and the gate of the sense transistor section 13 are common.
Therefore, it is added to the gate G of these two transistor parts.
Potentials are always equal. On the other hand, each transistor section 1
The sources of 2, 13 are independent and the main transistor
While the source S of the section 12 is directly grounded,
Source S of the transistor section 13_SIs the sense resistor R_S
Is grounded through. Therefore, the main transistor
Gate-source voltage V _GSIs a sense trance
The gate-source voltage V of the transistor section 13_gsResistance R than
_SAnd the voltage drop is higher.

The main current I _D flowing through the main transistor section 12 and the detection current I flowing through the sense transistor section 13
_Since the magnitude of _d depends on the gate-source voltages V _GS and V _gs of the respective transistor sections, thus, V _GS
And in the case where the V _gs does not match, it is impossible to accurately detect the main current I _D from the detection current I _d.
That is, the relationship between the sense voltage V _S and the main current I _D corresponding to the voltage drop at the sense resistor R _S of the detection current I _d becomes nonlinear as shown in FIG. 8, the current detecting accuracy is the main current I _D Decrease as the value increases. Also,
This non-linearity becomes more remarkable as the value of the sense resistor R _S increases when the drain-source voltage of the MOSFET 11 is constant. Therefore, the sense resistor R _S
While reducing the value of the voltage drop by reducing the value possible, Thus the voltage drop is one sense voltage V _S that used for overcurrent detection, the sense voltage when an extremely small value measurement accuracy of V _S is lowered by the influence of noise or the like. In other words, highly accurate current detection cannot be obtained. As described above, the conventional single-gate multi-source MOS FET 11 has a limit in improving the accuracy of current detection for overcurrent protection.

An object of the present invention is to solve such a problem, and an object of the present invention is to provide a field effect transistor with a current detection function capable of detecting a current with high accuracy for overcurrent protection. .

[0009]

A transistor with a current detecting function according to the present invention includes a main transistor section for flowing a main current and a sense transistor section for detecting a current flowing in the main transistor section. A transistor with a current detection function in which the drain of the transistor portion is common, the sources of the main transistor portion and the sense transistor portion are independent of each other, and the gates of the main transistor portion and the sense transistor portion are independent of each other. The gate terminal of the main transistor section and the gate terminal of the sense transistor section are electrically independent of each other.

[0010]

In the transistor with a current detection function according to the present invention, the gate terminal connected to each transistor cell (FET cell) in the main transistor portion and the gate terminal connected to the FET cell in the sense transistor portion are electrically independent from each other. Therefore, the gate of the main transistor portion and the gate of the sense transistor portion can be driven independently.

The main transistor section and the sense transistor section are composed of FET cells having the same characteristics, and the ratio of the number of FET cells in the main transistor section and the sense transistor section is, for example, n: 1 (n≫1). It is provided so that it becomes. Since these multiple FET cells are connected in parallel in each transistor section,
Since each FET cell is manufactured by the same manufacturing process and the size of each FET cell and the pitch between each FET cell are minute, each FET
When an equal gate-source voltage is applied to the cell, each FE
The distribution of the current flowing through the T cell is made uniform, and the value of the current flowing through each FET cell becomes almost equal.

Therefore, by controlling the voltage between the gate and the source of the FET cell of each transistor section to be always equal, the ratio of the magnitude of the current flowing through the main transistor section to the magnitude of the current flowing through the sense transistor section becomes: The ratio becomes the same as the ratio of the number of FET cells between the two transistor portions.

Therefore, the magnitude of the main current flowing through the main transistor portion and the current flowing through the load can be accurately detected with extremely high accuracy by measuring the current flowing through the sense transistor portion.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a circuit configuration of an N-channel MOS FET 1 with a current detection function having a multi-gate multi-source structure according to an embodiment of the present invention.

The MOS FET 1 includes a main transistor section 2 for flowing a main current and a sense transistor section 3 for flowing a detection current, and the two transistor sections have a common drain D (hereinafter referred to as a "drain D"). The drain is called a common drain). Main transistor part 2
, The gate G _S of the sense transistor unit 3 and the sources S and S _S of the respective transistor units 1 and 2 are provided independently of each other. Further, a sense resistor R _S is provided between the sources S and S _S.

FIG. 2 is a partial sectional view showing the structure of an N-channel MOS FET 20 having the circuit structure shown in FIG. In the figure, the N ⁺ type substrate is an N ⁺ type drain region 21 common to the main transistor section 2 and the sense transistor section 3. An N ⁻ -type epitaxial layer 22 is formed on the upper surface of the N ⁺ -type drain region 21 by epitaxial growth, and a P-type channel region 23 is selectively formed on the surface of the N ⁺ -type drain region 21 at a predetermined interval by, for example, thermal diffusion or ion implantation. Many are formed. On the surface side in each P-type channel region 23,
An N ⁺ type source region 24 is formed. This N ⁺ type source region 24 is formed, for example, as follows.

That is, first, the N ⁻ type epitaxial layer 2
2, a silicon oxide film 25 is uniformly formed on the surface of the P-type channel region 23 with a predetermined thickness, and the oxide film 25 on a part of the upper surface of the P-type channel region 23 is selectively removed. Then, using the patterned oxide film 25 as a mask, an N ⁺ -type source region 24 is formed by thermal diffusion. Furthermore, the adjacent P
Above and between the mold channel regions 23, 23,
Gate oxide film 25 is formed. A gate electrode made of, for example, polysilicon is provided on the upper surface of these gate oxide films 25. Here, reference numeral 26 is given to the gate electrode of the main transistor portion 2 and reference numeral 26 'is given to the gate electrode of the sense transistor portion 3.

The gate oxide film 25 and the gate electrode 2
6 (or the gate electrode 26 ') is a PSG (Phospho
It is covered by an insulating film 27 made of, for example, Silicate Glass. Further, each of the transistor sections 2 and 3 has Al-
The source electrodes 28 and 28 ′ made of Si or the like are connected to all the N ⁺ type source regions 24 of the respective transistor portions 2 and 3.
And is formed by being electrically connected to. These source electrodes 28 and 28 'are electrically separated from the gate electrodes 26 and 26' by the insulating film 27 such as PSG. A drain electrode 29 is formed on the lower surface of the N ⁺ type drain region 21.
Is provided. Further, a number of gate electrodes 26 of the main transistor section 2 are connected to a gate power supply terminal G via a contact hole (not shown) by an Al-Si wiring or the like, and a gate electrode 26 'of the sense transistor section 3 (in the case of only one). present) is also connected to a gate power supply terminal G _S via a contact hole (not shown) by Al-Si wiring and the like. The source electrode 2 of the main transistor section 2
8 and the source electrode 28 'of the sense transistor unit 3
For example, they are connected via a sense resistor R _S made of polysilicon.

In FIG. 1, a portion surrounded by a broken line shows one MOS FET cell. This MOS FE
For example, when a positive gate voltage is applied to the gate terminal G of the main transistor portion 2, the T cell
In the vicinity of the surface of 3, an inversion layer is formed, and an N channel is formed therein, so that conduction between the common drain D and the source S of the main transistor portion 2 is conducted.

FIG. 3 shows another example of the configuration of the N-channel MOS FET 30 of the present invention having the circuit configuration shown in FIG. In the figure, an N ⁺ type drain region 32 is formed on the upper surface side of a P type substrate 31. The N ⁺ -type drain region 32 is a common drain region for the main transistor portion 2 and the sense transistor portion 3, and extends long on the upper surface of the P-type substrate 31. On the other hand, each MOS type FET
N ⁺ type source regions 33a, 33b, 33c of cells
The N ⁺ -type drain region 3 is provided on the upper surface side of the P-type substrate 31 at a predetermined distance from the N ⁺ -type drain region 32.
2 are formed in parallel. In this example, the N ⁺ type source region 33a belongs to the sense transistor unit 3, and the N ⁺ type source regions 33b, 33c,... Belong to the main transistor unit 2 and are connected to the source terminal S. Although three N ⁺ -type source regions are shown in the figure, a large number of N ⁺ -type source regions belonging to the main transistor portion 2 and having exactly the same shape are actually arranged in parallel. A gate oxide film 35 is formed on a portion of the P-type substrate 31 sandwiched between the N ⁺ -type source regions 33a, 33b, 33c,... And the N ⁺ -type drain region 32. 34
a, 34b, 34c, ... are stacked. The gate electrode 34a is connected to the one gate terminal G _S , and the gate electrodes 34b, 34c,... Are connected to the other gate terminal G. A sense resistor R _S made of polysilicon or the like is provided between the source terminal of the main transistor unit 2 and the source terminal S _S of the sense transistor unit 3. In FIG. 3, a drain electrode, a source electrode, and the like are omitted to make the drawing easier to see. The operation of the embodiment shown in FIG. 3 is basically the same as the example shown in FIG.

In each of the two embodiments described above, the drains of the main transistor section 2 and the sense transistor section 3 are common, and the gates G and G _S and the sources S and S _{S of the} sections 2 and 3 are common. Although the MOS type FETs with a current detection function are provided independently of each other, the following embodiment is different from the above-mentioned embodiments in that each of the sections 2 and 3 has a common source and a gate and a drain provided independently of each other. MOS with current detection function of gate / multi-drain structure
It is an example of a type FET.

In FIG. 1, a MOS type FET 50 is
The main transistor section 52 and the sense transistor
And a P-type substrate 54 on the P-type substrate 54.
The surface of each transistor section 52, 53 is N⁺Mold embedded
Rains 55 and 55 'are formed. Each N⁺Mold embedded
The upper part of each of the lenses 55 and 55 'is N^-Drain region
56, 56 'are formed separated by a P-type region 63.
Have been. And the surface of each drain region 56, 56 '.
Selectively have P-type channel regions 57 and 57 ', respectively.
The P-type channel is formed at a predetermined interval.
Each of the regions 57, 57 'is selectively provided on the surface of the tunnel region 57, 57'.
N shallower than 57 '⁺Mold source regions 58 and 58 'are formed
Have been. Also, N⁺Mold low resistance regions 62, 62 '
Each N of the predicate ⁺Connected to the embedded drains 55 and 55 '
On the surface where the channel regions 57, 57 ', etc. are formed
Has been formed.

Further, adjacent P-type channel regions 57,
An oxide film 59 is formed in a region reaching above the end portions of the N ⁺ -type source regions 58, 58 'above and between 57', 57 ', 57', and in the vicinity thereof. , For example, gate electrodes 60 and 6 made of polysilicon.
0 'is provided. The oxide film 59 and the gate electrodes 60 and 60 'are formed of an insulating film 61 made of PSG or the like.
Has been worn by

In each of the transistor portions 52 and 53, drain electrodes 65 and 65 'made of Al-Si or the like are formed so as to be electrically connected to all the N ⁺ -type low resistance regions 62 and 62'. Further, both transistor sections 52, 5
A common source electrode 64 made of Al-Si or the like is formed electrically connected to all three N ⁺ -type source regions 58 and 58 '. Further, a number of gate electrodes 60 of the main transistor section 52 are connected to a gate power supply terminal G via a contact hole (not shown) by an Al-Si wiring or the like, and a gate electrode 60 'of the sense transistor section 53 is also connected (in the case of one It is connected also) similarly to the gate power supply terminal G _S. The drain electrode 65 of the main transistor section 52 and the source electrode 65 'of the sense transistor section 53 are connected via a sense resistor _RS made of, for example, polysilicon.

The operation of the MOSFET 50 shown in FIG. 4 is basically the same as that of the MOSFET 20 shown in FIG. 2, but avoids mutual interference between the main transistor section 52 and the sense transistor section 53. Therefore, the difference is that the Pn junction between the P-type substrate 54 and the N ⁺ -type buried drains 55 and 55 'is always kept in a reverse bias state.

Each of the MOS FETs 20 and 30 has a main transistor section 2 and a sense transistor section 3. Each of these transistor sections is composed of a large number of MOS FET cells having the same characteristics. The sense transistor unit 3 is composed of one MOS FET
Cells only), and the ratio of the number of cells is n: 1.
(N≫1). Many of these MOS type FET cells are minute and connected in parallel in each transistor section, and are formed by the same manufacturing process. Therefore, when the same gate-source voltage is applied, each MOS type
The current flowing between the drain and source of the type FET cell becomes equal. Here, the MOS type FET20 or 30 are independent and gate G and G _S of each transistor portions 2 and 3 can be driven to be equal to its gate-source voltage V _GS and V _gs . When driven in this way, the main current I _D flowing between the drain D · source S of the main transistor portion 2, the detection current flowing between the drain D · source S _S of the sense transistor 3 relationship between I _d is a I _D ≒ n · I _d. Therefore, the relationship between the sense voltage V _S and the main current I _D corresponding to the voltage drop across the sense resistor R _S of the detection current I _d becomes linear as shown in FIG.

Here, the sensors of the MOS type FETs 20 and 30 are
Drain D and source S of the transistor section 3_SPotential between
If the difference is small, the sense voltage V_SAlso gets smaller
Is the sense voltage V_SIs small, the effect of noise is large.
The current I _dMeasurement cannot be expected. Only
However, in this embodiment, the sense resistor R_Sof
Increase the value to some extent and set the sense voltage V_SCan be measured enough
Value, for example, the sense voltage V_SIs a sense transistor
Drain D and source S of part 2_SMore than 10% of the voltage between
Even if there is, the gate G of the main transistor section 2
Gate G of sense transistor section 3_SAnd are independent
Therefore, the gate-source voltage of each of the transistor units 2 and 3
V_GS, V_gsCan be controlled to equalize
V shown in 5_S-I_DThe linearity of can be maintained. Therefore,
Current I flowing through the sense transistor section 2_dFrom the size of
Main current I_DAnd the current I flowing through the load is always accurately detected
Can be Here, M of the main transistor unit 2
By increasing the number n of OS type FET cells,
Current I_dIs the main current I_DCan be much smaller than
(I_d≪I_D), Main current I_DAnd the current I flowing through the load
Can be almost equal.

FIG. 6 shows an N channel having the circuit configuration shown in FIG.
Example of overcurrent protection circuit using channel MOS type FET1
Is shown. In the figure, the common drain of the MOSFET 1 is shown.
D is applied to a load 42 to which a current is supplied from a DC power supply 41.
It is connected. In addition, the gate of the main transistor section 2
G is the gate voltage V of the drive circuit 47_GOutput terminal
The source S is connected to the + input of the first differential amplifier 43.
Terminal and the + input terminal of the third differential amplifier 45
And grounded. Meanwhile, the sense transistor
Gate G of part 3_SIs the gate voltage V of the drive circuit 47
_gConnected to the output terminal of the_SIs the sense resistor
R_SGrounded. Sense transistor section 3
Source S _SThe sense resistor R on the side connected to_SOne
The end is connected to the + input terminal of the second differential amplifier 44 and the third differential
It is connected to the-input terminal of the amplifier 45.

Further, the gate G of the main transistor section 2 is connected to the negative input terminal of the first differential amplifier 43. On the other hand, the gate G _S of the sense transistor unit 3 is connected to the − input terminal of the second differential amplifier 44, and its source S _S is connected to the + input terminal of the second differential amplifier 44 and the third differential amplifier 44. 45 input terminals. Also,
The outputs of the first and second differential amplifiers 43 and 44 are both input to the drive circuit 47, and the output of the third differential amplifier 45 is
It is input to the judgment / control circuit 46.

Next, the operation of the MOSFET 1 shown in FIG. 1 and a drive circuit for driving the MOSFET 1 will be described. First, when the drive command signal A is input, the drive circuit 47 turns on the “H” level gate voltage V _G to turn on each of the MOS type FET cells of the main transistor portion 2 and the sense transistor portion 3 of the MOS type FET 1. And _Vg . The application of these gate voltages V _G and V _g turns on each MOS type FET cell of each transistor section 2 and 3, and causes the drain and drain of each MOS type FET cell to turn on.
Currents I _D and I _d depending on gate-source voltages V _GS and V _gs begin to flow between the sources. At this stage, the gate-source voltages V _GS and V _gs of each MOS-type FET cell of each of the transistor sections 2 and 3 are not always equal, and if not, the main current _ID and the detection current I _d Is related to _ID
≒ n · _Id is not obtained. In this case therefore, the value of the main current I _D obtained from the detection current I _d is not a correct value.

Therefore, each MO of each of the transistor sections 2 and 3 is
The gate-source voltages V _GS and V _gs of the S-type FET cell are
A first differential amplifier 43 and a second differential amplifier 44, respectively.
Is fed back to the drive circuit 47 via the. In response to this feedback, the drive circuit 47 sets the gate-source voltages V _GS and V _gs of the respective MOS-type FET cells of the respective transistor units 2 and 3 to be equal to each other. The gate potential is higher than the gate potential of the MOS type FET cell of the main transistor unit 2.
The voltage drop at the sense resistor R _S , that is, the sense voltage V
Control is performed to increase only _S.

In this way, the control of the drive circuit 47
Of each MOS type FET cell of each of the transistor sections 2 and 3.
Gate-source voltage V_GSAnd V_gsIs equal to
Style I _DAnd the detection current I_dRelationship with I_D≒ n ・ I_dTona
The detection current I_dThe determination / control circuit 46
Is the main current I_DCan be accurately detected.

Next, the operation of the MOS FET 1 when overcurrent is detected will be described. Measuring detection current I _d flowing through the sense transistor section 3, judging and controlling circuit 46 is performed by measuring a sense voltage V _S corresponding to the voltage drop across the sense resistor R _S.

This sense voltage V_SIs the third differential amplifier
The signal is input to the determination / control circuit 46 via the switch 45. Judgment
The control circuit 46 has a reference voltage for overcurrent detection in advance.
Pressure V _REF(Sensor when the maximum allowable current flows through the load 42)
Voltage V_SIs the voltage amplified by the third differential amplifier 45.
Pressure), and the judgment and control circuit 46
Sense voltage V_S'And the reference voltage V_REFLarge with
Small relationships are always compared.

If a short circuit or the like occurs in the load 42 for some reason and the overcurrent I flows into the MOSFET 1, the sense voltage V _S 'becomes higher than the reference voltage V _REF . In this case, the determination / control circuit 46 sets V _S ′
By detecting> V _REF , it is determined that an overcurrent I has occurred, and a protection operation instruction signal B is output to the drive circuit 47.

Upon receiving the protection operation instruction signal B, the drive circuit 47 sets the gate voltages V _G and V _g applied to the gates G and G _S of the respective MOS type FET cells of the respective transistor sections 2 and 3 to “L” level. , M of all the transistor units 2 and 3
The flow of current between the drain and the source of the OS type FET cell is cut off. As described above, when the overcurrent I flows into the MOS FET 1, all the MOS transistors F of the respective transistor units 2 and 3 of the MOS FET 1 regardless of the state of the drive command signal A.
The ET cell is immediately turned off to protect the load 41 from overcurrent.

The above embodiment is an example in which the present invention is applied to a MOS FET with a current detection function comprising an N-channel MOS FET cell. However, the present invention is not limited to this. MOS FET with current detection function composed of channel MOS FET cells, and junction type F
The present invention is also applicable to a transistor having a current detection function including an ET cell or an electrostatic induction transistor. .

[0038]

As described above, according to the present invention,
Since the gate voltage of the main transistor portion and the gate voltage of the sense transistor portion of the multi-gate / multi-source field effect transistor can be driven independently, the gate-source voltage of the field effect transistor cell of each transistor portion is reduced. By controlling the gate voltage of the field effect transistor cell of each transistor section so that it always becomes equal, the ratio of the current flowing through the main transistor section to the current flowing through the sense transistor section always becomes the MOS type FET cell constituting each transistor section. Can be controlled so as to be equal to the ratio of the numbers, so that highly accurate current detection can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a circuit configuration of a MOS-FET with a current detection function having a multi-gate multi-source structure according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a configuration example of a MOS-FET with a current detection function having a multi-gate multi-source structure shown in FIG.

FIG. 3 is a cross-sectional view showing another configuration example of the MOS-FET with a current detection function having a multi-gate multi-source structure shown in FIG.

FIG. 4 is a cross-sectional view showing a configuration example of a MOS-type FET with a current detection function having a multi-gate / multi-drain structure.

FIG. 5 is a diagram illustrating a relationship between a sense voltage and a main current in the circuit configuration of FIG. 1;

FIG. 6 is a block diagram showing an example of a protection circuit to which a MOS FET with a current detection function having a multi-gate multi-source structure according to the present invention is applied.

FIG. 7 is a diagram showing a circuit configuration of a conventional MOS-type FET with a current detection function having a single-gate multi-source structure.

FIG. 8 is a diagram showing a relationship between a sense voltage and a main current when a conventional MOS FET with a current detection function having a single-gate multi-source structure is used.

[Explanation of symbols]

 1 MOS field effect transistor with current detection function 2 Main transistor section 3 Sense transistor section

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/78 H01L 21/336 H01L 21/8234 H01L 27/06

Claims (1)

(57) [Claims] Hoyo main transistor section flow as claimed in claim 1] the main current
And a sense transistor unit for detecting a current flowing through the main transistor unit.
And the drain of the sense transistor section is common.
The main transistor section and the sense transistor.
The sources of the transistor section are independent of each other,
The gate of the transistor section and the sense transistor section
Are transistors with current detection function that are independent of each other
And the gate terminal of the main transistor section and the sense
The gate terminal of the transistor section is electrically independent of each other.
A transistor with a current detection function .