JP3226866B2 - Power supply voltage monitoring circuit and input signal level monitoring circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply voltage monitoring circuit and an input signal level monitoring circuit, and more particularly to a power supply voltage monitoring circuit for monitoring a power supply voltage supplied to a digital logic circuit and the like and an input for monitoring an input signal level of a comparator and the like. The present invention relates to a signal level monitoring circuit.

[0002]

2. Description of the Related Art A power supply voltage monitoring circuit of this type generally has a configuration in which a comparator compares a constant voltage independent of the power supply voltage with a divided voltage obtained by dividing the power supply voltage by a resistance dividing circuit or the like and outputs a comparison result. is there. However, when the power supply voltage falls below the limit of the operating voltage of the comparator, that is, the voltage reduction limit value, the comparator becomes inoperable, and the output state of the comparator, that is, the output state of the power supply voltage monitoring circuit becomes unstable.

In order to prevent this, conventionally, in the low power supply voltage region where the comparator becomes inoperable, the undefined output mask function for masking the undefined output of the comparator and the monitoring state holding function for accurately maintaining the power supply monitoring output state are malfunctioned. A method of providing as a prevention function is employed.

Due to the nature of the malfunction prevention function, it is necessary to stop at a high power supply voltage and operate at a low power supply voltage. The threshold value for the operation is lower than the monitoring threshold value of the power supply voltage. It must be set higher than the low-voltage operation limit value of the target comparator. However, this kind of malfunction prevention function can be operated with a power supply voltage lower than that of the comparator, but conversely, its operation / stop threshold greatly varies. Accordingly, there is a disadvantage that the lower limit of the power supply voltage monitoring threshold is limited by providing the malfunction prevention function in the power supply voltage monitoring circuit.

[0005] Japanese Akira 5 with malfunction prevention function of this kind
FIG. 3 is a circuit diagram showing a conventional power supply voltage monitoring circuit described in Japanese Patent Application Laid-Open No. 7-196623. Referring to FIG. 3, this conventional power supply voltage monitoring circuit converts a divided voltage VD corresponding to a power supply VC into a reference voltage VR.
And outputs a comparison signal CQ
And an output control circuit 102 having an undefined output mask function and a monitoring state holding function due to a malfunction of the comparator 101 due to a drop in the power supply VC.

The comparator 101 includes voltage dividing resistors R11 and R12 connected in series to divide a power supply VC and generate a divided voltage VD at a series connection point, and a PNP constituting a differential amplifier.
Type transistors Q11, Q12 and transistor Q1
1 and Q12, each collector being connected to each other to form an active load current mirror circuit, NPN transistors Q13 and Q14, a constant current source I11, an emitter connected to a power supply VC, and a collector connected to a constant current source. A PNP transistor Q15 connected to I11 and having a base and a collector connected in common, and a PNP transistor having an emitter connected to a power supply VC, a base connected to the base of the transistor Q15, and a collector connected to a commonly connected emitter of the differential amplifier transistors Q11 and Q12. each connecting the base of transistor Q16 and the emitter to the power supply VC and current mirror circuits composed of PNP type transistors Q17 Metropolitan connected to the bases of the transistors Q15, the emitter base to the collector of the transistor Q11 to the power supply (ground) VS NPN type And Njisuta Q118, one end power supply V
A resistor R13 connected to C and a transistor Q1
The collector is connected to the collector of the resistor R13 and the emitter is connected to the ground VS.
And an NPN-type transistor Q19 for outputting Q.

The output control circuit 102 has an NPN transistor Q having a base connected to the collector of the transistor Q19 of the comparator circuit 101, an emitter connected to the ground VS, and a collector connected to the power supply VC via the load resistor R21.
21, an NPN-type transistor Q22 having a base connected to the collector of the transistor Q21, an emitter connected to the ground VS, a collector connected to the output terminal TO, and outputting an output signal VO, and an anode connected in series and having a first-stage anode connected to the resistor R2.
3, a plurality of diodes D21 whose cathodes at the last stage are respectively connected to the base of the transistor Q22, and one end connected to the power supply VC and the other end connected to the transistor Q22.
And a resistor R22 connected to each of the collectors.

Next, the operation of the conventional power supply voltage monitoring circuit will be described with reference to FIG. 3. First, the comparator 101 connects the power supply VC to the base of the transistor Q11 constituting the differential amplifier by the resistors R11 and R12. The divided voltage VD is input, and the reference voltage VR is input to the base of the transistor Q12. The constant current set by the current source I11 is applied to the transistor Q15 on the input side of the current mirror circuit.
And a constant current set by the current source I11 to the emitters of the transistors Q11 and Q12 connected to the collector of the transistor Q16 on the output side of the current mirror circuit. Therefore, transistor Q16
Operate as a common emitter resistance of the differential amplifier transistors Q11 and Q12.

Normally, the transistor Q11 is turned off,
Transistor Q12 is on, transistor Q18 is off, transistor Q19 for output of comparator 101 is on, and output signal CQ of comparator 101 is at L level.

The transistor Q21 of the output control circuit 102
Cuts off in response to the supply of the L-level signal CQ, turns on the output transistor Q22, and switches the output signal VO to L level.
Level.

Next, as the power supply VC decreases, the voltage V
When D decreases and becomes lower than the reference voltage VR, the transistor Q11 is turned on and the transistor Q1
2 is turned off, whereby the transistor Q11
8, the transistor Q19 is turned off, the transistor Q19 is turned off,
The output signal CQ of the comparator 1 becomes H level. The transistor Q21 of the output control circuit 2 outputs the H-level signal C
Q2 is turned on in response to the supply of Q, and the output transistor Q2
2 is turned off by setting the base potential to L level,
The output signal VO is set to the H level.

Further, the voltage of the power supply VC is
01, the output transistor Q
In the case where the operation state of the output control circuit 19 is unstable, the base potential of the output transistor Q22 of the output control circuit 102 becomes
Since the voltage is supplied through the diodes D21 of a plurality of stages having a forward voltage higher than the minimum operating voltage provided in the base current supply path, the voltage does not exceed the ground potential.
This transistor Q22 does not conduct, maintains the cutoff state, and maintains output signal VO at H level. Therefore, the diode D21 functions as a malfunction prevention function.

However, the voltage of the power supply VC at which the transistor Q22 becomes non-conductive is set by the number of stages of the diode D21 inserted into the base current path, so that it cannot be finely adjusted, and it depends on the forward conduction voltage of the diode. For this reason, the temperature dependence is large together with the variation of the absolute value.

The voltage of the power supply VC, ie, the inoperable voltage, at which the comparator becomes inoperable, ie, the inoperable voltage, is VCMIN, the number of stages of the diode D21 inserted into the base of the transistor Q22 is n, the forward voltage when the diode is conducting, and the base when Q22 is conducting. Assuming that the emitter-to-emitter voltage is VF and the power supply voltage detection threshold is Vset, Vset must satisfy the following relationship, including the environment and device variations. VCMIN <(n + 1) .times.VF <Vset For example, when the inoperable voltage VCMIN is set to 2 V including the environment and element variation, the lower limit of the power supply voltage at which the transistor Q22 cannot be turned on must be set to 2V or more. Therefore, the appropriate number of diodes D21 is three. At this time, the upper limit of the power supply voltage at which the transistor Q22 cannot be turned on is about 3.6 V (in an operating temperature range TJ = -30 to 125 ° C.).

Therefore, the threshold value for power supply monitoring is 3.6.
There is a restriction that it must be set to V or more.

[0016]

In the conventional power supply voltage monitoring circuit described above, the power supply voltage at which the output transistor of the malfunction prevention circuit becomes non-conductive is set by the number of series stages of diodes inserted in the base current path, so that the fine adjustment is performed. The threshold value for power supply monitoring is set sufficiently high in consideration of these fluctuation ranges, because the temperature dependence is large together with the variation in absolute value because of the fact that it cannot be performed and the dependence on the forward conduction voltage of these diodes. There was a drawback that it was necessary to do.

An object of the present invention is to provide a power supply voltage monitoring circuit in which the operating voltage of the malfunction prevention circuit is set close to the reduced voltage operation limit value of the comparator in order to solve the problem.

[0018]

A power supply voltage monitoring circuit according to the present invention monitors a power supply voltage and outputs an alarm signal when the power supply voltage falls below a predetermined voltage. sample voltage with a reference voltage and the sample voltage is the reference voltage has a differential amplifier supplied with
A comparator circuit for outputting a comparator signal of the said alarm signal corresponding time follows, operation of the comparator circuit becomes unstable due to the decrease of the constantly observe the operating state of the differential amplifier the power supply voltage on the basis of this observation Operation monitoring means for operating a malfunction prevention function in a comparator inoperable voltage region , wherein the supply of the comparator signal is provided.
Outputting the alarm signal in response to the
In response to the control of the operation monitoring means during the operation of the viewing means,
And an output control means for holding the serial alarm signal, the con
A parator circuit supplies an operating current of the differential amplifier
Current supply means, wherein the operation monitoring means
Of the operating current from the current supply means due to the pressure drop.
Independent of the level of the compare signal in response to a drop
Operating current monitoring means for controlling to hold the alarm signal
It is configured with steps .

The power supply voltage monitoring circuit of the present invention has a non-inverting input
Each input signal level of the signal and the inverted input signal Re monitoring Chico
From the input signal levels of the non-inverted input signal and the inverted input signal .
In input signal level monitoring circuit phase signal level in phase component and outputs an alarm signal and equal to or larger than the upper limit level predetermined, the has a differential amplifier supplied with said non-inverted input signal and the inverted input signal A comparator circuit for outputting a comparator signal in response to a level difference between the non-inverting input signal and the inverting input signal; and an operation state of the differential amplifier that is constantly observed, and the in- phase signal is output based on the observation result.
Constitutes the differential amplifier when applied above a threshold level
Collector-emitter voltage of the transistor is squeezed to
Operation of the comparator circuit is configured to include an operation monitoring means for operating the malfunction prevention function by the comparator inoperable voltage region becomes unstable by reducing Te.

[0020]

FIG. 3 shows an embodiment of the present invention.
Referring to FIG. 1 also shown in a circuit diagram with common reference characters / numerals attached to the same components as those of FIG. 1, the power supply voltage monitoring circuit of this embodiment shown in FIG.
01, a comparator 1 that compares a divided voltage VD corresponding to the power supply VC with a reference voltage VR and outputs a comparison signal CP whose polarity is inverted from that of a conventional comparison signal CQ, and a series diode instead of the conventional output control circuit 2. An output control circuit 2 having no 21 and an operation monitoring circuit 3 for observing the operation state of the comparator 1 and operating the malfunction prevention function based on the observation result.

The comparator 1 has a power supply VC connected in series.
, And voltage dividing resistors R11 and R12 for generating a divided voltage VD at a series connection point, PNP transistors Q11 and Q12 constituting a differential amplifier, and transistors Q11 and Q12.
N12 transistors Q13 and Q14, each collector being connected to each collector of Q12 to form an active load current mirror circuit, a constant current source I11, an emitter connected to a power supply VC, and a collector connected to a constant current source I11. A PNP transistor Q15 having a base and a collector connected in common, and a PNP transistor having an emitter connected to a power supply VC, a base connected to the base of the transistor Q15, and a collector connected to a commonly connected emitter of the differential amplifier transistors Q11 and Q12. A current mirror circuit 12 including a Q16 and a PNP transistor Q17 having an emitter connected to a power supply VC and a base connected to the base of a transistor Q15, and an NPN having a base connected to the collector of the transistor Q12 and an emitter connected to the power supply (ground) VS, respectively. Type And Njisuta Q18, one end power VC
And a base connected to the transistor Q18.
And an NPN-type transistor Q19 which has a collector connected to the other end of the resistor R13 and an emitter connected to the ground VS, and outputs a comparison signal CP from the collector.

The output control circuit 2 has a base connected to the collector of the transistor Q19 of the comparator 1 and an emitter connected to the ground V.
NPN-type transistors Q21 respectively connected to S
A resistor R21 having one end connected to the power supply VC, an NPN type transistor having a base connected to the collector of the transistor Q21 and the other end of the resistor R21, an emitter connected to the ground VS, and a collector connected to the output terminal TO, and outputting an output signal VO. Q22, one end of which is connected to the power supply VC and the other end of which is a transistor Q22.
And a resistor R22 connected to each of the collectors.

The operation monitoring circuit 3 has a constant current source I31 connected to the power supply VC for supplying a constant current, a collector and a base commonly connected, a collector connected to the output of the constant current source I31, and an emitter connected to the ground VS. An NPN-type transistor Q31, an emitter connected to the ground VS, a base connected to the base of the transistor Q31, respectively, and an NPN-type transistor Q32 forming a current mirror circuit with the transistor Q31. A PNP transistor Q35 connected to the collector, and a PNP having an emitter connected to the power supply VC, a collector connected to the emitter of the transistor Q35, and a base connected to the base of the transistor Q15 of the comparator 1 to form a current mirror circuit with the transistor Q15.
Transistor Q36, an emitter connected to ground VS, a base connected to the collector of transistor Q32, and a collector connected to a resistor R.
An NPN transistor Q33 connected to the other end of the transistor 31, an emitter connected to the ground VS, a base connected to the collector of the transistor Q33, and a collector connected to the collector of the transistor Q19 of the comparator 1 to supply the output signal CP of the comparator 1. And a resistor R31 having one end connected to the power supply VC and the other end connected to the collector of the transistor Q33.

Next, the operation of the present embodiment will be described with reference to FIG. 1. Similar to the conventional comparator 101, the comparator 1 connects the power supply VC to the base of the transistor Q11 constituting the differential amplifier by the resistor R11. , R12, and the reference voltage VR is input to the base of the transistor Q12. In a normal state, the transistor Q11 is turned off and the transistor Q12 is turned on, so that the transistor Q18 is turned on.
The output transistor Q19 of the comparator 1 is turned off, and the output signal CP of the comparator 1 becomes H level.

The transistor Q21 of the output control circuit 2
The transistor is turned on in response to the supply of the H-level signal CP, and cut off by setting the base potential of the output transistor Q22 to the L level, thereby setting the output signal VO to the H level.

As the power supply VC decreases, the voltage V
When D decreases and becomes lower than the reference voltage VR, the transistor Q11 is turned on and the transistor Q1
2 is turned off, whereby the transistor Q18
Is turned off, the transistor Q19 is turned on, and the output signal CP of the comparator 1 becomes L level.

The transistor Q21 of the output control circuit 2 is
In response to the supply of the signal CP at the L level, the transistor CP22 is turned off by turning the base potential of the output transistor Q22 to the H level, and the output signal VO is set to the L level.

The operation of the operation monitoring circuit 3 will be described. The transistor Q36 forms a current mirror circuit with the transistors Q15, Q16, and Q17 of the comparator 1, and reduces the collector current of the transistor Q16 due to the Early effect when the power supply voltage drops. The purpose is to observe the situation indirectly.

As is known, the Early effect is also called a depletion layer spreading effect, and is determined by the influence of the width of the depletion layer in which the collector admittance changes depending on the collector junction voltage. This Early effect becomes remarkable at a low voltage equal to or lower than the 3/2 characteristic region, which is a normal transistor operation region. In other words, when the voltage decreases and the region enters the Early effect region, the collector current, which has been changed in a substantially linear manner in the past with approximately 3/2 power characteristics, sharply decreases.

The transistor Q36 is a transistor Q36.
In addition to the fact that the base line 16 and the base line are common, the collector current of the transistor Q16 is detected as its own collector current by connecting the emitter of the transistor Q35 to the collector. The transistor Q35 whose base is connected to the reference voltage VR is a known base ground connection, and has a base connected to the base of one of the transistors Q12 of the differential amplifier due to the nature of its role, and the collector current of the transistor Q36 itself. Is output as a collector current.

A transistor Q3 which forms a current mirror circuit with the transistor Q32 and has a collector and a base short-circuited
1 receives a constant current i31 from the constant current source I31, and the transistor Q32 outputs the same current as the collector current of the transistor Q31, that is, the current i31 as its own collector current.

The transistor Q33 includes a transistor Q3
5 is turned on when the collector current of the transistor Q36 is larger than the collector current of the transistor Q36, and cut off when the collector current of the transistor Q36 is smaller than the collector current of the transistor Q36.

Therefore, the current i31 of the constant current source I31
Is set to an amount necessary for driving the differential amplifier composed of the transistors Q11 and Q12 so that the voltage of the power supply VC falls to a level at which the comparator 1 becomes inoperable, that is, an inoperable level. Can be detected by the conduction of the transistor Q34.

When the transistor Q34 is conducting,
This is when the voltage of the power supply VC has dropped to a level at which the comparator 1 cannot operate. At this time, the transistor Q21 of the output control circuit 2 cuts off regardless of the level of the signal CP corresponding to the operation state of the output transistor Q19 of the comparator. By turning on the base of Q22 to be H level, the power supply monitoring output VO becomes L level.

When the voltage of the power supply VC has not dropped to the level at which the comparator 1 cannot operate, the transistor Q3
4 is cut off, and the conduction / cutoff of the output transistor Q22 operates in accordance with the level of the output signal CP of the comparator 1, and exhibits a normal comparator function.

As described above, the power supply voltage monitoring circuit of the present embodiment does not set the operation voltage of the malfunction prevention function independently of the operation state of the comparator, but observes the operation state of the comparator. However, by making the comparator inoperable and activating the malfunction prevention function, it is possible to make the power supply voltage substantially the same as the inoperability voltage of the comparator the operating voltage of the malfunction prevention function, and the junction temperature Tj = −30 to 125 ° C. In the operating temperature range,
It can be kept in a range of about 2.0 to 2.4 V. Therefore, the power supply voltage monitoring threshold can be set as low as about 2.4V.

Further, the range of the power supply voltage monitoring threshold which can be set by adding the malfunction preventing function does not narrow.

Next, an input signal level monitoring circuit according to a second embodiment of the present invention will be described with reference to FIG. For reference, the difference between the input signal level monitoring circuit of the present embodiment and the above-described first embodiment is that the input signal VI is input instead of the comparator 1 and the non-inverting input terminal TI is inverted. Inverting input terminal TB to which input signal VB is input
And an operation of monitoring the collector voltage VE of the transistor Q16, that is, the common emitter voltage VE of the differential amplifier transistors Q11 and Q12, in addition to the current drop due to the Early effect of the transistor Q16 instead of the comparator 1A having the operation monitoring circuit 3. The monitoring circuit 3A is provided.

The comparator 1A includes a voltage dividing resistor R1.
1, R12 and a reference input terminal, except that it has the same configuration as the comparator 1 of the first embodiment, and includes a differential amplifier comprising PNP transistors Q11 and Q12;
A current mirror circuit composed of PN transistors Q13 and Q14 and constituting an active load of a differential circuit; a current mirror circuit composed of PNP transistors Q15, Q16 and Q17 and constituting a current source of the differential circuit; And NPN-type transistors Q18 and Q19 for outputting the output signal CP and a resistor R13.

The operation monitoring circuit 3A includes a constant current source I31 common to the operation monitoring circuit 3 of the first embodiment, a current mirror circuit including NPN transistors Q31 and Q32, and PNP transistors Q35 and Q36. And NP
A constant current source I32 having one end connected to the ground VS, in addition to N-type transistors Q33 and Q34 and a resistor R31;
A constant current source I33 having one end connected to the power supply VC, an NPN type transistor Q37 having a collector connected to the power supply VC, a base connected to the collector of the transistor Q16 of the comparator 1A, and an emitter connected to the other end of the constant current source I32, and and a PNP type transistor Q38 the emitter to the emitter is connected to the other end of the constant current source I33 of the transistor Q37 and base to the ground V S, the reference voltage VR of the first embodiment the base of the transistor Q35
Is connected to the emitter of the transistor Q38.

The operation of the present embodiment will be described with reference to FIG.
When the voltage of B exceeds the upper limit of the common-mode input voltage, the voltage between the collector and the emitter of the transistor Q16 is reduced, and sufficient current is not supplied to the differential amplifier composed of the transistors Q11 and Q12. Impossible.

At this time, the function of the input signal level monitoring circuit for masking the undefined output of the comparator 1A and fixing it at the H level or the L level is realized by the same method as in the first embodiment.

That is, similarly to the first embodiment, by operating the transistor Q36 of the operation monitoring circuit 3A under the same operating conditions as the transistor Q16 of the comparator 1A, a decrease in the collector current of the transistor Q16 is reduced. Detected as a decrease in collector current. Here, the base potential of the transistor Q35 that determines the collector voltage of the transistor Q36 supplies the collector voltage VE of the transistor Q16 via the emitter follower of the transistor Q37 and the emitter follower of the transistor Q38.

[0044]

As described above, the power supply voltage monitoring circuit of the present invention has a differential amplifier that receives supply of the sample voltage and the reference voltage corresponding to the power supply voltage, and outputs a comparator signal corresponding to an alarm signal. A comparator circuit, and operation monitoring means for constantly observing the operation state of the differential amplifier and operating a malfunction prevention function in a comparator inoperable voltage region due to a decrease in the power supply voltage based on the observation result. The operating voltage is set to the operating voltage of the malfunction prevention function by observing the operating state of the comparator and causing the comparator to become inoperable and activating the malfunction prevention function by using the same power supply voltage as the comparator disablement voltage. Therefore, there is an effect that the power supply voltage monitoring threshold can be set lower than before.

Further, there is an effect that the range of the power supply voltage monitoring threshold which can be set by adding the malfunction preventing function is not narrowed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an example of a power supply voltage monitoring circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram illustrating an example of an input signal level monitoring circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing an example of a conventional power supply voltage monitoring circuit.

[Explanation of symbols]

1, 1A, 101 Comparator 102, 2 Output control circuit 3, 3A Operation monitoring circuit I11, I31 to I33 Constant current source Q11 to Q19, Q21, Q22, Q31 to Q38
Transistors R11 to R13, R21, R22, R31 Resistance D21 Diode

Claims (4)

(57) [Claims] 1. A power supply voltage monitoring circuit for monitoring a power supply voltage and outputting an alarm signal when the power supply voltage falls below a predetermined voltage, wherein the differential amplifier receives supply of a sample voltage corresponding to the power supply voltage and a reference voltage. a comparator circuit the specimen voltage possessed by that outputs a comparator signal of the said alarm signal corresponding time under the reference electrostatic pressure or the said constantly observe the operating state of the differential amplifier of the power supply voltage on the basis of this observation Operation monitoring means for operating a malfunction prevention function in a comparator inoperable voltage region in which the operation of the comparator circuit becomes unstable due to the decrease; and the alarm signal in response to the supply of the comparator signal.
Output when the operation monitoring means operates.
An output for holding the alarm signal in response to control of the monitoring means;
Control means, wherein the comparator circuit controls an operating current of the differential amplifier.
Current supply means for supplying the current, wherein the operation monitoring means is configured to control the power supply due to a decrease in the power supply voltage.
In response to a decrease in the operating current from the flow supply means.
Holds the alarm signal regardless of the level of the comparator signal
Power supply voltage monitoring circuit according to claim Rukoto with an operating current monitoring means for controlling so as to. 2. The method according to claim 1, wherein the comparator circuit includes first and second comparators.
A first resistor and a second resistor which are connected in series between the power supplies and divide the power supply voltage to generate the sample voltage at a series connection point; and each emitter is connected in common, and the sample voltage and the reference voltage are connected to each base. And a first conductive type first and second transistor constituting the differential amplifier, respectively, and a collector connected to a collector of each of the first and second transistors. A third transistor and a fourth transistor of the second conductivity type forming a current mirror circuit; and a third transistor having an emitter connected to the first power supply, a collector connected to the first constant current source, and a base and a collector commonly connected. A fifth transistor of the first conductivity type and an emitter connected to the first power supply, a base connected to the base of the fifth transistor, and a collector connected to the commonly connected emitters of the first and second transistors, respectively; A sixth transistor of the first conductivity type, an emitter connected to the first power supply, a seventh transistor of the first conductivity type having a base connected to the base of the fifth transistor, and a base connected to the second transistor. An eighth transistor of a second conductivity type, the emitter of which is connected to the second power supply at the collector of the transistor, a third resistor having one end connected to the first power supply, and a base connected to the collector of the eighth transistor. A ninth transistor of a second conductivity type, having a collector connected to the first power supply, a third resistor connected to the first power supply, and an emitter connected to the second power supply, and outputting a comparator signal from the collector; Wherein the operation monitoring means connects the collector and the base in common, connects the collector to the other end of a second constant current source having one end connected to the first power supply, and connects the emitter to the second power supply Second
And an eleventh transistor of a second conductivity type having an emitter connected to the second power supply and a base connected to the base of the tenth transistor, respectively.
And a twelfth conductive type transistor having a base connected to a reference voltage and a collector connected to the collector of the eleventh transistor, respectively.
A first conductive type thirteenth transistor having an emitter connected to the first power supply, a collector connected to the emitter of the twelfth transistor, and a base connected to the base of the fifth transistor, respectively; A fourteenth transistor of a second conductivity type having a base connected to the power supply of the eleventh transistor and a collector connected to the other end of the fourth resistor, and an emitter connected to the fourteenth transistor with the base connected to the second power supply. Connected to the collectors of the second and third transistors, respectively, and connected to the collector of the ninth transistor.
The power supply voltage monitoring circuit according to claim 1, further comprising five transistors (Q34). Wherein the inverting input and the non-inverting input and a respective input <br/> force signal level monitoring Sico these non-inverted input signal and the inverted input signal
Common-signal level that is in-phase component of each input signal level of the signal
In input signal level monitoring circuit Le outputs an alarm signal and equal to or larger than the upper limit level predetermined, the non-inverting input signal and having a differential amplifier supplied with the inverted input signal the non-inverting input and the inverting input A comparator circuit that outputs a comparator signal in response to a signal level difference, and constantly observes the operation state of the differential amplifier, and based on the observation result, the in- phase signal is applied beyond the upper limit level.
Of the transistors constituting the differential amplifier when
Input signal level monitoring circuit, characterized in that operation of the comparator circuit and an operation monitoring means for operating the malfunction prevention function by the comparator inoperable voltage region is undefined by Taemitta voltage drops are squeezed . 4. The comparator circuit includes a current supply unit that supplies an operation current of the differential amplifier, and the operation monitoring unit is configured to supply the operation current from the current supply unit due to a decrease in the collector-emitter voltage. 4. The input signal level monitoring circuit according to claim 3 , further comprising an operating current monitoring means for controlling to keep the alarm signal irrespective of the level of the comparator signal in response to the decrease.