JP3239372B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Non-single-crystal semiconductor thin films such as amorphous silicon thin films, microcrystalline silicon thin films, and polycrystalline silicon thin films include:
There are many dangling bonds. For example, in the case of a polycrystalline silicon thin film, defects such as dangling bonds existing at crystal grain boundaries serve as trap levels for carriers and act as barriers for carrier conduction (JYWSet).
o, J. Appl. Phys., 46, p5247 (1975)). As a result of the inhibition of carrier conduction, a polycrystalline silicon thin film transistor (poly-
The ON current of the Si-TFT decreases, and an increase in the trap level causes the generation of an electron-hole pair, so that the poly-SiT
The FT OFF current increases.

Therefore, in order to improve the performance of a poly-Si TFT, it is necessary to reduce the defects.
(J. Appl. Phys., 53 (2), p1193 (1982)).

For this purpose, the above-mentioned defects are terminated with hydrogen. Examples of such a hydrogenation method include a hydrogen plasma treatment, a hydrogen ion implantation method, and a method of removing hydrogen from a plasma nitride film. Diffusion methods and the like are known.

In the hydrogen ion implantation method, an expensive apparatus such as an ion implantation apparatus is required, and there are disadvantages such as poor controllability in implanting hydrogen into about several hundred polycrystalline silicon layers. Further, in the method of diffusing hydrogen from a plasma nitride film, there is a drawback that characteristics are not sufficiently improved as compared with hydrogen plasma treatment due to insufficient supply of hydrogen.

[0006] The hydrogen plasma treatment method is a hydrogenation method capable of improving the characteristics of a semiconductor device over a large area with good controllability. As a method of the hydrogen plasma treatment, for example, in a parallel plate type plasma generator, an electrode (counter electrode) is arranged in a vacuum chamber so as to face a substrate side electrode holding a material to be processed, and a high frequency is applied to the counter electrode side. In general, a method of decomposing hydrogen gas introduced into a vacuum chamber to supply hydrogen radicals to a material to be treated is performed.

[0007]

However, when a conventional hydrogen plasma processing method is used, there may occur a failure in gate voltage of the poly-Si TFT, a shift in threshold voltage, and other failures.

Accordingly, the present invention is to prevent the occurrence of defects while maintaining the effect of improving the TFT characteristics by hydrogenation, and an object of the present invention is to provide a method of manufacturing a semiconductor device having good characteristics. There.

[0009]

According to the present invention, there is provided a method of manufacturing a semiconductor device in which at least a part of a channel region of a transistor on a substrate is formed of a non-single-crystal semiconductor film. The connected first and second electrodes are opposed to each other, a high frequency electrode is applied to the first electrode via the control circuit, and 0 W / cm ² is applied to the second electrode via the control circuit. In this state, the non-single-crystal semiconductor film on the substrate is subjected to a hydrogen plasma treatment.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG.
This will be described according to the FT process chart. FIG. 1A shows the surface of a support layer 100 made of an insulating amorphous material such as an insulating amorphous substrate such as glass or quartz or an insulating amorphous material layer such as SiO ₂ laminated on the substrate. Then, a non-single-crystal silicon thin film 101 such as polycrystalline silicon is laminated, and then the non-single-crystal silicon thin film is patterned by photolithography. As a method for forming the non-single-crystal silicon thin film, there is a method described below.

(1) 580 ° C. to 650 ° C. by low pressure CVD
A polycrystalline silicon thin film is formed in a degree.

(2) After depositing an amorphous silicon thin film by EB evaporation method, sputtering method, plasma CVD method, etc.
Solid-phase growth annealing is performed at about 650 ° C. for about 2 to 70 hours to form a polycrystalline silicon thin film having a large grain size of 1 to 2 μm or more.

(3) After depositing a polycrystalline silicon thin film by a low pressure CVD method or the like, Si is deposited by an ion implantation method.
After the polycrystalline silicon thin film is made amorphous, solid phase growth annealing is performed at about 550 ° C. to 650 ° C. to form a large grain polycrystalline silicon thin film having a grain size of about 1 to 2 μm.

Incidentally, as the non-single-crystal silicon thin film 101, a microcrystalline silicon thin film or an amorphous silicon thin film may be used in addition to the above-mentioned polycrystalline silicon thin film. Also, the film forming method is not limited only to the above-described methods (1) to (3). Next, as shown in FIG. 1B, a gate oxide film 102 is formed by a thermal oxidation method or the like. If the dry oxidation method is used, about 1150
By performing the heat treatment at ℃, a gate oxide film having a high withstand voltage can be obtained. Although the gate oxide film is formed by the heat treatment at a low temperature of about 900 ° C. when the wet oxidation method is used, the withstand voltage is low and the film quality is inferior to the gate oxide film formed by the dry oxidation method.

When a polycrystalline silicon thin film is used as the non-single-crystal silicon thin film 101, crystal growth by heat treatment proceeds in this thermal oxidation step, and the crystallization ratio to volume is improved.
The crystal grain size increases. Also, in the case where an amorphous silicon thin film or a microcrystalline silicon thin film is used as the non-single-crystal silicon thin film 101, crystal growth by heat treatment proceeds in this thermal oxidation step, and a crystal grain size of 5000 μm to several μm is obtained. Crystal grows on polycrystalline silicon.

The method for forming the gate oxide film is not limited to the thermal oxidation method described above, but may be a CVD method, a plasma CVD method,
S by CR plasma CVD, light CVD, sputtering, etc.
There are a method of forming an iO ₂ film, a method of low-temperature oxidation by a plasma oxidation method, and the like. These methods reduce the process temperature to 60
Since the temperature can be lowered to about 0 ° C. or less, an inexpensive glass substrate can be used as the substrate, which is excellent.

Next, as shown in FIG.
03 is formed. Generally, polycrystalline silicon is used as the gate electrode material. As a method for forming the polycrystalline silicon layer, a polycrystalline silicon layer is formed by a low pressure CVD method, and n ⁺ p is formed by a thermal diffusion method using PCO ₃ or the like.
a method of forming poly-Si, a plasma CVD method, etc.
For example, an amorphous silicon layer doped with B (boron) or P (phosphorus) as an impurity is formed.
C. for about 2 hours to 70 hours, and polycrystalline the amorphous silicon layer to obtain p ⁺ p
There is a method of forming an poly-Si layer or an n ⁺ poly-Si layer. Subsequently, an impurity element is ion-implanted using the gate electrode 103 as a mask to form a source region 104.
And a drain region 105 (the channel region 106 is also automatically formed with this step). P (phosphorus), As (arsenic), B (boron), or the like is used as the impurity element.

Subsequently, as shown in FIG. 1D, an interlayer insulating film 107 is laminated. Here, hydrogen plasma processing is performed. As a plasma generator for performing the hydrogen plasma processing, a capacitively-coupled parallel plate type apparatus was used. The processing conditions were as follows. The substrate after laminating the interlayer insulating film (hereinafter referred to as “material to be processed”) is mounted on the substrate-side electrode, hydrogen gas is introduced, and a counter electrode (a type of relative electrode. A high frequency of 13.56 MHz is applied to the substrate side electrode to decompose the hydrogen gas. RF power to the counter electrode is 250~700mW / cm ² at that time, the substrate-side electrode was 0~280mW / cm ^2. The processing time was 5 minutes to 5 hours, the substrate temperature was 250 ° C. to 350 ° C., the flow rate of hydrogen gas was 100 to 600 sccm, and the distance between the electrodes was 27 to 45 mm. However, the processing conditions are not limited to these. By this hydrogen plasma treatment, atomic hydrogen gas decomposed by plasma is converted into an interlayer insulating film, a gate insulating film,
Since the polycrystalline silicon is diffused into the polycrystalline silicon and the dangling bonds in the polycrystalline silicon are terminated, a polycrystalline silicon thin film transistor having improved characteristics as described later can be obtained.

It is to be noted that, under the processing conditions, 0 W / c
In some cases, a high frequency is applied with an RF power of m ² , but this is different from the condition of a conventional apparatus that applies a high frequency only to the counter electrode. The reason is that the substrate-side electrode is at the ground potential in the conventional device that applies a high frequency only to the counter electrode (FIG. 3), but in the device that can apply the high-frequency also to the substrate-side electrode used in the present invention, This is because it is grounded via a high-frequency matching box (FIG. 2).
(The matching box generally has a variable capacitor or the like, so the substrate side electrode is not grounded.) In the hydrogen plasma treatment of the present invention using a device capable of applying a high frequency also to the substrate side electrode, only the conventional counter electrode is used. compared with the hydrogen plasma treatment using an apparatus for applying a high frequency, it can be selectively diffused into the polycrystalline silicon in the hydrogen ions and hydrogen radicals, shifting V _g -I _d characteristics of the processed TFT (Suresh The advantage is that the amount of shift of the hold voltage can be reduced. An important variable at this time is the potential _VDC of the substrate-side electrode, but detailed conditions will be described later.

In the hydrogen plasma processing of the present invention using a device capable of applying a high frequency also to the substrate side electrode, the AC impedance of the substrate side electrode with respect to the ground potential is changed by a variable capacitor or the like in the substrate side electrode matching box 306 in FIG. Therefore, the potential _VDC can be controlled without applying a high frequency to the substrate-side electrode (even when applying a high frequency with 0 W / cm ² RF power to the substrate-side electrode). Also, the counter electrode matching box 304
The circuit structure inside the substrate-side electrode matching box 306 is not limited to the circuit structure shown in FIGS.

It is important that the substrate side electrode and the counter electrode to which a high frequency is applied are grounded via an AC impedance. If the contact electrodes 108 in the source region and the drain region are formed after the hydrogen plasma treatment, the thin film transistor is completed (FIG. 1E). Metal materials such as Al, Cr, and Ni are used as the contact electrode material. The field effect mobility of the polycrystalline silicon TFT (poly-Si TFT) formed according to the present invention is N
50 cm ² / V · s (ch CVD method 590)
When polycrystalline silicon is formed at a temperature of about 160 ° C./160 cm ² /
V · s (in the case where amorphous silicon formed by a plasma CVD method is subjected to solid phase growth at 600 ° C. for about 17 hours to form polycrystalline silicon), and only when annealed in a hydrogen gas atmosphere (（10 cm) ² / V · s).

The poly-Si formed according to the present invention
TFT ON current is transistor size L / W = 5 μm
/ 10 μm NchTFT is 400 μA, and OFF current is 10-30 fA for NchTFTs of the same size, and the swing (V _g −I _{d in the} sub-threshold region ₎
The reciprocal of the slope of the characteristic curve) is 0.35 V / dec. Met. Further, while the shift amount of the threshold voltage of the TFT by the conventional hydrogen plasma treatment is -2 V to -5 V (FIG. 5), the hydrogen plasma of the present invention using the device capable of applying a high frequency also to the substrate side electrode In the process, the shift amount was -1 V or less (FIG. 4).

It should be noted that a conventional TFT by hydrogen plasma treatment is used.
The damage such as the shift of the threshold voltage tends to occur frequently in a large-scale mass production apparatus having a large electrode area of, for example, 50 cm × 50 cm or more. In the hydrogen plasma treatment, damage can be completely eliminated even in the above-described apparatus having a large electrode area.

Next, the reason why a defect due to plasma damage which is easily generated in the conventional hydrogen plasma processing is unlikely to be generated in the hydrogen plasma processing of the present invention using an apparatus capable of applying a high frequency to the substrate side electrode will be described. Although the cause of the damage caused by the hydrogen plasma treatment is not clear at present, the substrate is charged up by being immersed in the plasma atmosphere, and a voltage is applied between the gate and the channel, and the substrate is exposed. Since the temperature is relatively high at about 300 ° C., BT stress (bias and temperature stress) is imitated, and a model in which a defect occurs in the TFT often explains the phenomenon. According to this model, in the hydrogen plasma treatment of the present invention using a device capable of applying a high frequency also to the substrate-side electrode, the potential V of the substrate-side electrode is
_{Since DC} can be controlled by applying a high frequency to the substrate-side electrode, it is considered that charge-up of the substrate can be prevented. For this reason, it is possible to eliminate defects such as the shift of the threshold voltage which occur in the conventional hydrogen plasma processing.

The potential _VDC is always 0 V in the conventional hydrogen plasma processing using a device for applying a high frequency only to the counter electrode, but the potential _VDC is a voltage using a device capable of applying a high frequency also to the substrate side electrode. It is variable in the hydrogen plasma treatment of the invention. By setting the potential _VDC to 10 V to -100 V, the shift amount of the threshold voltage of the TFT after the hydrogen plasma treatment can be reduced to -1 V or less. It is particularly desirable that the potential _VDC be 5 V to -50 V. In this case, a threshold voltage shift is hardly observed. It is thought that the amount of shift of the threshold voltage is further reduced by setting the potential _VDC to -100 V or less. However, at this time, the possibility that the electrode is sputtered increases, which is not desirable.

In this embodiment, the description has been given of the case of the hydrogen plasma processing using the capacitively coupled parallel plate type plasma generator, but the shape of the apparatus is not limited to this. It is important to use a device capable of applying a high frequency to the electrode supporting the material to be subjected to the hydrogen plasma treatment.
The hydrogen plasma treatment may be performed not after lamination of the interlayer insulating film but after formation of the contact electrode.

As described above, if the present invention is applied,
A transistor having a large ON current, a small OFF current, and a steep rise of a sub-threshold voltage can be manufactured without any failure due to plasma damage or the like.

As an application of the present invention, for example, a liquid crystal display panel constituted by a TFT using amorphous silicon as an element material, a contact type image sensor, a thermal head with a built-in driver, and an organic EL are used as light emitting elements. An optical writing element or display element with a built-in driver, a three-dimensional IC, or the like can be considered. By using the present invention, high performance such as high speed and high resolution of these elements is realized.

Although FIG. 1 shows an example in which the present invention is applied to a poly-Si TFT manufacturing process, the present invention is not limited to this. The present invention is effective for all insulated gate field effect transistors in which at least a part of the channel region is polycrystalline. In an insulated gate transistor in which at least a part of a channel region is microcrystalline, or a transistor in which a part of a channel region is formed of an insufficiently hydrogenated amorphous semiconductor formed by a sputtering method, an evaporation method, or the like. Is also effective.

Further, even if the channel region is a single crystal,
When an element is formed in a recrystallized or solid-phase grown silicon layer like a three-dimensional IC, defects such as sub-grain boundaries which are likely to occur in the crystal are removed by the method of manufacturing a semiconductor device according to the present invention. Terminating the ring bond is effective in improving the characteristics.

Further, the present invention is effective for reducing the defect density at the interface of a hetero junction such as an HBT (hetero bipolar transistor). In particular, when at least one of the two semiconductor layers forming a heterojunction is formed of a non-single-crystal semiconductor, the hydrogenation treatment according to the present invention can reduce defects in the film and at the interface at the same time.

The present invention can be widely applied to all semiconductor processes, including solar cells and optical sensors, bipolar transistors, and static induction transistors using a non-single-crystal semiconductor as an element material.

[0033]

As described above, according to the present invention, po
High performance of an insulated gate field effect transistor in which at least a part of a channel region of a ly-Si TFT or the like is made of a non-single-crystal semiconductor can be realized without a defect due to plasma damage. Further, the present invention can be widely applied not only to the insulated gate field effect transistor but also to all semiconductor processes, and the effect is extremely large.

[Brief description of the drawings]

FIGS. 1A to 1E are process cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an electrical grounding relationship of a parallel plate type hydrogen plasma processing apparatus capable of applying a high frequency to not only a counter electrode but also a substrate side electrode in an embodiment of the present invention.

FIG. 3 is a diagram showing an electrical grounding relationship of a conventional parallel plate type hydrogen plasma processing apparatus capable of applying a high frequency to only a counter electrode.

FIG. 4 shows Nc subjected to hydrogen plasma processing using a parallel plate type hydrogen plasma processing apparatus capable of applying a high frequency to not only the counter electrode but also the substrate side electrode in the embodiment of the present invention.
a V _g -I _d characteristic diagram of HTFT.

FIG. 5 is a V _g -I _d characteristic diagram of an NchTFT subjected to hydrogen plasma processing using a conventional parallel plate type hydrogen plasma processing apparatus capable of applying a high frequency to only the counter electrode.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 Insulating support layer 101 Non-single-crystal silicon thin film 102 Gate oxide film 103 Gate electrode 104 Source region 105 Drain region 106 Channel region 107 Interlayer insulating film 108 Contact electrode 301 Counter electrode 302 Substrate electrode 303 Chamber 304 Counter electrode matching box 305 Counter Electrode high frequency power supply 306 Substrate side electrode matching box 307 Substrate side electrode high frequency power supply

Claims (1)

(57) [Claims] 1. A method for manufacturing a semiconductor device in which at least a part of a channel region of a transistor on a substrate is formed of a non-single-crystal semiconductor film, wherein a first electrode connected to a first electrode connected to a first electrode connected via a control circuit in a plasma generator. Two electrodes are opposed to each other, and a high-frequency electrode is applied to the first electrode through the control circuit.
A method for manufacturing a semiconductor device, wherein a hydrogen plasma treatment is performed on a non-single-crystal semiconductor film on the substrate while the electrodes are kept at 0 W / cm ² through the control circuit.