JP3259124B2 - Path switching operation monitoring method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital transmission apparatus which has a plurality of paths through which input data passes, and which employs a redundant configuration in which one path is normally selected, and when an abnormality occurs, the path is switched to the other path. The present invention relates to a path switching operation monitoring method in the above.

[0002]

2. Description of the Related Art As a method for monitoring a switching operation of a path of a data transmission apparatus employing a redundant configuration, for example, Japanese Patent Laid-Open No. 5-199 is disclosed.
JP-A-210-19 and JP-A-5-219033, "Path Check Circuit" or JP-A-3-19.
There is a “redundant system selection circuit” described in Japanese Patent No. 5228. When these conventional examples are applied to, for example, a 0/1 redundant system,
The schematic configuration is as shown in FIG.

In FIG. 1, reference numeral 1 denotes a 0-system data input terminal for inputting 0-system data, reference numeral 2 denotes a 1-system data input terminal for inputting 1-system data, and reference numeral 3 denotes a system selection signal. Input terminal. In the 0-system data and the 1-system data, pass pattern areas # 1 and # 2 are provided at predetermined positions of a predetermined frame length. In the case of system data, the path pattern B is inserted twice by the path pattern A inserter 4 and the path pattern B inserter 5, respectively. The upper part of FIG. 5 shows the data structure of the pattern A insertion signal a and the pattern B insertion signal b into which the path pattern has been inserted as described above. These signals a and b are respectively supplied to the switch 7
Is input to

On the other hand, based on the system selection signal input from the system selection signal input terminal 3, the switch control pulse generator 6 sets the logic "0" in the section of the pass pattern area # 1 and the logic of "0" in the section of the pass pattern area # 2. A switching control pulse c which is "1" and is the level of the input system selection signal in other data areas is generated. The middle part of FIG. 5 shows the data structure of the switching control pulse c.

[0005] Pattern A insertion signal a and pattern B insertion signal b
Is selected in the switch 7 in accordance with the level of the switching control pulse c. Therefore, the pass pattern areas # 1 and # 2
, The switch 7 is always operated, so that the output (switch output data d) of the path pattern inserted in each system is the same in both cases regardless of whether the system 0 or system 1 is selected. Is output. The lower part of FIG. 5 shows the structure of the switch output data d.

[0006] The path pattern matching unit 8 compares a pattern combination in the path pattern areas # 1 and # 2 with a predetermined pattern combination, and evaluates a failure based on the comparison result. FIG. 6 shows an example of a correlation between the verification result and the failure evaluation result. The illustrated example shows that the switch 7 operates normally only when the path pattern A is inserted into the path pattern area # 1 and the path pattern B is inserted into the path pattern area # 2. This rating result is output to the rating result output terminal 11. The switch output data d is output to the signal output terminal 9 as it is.

[0007]

By the way, in this type of data transmission apparatus, for example, if the system 0 fails and is switched to the system 1, the hardware of the system 0 can be replaced with a normal one so that the hardware of the system 0 can be replaced with a normal one . It is normal that the hardware configuration (for example, a printed circuit board) is divided at the portion indicated by the broken line. However, since the conventional method only evaluates the presence or absence of a failure of the switch 7, at the time of the abnormal evaluation, the cause is caused by the failure of the switch 7 itself or occurred in a section before the switch 7. I do not know if it is due to a breakdown. For this reason, it was not possible to determine which hardware should be replaced, and when replacing hardware, it was necessary to replace all normal hardware.

[0008] An object of the present invention is to solve such a problem,
An object of the present invention is to improve the ability to evaluate the location of a failure and improve maintenance efficiency when monitoring path switching operation.

[0009]

According to the present invention, there is provided a data transmission system for selectively switching one of a plurality of paths through which input data passes. A path pattern insertion unit that inserts a path pattern unique to the system into a predetermined area of data several times for each system, a unit that generates a selection control signal for selecting a system of a specific path, and a path control unit based on the selection control signal. A switch that switches the system to the specific one and reorganizes and outputs the path pattern group inserted in the data into a predetermined combination, and a combination of a path pattern group that may be output from the switch and A path pattern matching unit that compares the combination of the output path pattern groups to determine their matching, and a determination result obtained by the path pattern matching unit and the switch unit. Providing switching operation monitoring system having a failure assessment unit for assessing the presence or absence of failure in each path segment based on the combination of the output Pasupatan group.

[0010] In the above configuration, the failure evaluator, for example, determines a path based on a combination of a path pattern group that may be output from the switch and a result information that may be determined by the path pattern matching unit. A storage device that lists and stores rating information indicating the presence or absence of a failure for each section; an identification unit that identifies a determination result of the path pattern matching unit and a combination of a path pattern group output from the switch; It is effective to provide rating information extracting means for extracting rating information corresponding to the combination identified from the storage device in order to output the rating result more quickly.

[0011]

According to the present invention, a path pattern unique to the system is inserted several times into a predetermined area of the input data of a plurality of systems and input to the switch, where the path system is switched to a specific one. Are re-arranged into a predetermined combination and output. At this time, the combination of the path pattern group that is likely to be output from the switch and the combination of the actually output path pattern group are collated, and the collation result is compared with the combination of the path pattern group output from the switch. The fault evaluator evaluates the presence or absence of a fault for each path section based on the fault. As a result, not only whether there is a failure,
When a failure occurs, the path section or component that caused the failure is identified.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention, and shows an example in which the present invention is applied to a 0/1 redundant system as in the conventional example. In FIG. 1, FIG .
The same reference numerals are given to the same elements as those in the above configuration.

In this embodiment, as in the conventional example, pass pattern areas # 1 and # 2 are provided at the beginning of the 0-system data and the 1-system data.
In the case of system data, the path pattern B is inserted twice by the path pattern A inserter 4 and the path pattern B inserter 5, respectively, to obtain a pattern A insertion signal a and a pattern B insertion signal b. Further, the switch control pulse generator 6 operates in the pass pattern area # 1.
, A switching control pulse c which becomes the logic “1” in the section of the pass pattern area # 2 and the level of the input system selection signal in the other data areas is input to the switch 7. By always operating the switch 7 only in the portions of the respective path pattern areas # 1 and # 2, the switch output data d is inserted in each system regardless of whether the system 0 or system 1 is selected. The point that both of the obtained pass patterns are output in the same order is the same as in the related art.

In this embodiment, the first-stage failure evaluation is performed by comparing the pattern combination in the path pattern areas # 1 and # 2 of the switch output data d with the predetermined pattern combination by the path pattern matching unit 8. , And outputs the result to the fault evaluator 10 together with the switch output data d.

The failure evaluator 10 is realized by, for example, a programmed computer.
As shown in FIG. 2, the storage device 101 and the identification processing unit 10
2, the list collating unit 103, and the list information generating unit 104
It consists of: The storage device 101 stores a fault indicating presence / absence of a fault for each path section by a combination of a combination of path patterns that may be output from the switch 7 and a rating result that may be output from the path pattern matching unit 8. The grade list is stored. The identification processing unit 102 identifies the failure evaluation result sent from the path pattern collator 8 and the pattern combination of the path pattern areas # 1 and # 2 of the switch output data d. The processing unit 102 checks the failure rating list in the storage device 101 based on the identified combination, and extracts corresponding rating information. The list information output unit 104 generates a signal f indicating the failure evaluation result of the second stage based on the extracted evaluation information, and outputs the signal f to the evaluation result output terminal 11. The rating result signal f is, for example, a parallel signal for each rating section.

FIG. 3 shows an example of the failure rating list used in this embodiment. The illustrated example is based on the premise that a hardware configuration (for example, a printed circuit board) can be divided at a portion indicated by a broken line in FIG. In the figure, "Path pattern A inserter" and "Path pattern B" represent the failure evaluation results up to the input portions of the path pattern inserters 4 and 5 and the switch 7, and are referred to as "inside the switch". Is the fault evaluation result inside the switch 7, and “switch output” is the fault evaluation result from the output of the switch 7 to the input of the pass pattern collator 8. The “path pattern collator area # 1” and “path pattern collator area # 2” represent failure evaluation results of each area collation circuit inside the path pattern collator 8 (not shown). Furthermore, “normal” indicates normal operation, “failure” indicates failure operation, “failure *” indicates that any element has failed, and “unknown” indicates that no rating can be made.

The list information output unit 104 outputs a signal f representing the following evaluation result based on the result of the collation of the above-described failure evaluation list by the list collation unit 103. (1) When the pass pattern area # 1 matches the pass pattern A and the pass pattern area # 2 matches the pass pattern B, there is no abnormality in all rating sections (item number 2). (2) When the path pattern area # 1 matches the path pattern B and the path pattern area # 2 matches the path path pattern A, the redundancy switch 7 itself has failed (item number 4). (3) If both the path pattern areas # 1 and # 2 match the path pattern A, the switch 7 has failed. As the cause, it can be evaluated that the path is stuck to the 0-system side (not switched to the 1-system), but the evaluation of the matching circuit of the area # 2 in the path pattern matching device 8 is unknown. In this case, the hardware including the switch 7 may be replaced, and the evaluation result may be referred to again (item 1). (4) If the path pattern area # 1 matches the path pattern A, but the path pattern area # 2 does not match either of the path patterns A and B, the path pattern B inserter 5 has failed. However, there is still room for failure of the matching circuit in the area # 2 of the pass pattern matching device 8. In this case, first, the hardware including the pass pattern B inserter 5 is replaced, and the evaluation result may be referred to again (item number 3). The failure rating can be similarly performed for other item numbers.

As described above, in this embodiment, the fault evaluation is performed for each path section based on the failure evaluation result of the first stage by the path pattern collator 8 and the combination of the path patterns output from the switch 7. Thus, not only can the function of the switch 7 (whether or not the switching be performed) can be monitored, but also the failure site (section) can be evaluated, and the conventional problems can be solved at once. Further, when a failure occurs, the path section or hardware that caused the failure can be specified, so that the efficiency of maintenance work at the time of the failure can be remarkably improved as compared with the related art. In particular, the failure evaluator 10
Is realized by information processing as in the present embodiment, it is possible to respond more quickly when a failure occurs. The above is the description of the data transmission device adopting the redundant configuration of the 0/1 system, but is not necessarily limited to the above example.
The contents of the failure rating list shown in FIG. 3 can also be set arbitrarily.

[0019]

As is apparent from the above description, according to the present invention, the combination of the pass pattern verification results is also taken into consideration. It is possible to make detailed judgments such as whether the
This has the effect of increasing the ability to evaluate the failure site. This allows
It is possible to repair a faulty part with minimum necessary hardware replacement, and it is possible to improve maintenance efficiency as compared with the conventional method.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a detailed block configuration diagram of a failure evaluator according to the embodiment.

FIG. 3 is an explanatory diagram showing an example of a failure rating list used in the embodiment.

FIG. 4 is a block diagram of a conventional example.

FIG. 5 is an explanatory diagram showing a path pattern insertion process. The upper part shows the data structure of the pattern A insertion signal a and the pattern B insertion signal b, the middle part shows the data structure of the switching control pulse c, and (c) shows the switch output data. The example of the structure of d is shown.

FIG. 6 is an explanatory diagram showing a conventional failure evaluation result.

[Explanation of symbols]

 Reference Signs List 4 pass pattern A inserter 5 pass pattern B inserter 6 switch control pulse generator 7 switch 8 path pattern collator 9 data output terminal 10 failure evaluator 11 failure evaluation result output terminal 101 storage device 102 identification processing unit 103 list collation unit 104 List information output section

Claims (2)

(57) [Claims] In a data transmission system for selectively switching one of a plurality of paths through which input data passes, a path pattern unique to the system is inserted into a predetermined area of input data passing through each path several times for each system. A path pattern insertion unit, a unit for generating a selection control signal for selecting a system of a specific path, and a system for switching the system of the path to the specific system based on the selection control signal and the data inserted into the data. A switching unit that reorganizes the path pattern group into a predetermined combination and outputs the combination, and compares the combination of the path pattern group that may be output from the switching unit with the combination of the path pattern group that is actually output to determine the match. Path pattern matching means to be determined; and a path based on a combination of a result of determination by the path pattern matching means and a path pattern group output from the switch. Switching operation regime of the path and having an a fault assessment unit for assessing the presence or absence of failure in each between. 2. The failure evaluator according to claim 1, wherein the failure evaluator determines a failure in each path section based on a combination of a combination of path patterns that may be output from the switch and a result information that may be determined by the path pattern matching unit. A storage device in which rating information indicating presence / absence of a list is stored in a list, an identification unit for identifying a determination result of the path pattern matching unit and a combination of a path pattern group output from the switch, and a combination identified by the identification unit 2. A path switching operation monitoring system according to claim 1, further comprising: rating information extracting means for extracting rating information corresponding to the above from the storage device.