JP3301124B2 - Semiconductor device wiring and method of forming the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wiring for a semiconductor device and a method for forming the same.

[0002]

2. Description of the Related Art Along with the high integration of semiconductor devices, dimensional rules in the manufacture of semiconductor devices have become finer, and very high reliability is required for wiring. Normally, aluminum-silicon (Al-S
i) An alloy is used.

One of the problems with aluminum-based wiring is electromigration. Electromigration is a phenomenon in which when a high-density current flows through an aluminum-based wiring, aluminum atoms move along with the flow of electrons, and eventually the wiring is disconnected. As a countermeasure against electromigration, it is possible to increase the grain size of aluminum crystal grains or to form a wiring into a bamboo structure.

In recent years, stress migration has become a major problem as a factor in reducing the reliability of wiring. The stress migration is a phenomenon in which, when stress of an insulating film covering an aluminum wiring is applied to the aluminum wiring, diffusion of aluminum atoms occurs, and eventually a disconnection occurs. That is, pores are generated in the aluminum crystal grains due to the stress received from the insulating film. The movement of the vacancies causes the aluminum atoms to move, thereby breaking the wiring.

As a measure against stress migration,
The addition of copper to an aluminum-silicon alloy is being considered. It is said that by adding copper, copper captures vacancies, so that vacancies do not move and stress migration can be prevented. However, Al-
Even when wiring is formed using a Si-Cu alloy, it cannot be said that the occurrence of stress migration is sufficiently prevented.

As a countermeasure against electromigration, a wiring made of a Li-containing Al-based alloy is disclosed in
It is known from 32927. It is believed that by adding Li to Al, electromigration can be effectively suppressed for the following reasons. (A) The intermetallic compound Al ₃ Li precipitated at the Al grain boundary is
Suppresses movement of Al atoms. (B) The intermetallic compound Al ₃ Li has excellent compatibility with the Al metal lattice, and the interface between the precipitate and the Al metal lattice is a new Al metal.
It does not become an atomic diffusion path. (C) Since Al ₃ Li precipitated at the Al grain boundary has a function of increasing the tensile strength of the alloy, it suppresses deformation of wiring such as generation of vacancies and growth of projections due to electromigration.

[0007]

The use of an aluminum-lithium alloy as a wiring material for a semiconductor device is effective from the viewpoint of preventing electromigration. However, JP-A-2-232927
In the wiring made of a Li-containing Al-based alloy disclosed in Japanese Unexamined Patent Publication, the suppression of stress migration is not sufficient.

In a semiconductor device manufacturing process, after forming a wiring, a passivation film is deposited on the wiring. Next, a heat treatment at about 400 ° C. is applied. At that time, a defect (void) occurs in the wiring due to the thermal shrinkage of the passivation film, and as a result, stress migration occurs.

In general, it is considered that the higher the specific rigidity (= Young's modulus / specific gravity) of the wiring, the more difficult it is for the wiring to be deficient (voided) due to the thermal shrinkage of the passivation film. Al-1
% Si or Al-1% Si-0.5% Cu has a Young's modulus of about 6.5 × 10 ¹⁰ Pa. By adding Li to Al, the Young's modulus of the Al—Li alloy increases as shown in FIG. FIG. 5 shows various metals as A
1 shows a change in specific gravity of an Al-metal alloy when added to l. From FIG. 5, it can be seen that by adding Li to Al, A
The specific gravity of the l-Li alloy is significantly reduced. Li to Al
By increasing the addition amount, the Young's modulus of the Al-Li alloy increases and the specific gravity decreases, so that the Al-Li
The specific stiffness of the alloy increases.

As described above, since the Al-Li alloy has a high specific rigidity (= Young's modulus / specific gravity), it is considered that voids are hardly generated as compared with ordinary Al-Si or the like, but no voids are generated. However, even if an Al—Li alloy is used for the wiring of the semiconductor device, the suppression of the stress migration cannot be said to be sufficient.

Accordingly, it is an object of the present invention to provide a wiring for a semiconductor device capable of effectively suppressing stress migration and a method for forming the same.

[0012]

An object of the present invention is to provide a wiring used in a semiconductor device, comprising a first layer made of a metal or a metal compound, and an aluminum-lithium -gel.
This can be achieved by the wiring for a semiconductor device according to the first aspect of the present invention, which is constituted by the second layer made of a manium alloy.

In a preferred aspect of the wiring for a semiconductor device according to the first aspect of the present invention, the lithium content of the aluminum-lithium alloy is 0.1% by weight to 4% by weight.
It is. Alternatively , in a preferred embodiment, the germanium content is from 0.1% by weight to 5% by weight.

[0014] Alternatively, the above object is achieved by
A method for forming a wiring for a semiconductor device made of a lithium-based alloy, comprising: (a) a step of forming an aluminum layer or an aluminum alloy layer; And a step of forming a base alloy layer.

[0015] Alternatively, the above object is to provide
A wiring for a semiconductor device comprising a lithium-based alloy, wherein (a) an aluminum layer or an aluminum alloy layer is formed.
And (ii) ion-implanting lithium ions into such a layer.
To form an aluminum-lithium alloy layer
The present invention is characterized in that the
What is achieved by the wiring for a semiconductor device according to the second aspect
Can be.

[0016]

The semiconductor device wiring according to the first aspect of the present invention includes a second layer made of an Al-Li- Ge alloy having high specific rigidity. Therefore, after forming the wiring, a passivation film is deposited on the wiring,
Defects (voids) hardly occur in the wiring due to thermal shrinkage of the passivation film after heat treatment of about ΔC. However, although stress migration is unlikely to occur,
The prevention of the occurrence of stress migration is not complete with only the second layer.

In the wiring for a semiconductor device according to the first aspect of the present invention, a first layer made of a metal or a metal compound is formed below the second layer. Although the compressive stress of the passivation film is applied to the second layer, the formation of the first layer causes a tensile stress to act on the second layer from the first layer. As a result, the stress applied to the second layer is reduced, voids are not generated at all, and the occurrence of stress migration can be prevented very effectively.

Li is poor in workability, and if a large amount of Li is added to Al, depending on the etching process, Al-L
Li residue may remain during the etching of the i-based alloy. In this case, the wiring made of the Al-Li alloy is electrically short-circuited. FIG. 6 is a diagram in which a decrease in the yield of the semiconductor device caused by a short circuit in the wiring made of the Al—Li alloy is plotted against the Li content. From FIG. 6, A
When the Li content of the l-Li alloy becomes 5% by weight or more,
In some cases, the residue of Li causes a short circuit in the wiring, which may lower the yield of the semiconductor device.

Therefore, considering the yield of the semiconductor device, the preferred range of the Li content of the Al—Li alloy is as follows:
It is not less than 0.1% by weight and not more than 4% by weight.

As the amount of Si added to Al increases, the melting point of Al—Si alloy increases as the melting point of Al (660 ° C.) increases.
Decreases more rapidly. The melting point of the Al-Ge alloy is
As the amount of Ge added to Al increases, it decreases more rapidly than when Si is added. In an aluminum alloy high-temperature sputtering method, an aluminum alloy is sputtered while a semiconductor element as a base is heated to a predetermined temperature. As a result, the wiring material made of the aluminum alloy deposited on the base becomes a fluid state,
The state of deposition of the wiring material on the base is improved. As a result, step coverage is improved.

Normally, in a high-temperature sputtering method using pure aluminum, it is necessary to heat a semiconductor element as a base to about 550 ° C. or more. When the heating temperature is increased in this manner, the temperature of the chamber of the sputtering apparatus becomes high, gas is desorbed from the side wall of the chamber, impurities such as oxygen enter into the sputtered Al, and the formed wiring becomes cloudy, The problem that the surface of the wiring is roughened occurs. That is, many hillocks and the like are generated in the wiring, and a short circuit occurs between fine wirings. Therefore, it is preferable that the temperature at which the wiring material is made to flow is as low as possible.

When Al-1% Si is used as the wiring material, the wiring material can be reflowed by heating the base to 400 to 500 ° C. Furthermore, Al-5
In the case of% Ge, the wiring material can be reflowed by heating the base to 350 ° C. (Literature, “Al-
Ge REFLOW SPUTTERING FOR SUBMICRON-CONTACT-HOLE FI
LLING ", K. Kikuta, ET AL., 1991 VLSI MULTILEVEL IN
TERCONNECTION CONFERENCE Proceeding (June 11-12, 1
991), pp. 163/169).

By the way, when Li is added to Al,
The melting point of the Li alloy is slightly lower than the melting point of pure Al; However, when the Li content is 4% by weight or less, the decrease in the melting point is not remarkable. Therefore, in the case of performing high-temperature sputtering, the reflow of the wiring material made of an Al—Li alloy is not possible unless the temperature of the base is raised to a temperature (about 550 ° C.) similar to that of pure Al.

Therefore, when employing the high temperature sputtering method, it is desirable that germanium is contained in the aluminum-lithium alloy. In this case, the germanium content is more preferably 0.1% by weight or more and 5% by weight or less.

[0025]

The present invention will be described below with reference to examples.
Note that, in Examples 1 to 3 , the first aspect of the present invention
Of forming a semiconductor device wiring according to a conventional method according to the related art, and a fourth embodiment of the present invention will be described in a fourth embodiment.
For forming the semiconductor device wiring according to the present invention is described.

[0026] (Reference Example 1) Reference Example 1 relates to the production of the MOS transistor. Hereinafter, based on the manufacturing process of the MOS transistor, Reference Example 1
The step of forming the semiconductor device wiring will be described. In Reference Example 1 , the first layer is made of Ti. The second layer is Al-
It is made of a Li alloy (Al-0.5% Li) and is formed by a high-temperature sputtering method.

[Step-100] First, an element isolation region 12 and a gate region 14 are formed on a semiconductor substrate 10 by a conventional method, and ion implantation is further performed to form an LDD structure (FIG. 1A). )reference).

[Step-110] Next, a 250 nm thick SiO ₂ film is formed on the entire surface.
The conditions for forming the SiO ₂ film can be, for example, as follows. Gas used: SiH ₄ / O ₂ / N ₂ = 250/250/1
00 sccm Substrate temperature: 420 ° C. Pressure: 13.3 Pa Next, the entire surface is etched back to form a sidewall 16 in the gate region 14. The condition of etch back,
For example, it can be as follows. Working gas: C ₄ F ₈ = 50 sccm RF power: 1200 W Pressure: 2 Pa Then, in order to form the source / drain region 18,
Impurity ion implantation is performed. The conditions for ion implantation are, for example, N channel: As ⁺ 20 KeV 5 × 10 ¹⁵ /
cm ² P channel: BF ₂ ⁺²⁰ KeV 3 × 10 ¹⁵ /
cm ² (see FIG. 1B).

[Step-120] Thereafter, a 400 nm-thick interlayer insulating layer 20 made of, for example, a CVD oxide film using TEOS is formed under the following conditions, for example. Working gas: TEOS = 50 sccm Temperature: 720 ° C. Pressure: 40 Pa Further, a BPSG film 22 having a thickness of 500 nm is formed on the interlayer insulating layer 20 under the following conditions, for example (FIG. 1C).
reference). Gas used: SiH ₄ / PH ₃ / B ₂ H ₆ / O ₂ / N ₂ = 80
/ 7/7/1000/32000 sccm Temperature: 400 ° C Pressure: 1.0 × 10 ⁵ Pa

[Step-130] Next, after resist patterning, openings 24 are formed in the interlayer insulating layer 20 and the BPSG film 22 by dry etching. Dry etching conditions can be, for example, as follows. Working gas: C ₄ F ₈ = 50 sccm RF power: 1200 W Pressure: 2 Pa

[0031] [Step-140] to the next, metals, specifically to form a first layer 30 made of Ti by a sputtering method (see FIG. 2 (A)). T
The conditions for forming the first layer 30 made of i can be, for example, as follows. Power: 4 kW Film formation temperature: 150 ° C. Process gas: Ar = 100 sccm Set film thickness: 70 nm As a result, the first layer 30 is formed on the BPSG film 22 and in the opening 24.

[Step-150] Next, a second layer 32 of Al-Li (0.5%) is formed on the first layer 30 by a sputtering method (FIG. 2).
(B)). An Al-Li alloy is used as a target. The conditions for forming the second layer 32 can be, for example, as follows. Power: 22.5 kW Film forming temperature: 550 ° C. Process gas: Ar = 40 sccm Set film thickness: 500 nm Thereafter, resist patterning and dry etching are performed to form a wiring composed of the second layer and the first layer.
Dry etching conditions can be, for example, as follows. Working gas: BCl ₃ / Cl ₂ = 60/90 sccm Microwave power: 1000 W RF power: 50 W Pressure: 0.016 Pa

[Step-160] Further, an insulating film 40 is formed on the wiring (see FIG. 2C). For this purpose, first, a 100 nm-thick SiN layer is formed under the following conditions, for example. Working gas: SiH ₄ / NH ₃ / N ₂ = 180/500 /
720 sccm Temperature: 250 ° C. Pressure: 2.5 Pa Further, a PSN layer having a thickness of 500 nm is further formed thereon by, for example,
The film is formed under the following conditions. Gas used: SiH ₄ / PH ₃ / O ₂ / N ₂ = 80/7/1
000 / 32000sccm Temperature: 390 ° C Pressure: 1.0 × 10 ⁵ Pa

( Embodiment 1 ) Embodiment 1 is a first embodiment of the present invention for manufacturing a MOS transistor.
This is an example in which the semiconductor device wiring according to the aspect is applied. Less than
Below, based on the manufacturing process of the MOS transistor,
The step of forming the semiconductor device wiring according to the first embodiment will be described.
You. The first embodiment is different from the first embodiment in that the second layer 32 is made of Al-0.5% Li-5% Ge,
Is formed by a higher temperature sputtering method at a lower temperature.

[Step-200] This step is performed according to the steps from [Step-100] to [Step-1] in Reference Example 1.
40]. Through the above steps,
A first layer made of Ti is formed on the BPSG film 22 and in the opening 24.
Is formed.

[Step-210] Next, a second layer 32 of Al-0.5% Li-5% Ge is formed on the first layer by a sputtering method (FIG. 2B). reference). Al-Li-G as target
e alloy is used. The conditions for forming the second layer 32 can be, for example, as follows. Power: 22.5 kW Film formation temperature: 400 ° C. Process gas: Ar = 40 sccm Set film thickness: 500 nm In Reference Example 1 , the film formation temperature is 550 ° C. In the first embodiment , the film forming temperature can be 400 ° C.
Thereafter, resist patterning and dry etching are performed to form a wiring composed of the second layer and the first layer.
This step can be the same as [Step-150] in Reference Example 1 .

[Step-220] This step of forming an insulating layer on the wiring can be the same as [Step-160] of Reference Example 1 .

Second Embodiment A second embodiment is a modification of the first embodiment. Example 2 is Example 1
The difference is that a tungsten plug is buried in the opening 24 and the first layer 30 and the second layer 32 are formed on the tungsten plug and the BPSG film 22.
Incidentally, forming the second layer of Al-1% Si-0.5% Li-5% Ge in the usual sputtering method.

[Step-300] This step is performed in the same manner as in [Step-100] to [Step-1] of Reference Example 1.
30]. Through the above steps,
An opening 24 is formed in the interlayer insulating layer 20 and the BPSG film 22.

[Step-310] Next, a CVD process is performed on the BPSG film 22 and in the opening 24.
Tungsten is deposited by the method. The deposition conditions can be, for example, as follows. Gas used: WF ₆ / H ₂ = 95/550 sccm Temperature: 450 ° C. Pressure: 1.1 × 10 ⁴ Pa Film thickness: 400 nm Then, etch back is performed under the following conditions, for example, to obtain BP.
The tungsten on the SG film 22 is removed, leaving a tungsten plug 26 only in the opening 24 (see FIG. 3A). Working gas: SF ₆ = 50 sccm Microwave power: 850 W RF power: 150 W Pressure: 1.33 Pa

[0041] [Step-320] Formation of the first layer 30, formation of the second layer 32, formation of the wiring, and the steps of forming the insulating film 40, Reference Example 1 [Step-140], carried [Step-210] of Example 1
It can be the same as [Step- 160 ] of the first embodiment.
However, in [Step-140], the first Ti
Is formed on the tungsten plug 26 and the BPSG film 22 (see FIG. 3B). In addition, [Process
-210] , on the first layer, Al-1% Si
A second layer 32 of -0.5% Li-5% Ge is formed at a film formation temperature of 150 ° C. (see FIG. 3C).

( Embodiment 3 ) Embodiment 3 is also a modification of Embodiment 1. Example 3 is Example 1
The difference from the first embodiment is that when the second layer 32 is formed,
The point is that the sputtering method is employed.

[Step-400] This step is performed in the same manner as in [Step-100] to [Step-1] of Reference Example 1.
40]. Through the above steps,
A first layer made of Ti is formed on the BPSG film 22 and in the opening 24.
Is formed.

[Step-410] Next, the second layer 32 made of an Al—Li— Ge alloy
Is formed on the first layer 30 by a so-called co-sputtering method. Immediate Chi, target consisting of A l-Ge-Si (hereinafter, also referred to as Al-based target), and installing a target composed of Li into the chamber of the same sputtering apparatus. Then, a second layer 32 made of an Al—Li— Ge alloy is formed by simultaneously sputtering both targets. Sputtering condition of Al-based target Power: 22.5 kW Deposition temperature: 150 ° C. Process gas: Ar = 40 sccm Set film thickness: 500 nm Sputtering condition of Li target: Power: 2 kW Deposition temperature: 150 ° C. Process gas: Ar = 100 sccm Set film thickness: 10 nm Thereafter, resist patterning and dry etching are performed to form a wiring composed of the second layer 32 and the first layer 30. Dry etching conditions can be the same as in [Step-150] of Reference Example 1 .

[Step-420] This step of forming an insulating layer on the wiring can be the same as [Step-160] of Reference Example 1 .

Example 4 Example 4 relates to a wiring for a semiconductor device and a method of forming the same according to the second aspect of the present invention. That is, (a) a step of forming an aluminum layer or an aluminum alloy layer, and (b) a step of forming an aluminum-lithium alloy layer by ion-implanting lithium ions into the layer. I do.

[Step-500] This step is performed in the same manner as in [Step-100] to [Step-1] of Reference Example 1.
40]. Through the above steps,
A first layer made of Ti is formed on the BPSG film 22 and in the opening 24.
Is formed.

[Step-510] Then, an aluminum layer, Al—Si or A is formed on the first layer 30 made of Ti by sputtering.
An aluminum alloy layer made of l-Si-Ge (hereinafter, also referred to as an aluminum-based layer) is formed. Power: 22.5 kW Film forming temperature: 150 ° C. Process gas: Ar = 40 sccm Film thickness: 500 nm The aluminum-based layer can be formed by a high-temperature sputtering method.

[Step-520] Next, Li ⁺ is added to the aluminum-based layer by an ion implantation method to form an Al-Li-based alloy layer. The conditions for ion implantation can be, for example, as follows. Ion source: LiCl is heated to 614 ° C. or more for sublimation Acceleration voltage: 50 keV Dose amount: 1 × 10 ¹⁶ / cm ² or more After that, resist patterning and dry etching are performed to remove the Al—Li alloy layer and the Ti layer. Is formed. The conditions of dry etching are described in, for example, Reference Example 1.
[Step-150].

[Step-530] Further, an insulating film 40 is formed on the wiring. This process is San
It can be the same as [Step- 160 ] of the first embodiment.

Although the present invention has been described based on the preferred embodiments, the present invention is not limited to these embodiments. The first layer, the second layer, or the aluminum-based layer can be formed by not only a sputtering method but also, for example, an evaporation method, a chemical vapor deposition method, or an electron beam evaporation method. The first layer is not limited to Ti, but may be other metals or metal compounds such as W, Mo, Cu, TiON, TiN, W
N, TiSi ₂ , WSi ₂ , CoSi ₂ , NiSi ₂ , Ni
It can also be composed of Si. And a second layer, A l
-1% Li-5% Ge, Al-1% Si-1% Li-5
% Ge and the like.

[0052]

According to the semiconductor device wiring of the present invention,
Since the Al-Li alloy is used as the wiring material, not only the electromigration resistance is improved,
The specific rigidity is higher than that of an ordinary Al-Si alloy, and the stress migration resistance is improved.

Further, the semiconductor according to the first aspect of the present invention
In the device wiring, a second wiring made of an Al-Li alloy is used .
Since the first layer made of Ti or the like is formed under this layer, the passivation film (insulating film) formed on the wiring
Also, the voids are not generated in the wiring due to the influence of the thermal stress, and the stress migration can be suppressed very effectively.

In a preferred embodiment of the wiring for a semiconductor device according to the first aspect of the present invention, since the Li content of the Al—Li— Ge alloy is 4% by weight or less, the Al—Li— G
The workability of the second layer made of e- alloy is the same as that of the conventional Al-Si
It does not decrease as compared with the alloy, and a normal dry etching process can be used. Therefore, the manufacturing cost of the semiconductor device does not increase, the reproducibility of the manufacturing process of the semiconductor device is good, and the manufacturing yield of the finally manufactured semiconductor device does not decrease.

The arrangement for a semiconductor device according to the first aspect of the present invention .
Oite line, since during Al-Li alloy Ge is contained, can be second reflow temperature of the layer, 50 to 200 ° C lower than that of Al in the high-temperature sputtering It is.

Li has high reactivity, and therefore has high hygroscopicity. When Li is formed by a sputtering method, during maintenance of a sputtering apparatus, the target made of Li or an alloy containing Li must be stored in a vacuum container or the like so that the target does not come into contact with the atmosphere, and maintenance of the target is complicated. Becomes If the vacuum container leaks, the target absorbs moisture, and as a result, the target cannot be used.

According to the semiconductor device wiring and the method of forming the same according to the second aspect of the present invention, Li is ion-implanted into the aluminum-based layer by ion implantation using LiCl. Since LiCl is not as reactive as Li alone, the above-mentioned problem does not occur.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a step of forming a wiring for a semiconductor device in Reference Example 1 .

FIG. 2 is a view for explaining a step of forming a wiring for a semiconductor device in Reference Example 1 , following FIG. 1;

FIG. 3 is a view illustrating a step of forming a wiring for a semiconductor device according to a second embodiment of the present invention;

FIG. 4 is a graph showing the relationship between the amount of Li added in Al and the Young's modulus of an Al—Li alloy.

FIG. 5 shows that Al is obtained by adding various metals to Al.
FIG. 3 is a diagram showing a change in specific gravity of a metal alloy.

FIG. 6 is a diagram illustrating a relationship between a yield of a semiconductor device and a Li content.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Semiconductor substrate 12 Element isolation region 14 Gate region 16 Side wall 18 Source / drain region 20 Interlayer insulating layer 22 BPSG film 24 Opening 26 Tungsten plug 30 First layer 32 Second layer 40 Insulating film

──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3205-21/3213 H01L 21/768

Claims (3)

(57) [Claims] 1. A wiring used in a semiconductor device, comprising: a first layer made of a metal or a metal compound; and a second layer made of an aluminum-lithium-germanium alloy. Equipment wiring. 2. The wiring for a semiconductor device according to claim 1, wherein the germanium content is 0.1% by weight or more and 5% by weight or less. 3. An aluminum-lithium -germanium alloy
A method for forming a wiring for a semiconductor device made of gold, the method comprising: (a) forming an aluminum layer or an aluminum alloy layer; and (b) ion-implanting lithium ions into the layer to form aluminum-lithium -germanium. alloy
Forming a layer , the method comprising: forming a layer ;