JP3335769B2 - Fixed-point square root arithmetic unit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fixed-point square root arithmetic unit and, more particularly, to a fixed-point square root arithmetic unit capable of preventing occurrence of overflow and underflow in a calculation process.

[0002]

2. Description of the Related Art A conventional fixed-point square root arithmetic unit employs a Newton method (Newton-Raphson method) for square root operation.
And dichotomy. The Newton method is implemented by repeating the following equation.

[0003]

(Equation 1)

From the above equation, a = 1 / x ^1/2 is obtained, and ax =
Find x ^1/2 . Here, a _n represents an n-th approximation of No. results, x is representative of the No. numbers.

[0005] Here, a conventional fixed-point square root arithmetic unit using the bisection method for the square root operation will be described. FIG. 9 is a block diagram showing a configuration of a conventional fixed-point square root arithmetic unit. In FIG. 9, square root data is provided from a data input unit 1 for inputting square root data to a square root operation unit 2, and exchanges data with a data storage unit 5 including a register or a memory group. While performing the calculation, the square root result determination unit 3 determines whether or not the calculation result is appropriate. If determined to be appropriate, the square root result output unit 4 outputs the result. At this time, the data input unit 1, the square root calculation unit 2, the calculation result determination unit 3, the square root result output unit 4, and the data storage unit 5 are controlled by the control unit 6.

Next, a specific method when the dichotomy is used for the square root operation will be described with reference to FIGS. 9 and 10. FIG.
FIG. 10 is a flowchart showing an operation procedure of a conventional square root calculator using the bisection method. First, the square root number to be squared is input from the data input unit 1 to the square root arithmetic unit 2 (step S).
1). At this time, for the input square root number to be input, a fixed-point format of the square root result of the integer part 2L and the decimal part 2M bits is prepared in the data storage unit 5 (step S).
2). Next, as the first square root result, a numerical value in which 1 is set in the position of L bit which is half of 2 L bits of the integer part is set as an initial value, and the square root result of the second and subsequent times is 1 in the first round.
Is set to a numerical value with the bit on the LSB side being set to 1 sequentially for each calculation loop from the bit for which the is set (step S
3). Next, the square of the square root of the square root of the square root of the square root of the square root of the square root of the square root of the square root result is calculated (step S4).

If the square root number to be squared is equal to or larger than the square of the square root result in step S4, the arithmetic result determination unit 3 determines whether the bit currently being processed for the square root result is the LSB or not (step S4). Step S6).

In step S6, if the currently processed bit is the LSB of the square root result, the value is output to the square root result output unit 4 as the final square root result. On the other hand, the bit currently being processed is L in the square root result.
If it is not SB, the operation from step S3 is performed again.

If the square root number to be squared is less than the square of the square root result in step S4, the bit set to 1 in step S3 is set to 0 for the numerical value of the square root result.
Is set again as the square root result (step S5). Subsequently, in step S6, if the currently processed bit of the given square root result is the LSB, that is the final square root result. On the other hand, if the bit currently being processed for the given square root result is not the LSB, the operation from step S3 is performed again.

Next, a specific example of calculation will be described with reference to the flowchart described above. For example, when the square root extraction of 9.5625 is performed by using 8-bit integer addition / subtraction multiplication, the root squared number is represented by 1001.1001 in a fixed-point format having a 4-bit integer part and a 4-bit decimal part.

First, as step S1, the data input unit 1
, And a fixed-point format of 4 bits for the integer part and 4 bits for the decimal part is prepared in the data storage unit 5 in step S2. Next, in step S3, the square root calculation unit 2 calculates the square root squared number 1001.100.
0010.0000 is given as the initial value of the square root result of 1. Here, the initial value of the square root result is a value obtained by setting 1 to a half position of the number of bits of the integer part of the square root number to be squared. Assuming that the initial value is 0100.0000, if it is squared, it will be 10000.
00000000, which exceeds the number of squares to be exposed.

[0012]

(Equation 2)

In step S4, the square of the initial value of the square root result is compared with the square root number to be squared. Since the square of the initial value of the square root result is less than the square root number to be squared {Equation (1-1)}, it is determined in step S6 whether or not the currently processed bit set in step S3 is the LSB. Do. The currently processed bit set in step S3 as an initial value is L
Since it is not at the position of SB, the process returns to step S3 again, and sets 1 to the next bit of the initial value of the square root result to obtain a new square root result. Perform comparison {Equation (1-2)}.

In equation (1-2), since the number of roots to be opened is larger, it is determined in step S6 whether or not the currently processed bit set in step S3 is the LSB. In this case, the square root result is 0011.0000. Since the bit currently being processed is not in the LSB, the operation of step S3 is performed again, and the next bit is set to 1 to set a new square root result.
In step S4, this value is squared and compared with the square root to be exposed {Equation (1-3)}.

In equation (1-3), since the number of flat faces to be opened is smaller, step S3 is executed in step S5.
Resets the bit for which 1 was set to 0 to 0. Next, in step S6, it is determined whether the 0 bit (the bit currently being processed) reset in step S5 is an LSB. In this case, since the reset bit of 0 (the bit currently being processed) is not in the LSB, the operation of step S3 is performed again, the next bit is set to 1, and the new square root result 0011.0
In step S4, this value is squared and compared with the square root to be opened {Equation (1-4)}.

In the equation (1-4), since the number of flat faces to be opened is smaller, the step S3 is executed in the step S5.
The bit for which 1 was set (the bit currently being processed) is reset to 0. Next, in step S6, it is determined whether the 0 bit (the bit currently being processed) reset in step S5 is an LSB. In this case, since the reset bit of 0 (the bit currently being processed) is not in the LSB, the operation of step S3 is performed again, the next bit is set to 1 to obtain a new square root result 0011.0010, and in step S4 , This value is squared and compared with the square root to be opened.
5) Equation｝.

In the equation (1-5), the flat number to be opened is smaller, so that in step S5, step S3
The bit for which 1 was set (the bit currently being processed) is reset to 0. Next, in step S6, it is determined whether the 0 bit (the bit currently being processed) reset in step S5 is an LSB. In this case, since the reset bit of 0 (the bit currently being processed) is not in the LSB, the operation of step S3 is performed again, and the next bit is set to 1 to obtain a new square root result 0011.0001, and in step S4 , This value is squared and compared with the square root to be opened.
6) Equation｝.

In the equation (1-6), since the number of flat faces to be opened is larger, it is determined in step S6 whether or not the one bit set in step S3 is the LSB. The square root result in this case is 0011.0001, and since 1 is in the LSB, this is the final square root result.

In the conventional fixed-point square root arithmetic unit using the bisection method, the squared result of the square root result, which is a process in the middle of square root, cannot be stored in 8 bits, and overflow and underflow have occurred.

[0020]

Since the conventional fixed-point square root arithmetic unit using the bisection method performs square root operation in the above procedure, the result of the multiplication performed in the middle of square root operation is the operand. In order to make the operation result the same fixed-point format as the operand, the operation result is processed.

In order to obtain the operation result without overflow in the conventional fixed-point square root arithmetic unit, the multiplication result in step S4 needs to be within a range where the square root number to be expanded can be expressed by an integer. In other words, in a conventional fixed-point square root arithmetic unit, when implementing square root arithmetic using integer multiplication, it can only be effectively used for fixed-point square root squared numbers whose operation results fall within a range that can be expressed by integers. There was a problem.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and when a fixed-point square root operation is realized using integer multiplication and integer comparison, the square root is constructed with a wider number of bits. It is an object of the present invention to obtain a fixed-point square root arithmetic unit that can perform square root arithmetic with respect to a fixed-point square root squared number.

[0023]

The first aspect of the fixed-point square root arithmetic unit according to the present invention comprises a 2L-bit integer part,
For fixed-point data composed of M-bit fractional parts, the square root extraction operation is divided into a step of obtaining a square root primary result and a step of obtaining a square root quadratic result, and the square root primary result and square root quadratic result are calculated. By adding, 2L-bit integer part and 2M
A fixed-point square root arithmetic unit for obtaining an square root result composed of a fractional part of bits, the square root primary part comprising an L-bit integer part and an M-bit decimal part, receiving the fixed-point data and performing a bisection method. A square root primary result calculation unit that gives a result, the square root primary result determination unit that receives the square root primary result, and determines whether the result is the final result of the square root primary result calculation unit, and the square root primary result determination unit Receiving the final square root primary result determined in the above, and using a bisection method to obtain the square root secondary result to be the lower M bits of the 2 M-bit fractional part of the square root result, A square root secondary result determination unit that receives a secondary result and determines whether the result is the final result of the square root secondary result calculation unit, and a final square secondary determined by the square root secondary result determination unit. Results and before And a final Unexamined primary result and addition operation, and a No. result adding unit that gives Unexamined result, in the Unexamined secondary result calculation unit, the fixed-point data,
The square root of the square root of the square root of the square root result obtained by calculating the square root primary result and square root secondary result is obtained by giving the maximum square root quadratic result that is greater than or equal to, to obtain a square root result truncated less than precision I do.

The second embodiment of the fixed-point square root arithmetic unit according to the present invention
The aspect of the square root of the square root of the square root of the square root result obtained by calculating the square root primary result and square root quadratic result, receiving the square root result of truncating less than the precision of the fixed point data, In this case, the square root extraction unit further adds a value "1" to the least significant bit of the square root result. ing.

The third embodiment of the fixed-point square root arithmetic unit according to the present invention
Is a process of obtaining a square root primary result by performing square root arithmetic on fixed-point data composed of 2 bits for rounding, 2 L-bit integer part, and 2 M-bit fraction part;
Performed separately in the process of obtaining the square root square result, by adding after shifting the square root primary result and square root secondary result,
A fixed-point square root arithmetic unit for obtaining a square root result composed of 2 bits for rounding, an integer part of 2L bits, and a fraction part of 2M bits, and receives the fixed-point data and obtains an L-bit integer by a bisection method. And a square root primary result calculation unit configured to provide the square root primary result, and determining whether the result is the final result of the square root primary result calculation unit. Receiving the final square root primary result determined by the square root primary result determination unit, and the lower M bits and the one-bit rounded-off bit of the 2 M-bit fractional part of the square root result by the bisection method. And a square root quadratic result calculation unit that gives a square root quadratic result to be M + 1 bits, and receives the square root quadratic result, and determines whether the result is the final result of the square root quadratic result calculation unit. The square root secondary result determination unit, and receives the final square root secondary result determined by the square root secondary result determination unit, and the least significant bit that is a rounded bit of the final square root secondary result is “1”, And, when the fixed-point data is larger than the square value of the square root result obtained by calculating the square root primary result and the square root secondary result, the least significant bit of the square root result is set to “1”. An arithmetic unit for rounding less than the precision to give the square root result rounded to the nearest whole number by adding.

[0026]

According to the first aspect of the fixed-point square root arithmetic unit according to the present invention, when performing square-root arithmetic on fixed-point data composed of a 2L-bit integer part and a 2M-bit decimal part, A square root primary result calculation unit obtains a square root primary result composed of an L-bit integer part and an M-bit fractional part by a dichotomy, and in the square root quadratic result calculation unit, the fixed-point data is converted to the square root primary result and the square root. The square root of the square root result of the square root result obtained by calculating the quadratic result is obtained by the dichotomy, and the square root primary result and square root quadratic result are calculated. In this case, an underflow does not occur and a square root less than the precision can be obtained.

The second embodiment of the fixed-point square root arithmetic unit according to the present invention
According to the aspect, by providing the less-precision round-up square root operation unit, for the square root result of truncating less than the precision of the fixed-point data, fixed-point data, the square root primary result and the square root quadratic result are calculated. If the squared value of the square root result is larger than the square value of the square root result, "1" is added to the least significant bit of the square root result. It is possible to obtain a square root result that does not occur and is rounded up below the precision.

The third embodiment of the fixed-point square root arithmetic unit according to the present invention
According to the aspect, when the square root calculation is performed on the fixed-point data composed of 2 bits for rounding, an integer part of 2L bits, and a fraction part of 2M bits, the square root primary result calculation unit performs The integer part of L bits and M
A square root primary result composed of a fractional part of a bit is obtained, and a square point quadratic result calculation unit has fixed-point data that is equal to or larger than the square value of the square root result obtained by calculating the square root primary result and the square root quadratic result. Such an M + 1-bit square root quadratic result is obtained by a bisection method. Next, in the square root secondary result determination unit, it is determined whether or not this square root secondary result is the final result in the square root secondary result calculation unit, and the determined final square root secondary result is rounded to the precision less than the rounding calculation unit. By giving
The least significant bit which is the rounded bit of the square root result is "1", and the fixed-point data is larger than the square value of the square root result obtained by adding the square root primary result and the final square root secondary result. In such a case, by adding "1" to the least significant bit of the square root result, overflow and underflow do not occur in the calculation process, and the square root less than the precision can be obtained.

[0029]

【Example】

<First Embodiment> A first embodiment of a fixed-point square root arithmetic unit according to the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing the configuration of this embodiment. In FIG. 1, the data to be exposed is a data input unit 1 for inputting the data to be exposed.
From A, the square root primary result calculation unit 2A is subjected to arithmetic processing while exchanging data with a data storage unit 5A composed of a register or a memory group to obtain a square root primary result. This result is provided to a square root primary result determination unit 3A, and a determination is made as to whether or not the calculation result is appropriate. If it is determined to be appropriate, it is provided to a square root secondary result calculation unit 7A. Recalculation is performed by the result calculation unit 2A.

In the square root quadratic result calculation unit 4A, a calculation for obtaining the square root quadratic result is performed using the square root square root and the square root square primary result, and the square root quadratic result is obtained. This result is provided to a square root secondary result determination unit 7A, and a determination is made as to whether or not the calculation result is appropriate. If it is determined that the calculation result is appropriate, a square root primary result and square root extraction are performed in a square root result addition unit 8A in consideration of the decimal point position. The addition of the secondary result is performed, and the final square root result is output to the square root result output unit 9A.

At this time, the data input unit 1A, square root primary result calculation unit 2A, square root primary result determination unit 3A, square root secondary result calculation unit 4A, square root secondary result determination unit 7A, square root result addition unit 8A, square root result output The unit 9A and the data storage unit 5A are controlled by the control unit 6A.

The fixed-point square root operation according to the present embodiment uses a square root primary result consisting of half the number of bits to be squared so that the squared value has the same number of bits as the square root to be squared. By calculating the lower side that cannot be expressed by the square root primary result using the square root quadratic result expressed by half the number of bits below the decimal point, it is possible to obtain the operation result truncated below the fixed-point precision range. it can.

Next, a specific calculation example will be described with reference to FIG. 1 described above and the flowcharts for explaining the operation of the present embodiment shown in FIGS. For example, in a case where the square root of 9.5625 is performed using 8-bit integer addition and multiplication, the square root is represented by 1001.1001 in a fixed-point representation of a 4-bit integer part and a 4-bit decimal part.

First, as step S1a, the number of squares to be exposed 1001.1001 is input from the data input section 1A, and step S2a
In the data storage unit 5A, a fixed-point format having an integer part of 2 bits (L bits) and a decimal part of 2 bits (M bits) is prepared. Next, in step S3a, the square root primary result calculation unit 2A gives 10.00 as an initial value of the square root primary result of the square root squared number 1001.1001.

[0035]

(Equation 3)

In step S4a, the square of the initial value of the square root primary result is compared with the square root number to be squared. The square of the initial value of the square root primary result is less than the square root number to be squared (2-1)
In equation (1), the square root primary result determination unit 3A determines in step S6a whether the one bit set in step S3a is an LSB. Since 1 set in step S3a as an initial value is not at the position of the LSB, the process returns to step S3a again, sets 1 to the next bit of the initial value of the square root primary result to obtain a new square root primary result 11.00, and in step S4a , This value is squared and compared with the square root to be opened {Equation (2-2)}.

In the equation (2-2), the square root primary result is expressed as 2
Since the square root does not reach the number of square roots to be squared, the square root square primary result determination unit 3A performs step S3a in step S6a.
It is determined whether or not the one bit set in (1) is the LSB. In this case, the square root primary result is 11.00, and 1 is LS
Since it is not in B, the operation in step S3a is performed again, the next bit is set to 1 to obtain a new square root primary result 11.10, and in step S4a, this value is squared and compared with the square root squared number. {Equation (2-3)}.

In equation (2-3), since the number of flat faces to be opened is smaller, step S5a is executed in step S5a.
The bit for which 1 was set in 3a is reset to 0. Next, the square root primary result determination unit 3A determines in step S6a whether the 0 bit reset in step S5a is the LSB. In this case, since the reset 0 does not exist in the LSB, the operation of step S3a is performed again, the next bit is set to 1 to obtain a new square root primary result 11.01, and this value is squared in step S4a. A comparison with the number of square roots to be opened {Equation (2-4)}.

In the equation (2-4), since the number of flat faces to be opened is smaller, the step S5a is executed in the step S5a.
The bit for which 1 was set in 3a is reset to 0. Next, the square root primary result determination unit 3A determines in step S6a whether the 0 bit reset in step S5a is the LSB. In this case, since the reset 0 is in the LSB, the final square root primary result is 11.00.

Next, the square root quadratic result is obtained. First, as step S7a, a format of a square root quadratic result of lower 2 bits (M bits) of a decimal part 4 bits (2M bits) is prepared in the data storage unit 5A. The square root squared result is a value such that square root squared number minus (primary square root squared result + square root squared result) ² is a positive minimum. That is, the above equation is developed by defining the square root squared number as x, the square root squared result as y, and the square root squared result as z, and x
−y ² −2yz−z ² , which is transformed into

[0041]

(Equation 4)

Where z is the maximum z that satisfies this relationship.
Is the desired value. First, the left side of equation (2-5) is as follows.

[0043]

(Equation 5)

Next, in the square root quadratic result calculation unit 4A,
The square root quadratic result z is assumed as step S8a. Since the square root quadratic result in this case is the lower 2 bits of the decimal part 4 bits, the right side of the equation (2-5) is obtained by setting z = 0.010.

[0045]

(Equation 6)

Is as follows. Here, in order to perform the integer operation, it is necessary to consider the decimal point position. Therefore, the decimal point position is changed according to the following procedure.

First, (2-5) shown by the equation (2-6)
The decimal point is removed from the calculation result on the left side of the equation and regarded as an integer, and then the decimal point is removed from the calculation result on the right side of equation (2-5) shown in equation (2-7), as follows.

[0048]

(Equation 7)

Here, in order to align the digits on both sides, the left side is shifted to the 4-bit (2M bit) MSB side, the square root primary result on the right side is shifted to the 2-bit (M bit) MSB side, and the square root quadratic result is converted to 4 bits (M bits). Bit (2M bits) is shifted to the MSB side.

Next, as step S9a, both sides are compared {Equation (2-8)}.

[0051]

(Equation 8)

In equation (2-8), since the left side is smaller than the right side, in step S10a, the bit for which 1 was set in step S8a is reset to 0. Next, in the square root secondary result determination unit 7A, the step S11a is performed in the step S11a.
It is determined whether the 0 bit reset in 10a is an LSB. In this case, since the reset 0 is not in the LSB, the operation of step S8a is performed again, and the next bit is set to 1 to obtain a new square root secondary result 01, and step S9
In a, the left side and the right side are compared ｛(2-9)
formula}.

In the equation (2-9), since the left side is greater than the right side, the square root quadratic result determination unit 7A determines in step S11
a, the 1 bit set in step S8a is set to LS
B is determined. In this case, since 1 is in the LSB, 01 is obtained as the final square root quadratic result. Then, in step S12a, the square root extraction result adding unit 8A removes the decimal point from the square root primary result, regards the result as an integer, and performs an integer addition operation on the value shifted to the 2-bit (M-bit) MSB side, thereby obtaining the final result. To obtain the square root result 110001. In order to match the decimal point position of the square root result, the fourth bit (2M bits) from the LSB side of the square root result is used as the decimal point position, and the square root result with the precision less than the integer part 4 bits and the decimal part 4 bits rounded down 00
11.0001 can be obtained.

<Second Embodiment> A second embodiment of the fixed-point square root arithmetic unit according to the present invention will be described with reference to FIG. FIG. 4 is a block diagram showing the configuration of this embodiment. In FIG. 4, the square root result obtained by rounding off less than the precision obtained in the first embodiment is provided from the lower precision rounded down data input unit 1B to the lower precision rounding and square root calculator 2B.

The less-precision rounded-square operation unit 2B performs an operation process on the quadratic squared result while exchanging data with the data storage unit 5B composed of a register or a memory group.

The square root addition unit 3B performs an addition operation on the square root quadratic result rounded up to below the precision and the square root primary result, and the square root squared result rounded up to below the precision is the square root result output unit 4B.
B.

At this time, the less-precision rounded-down data input unit 1B, the less-precision round-up square root calculator 2B, the square root result adding unit 3B, the square root result output unit 4B, and the data storage unit 5B are controlled by the control unit 6B.

Next, a specific example of calculation will be described with reference to FIGS. 4 and 5 which are described above and which illustrate the operation of this embodiment.

First, as a step S1b, a square root operation result obtained by truncating less than the precision of the fixed point is obtained in the same procedure as in the first embodiment, and the fractional precision truncated data input section 1B is obtained.
From the precision to the round-up and square-root calculation unit 2B. If the precision of the square root result is rounded up, the expression (2-5) for obtaining the square root quadratic result described in the first embodiment should be such that left side <right side.

In equation (2-5) used in the first embodiment, the square root quadratic result that satisfies left side ≧ right side is obtained. In this embodiment, the minimum square root quadratic result that satisfies left side ≦ right side is obtained. Since the result is needed, by adding 1 to the LSB of the largest square root quadratic result that satisfies left-hand side> right-hand side in equation (2-5), left-hand side <
Can be the right side.

More specifically, in the less-precision round-up and square root calculator 2B, the left side and the right side of the equation (2-9) described in the first embodiment are compared as step S2b. Of course,
Since the left side is greater than the right side, 1 is added to the LSB of the square root quadratic result 01 to obtain the square root quadratic result 10 in step S3b. Here, when left side = right side, 01 is the square root square result as it is.

Next, in step S4b, the square root extraction result adder 3B removes the decimal point from the square root primary result and regards the result as an integer, and performs an integer addition operation on 110000 which is a value shifted to the 2-bit (M-bit) MSB side. As a result, a final square root result 110010 is obtained. Finally, in order to adjust the decimal point position of the square root result, the position of the fourth bit (2M bits) from the LSB side of the square root result is set as the decimal point position, thereby rounding up the precision of the integer part 4 bits and the decimal part 4 bits. The square root result 0011.0010 can be obtained.

<Third Embodiment> A third embodiment of the fixed-point square root arithmetic unit according to the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing the configuration of the present embodiment. In FIG. 6, the square root data is supplied from a data input unit 1C for inputting the square root data to a square root primary result calculation unit 2C, and the data is exchanged with a data storage unit 5C composed of a register or a memory group. While performing the exchange, the arithmetic processing is performed to obtain the first square root result. This result is provided to the square root primary result determination unit 3C, and a determination is made as to whether or not the calculation result is appropriate. If the calculation result is determined to be appropriate, the determination is provided to the square root secondary result calculation unit 4C. Result calculation unit 2C
Is recalculated.

The square root quadratic result calculation unit 4C performs an operation to obtain the square root square root result using the square root square root and the square root square root primary result, and obtains the square root square root result. This result is given to the square root secondary result determination unit 7C, and the appropriateness of the calculation result is determined. If determined to be appropriate, the square root primary result and square root extraction are performed in the square root result addition unit 8C in consideration of the decimal point position. An addition operation of the secondary result is performed.

In the square root result rounding operation unit 9C,
An operation is performed on the LSB of the square root result obtained by the square root result adding unit 8C to obtain a square root result in which bits less than the precision are rounded, and the final square root result is output to the square root result output unit 10C. .

At this time, the data input section 1C, the square root primary result calculation section 2C, the square root primary result determination section 3C, the square root secondary result calculation section 4C, the square root secondary result determination section 7C, the square root result addition section 8C, and the square root rounding result are rounded. Calculation unit 9C, square root result output unit 1
0C, the data storage unit 5C is controlled by the control unit 6C.

Next, a specific example of calculation will be described with reference to FIG. 6 described above and FIGS. 7 and 8 which are flowcharts illustrating the operation of this embodiment. For example, in the case where bits less than the precision in the fixed-point representation are rounded off to obtain a square root result of 8 significant digits, the square root to be rounded is added with 2 bits in advance in consideration of the rounding. And represented by 10 bits. In other words, in the square root extraction of the square root squared 9.5625, if the square root squared number is represented by a fixed-point representation of 2 bits for rounding, 4 bits for the integer part, and 4 bits for the decimal part, the result is 001011.1001. Note that 2 bits for rounding may be added to the LSB side.

The square root result of the conventional square root operator using the dichotomy is

[0069]

(Equation 9)

And the square root value is 000011.0001
Is obtained. In the conventional fixed-point square root arithmetic unit using the bisection method, the squared result of the square root result in the process of square root does not fit in 10 bits, and overflow and underflow occur.

Therefore, when the present embodiment shown in FIG. 6 is applied, the same operation is performed as follows.

First, as step S1c, the number of squares to be exposed, 001001.1001, is input from the data input section 1C.
As c, a fixed-point format for the square root primary result of 2 bits for the integer part and 2 bits for the decimal part is prepared in the data storage unit 5C.

Next, in step S3c, the square root primary result calculation unit 2C gives 10.00 as the initial value of the square root primary result of the square root to be squared 001001.1001.

[0074]

(Equation 10)

In step S4c, the square of the initial value of the square root primary result is compared with the square root number to be squared. The square of the initial value of the square root primary result is less than the square root squared. (3-1)
In equation (1), the square root primary result determination unit 3C determines in step S6c whether the one bit set in step S3c is the LSB. Since 1 set in step S3c is not at the LSB position, step S3c is performed again.
By performing the operation of 3c, the next bit is set to 1 to obtain a new square root primary result 11.00, and in step S4c, this value is squared and compared with the square root squared {3-2}
formula}.

In the equation (3-2), the square root primary result is expressed as 2
Since the square root is less than the square root number to be squared, the square root square primary result determination unit 3C performs step S3c in step S6c.
It is determined whether or not the one bit set in (1) is the LSB. In this case, the square root primary result is 11.00, and 1 is LS
Since it is not in B, the operation in step S3c is performed again, the next bit is set to 1 to obtain a new square root primary result 11.10, and in step S4c, this value is squared and compared with the square root squared number. {Equation (3-3)}.

In equation (3-3), the number of flat faces to be opened is smaller.
The bit for which 1 was set in 3c is reset to 0. Next, in the square root primary result determination unit 3C, it is determined in step S6c whether the 0 bit reset in step S5c is the LSB. In this case, since the reset 0 is not in the LSB, the operation in step S3c is performed again, the next bit is set to 1 to obtain a new square root primary result 11.01, and in step S4c, this value is squared and A comparison with the number of roots to be opened is performed {Equation (3-4)}.

In the equation (3-4), since the number of flat faces to be opened is smaller, the step S5c is executed in the step S5c.
The bit for which 1 was set in 3c is reset to 0. Next, in the square root primary result determination unit 3C, it is determined in step S6c whether the 0 bit reset in step S5c is the LSB. In this case, since the reset 0 is in the LSB, the final square root primary result is 11.00.

Next, the square root quadratic result is obtained. First, in step S7c, a format of a square root quadratic result of 3 bits, that is, 2 bits of lower 2 bits (M bits) of 4 bits (2M bits) and 1 bit of rounding off is prepared in the data storage unit 5C. The square root squared result is the square root squared number minus
(Primary square root result + quadratic square root result) A value such that ² is a positive minimum. That is, the above equation is developed with x as the square root squared, y as the square root primary result, and z as the square root quadratic result, and xy ²
−2yz−z ² , which is modified to obtain the expression (2-5). The maximum z that satisfies this relationship is the value to be obtained.

The left side of equation (2-5) is as shown in equation (2-6). Next, the square root quadratic result calculation unit 4C assumes the square root quadratic result z as step S8c. Since the square root quadratic result in this case is the lower 2 bits of the 4 bits of the decimal part and 1 bit for rounding, when z = 0.00100, the right side of the equation (2-5) is obtained.

[0081]

[Equation 11]

Is obtained. Here, in order to perform the integer operation, it is necessary to consider the decimal point position. Therefore, the decimal point position is changed according to the following procedure.

First, (2-5) shown by the equation (2-6)
The decimal point is removed from the calculation result on the left side of the equation and regarded as an integer, and then the decimal point is removed from the calculation result on the right side of equation (2-5) shown in equation (3-5), and the result is as follows.

[0084]

(Equation 12)

Here, in order to align the digits on both sides, the left side is shifted to the 6-bit (2M bits + 2 bits) MSB side, and the square root primary result is shifted to the 3-bit (M + 1 bits) MSB side.

Next, as step S9c, both sides are compared {Equation (3-6)}.

[0087]

(Equation 13)

In equation (3-6), since the left side is smaller than the right side, in step S10c, the bit for which 1 was set in step S8c is reset to 0. Next, step S11
c, the 0 bit reset in step S10c is L
It is determined whether it is SB. In this case, since the reset 0 does not exist in the LSB, the operation of step S8c is performed again, the next bit is set to 1, and the new square root secondary result 01 is obtained.
In step S9c, the left side and the right side are compared {Equation (3-7)}.

In the equation (3-7), since the left side is greater than the right side, the square root quadratic result determination unit 7C determines in step S11
c, the one bit set in step S8c is LS
B is determined. In this case, since 1 is not in the LSB, the operation in step S8c is performed again, and the next bit is set to 1 to obtain a new square root quadratic result 011. In step S9c, the left side and the right side are compared. (3
-8) Equation｝.

In equation (3-8), since the left side is smaller than the right side, in step S10c, the bit for which 1 was set in step S8c is reset to 0. Next, in the square root secondary result determination unit 7C, the step S11c is performed in the step S11c.
It is determined whether the 0 bit reset in 10c is the LSB. In this case, since the reset 0 is in the LSB, 010 is obtained as the final square root quadratic result. Then, in step S12c, the square root primary result is represented by 3 bits (M
By performing an integer addition operation with 1100000 which is a value shifted to the MSB side (bit + one bit for rounding), a square root result 1100010 is obtained.

Next, in the square root result rounding operation section 9C, in step S13c, the LSB, which is the rounded bit of the square root quadratic result obtained in step S12c, is 1, and the left and right sides of equation (2-5) are The relationship on the left side>
If it is the right-hand side, 1 is added to the LSB of the square root result obtained in step S12c, and the square root less than the precision of the fixed point is rounded. On the other hand, the LSB of the square root quadratic result is 0 or (2 If the relationship between the left side and the right side of the equation (5) is not left side> right side, the square root result obtained in step S12c is the square root result rounded down to the precision of the fixed point. Here, the square root result obtained in step S12c is 1100
010, the square root result is shifted to the LSB side by one bit in order to match the decimal point position of the square root result rounded off,
By setting the fourth bit position from the LSB side as the decimal point position, it is possible to obtain the final square root result 0011.0001 obtained by rounding off the precision of the integer part 4 bits and the decimal part 4 bits.

[0092]

According to the fixed-point square root arithmetic unit of the first aspect, it is possible to obtain a square root result in which the precision is truncated to less than the precision without causing overflow or underflow in the operation process. Since the number of bits is the same as the number of bits of the fixed-point data, square rooting can be performed on fixed-point data having a larger number of bits than in the past.

According to the fixed-point square root arithmetic unit of the second aspect, it is possible to obtain a square root result rounded up to a lower precision without causing overflow or underflow in the operation process, and the bit required for the square root arithmetic unit is used. Since the number is the same as the number of bits of the fixed-point data, square rooting can be performed on fixed-point data having a larger number of bits than in the past.

According to the fixed-point square root arithmetic unit of the third aspect, two bits for rounding in consideration of rounding less than the precision of the square root result are added to the fixed-point data in advance, so that overflow and underflow in the arithmetic process are performed. The square root result can be obtained by rounding less than the precision without generating the fixed point data, and the number of bits required in the square root calculation unit is the same as the number of bits of the fixed point data. Is possible.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of a fixed-point square root arithmetic unit according to the present invention.

FIG. 2 is a flowchart illustrating the operation of the first embodiment of the fixed-point square root arithmetic unit according to the present invention.

FIG. 3 is a flowchart illustrating the operation of the first embodiment of the fixed-point square root arithmetic unit according to the present invention.

FIG. 4 is a block diagram showing a configuration of a second embodiment of the fixed-point square root arithmetic unit according to the present invention.

FIG. 5 is a flowchart illustrating the operation of a fixed-point square root arithmetic unit according to a second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a third embodiment of the fixed-point square root arithmetic unit according to the present invention.

FIG. 7 is a flowchart illustrating an operation of a fixed-point square root arithmetic unit according to a third embodiment of the present invention.

FIG. 8 is a flowchart illustrating the operation of a fixed-point square root arithmetic unit according to a third embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a conventional fixed-point square root arithmetic unit.

FIG. 10 is a flowchart illustrating the operation of a conventional fixed-point square root arithmetic unit.

[Explanation of symbols]

1A, 1C data input section, 1B truncated data input section with less than precision, 2B Round-up square root less than precision section, 2A, 2
C square root primary result calculation unit, 3A, 3C square root primary result determination unit, 4A, 4C square root secondary result calculation unit, 5A, 5B,
5C data storage unit, 6A, 6B, 6C control means, 7
A, 7C square root secondary result determination unit, 8A, 3B, 8C square root result adding unit, 9C square root rounding calculation unit, 9A,
4B, 10C Square root result output unit.

Continuation of the front page (56) References JP-A-3-260723 (JP, A) JP-A-3-75927 (JP, A) JP-A-2-245825 (JP, A) JP-A-2-219127 (JP) , A) JP-A-62-58333 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 7/552 G06F 7/38

Claims (3)

(57) [Claims] 1. A square root extraction operation is performed on fixed-point data composed of a 2L-bit integer part and a 2M-bit fraction part, into a step of obtaining a square root primary result and a step of obtaining a square root quadratic result. A fixed-point square root arithmetic unit for obtaining a square root result composed of a 2L-bit integer part and a 2M-bit decimal part by adding the square root primary result and the square root quadratic result, Receiving the square root primary result by the bisection method and providing the square root primary result formed by an L-bit integer part and an M-bit fractional part; A square root primary result determination unit that determines whether or not the final result is a final result. The final square root primary result determined by the square root primary result determination unit is received. A square root quadratic result calculating unit for obtaining the square root quadratic result to be the lower M bits, receiving the square root quadratic result, and determining whether the result is the final result of the square root quadratic result calculating unit A square root secondary result determiner, and a final square root secondary result determined by the square root secondary result determiner, and an addition operation of the final square root primary result, and a square root result adder that gives the square root result. In the square root quadratic result calculation unit, the fixed-point data is the square root quadratic result that is equal to or greater than the maximum square value of the square root result obtained by calculating the square root primary result and square root quadratic result. A fixed-point square root arithmetic unit, which obtains a square root result by rounding off less than precision. 2. Receiving the square root result in which the precision of the fixed-point data is rounded down,
When the square root of the square root result is larger than the square value of the square root result obtained by calculating the square root primary result and the square root quadratic result, "1" is added to the least significant bit of the square root result. The fixed-point square root arithmetic unit according to claim 1, further comprising a square root lower-rounding calculator that provides a square root result rounded up to a lower precision. 3. A process for obtaining a first-order square root result by performing square root arithmetic on fixed-point data composed of 2 bits for rounding, an integer part of 2L bits, and a fraction part of 2M bits. The result is divided into steps for obtaining the result, and the square root primary result and the square root quadratic result are shifted and then added, so that 2 bits for rounding, an integer part of 2L bits and 2
What is claimed is: 1. A fixed-point square root arithmetic unit for obtaining a square root result formed of an M-bit fractional part, comprising: receiving the fixed-point data, and forming the square root by using a bisection method with an L-bit integer part and an M-bit decimal part. A square root primary result calculation unit that gives a primary result; a square root primary result determination unit that receives the square root primary result and determines whether the result is the final result of the square root primary result calculation unit; and the square root primary result determination Receiving the final square root primary result determined in the section, the square root method gives the square root secondary result to be M + 1 bits by the lower M bits and the 1-bit rounded-off bit of the 2 M-bit fractional part of the square root result. A square root quadratic result calculation unit, and a square root quadratic result determination unit that receives the square root quadratic result and determines whether the result is the final result of the square root quadratic result calculation unit, Receiving the final square root secondary result determined in the fixed part, the least significant bit which is a rounded bit of the final square root secondary result is “1”, and the fixed-point data is the square root primary result and the When the square root of the square root result obtained by calculating the final square root quadratic result is greater than the square value of the square root result, “1” is set in the least significant bit of the square root square result.
And a less-than-precision rounding operation unit that gives the squared result with the less than precision rounded by adding.