JP3340279B2 - Semiconductor device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a selective epitaxial growth technique and a method of manufacturing the same.

[0002]

2. Description of the Related Art A conventional bipolar transistor manufacturing process using selective epitaxial growth is shown in FIGS.
A description will be given according to (d). These figures each show a cross-sectional view of a bipolar transistor. The semiconductor crystal substrate 101 is oxidized in a high-temperature oxygen atmosphere to form a first insulating layer 102. In addition, in-situ d
A base electrode layer 103 containing impurities is deposited by an opposing CVD method (a method of depositing silicon while doping impurities), and a second insulating layer 104 is further deposited by a CVD method. This is shown in FIG. Next, the second insulating layer 104 is anisotropically etched.
And the base electrode 103, the first insulating layer 102
The opening is formed so that the hole is exposed. After that, a part of the first insulating layer 102 is removed by wet etching,
The surface of the semiconductor crystal substrate is exposed. At this time, the first insulating layer 102 is also etched laterally, and as shown in FIG. 4B, the opening wall of the first insulating layer 102 is larger than the opening wall of the base electrode 103. It is in a state of being spread outward.
At this time, as shown in FIG.
The opening wall portion 02 is inclined upwardly facing and has a trapezoidal shape whose bottom area on the semiconductor substrate side is smaller than that on the base electrode side. Next, in an epitaxial growth apparatus, a heat treatment is performed in a hydrogen atmosphere to remove a natural oxide film formed on the semiconductor crystal substrate 101 exposed in the previous step, and then an epitaxial growth layer is selectively formed.
This epitaxial growth layer contains impurities and forms the base layer 105. This is shown in FIG. Next, a third insulating layer 106 is deposited on the second insulating layer 104 and in the opening by a CVD method, and the third insulating layer 106 remains on the opening wall in a fan-shaped sectional shape. Anisotropic etching is performed so that the surface of the base layer 105 is exposed. Thereafter, in-situ doping CVD is performed on the base layer 105 and the third insulating layer 106.
Forming an emitter electrode layer 107 containing impurities by a method,
This is treated at a high temperature to remove this impurity from the base layer 1.
Then, the emitter layer 108 is formed by diffusion to form a bipolar transistor having a structure as shown in FIG.

[0003]

FIG. 5 is an enlarged view of an end portion of the epitaxial growth layer corresponding to FIG. 4C. When a bipolar transistor is manufactured by the above-described method, an epitaxial growth layer 105 grows on the insulating layer 102 in the peripheral portion as shown in FIG. Therefore, thermal stress is generated, and crystal defects occur in the epitaxial growth layer 105 in the peripheral portion. Also,
By the facet growth of the selective epitaxial growth layer 105, as shown in FIG.
Has a tapered shape in which the opening end wall does not contact the base layer 105, so that a space 109 is formed between the base layer 105, the first insulating layer 102, and the base electrode layer 103. Occurs. Process gas is confined in the space 109 during epitaxial growth. This gas enters the base layer or the base electrode as voids in the subsequent heat treatment step, causing an increase in the base link region and the base electrode resistance. For this reason, the high speed performance of the bipolar transistor has been hindered. In addition, impurities in the semiconductor crystal substrate 101 are sucked out due to crystal defects generated in the base layer, and have a conductivity type opposite to that of the impurities in the base region. Increases,
This has hindered the high-speed operation of the bipolar transistor. Further, when impurities in the semiconductor crystal substrate 101 reach the base electrode layer 103, a leak occurs between the base electrode layer 103 and the collector layer in the semiconductor crystal substrate 101, and the operation of the bipolar transistor is performed. Failure to do so.

[0004] The present invention has been made in view of the above problems, and has been made by eliminating the space between the base layer, the first insulating layer, and the base electrode layer as compared with the conventional method. No crystal defects in the base layer occur, the base resistance is reduced,
It is an object of the present invention to provide a semiconductor device which has no leakage between a base electrode layer and a collector layer, is stable and has a high speed transistor, and a method of manufacturing the same.

[0005]

In order to solve the above-mentioned problems, a semiconductor device according to the present invention is manufactured by the following steps. The method of manufacturing a semiconductor device according to the present invention includes a step of forming a first insulating layer made of a silicon oxide film on a silicon semiconductor substrate, and a step of forming a base electrode layer on the first insulating layer. forming a step of forming a second insulating layer on said base electrode layer, an opening for exposing the first insulating layer through said second insulating layer and the base electrode layer, wherein
Forming a third insulating layer on the side wall of the opening;
Etching the first insulating layer exposed by the opening , the side wall of which is covered with the insulating layer, to expose the semiconductor substrate on a surface enlarged than the opening, and heat treating the first insulating layer. Deforming the first insulating layer so that the angle between the side wall surface of the opening of the layer and the exposed surface of the semiconductor substrate becomes an acute angle; and forming a base layer on the surface of the semiconductor crystal substrate exposed to the opening. And a step of performing epitaxial growth. Further, the semiconductor device manufactured by the above-described method has a structure in which the opening wall of the first insulating layer and the semiconductor device are formed in half.
Among the angles formed by the conductor substrate , the angle on the inner circumferential side of the opening is not more than the angle formed by the facet surface in the epitaxial growth layer and the interface between the epitaxial growth layer and the semiconductor substrate .

[0006]

[0007]

By manufacturing a transistor by the above method, the first insulating layer is deformed so that the angle between the side wall surface of the opening provided in the first insulating layer and the exposed surface of the semiconductor substrate is acute. Therefore, when the base layer is formed by epitaxial growth, no space is generated between the first insulating layer, the base layer, and the base electrode layer, so that no void is generated in the base layer or the base electrode. , Base link region and base electrode resistance are reduced. Further, since no epitaxial layer grows on the first insulating layer even in the peripheral portion, no crystal defects occur in the base layer formed by this epitaxially grown layer. So half
Since there is no extraction of impurities in the conductive substrate , the base resistance is reduced and a higher-speed bipolar transistor can be formed. Further, since the impurity in the semiconductor substrate does not reach the base region, leakage between the base and the collector is reduced, and stable operation of the bipolar transistor can be ensured.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS.
This will be described with reference to the drawings. These figures each show a cross-sectional view of a bipolar transistor. First,
The silicon substrate 10 on which the N-type collector layer is formed is oxidized in a high-temperature oxygen atmosphere, and an oxide film 11 is formed on the silicon substrate 10 as a first insulating layer, for example, to a thickness of 50 nm. The thickness of the oxide film becomes the thickness of the base layer in a later step.
It is formed with a desired film thickness of about 0 to 100 nm as appropriate. Further, a P-type polysilicon base on which boron is doped by an in-situ doping CVD method.
A nitride film 13 as a contact electrode layer 12 and a second insulating layer;
Each is formed by a full-surface CVD method to have a structure as shown in FIG.

Next, an opening is formed by anisotropic etching such as RIE so as to penetrate the second insulating layer 13 and the base electrode 12 so that the oxide film 11 is exposed. afterwards,
A part of oxide film 11 is removed by isotropic etching such as wet etching to expose the surface of the semiconductor crystal substrate.
At this time, the oxide film 11 is also etched laterally, and as shown in FIG.
As shown in FIG. 3B, the opening wall of the oxide film 11 is wider than the opening wall of the base electrode 12. Also, as shown in FIG. 1B, the opening wall of the oxide film 11 is inclined upward and the opening of the oxide film 11 has a bottom area on the substrate side and a bottom area on the base electrode side. It becomes a trapezoid smaller than the bottom area. The above is almost the same as the conventional process shown in FIG.

Next, instead of performing the epitaxial growth immediately after removing the native oxide film in the epitaxial growth apparatus as in the prior art, a high-temperature heat treatment is performed in a reducing atmosphere or an inert atmosphere to open the oxide film 11. The processing is performed so that the side wall is formed to be inclined downward. That is, the opening of the oxide film 11 has a trapezoid whose bottom area on the substrate side is larger than that on the base side. Such a shape in which the angle between the side wall surface and the exposed surface of the semiconductor substrate is an acute angle is hereinafter referred to as an inverted taper shape. Due to this heat treatment, the reverse tapered shape of the opening wall of the oxide film 11 progresses sequentially from the semiconductor substrate toward the base electrode. The shape of the oxide film 11 at the time when the upper end of the inverted tape shape reaches the base electrode 12 as shown in FIG. 1C is called "complete inverted tape". As will be described in detail later, the higher the temperature of this heat treatment and the longer the time, the more easily the oxide film 11 tends to have a completely inverted tapered shape. Therefore, the oxide film 11
Conditions such as the atmosphere, temperature, and time of the heat treatment can be appropriately set so as to obtain a preferable shape according to the film thickness and characteristics of the film. For example, in a hydrogen atmosphere at a temperature of 1100
By performing the heat treatment at 60 ° C. for a time of 60 seconds, a 57 ° complete inverted tape shape can be formed. After the oxide film 11 is completely inverted tape-shaped as described above, the base layer 14 is formed by epitaxial growth in the same apparatus. The base layer 14 has a growth temperature of 800 as an example.
C., a growth pressure of 1330 Pa, and a growth time of 600 seconds, a flow rate of 15 l / min H ₂ as a carrier gas and a flow rate of 0.4 l / min SiH ₂ Cl as a silicon source gas.
Using _2, de - Pingugasu is a B ₂ H ₆ in H ₂ 15
A gas mixed with 0 ppm is flowed at a flow rate of 120 l / min.
Min. Of HCl at the same time, and boron is removed in-situ.
The film is formed while opping. The facet surface of the epitaxial growth layer 14 and the epitaxial growth layer 14
The angle formed by the interface between the substrate and the Si substrate 10 is 60 degrees.
As shown in (d), no space is formed between the first insulating layer 11, the base electrode layer 12, and the base layer 14, unlike the conventional method. Further, since the epitaxial growth layer does not grow on the insulating layer even in the peripheral portion as in the conventional method, no thermal stress occurs in the epitaxial growth layer, and a defect-free base layer can be formed.

Thereafter, a third insulating layer 15 is deposited on the nitride film 13 and on the opening wall by the CVD method, and the third insulating layer 15 remains on the opening wall in a fan-shaped cross section.
Anisotropic etching such as RIE is performed so that the surface of the base layer 14 is exposed. After that, in-situ doping CVD is performed on the base layer 14 and the third insulating layer 15.
An emitter electrode layer 16 containing arsenic is formed by a method, and this is subjected to a high temperature treatment to diffuse the impurities into the base layer 14 to form an emitter layer 17, thereby forming a bipolar transistor having a structure as shown in FIG. -The transistor is completed.

Here, further referring to FIG.
The heat treatment for obtaining the shape will be described in detail. FIG. 2 shows that the oxide film 11 has a thickness of 50 nm and a hydrogen pressure of 1.3 ×.
In the case of 10 ³ Pa, the relationship between the temperature and the time required to form a complete reverse tape is shown. If heat treatment is performed on the higher temperature side and longer time side than the solid line, the oxide film 11 has a completely inverted tapered shape. For example, a heat treatment at 900 ° C. needs to be performed for 5 minutes or more, and a heat treatment at 1000 ° C. requires 40 seconds or more. Conversely, heat treatment for 1 minute is 97
Must be performed above 0 ° C. The figure also shows the relationship between the temperature and the time of the heat treatment in a hydrogen atmosphere necessary for removing the natural oxide film, which has been performed before the epitaxial growth. If the heat treatment is performed at a higher temperature than the broken line in the drawing for a longer time, the natural oxide film is removed. That is, it can be seen that the conventional heat treatment cannot always obtain a sufficient complete inverted tape shape. On the other hand,
If the heat treatment is performed in a hydrogen atmosphere under the conditions for obtaining the shape, the natural oxide film is sufficiently removed, and a high-quality silicon single crystal can be epitaxially grown.

Next, a second embodiment of the present invention will be described with reference to FIGS. As in the first embodiment, a silicon substrate 1 on which an N-type collector layer is formed
An oxide film 11 as a first insulating layer, a base electrode layer 12 of P-type polysilicon doped with boron, and a nitride film 13 as a second insulating layer are formed on the first insulating layer (FIG. 3 (a)). )).

Next, an opening is formed by anisotropic etching such as RIE so as to penetrate through the second insulating layer 13 and the base electrode 12 so that the oxide film 11 is exposed. afterwards,
As in the first embodiment, the oxide film 11 is not partially removed by isotropic etching to expose the surface of the semiconductor crystal substrate. A third insulating layer 18 is deposited on the side wall, and anisotropic etching such as RIE is performed so that the third insulating layer 18 remains in a fan-shaped cross-sectional shape on the opening side wall (FIG. 3).
(B)).

After that, the oxide film 1 is isotropically etched.
1 is removed to expose the surface of the semiconductor crystal substrate. At this time, the oxide film 11 is also etched laterally, and the opening wall of the oxide film 11 is wider than the opening wall of the base electrode 12 as shown in FIG. Becomes

Thereafter, as in the first embodiment, a high-temperature heat treatment is performed in a reducing atmosphere or an inert atmosphere in an epitaxial growth apparatus, and the side wall of the opening of the oxide film 11 is formed so as to be inclined downward. (FIG. 3 (d)), and a base layer 14 is formed by epitaxial growth in the same apparatus (FIG. 3 (e)). Here, an insulating film 18 for insulating the base electrode and the emitter electrode is provided.
Is already formed on the side wall of the base electrode opening,
An emitter electrode layer 16 containing arsenic is formed on the base layer 14 and the third insulating layer 18 by a CVD method, and the impurities are diffused into the base layer 14 by subjecting the emitter electrode layer 16 to a high-temperature treatment. Then, a bipolar transistor having the same structure as that of FIG. 1E is completed.

According to the method of this embodiment, the base electrode 12
Since the side wall surface of the opening is covered with the insulating film 18, the epitaxial growth film grows on the side wall of the opening of the base electrode 12 during the epitaxial growth for forming the base layer 14, and the emitter area is reduced. Problems can be prevented.

In the above embodiment, the heat treatment in a hydrogen atmosphere is described as an example. However, since the inverted tape shape of the oxide film mainly depends on the temperature and time of the heat treatment, another reducing gas or, for example, nitrogen is used. It is also possible to perform a heat treatment using an inert gas such as argon. Further, in the above embodiment, an NPN transistor has been described, but the present invention can be applied to a PNP transistor.

[0019]

As described above, according to the present invention, a high-performance bipolar transistor can be obtained. That is, in the transistor manufactured by the conventional method, as shown in FIG. 5, a space 109 is formed between the first insulating layer 102, the base layer 105, and the base electrode layer 103, and the first insulating layer 1 is formed.
02 has a structure in which the base layer 105 grows on the base layer 02.
In the present invention, a crystal defect is generated in the base layer 105, whereas in the present invention, a space is not generated as shown in FIG. 1D, and the base layer 14 is formed on the first insulating layer 11 even in the peripheral portion. Has no crystal defects in the base layer 14. Therefore, no void is generated in the base layer or the base electrode layer as compared with the conventional transistor.
Furthermore, since there is no absorption of impurities in the silicon substrate, the base resistance is reduced as compared with the conventional method, and a higher-speed bipolar transistor can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 2 is a view showing heat treatment conditions according to the present invention.

FIG. 3 is a sectional view illustrating a manufacturing process of a semiconductor device according to a second embodiment of the present invention;

FIG. 4 is a cross-sectional view illustrating a manufacturing process of a conventional semiconductor device.

FIG. 5 is an enlarged sectional view of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Si substrate, 11 ... Oxide film, 12 ... Base electrode layer, 13 ... Nitride film, 14 ... Base layer, 15 ... Third insulating film, 16 ... Emitter electrode layer, 17 ... Emitter layer, 18 ... Third insulating film

Claims (3)

(57) [Claims] 1. A silicon oxide film on a silicon semiconductor substrate.
Forming a first insulating layer made of, forming a first base over scan electrode layer on an insulating layer, forming a second insulating layer on said base electrode layer, wherein Forming an opening through the second insulating layer and the base electrode layer to expose the first insulating layer; forming a third insulating layer on the side wall of the opening; Etching the first insulating layer exposed by the opening whose side wall is covered with a layer to expose a semiconductor substrate on a surface that is larger than the opening; and heat treatment of the first insulating layer. Deforming the first insulating layer such that the angle between the side wall surface of the opening and the exposed surface of the semiconductor substrate becomes an acute angle; and epitaxially growing a base layer on the surface of the semiconductor crystal substrate exposed to the opening Semiconductor device having a process Manufacturing method. 2. An angle formed between an opening wall of the first insulating layer and the semiconductor substrate, wherein an inner peripheral side of the opening is a facet surface in the epitaxial growth layer, and a semiconductive layer between the epitaxial growth layer and the semiconductor layer.
請 to equal to or less than the angle of the interface between the body substrate
The method for manufacturing a semiconductor device according to claim 1 . 3. A method for forming a first insulating layer on a semiconductor substrate,
A base electrode layer is formed on the first insulating layer, a second insulating layer is formed on the base electrode layer, and a first insulating layer is formed through the second insulating layer and the base electrode layer. Forming an opening for exposing the layer, etching the first insulating layer exposed by the opening, exposing the semiconductor substrate on a surface larger than the opening, and exposing the semiconductor crystal to the opening In a bipolar transistor, a layer epitaxially grown on a surface of a substrate is used as a base diffusion layer, and a third insulating layer is formed on a side wall of an opening penetrating the second insulating layer and the base electrode layer. Among the angles formed by the semiconductor substrate and the side wall surface of the insulating film opening surrounding the epitaxial growth layer, the angle on the epitaxial growth layer side is the facet surface in the epitaxial growth layer, the epitaxial growth layer and the semiconductor substrate. A semiconductor device having an angle equal to or less than an angle formed by an interface with the semiconductor device.