JP3361276B2 - Power semiconductor module - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor module in which a plurality of power semiconductor chips such as diodes, thyristors and transistors are mounted on one metal base.

[0002]

2. Description of the Related Art Welding machines, uninterruptible power supplies, communication power supplies,
A power supply device such as a charger, a power supply for plating, and a motor control rectifies an AC power supply using a diode or a thyristor, and rectifies the rectified DC power into a bipolar transistor or
High frequency AC is converted by an inverter using a transistor such as OSFET or IGBT as a control element. Furthermore, when obtaining a direct current at the output, this high-frequency alternating current is transformed by a transformer, and this transformed alternating current is rectified again using a diode to obtain a direct current. As a result, the power supply device has the feature of being downsized.

In these power supply devices, a plurality of semiconductor elements such as diodes, thyristors, transistors, etc. are housed in the form of a chip in one module and used as a power semiconductor module. A schematic plan view of this power semiconductor module is shown in FIG. Reference numeral 4 denotes an insulating plate made of ceramic or the like, and a wiring pattern made of copper foil is formed on one surface of the insulating plate 4 in advance, and a copper foil is formed on the entire other surface of the insulating plate 4. A metal base 2 has a solder chip mounted on the metal base 2 and an insulating plate 4 mounted on the solder chip. Further, a solder chip is mounted on a required portion of the wiring pattern of the insulating plate 4, and power semiconductor chips 26a to 26d and 28a to 28 are mounted on the solder.
d, 30a, 30b are mounted and soldering is performed by a reflow furnace.

[0004]

However, a plurality of power semiconductor chips 26a to 26d, 28a to 28d, 30 are used.
The area of the insulating plate 4 on which the a and 30b are mounted becomes large. Therefore, at the time of soldering the insulating plate 4 and the metal base 2, the voids 32a in which air or gas does not escape from between the insulating plate 4 and the metal base 2 and the insulating plate 4 and the metal base 2 are not soldered, 32b occurs.

As shown by the broken line in FIG. 3, the voids 32a,
Power semiconductor chips 26a, 26b, 2 are provided on the upper side of 32b.
If there is 8d, when mounting the power semiconductor module,
The heat generated by the semiconductor chips 26a, 26b, 28d cannot be radiated through the metal base 2 due to the void. Therefore, there is a problem that the semiconductor chips 26a, 26b, 28d are damaged.

[0006]

The invention according to claim 1 is
A metal base, an insulating plate provided on the metal base, having a wiring pattern formed on one surface, and a copper foil formed on the other surface, and a power semiconductor chip soldered to one of the wiring patterns And a high thermal conductive adhesive for adhering the other surface of the insulating plate to the metal base, wherein the other surface of the insulating plate under the semiconductor chip for power has A first bump of solder, which is equal to or slightly larger than the size of the semiconductor chip, is provided.

That is, since the first bump is arranged below the power semiconductor chip and its size is the same as or slightly larger than that of the power semiconductor chip, it is between the first bump and the other surface of the insulating plate. Generation of voids is suppressed. Even if a void is generated, the void is also small because the first bump is small. Further, the adhesive between the first bump and the metal base is thin, and the adhesive under the first bump is pushed out to the outside of the first bump at the time of bonding, so that the generation of voids during this time is also suppressed. It

According to a second aspect of the present invention, there is provided a wire for bonding between the power semiconductor chip and another wiring pattern, and the wiring pattern is formed on the other surface of the insulating plate below the other wiring pattern. A second bump of solder equal to or slightly larger than the size is provided.

A thick layer of the second bump of hard solder and a thin layer of high thermal conductive adhesive are formed between the other wiring pattern to be wire-bonded and the metal base.
The force held by the wire bonder for wire bonding is transmitted from the other wiring pattern to the metal base, and the wire can be reliably wire bonded to the other wiring pattern.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described with reference to FIGS. 1 and 2 showing an embodiment thereof. First, in FIG. 2, 4 is an insulating plate. On the insulating plate 4, wiring patterns 8a and 8b made of copper foil are formed on one surface in advance, and a copper foil 8c is formed on the entire other surface. On the other surface of the insulating plate 4 below the wiring pattern 8a to which the power semiconductor chip is soldered, and on the other surface below the wiring pattern 8b to be wire-bonded, solder slightly larger than the area of the power semiconductor chip is provided. Soldered bump 16a '
Then, bumps 16b 'to which solder slightly larger than the area of the wiring pattern 8a is soldered are formed.

Next, a process of forming the power semiconductor module of the embodiment will be described. In FIG. 1, reference numeral 2 is a metal base, and one surface of the metal base 2 is coated with a silicon-based high thermal conductive adhesive. The insulating plate 4 is mounted on the high thermal conductive adhesive with the bumps 16a and 16b side facing, and is slid right and left and pressed. After that, a solder chip is mounted or solder cream is applied on the first wiring pattern 8a, and the power semiconductor chip 6 is mounted on the solder. Further, an external drawing terminal (not shown) is also mounted on the wiring pattern. Then, the metal base 2, the insulating plate 4, and the semiconductor chip 6 are soldered by a reflow furnace, and the portions between the metal base 2 and the insulating plate 4 except the bumps 8a and 8b are bonded with an adhesive. Further, although not shown, the surface of the power semiconductor chip 6 and the wiring pattern 8b are formed using a wire bonder.
And are wire-bonded by the wire 12. Thereafter, a resin case (not shown) is bonded to the end of the metal base, and a sealing agent such as silicon gel is injected into the resin case to seal the power semiconductor chip 6 to form a power semiconductor module.

In the power semiconductor module formed in this step, the first bumps 16a have the power semiconductor chip 6
Since it is arranged at the lower part of the chip and its size is slightly larger than the chip 6, generation of voids between the bump 16a and the copper foil 8c on the other surface is suppressed. If a void occurs, the void will be small. Further, although the bump 16a and the metal base 2 are soldered, the non-soldered portion is bonded by a heat conductive adhesive. At this time, the adhesive under the solder bumps is thin, and the adhesive under the bumps 16a is pushed out to the outside of the bumps 16a at the time of bonding, so that the generation of voids is suppressed. Further, even if a void is generated in the adhesive between the bump 16a and the metal base 2, the void is small. Therefore, the heat loss due to the void when the power semiconductor module is mounted is small, and the heat generated by the power semiconductor chip 6 is surely released from the metal base.

A second bump 16b is arranged below the other wiring pattern 8b. The surface of the power semiconductor chip 6 and the wiring pattern 8b are connected to the wire 12
Even if the wire bonding is performed, the pressing force of the wire bonder (not shown) is transmitted from the second bump to the metal base 2, so that the surface of the power semiconductor chip 6 and the wiring pattern 8b are reliably wire bonded.

[0014]

According to the first aspect of the present invention, the first bump is wired below the power semiconductor chip, and the size thereof is the same as or slightly larger than that of the power semiconductor chip. Generation of voids between the other surface is suppressed. Even if a void occurs, the void is small because the first bump is small. Furthermore, the adhesion between the first bump and the metal base is thin, and the adhesive under the first bump is pushed out of the first bump during the adhesion,
Generation of voids during this time is also suppressed. Therefore, when the power semiconductor module is mounted, the heat of the power semiconductor chip is surely released from the metal base, and damage to the power semiconductor module is avoided.

Further, in the invention according to claim 2, between another wiring pattern to be wire-bonded and the metal,
Since the thick layer of the second bump of hard solder is formed, the pressing force of the wire bonder is transmitted from the other wiring pattern to the metal base, and the wire can be reliably wire-bonded to the other wiring pattern.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing an embodiment of a power semiconductor module of the present invention.

FIG. 2 is an explanatory diagram of a conventional power semiconductor module.

FIG. 3 shows a schematic cross-sectional view of the internal structure of a power semiconductor module.

[Explanation of symbols]

2 metal base 4 insulating plate 6 Power semiconductor chips 8a, 8b wiring pattern 8c copper foil 12 wires 16a (first) bump 16b (second) bump

Claims (2)

(57) [Claims] 1. A metal base, an insulating plate provided on the metal base and having a wiring pattern formed on one surface and a copper foil formed on the other surface, and soldered to one of the wiring patterns. In a power semiconductor module including a power semiconductor chip and a high thermal conductive adhesive that bonds the other surface of the insulating plate to the metal base, the other surface of the insulating plate below the power semiconductor chip is provided. In addition, the first solder of the same size as or slightly larger than the size of the power semiconductor chip is used.
The semiconductor module for electric power is characterized in that bumps are provided. 2. A wire for bonding between the power semiconductor chip and another wiring pattern is provided, and the same size as or slightly larger than the size of the wiring pattern is provided on the other surface of the insulating plate below the other wiring pattern. The power semiconductor module according to claim 1, wherein a second bump of solder is provided.