JP3369970B2 - Motor drive circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor drive circuit for reducing noise of a fan. 2. Description of the Related Art FIG. 5 is a circuit block diagram showing a conventional motor drive circuit. In FIG. 5, drive coils (1) and (2)
Is structurally fixed to the stator side of the motor,
One end of the wiring is grounded via the power supply VCC, and the electrical angle is 1
The drive currents IL1 and IL2 flow complementarily every 80 degrees. The Hall element (3) is structurally fixed at a predetermined position on the side of the stator constituting the motor, and the power supply V
The power is supplied between the CC and the ground, and the sine wave signals H + and H− having opposite phases are output according to the relative positional relationship between the stator and the rotor. Amplifier (4)
Compares the sine wave signal H + with the opposite-phase sine wave signal H−,
It outputs a rectangular wave signal. The control circuit (5)
A rectangular wave signal B having the opposite phase is created based on the rectangular wave signal A output from the amplifier (4), and both rectangular wave signals A and B are output after current amplification. The NPN transistors (6) and (7) are connected between the other end of the drive coil (1) and the ground in a state of Darlington connection, and the high level of the rectangular wave signal A is applied to the base of the NPN transistor (6). When supplied, the NPN transistors (6) and (7) are turned on and the drive current IL1 flows through the drive coil (1). Similarly, the NPN transistors (8) and (9) are connected between the other end of the drive coil (2) and the ground in a state of Darlington connection.
When the high level of the square wave signal B is supplied to the base of
The NPN transistors (8) and (9) are turned on and the drive current IL2 flows through the drive coil (2). And
The motor rotates by the drive currents IL1 and IL2 alternately flowing through the drive coils (1) and (2). FIG. 6 shows the driving current I.
FIG. 4 is a waveform chart showing L1 and IL2. Drive current IL1, I
L2 (= IL) is represented by the following equation. IL = (VCC-Vsat-Ec) / RL where, VCC: power supply voltage Vsat: saturation voltage Ec of driving transistors (7), (9) ... counter electromotive voltage RL: driving coil (1) By the way, during the rotation of the motor, the drive currents IL1 and IL
In the vicinity T of the phase switching point at which the switching of the voltage 2 is performed, the back electromotive force Ec
Becomes smaller, the driving current IL becomes larger. But,
With the drive current IL near the phase switching point T, the efficiency of the rotation torque generation of the motor is originally poor, and the magnitude of the drive current IL is disturbed, and the rotation torque of the motor fluctuates due to a sudden change in the drive current IL. There is a problem that induces the vibration sound of. Accordingly, an object of the present invention is to provide a motor drive circuit for reducing the noise of a motor. SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and is generated from a Hall element according to the relative positional relationship between a stator and a rotor constituting a motor. A motor drive circuit having a first drive transistor and a second drive transistor for driving the first coil and the second coil in a complementary manner based on the sinusoidal signal to be charged is charged in accordance with a predetermined time constant and the first and second coils are driven. A saw-tooth wave signal generating circuit for performing a discharge at a timing of switching the driving of the coil to generate a saw-tooth wave signal, and comparing the saw-tooth wave signal with a reference voltage higher than a minimum voltage of the saw-tooth wave signal; A first comparison circuit that outputs a logic level on one side by a predetermined width from the time when the waveform signal is discharged; A sample-and-hold circuit that performs a sample-and-hold at the end edge of the logic level on the side and holds the amplitude at that time, and then outputs a trapezoidal wave signal by setting the holding amplitude to zero at the beginning edge of the logic level on the one side. Comparing the absolute value signal with the trapezoidal wave signal and outputting a drive signal for simultaneously turning off the first and second drive transistors near the phase switching point of the first and second coils.
A comparison circuit; and a gradient circuit that gradients a fall of the drive current flowing through the first and second coils. The present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit block diagram showing a motor drive circuit according to the present invention. In FIG. 1, the same elements as those in FIG. FIG. 2 shows FIG.
FIG. 6 is a waveform chart showing the operation of FIG. In FIG. 1, a control circuit (10) converts a sine wave signal output from an amplifier (4) into a rectangular wave signal A. The control pulse generation circuit (11)
A rectangular wave signal A is supplied, and a control pulse B is generated at the rising time and the falling time of the rectangular wave signal A. The resistor (12) and the capacitor (13) form a time constant circuit, and charge according to the resistance value of the resistor (12) and the capacity of the capacitor (13). The charge / discharge control circuit (14) is connected to the control pulse generation circuit (11), and discharges the charge stored in the capacitor (13) when the control pulse B is supplied. At the time of discharging, the minimum value of the charge stored in the capacitor (13) is limited to the voltage V1, and does not become lower than the voltage V1. Therefore, a sawtooth signal C for discharging to the minimum voltage V1 is generated from the connection point of the resistor (12) and the capacitor (13) every time the phase is switched. Resistance (15)
(16) is connected in series between the power supply VCC and the ground, and generates a voltage V2 higher than the voltage V1 from a connection midpoint. First
The comparator (17) compares the sawtooth signal C with the voltage V2. That is, the first comparator (17) outputs the first comparison signal D which is at a high level while the voltage V2 is higher than the sawtooth signal C and is at a low level while the voltage V2 is lower than the sawtooth signal C. I do. The absolute value circuit (18) outputs an absolute value signal E obtained by taking the absolute value of the sine wave signals H + and H- output from the Hall element (3) at the midpoint of the amplitude. Amplifier (19)
Outputs an amplified signal F obtained by amplifying the absolute value signal E at an amplification factor determined by the resistance values of the resistors (20) and (21). The DC reference voltages of the absolute value signal E and the amplified signal F are determined by the reference power supply (32). The amplified signal F has a waveform when the control pulse B and the comparison signal D do not act on a sample-and-hold circuit described later. A sample-and-hold circuit (22) samples and holds the amplified signal F at the falling edge of the comparison signal D, and then holds the amplified signal F down to the minimum voltage of the absolute value signal E at the rising edge of the comparison signal D. It outputs a wave signal G. The second comparator (23) compares the absolute value signal E with the trapezoidal wave signal G. When the trapezoidal wave signal G is higher than the absolute value signal E, it is at a low level, and the trapezoidal wave signal G is lower than the absolute value signal E. During the period, the second comparison signal H which is at a high level
Is output. The control circuit (10) is supplied with the second comparison signal H, and based on the second comparison signal H, controls the first drive signal I and the second drive transistor (9) for turning on the first drive transistor (7). A second drive signal J for turning on is output. As a result, the driving currents I
L1 and IL2 flow, and the motor rotates. As described above, the first drive signal I and the second drive signal I near the switching point of the energization of the drive coils (1) and (2)
As the drive signal J becomes low, both the first and second drive transistors (7) and (9) are turned off. Therefore, since the drive currents IL1 and IL2 become zero before the back electromotive voltage Ec becomes small, it is possible to prevent the drive currents IL1 and IL2 from suddenly falling from a high level, thereby making it possible to reduce the noise of the motor. . Further, when the amplitude of the sine wave signals H + and H− fluctuates due to the characteristic variation of the Hall element (3), or when the period of the sine wave signals H + and H− fluctuates due to a change in the rotation speed of the motor. Even if the first
In addition, since the simultaneous OFF period of the second drive transistors (7) and (9) can be made constant and a steep change of the drive current IL can be prevented, it is also suitable for reducing the noise of the variable speed motor. In FIG. 1, first and second NPN transistors (6) and (8) are provided between a base and a collector, respectively.
The capacitors (41) and (42) are connected. When a drive current is flowing through the first coil (1), the first capacitor (4
The left terminal of 1) is positively charged, and the right terminal is negatively charged. Therefore, when the first drive signal I becomes low level and the drive current IL1 stops flowing, the first capacitor (4
The potential of the right terminal of 1) rises, and the potential of the left terminal also rises by the same potential, whereby the NPN transistor (6) is gradually turned off, and the drive current IL1 falls with a slope. . The same applies to the case of the drive current IL2. Therefore, the noise of the motor can be further reduced. Now, the signal output operation of the sawtooth signal C and the trapezoidal signal G of FIG. 1 will be described using one embodiment circuit. FIG. 3 is a circuit diagram showing one embodiment of the charge / discharge control circuit (14). FIG. 3 shows that the base voltage of the transistor (25) and the emitter voltage of the transistor (26) having the same potential are varied according to the on / off state of the transistor (24). In FIG. 3, when the control pulse B is not generated, the transistor (24) is turned off and the transistor (2) is turned off.
The base voltage of 5) and the emitter voltage of the transistor (26) become a voltage Vmax obtained by subtracting the voltage across the resistor (28) from the power supply VCC. Therefore, the capacitor (13)
Performs charging with a time constant determined by the resistance value of the resistor (12) and the capacitance of the capacitor (13), and the terminal voltage of the capacitor (13) increases. Although the generation cycle of the control pulse B changes in accordance with the number of rotations of the motor, the time constant is set to a value such that the charging voltage of the capacitor (13) does not reach the voltage Vmax during the generation cycle of the control pulse B. Is set to
On the other hand, when the control pulse B is generated, the transistor (2
4) is turned on, and the base voltage of the transistor (25) and the emitter voltage of the transistor (26) are changed to the resistance (28).
The divided voltage V1 (<Vmax) of (29) is obtained. At this time, since the non-ground side voltage of the capacitor (13) is higher than the voltage V1, the accumulated charge of the capacitor (13) is discharged to the voltage V1 via the transistor (27). This operation is repeated, and a sawtooth signal C is generated. FIG. 4 shows an amplifier (19), a sample hold circuit (22), and a comparator (2).
It is a circuit diagram which shows one Example of 3). In FIG. 4, the amplifier (19) is provided with a series body composed of a resistor (31) and a reference voltage (32) at the input of the absolute value signal E. Therefore, the absolute value signal E represented by the current is converted by the resistor (31) with reference to the minimum voltage V3. The voltage-converted absolute value signal E is supplied to the resistors (20) and (21) via an internal differential amplifier circuit and a current mirror circuit.
(Ra + Rb) determined by each of the resistance values Ra and Rb
/ Ra to become an amplified signal F. Here, a sample and hold circuit (22) is interposed between the output of the amplifier (19) and the input of the comparator (23). In the sample hold circuit (22), when a control pulse B is generated, N
The PN transistor (33) is turned on, and the capacitor (3
The accumulated charge of 4) is discharged. At this time, the comparison signal D is at a high level from the generation of the control pulse B until the sawtooth signal C exceeds the voltage V2.
Turns on, the transistor (36) turns off, and the capacitor (13) charges via the diode (37). Thereafter, when the comparison signal D changes to a low level, the transistor (35) is turned off and the transistor (36) is turned on, so that all the current of the current source (38) flows through the collector-emitter path of the transistor (36) and the capacitor ( 34) stops charging and the terminal voltage of the capacitor (34) is maintained. The Darlington-connected transistors (39) and (40) are for minimizing the amount of discharge of accumulated charges when the capacitor (34) is in the voltage holding state. Thus, a trapezoidal wave signal G is generated. According to the present invention, a period in which both the first and second drive transistors are turned off is provided near the phase switching point of the energization of the first and second coils.
Since the coil current can be reduced to zero before the back electromotive voltage becomes small, it is possible to prevent the disadvantage that the coil current suddenly falls from a high level, thereby making it possible to reduce the noise of the motor. In particular, since the falling of the coil current is inclined, it is possible to reduce the noise of the motor extremely. Further, even when the amplitude of the sine wave signal fluctuates due to the characteristic variation of the Hall element, or when the period of the sine wave signal fluctuates due to a change in the rotation speed of the motor, the first and second drive transistors Can be made constant, and a steep change in coil current can be prevented, which is suitable for reducing the noise of a variable speed motor.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit block diagram showing a motor drive circuit according to the present invention. FIG. 2 is a waveform chart showing waveforms at various points in FIG. FIG. 3 is a circuit diagram showing a specific example of a sawtooth signal generation circuit of FIG. 1; FIG. 4 is a circuit diagram showing a specific example of a trapezoidal wave signal generation circuit of FIG. 1; FIG. 5 is a circuit block diagram showing a conventional motor drive circuit. FIG. 6 is a waveform diagram showing a coil current waveform of FIG. [Description of Signs] (1) (2) Drive coil (3) Hall element (7) (9) Drive transistor (10) Control circuit (11) Control pulse generation circuit (14) Charge / discharge control circuit (17) First Comparator (19) Amplifier (22) Sample hold circuit (23) Second comparator (35) First capacitor (36) Second capacitor

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-6-245584 (JP, A) JP-A-63-161893 (JP, A) JP-A-2000-41388 (JP, A) JP-A-2000-41391 ( JP, A) JP-A-3-190588 (JP, A) JP-A-9-47073 (JP, A) JP-A-9-103090 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , (DB name) H02P 6/02 H02P 5/178

Claims (1)

(1) A first coil and a second coil are complemented on the basis of a sine wave signal generated from a Hall element according to a relative positional relationship between a stator and a rotor constituting a motor. A motor drive circuit having a first drive transistor and a second drive transistor, which are driven in a specific manner, charges according to a predetermined time constant and discharges at a timing for switching the drive of the first and second coils to generate a sawtooth signal A sawtooth signal generation circuit, comparing the sawtooth signal with a reference voltage higher than the minimum voltage of the sawtooth signal, and determining a logic level on one side by a predetermined width from the time when the sawtooth signal is discharged Output the first
A comparison circuit, for the amplified signal of the absolute value signal of the sine wave signal, performs a sample and hold at the end edge of the one-side logic level, holds the amplitude at that time, and then starts the one-side logic level at the start edge A sample and hold circuit that outputs a trapezoidal wave signal by making the holding amplitude zero, comparing the absolute value signal with the trapezoidal wave signal,
And a second comparison circuit that outputs a drive signal for simultaneously turning off the first and second drive transistors in the vicinity of a phase switching point of the second coil and a fall of a drive current flowing through the first and second coils. A motor drive circuit, comprising: a tilt circuit for tilting;