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JP3545214B2 - Motor drive circuit - Google Patents
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JP3545214B2 - Motor drive circuit - Google Patents

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Publication number
JP3545214B2
JP3545214B2 JP21820198A JP21820198A JP3545214B2 JP 3545214 B2 JP3545214 B2 JP 3545214B2 JP 21820198 A JP21820198 A JP 21820198A JP 21820198 A JP21820198 A JP 21820198A JP 3545214 B2 JP3545214 B2 JP 3545214B2
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Japan
Prior art keywords
signal
wave signal
voltage
drive
motor
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JP21820198A
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Japanese (ja)
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JP2000050672A (en
Inventor
哲也 吉冨
孝 染谷
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Priority to JP21820198A priority Critical patent/JP3545214B2/en
Priority to TW088111636A priority patent/TW453018B/en
Priority to US09/351,898 priority patent/US6130989A/en
Priority to TW088111972A priority patent/TW453016B/en
Priority to US09/363,621 priority patent/US6157151A/en
Publication of JP2000050672A publication Critical patent/JP2000050672A/en
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Description

【0001】
【発明の属する技術分野】
本発明は、ファンの静音化に適したモータ駆動回路に関する。
【0002】
【従来の技術】
図8は従来のモータ駆動回路を示す回路ブロック図である。
【0003】
図8において、駆動コイル(1)(2)は、構造上はモータを構成するステータ側に固着され、配線上は一端が電源VCCを介して接地され、電気角180度毎に駆動電流IL1、IL2が相補的に流れるものである。ホール素子(3)は、構造上はモータを構成するステータ側の所定位置に固着され、配線上は電源VCCと接地との間に接続されて電源が供給され、ステータ及びロータの相対的位置関係に応じて各々逆相の正弦波信号H+、H−を出力するものである。増幅器(4)は正弦波信号H+と逆相の正弦波信号H−とを比較し、矩形波信号Fを出力するものである。制御回路(5)は、矩形波信号Fの立上り及び立下り毎に制御パルスCを発生する。抵抗(102)及びコンデンサ(103)は電源VCCと接地との間に直列接続され、コンデンサ(103)は抵抗(102)の抵抗値及びコンデンサ(103)の容量で定まる時定数に従って充電を行う。充放電制御回路(104)は制御パルスCが供給される毎にコンデンサ(103)の蓄積電荷を放電させるものである。従って、コンデンサ(103)の非接地側には鋸歯状波信号Dが発生する。抵抗(105)及びサーミスタ(106)は電源VCCと接地との間に直列接続され、サーミスタ(106)の非接地側には周囲温度変化に応答して変化する基準電圧Vrefが発生する。比較器(107)は鋸歯状波信号Dと基準電圧Vrefを比較し、鋸歯状波信号Dが基準電圧Vrefより低い時にハイレベルとなる比較信号Eを出力するものである。制御回路(5)は比較信号Eを基に駆動信号A,Bを電流増幅して出力するものである。NPN型トランジスタ(6)(7)はダーリントン接続された状態で駆動コイル(1)の他端と接地との間に接続され、NPN型トランジスタ(6)のベースに駆動信号Aのハイレベルが供給された時、NPN型トランジスタ(6)(7)がオンして駆動コイル(1)に駆動電流IL1を流すものである。同様に、NPN型トランジスタ(8)(9)はダーリントン接続された状態で駆動コイル(2)の他端と接地との間に接続され、NPN型トランジスタ(8)のベースに駆動信号Bのハイレベルが供給された時、NPN型トランジスタ(8)(9)がオンして駆動コイル(2)に駆動電流IL2を流すものである。コンデンサ(100)はNPN型トランジスタ(6)のベースコレクタ間に接続され、駆動電流IL1の立下りに傾斜を持たせるものである。コンデンサ(101)はNPN型トランジスタ(8)のベースコレクタ間に接続され、駆動電流IL2の立下りに傾斜を持たせるものである。コンデンサ(100)(101)はモータのトルク変動を最小限に抑える為に設けられる。そして、駆動電流IL1,IL2が駆動コイル(1)(2)に交互に流れることによりモータは回転する。
【0004】
【発明が解決しようとする課題】
図9は前記駆動電流IL1,IL2を示す波形図である。駆動電流IL1,IL2(=IL)は次式で表される。
【0005】
IL=(VCC−Vsat−Ec)/RL
但し、VCC……電源電圧
Vsat…駆動トランジスタ(7)(9)の飽和電圧
Ec………逆起電圧
RL………駆動コイル(1)(2)の抵抗成分
さて、モータの回転中において、駆動電流IL1,IL2を切り換える相切り換え点の近傍Tでは、逆起電圧Ecが小さくなる為、駆動電流ILは大きくなる。しかし、相切り換え点の近傍Tでの駆動電流ILでは、元々モータの回転トルク発生効率が悪く、駆動電流ILの大きさが災いして駆動電流ILの急激な下降変化に伴いモータの回転トルクが変動してモータの振動音を誘発する問題があった。
【0006】
また、サーミスタ(106)の抵抗値は周囲温度の上昇に伴い小さくなる。即ち、基準電圧Vrefが下がり、矩形波信号Eの立下りが左側に移動する。従って、周囲温度が特定温度を越えて上昇すると、駆動電流IL1,IL2の立下りがコンデンサ(100)(101)の容量の影響で相切り換え点を越えている為、駆動電流IL1,IL2の終端と始端とが重なってしまい、モータに制動が掛かりモータの駆動効率が大幅に落ちて高速回転できない問題があった。
【0007】
一方、サーミスタ(106)の抵抗値は周囲温度の下降に伴い大きくなる。即ち、基準電圧Vrefが上がり、矩形波信号Eの立下りが右側に移動する。従って、周囲温度が特定温度より下降すると、駆動信号A,Bのローレベル期間が共に長くなり、モータは筐体を強制空冷するのに十分な風量及び静圧を得ることができなくなってしまう。図8の従来回路はファンに対し十分な強制空冷能力を要求する筐体等の機器には不適当である。
【0008】
そこで、本発明は、モータの静音化と駆動効率向上を実現するモータ駆動回路を提供することを目的とする。
【0009】
【課題を解決するための手段】
本発明は、前記問題点を解決する為に創作されたものであり、モータを構成するステータ及びロータの相対的位置関係に応じてホール素子が発生する正弦波信号に基づいて、第1コイル及び第2コイルを相補的に駆動する第1駆動トランジスタ及び第2駆動トランジスタを有するモータ駆動回路において、前記第1及び第2コイルの駆動時に一方向に変化し且つ前記第1及び第2コイルの相切り換え時に他方向に変化する鋸歯状波信号と温度変化に応答して変化する基準電圧とを比較し、第1矩形波信号を出力する手段と、前記正弦波信号を全波変換した第1全波信号と、前記第1全波信号を増幅又は減衰した振幅が異なる第2全波信号を前記第1矩形波信号のタイミングでサンプルホールドしたサンプルホールド信号とを比較し、前記第1及び第2コイルの相切り換え点近傍において、前記第1及び第2駆動トランジスタを同時オフさせる第2矩形波信号を出力する手段と、温度変化に応答して変化する前記基準電圧の上限及び下限を制限する手段と、を備え、温度変化に対するモータの最低回転数及び最高回転数を設定することを特徴とする。
【0010】
【発明の実施の形態】
本発明の詳細を図面に従って具体的に説明する。
【0011】
図1は本発明のモータ駆動回路を示す回路ブロック図である。尚、図1の中で図8と同じ素子には同じ番号を記しその説明を省略する。また、図2は図1の全体動作を示す波形図、図3は鋸歯状波信号と基準電圧との関係を示す波形図である。
【0012】
図1において、制御回路(10)は増幅器(4)から出力された正弦波信号を矩形波信号Aに波形変換するものである。制御パルス発生回路(11)は、矩形波信号Aが供給され、矩形波信号Aの立上り時点及び立下り時点で制御パルスBを発生するものである。抵抗(12)及びコンデンサ(13)は時定数回路を構成し、抵抗(12)の抵抗値及びコンデンサ(13)の容量に従って充電を行う。充放電制御回路(14)は、制御パルス発生回路(11)と接続され、制御パルスBが供給された時、コンデンサ(13)の蓄積電荷を放電するものである。尚、放電時、コンデンサ(13)の蓄積電荷の最小値は電圧V1に制限され、電圧V1未満となることはない。従って、抵抗(12)及びコンデンサ(13)の接続点からは相切り換え毎に最小電圧V1まで放電を行う鋸歯状波信号Cが発生する。抵抗(15)及びサーミスタ(16)は電源VCCと接地との間に直列接続され、接続中点から周囲温度変化に応答して変化する電圧V2(>V1)を発生する。選択回路(42)は、電圧V1より高い電圧V2又はV4の何れか一方を選択出力するものである。サーミスタ(16)は周囲温度が高いほど抵抗値が小さくなる特性を有している。選択回路(42)は、周囲温度の変化に伴い、電圧V2が電圧V4より低くなった時、電圧V4を選択出力する。第1比較器(17)は鋸歯状波信号Cと電圧V2、V4、V5(V4<V2<V5)とを比較する。即ち、第1比較器(17)は、電圧V2が電圧V4、V5の間の時は鋸歯状波信号Cを電圧V2と比較し、電圧V2が電圧V4より下降した時は鋸歯状波信号Cを電圧V4と比較し、電圧V2が電圧V5より上昇した時は鋸歯状波信号Cを電圧V5と比較する。そして、第1比較器(17)は、電圧V2、V4、V5が鋸歯状波信号Cより高い期間はハイレベルとなり、電圧V2、V4、V5が鋸歯状波信号Cより低い期間はローレベルとなる第1比較信号D(第1駆動オフ信号)を出力する。第1比較信号Dのハイレベル期間は、サーミスタ(16)の周囲温度が高いほど短く且つ低いほど長くなる。
【0013】
絶対値回路(18)はホール素子(3)が出力する正弦波信号H+、H−に対し振幅中点を境に絶対値を取った絶対値信号Eを出力する。増幅器(19)は抵抗(20)(21)の抵抗値で定まる減衰率で絶対値信号Eを減衰させた減衰信号Fを出力する。絶対値信号E及び減衰信号Fは基準電圧(32)により共通の直流バイアスが与えられる。尚、減衰信号Fは、後述するサンプルホールド回路に制御パルスB及び比較信号Dが作用しない場合の波形である。サンプルホールド回路(22)は、減衰信号Fを比較信号Dの立下りでサンプルホールドして保持し、その後、減衰信号Fを比較信号Dの立上りで絶対値信号Eの最小電圧まで下降させた台形波信号Gを出力するものである。第2比較器(23)は絶対値信号Eと台形波信号Gとを比較し、台形波信号Gが絶対値信号Eより高い期間はハイレベルとなり、台形波信号Gが絶対値信号Eより低い期間はローレベルとなる第2比較信号H(第2駆動オフ信号)を出力する。第2比較信号Hは、駆動コイル(1)(2)の相切り換え前の所定幅だけ発生する。OR回路(41)は第1比較信号Dと第2比較信号Hとを加算し、駆動コイル(1)(2)の相切り換え点の前後半近傍で第1及び第2駆動トランジスタ(7)(9)を同時オフする為の加算信号Kを出力するものである。尚、第1及び第2比較信号D、Hを加算した場合、第1比較信号Dの立上り及び第2比較信号Hの立下りが制御パルスBを基準にしている為、第1比較信号Dの立上り及び第2比較信号Hの立下りの接合点でチャタリングが起こることは無い。制御回路(10)は加算信号Kが供給され、加算信号Kを基に、第1駆動トランジスタ(7)をオンする為の第1駆動信号Iと第2駆動トランジスタ(9)をオンする為の第2駆動信号Jを出力する。これより、駆動コイル(1)(2)には駆動電流IL1,IL2が流れ、モータは回転する。
【0014】
以上より、
(a)相切り換え点の前半近傍においては、駆動電流IL1,IL2を逆起電圧Ecが小さくなる影響を受ける前に零とできる為、駆動電流IL1,IL2が高いレベルから急激に立下る不都合を防止でき、モータの静音化が可能となる。
【0015】
(b)ホール素子(3)の特性ばらつきに伴い正弦波信号H+、H−の振幅が変動した場合、或いは、モータの回転速度に変化に伴い正弦波信号H+、H−の周期が変動した場合であっても、相切り換え点の前半近傍での第1及び第2駆動トランジスタ(7)(9)の同時オフ期間を一定とでき、駆動電流ILの急峻な立上りを防止できる為、可変速モータの静音化に適する。
【0016】
(c)周囲温度一定の条件下で、相切り換え点の後半近傍においては、前半近傍から引き続き駆動電流IL1,IL2を零とできる為、無効電流を無視できモータの駆動効率の低下を防止できる。
【0017】
(d)減衰信号Fから台形波信号Gを作成する為、第1比較信号Dの幅が周囲温度変化に伴うサーミスタ(16)の抵抗値変化の影響を受けても、第2比較信号Hは必ず発生し、モータの回転トルクの変動及びそれに伴う騒音の発生を防止できる。
【0018】
といった作用効果を奏する。
【0019】
しかし、コンデンサ(100)(101)の容量に起因して駆動電流IL1,IL2の終端が相切り換え点を越え、また、周囲温度の上昇に伴い駆動電流IL1,IL2の始端が相切り換え点に近づくと、駆動電流IL1,IL2の終端及び始端が重なり、上記(c)の効果を期待できない。そこで、本発明は、周囲温度が上昇した場合でもモータの駆動効率の低下を防止し、上記(c)の効果を確実に得ることができる。
【0020】
図7は周囲温度に対する駆動電流IL1,IL2の変化を示す波形図である。
【0021】
図7において、期間T0は例えば常温(25℃)における第1及び第2駆動トランジスタ(7)(9)の同時オフ時間、期間T1は駆動電流ILがコンデンサ(100)(101)の容量に起因して零まで下降するのに要する時間であり、説明の便宜上、駆動電流ILの立下りは第1及び第2コイル(1)(2)の相切り換え点を越えるものとする。期間T2は周囲温度の上昇に伴い駆動電流ILの始端が変動しようとする時間幅、期間T3は本発明により得られる駆動電流ILの始端が変動できる時間幅である。本発明によれば、駆動電流IL1,IL2の終端及び始端が重ならない様にできる。
【0022】
さて、図1の鋸歯状波信号C、第1比較信号D、台形波信号Gに関し、一実施回路を用いて信号出力動作を説明する。
【0023】
図4は充放電制御回路(14)の一実施例を示す回路図である。図4はトランジスタ(24)のオンオフに応じて互いに同電位のトランジスタ(25)のベース電圧及びトランジスタ(26)のエミッタ電圧を変動させるものである。
【0024】
図4において、制御パルスBが発生しない時、トランジスタ(24)がオフし、トランジスタ(25)のベース電圧及びトランジスタ(26)のエミッタ電圧はは電源VCCから抵抗(28)の両端電圧を減算した電圧Vmaxとなる。従って、コンデンサ(13)は抵抗(12)の抵抗値及びコンデンサ(13)の容量で定まる時定数で充電を行い、コンデンサ(13)の端子電圧は上昇する。尚、制御パルスBの発生周期はモータの回転数に応じて変化するが、前記時定数は、コンデンサ(13)の充電電圧が制御パルスBの発生周期の途中で電圧Vmaxに達することのない値に設定される。一方、制御パルスBが発生した時、トランジスタ(24)がオンし、トランジスタ(25)のベース電圧及びトランジスタ(26)のエミッタ電圧は抵抗(28)(29)の分圧電圧V1(<Vmax)となる。この時、コンデンサ(13)の非接地側電圧は電圧V1より高い為、コンデンサ(13)の蓄積電荷はトランジスタ(27)を介して電圧V1まで放電される。この動作を繰り返し、鋸歯状波信号Cが発生する。
図6は比較器(17)及び選択回路(42)の一実施例を示す回路図である。尚、常温では、サーミスタ(16)の抵抗値の影響で電圧V2は電圧V4及び電圧V5の間の値であるものとする。
【0025】
図6において、NPN型トランジスタ(43)(44)は差動接続され、NPN型トランジスタ(43)のベースには電圧V2が印加され、NPN型トランジスタ(44)のベースには抵抗(45)(46)(47)で分圧された電圧V4が印加される。抵抗(45)(46)の合成値は抵抗(28)の抵抗値と等しく、且つ、抵抗(29)(47)の抵抗値が等しく、即ち、電圧V4は電圧V1より高い。従って、電圧V2が電圧V4より高い時は、NPN型トランジスタ(43)がオンする為、比較器(17)の一方の入力には基準電圧V2が印加され、比較器(17)は鋸歯状波信号Cを基準電圧V2と比較する。また、周囲温度が上昇し、電圧V2が電圧V4より低くなった時は、NPN型トランジスタ(44)がオンする為、比較器(17)の一方の入力には基準電圧V4が印加され、比較器(17)は鋸歯状波信号Cを基準電圧V4と比較する。基準電圧V4は、第1比較信号Dを期間T3しか短縮できない値である。これより、駆動電流IL1,IL2の重なりを防止でき、無効電流の発生を防止できる。また、周囲温度が下降し、電圧V2が直列抵抗(48)(49)で分圧された電圧V5より高くなった時は、PNP型トランジスタ(50)がオフしてPNP型トランジスタ(51)がオンし、比較器(17)は鋸歯状波信号Cを基準電圧V5と比較する。以上より、基準電圧V2は最小電圧V4と最大電圧V5との間に制限され、ファンを周囲温度に応じて常時回転させる機器に適合する。そして図5の基準電圧の上下限の制限機能を1チップに集積化することが可能となる。
【0026】
図5は増幅器(19)、サンプルホールド回路(22)、比較器(23)の一実施例を示す回路図である。
【0027】
図5において、増幅器(19)は絶対値信号Eの入力部に抵抗(31)及び基準電圧(32)から成る直列体を設けている。従って、電流で表された絶対値信号Eは最小電圧V3を基準に抵抗(31)で電圧変換される。電圧変換された絶対値信号Eは内部の差動増幅回路、電流ミラー回路を介して抵抗(20)(21)の各抵抗値Ra,Rbで決定する減衰率Rb/(Ra+Rb)で減衰され、減衰信号Fとなる。ここで、増幅器(19)の出力と比較器(23)の入力との間にはサンプルホールド回路(22)が介在する。サンプルホールド回路(22)において、制御パルスBが発生するとNPN型トランジスタ(33)がオンし、コンデンサ(34)の蓄積電荷は放電される。この時、第1比較信号Dは制御パルスBが発生してから鋸歯状波信号Cが電圧V2を超えるまでハイレベルとなる為、トランジスタ(35)がオン、トランジスタ(36)がオフし、コンデンサ(34)はダイオード(37)を介して充電を行う。その後、第1比較信号Dがローレベルに変化すると、トランジスタ(35)がオフ、トランジスタ(36)がオンする為、電流源(38)の全電流はトランジスタ(36)のコレクタエミッタ路を流れ、コンデンサ(34)は充電を停止しコンデンサ(34)の端子電圧は保持された状態となる。尚、ダーリントン接続されたトランジスタ(39)(40)は、コンデンサ(34)が電圧保持状態の時、蓄積電荷の放電量を最小限に抑える為のものである。これより、台形波信号Gが発生する。
【0028】
【発明の効果】
本発明によれば、第1及び第2コイルの相切り換え点の前半近傍においては、コイル電流を逆起電圧が小さくなる影響を受ける前に零とできる為、コイル電流が高いレベルから急激に立下る不都合を防止でき、モータの静音化が可能となる。また、ホール素子の特性ばらつきに伴い正弦波信号の振幅が変動した場合、或いは、モータの回転速度に変化に伴い正弦波信号の周期が変動した場合であっても、相切り換え点の前後半近傍での第1及び第2駆動トランジスタの同時オフ期間を一定とでき、コイル電流の急峻な立上りを防止できる為、可変速モータの静音化に適する。また、周囲温度が上昇しても、第1及び第2コイルを流れる各コイル電流の終端と始端とが重なるのを防止でき、モータの駆動効率の低下を防止できる。また、周囲温度の変化に応答して変化する基準電圧の上下限範囲を制限し、ファンを周囲温度に応じた速度で常時回転できるモータ駆動回路を1チップ集積回路で提供できる。
【図面の簡単な説明】
【図1】本発明のモータ駆動回路を示す回路ブロック図である。
【図2】図1の全体波形を示す波形図である。
【図3】図1の鋸歯状波信号と基準電圧との関係を示す波形図である。
【図4】図1の鋸歯状波信号の発生回路の具体例を示す回路図である。
【図5】図1の台形波信号の発生回路の具体例を示す回路図である。
【図6】図1の選択回路の具体例を示す回路図である。
【図7】周囲温度変化に応じた駆動電流波形を示す波形図である。
【図8】従来のモータ駆動回路を示す回路ブロック図である。
【図9】図8のコイル電流波形を示す波形図である。
【符号の説明】
(1)(2) 駆動コイル
(3) ホール素子
(7)(9) 駆動トランジスタ
(10) 制御回路
(11) 制御パルス発生回路
(14) 充放電制御回路
(17) 第1比較器
(19) 増幅器
(22) サンプルホールド回路
(23) 第2比較器
(41) OR回路
(42) 選択回路
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a motor drive circuit suitable for reducing fan noise.
[0002]
[Prior art]
FIG. 8 is a circuit block diagram showing a conventional motor drive circuit.
[0003]
In FIG. 8, the drive coils (1) and (2) are structurally fixed to the stator constituting the motor, one end of the wiring is grounded via a power supply VCC, and the drive current IL1, IL2 flows complementarily. The Hall element (3) is structurally fixed at a predetermined position on the side of the stator constituting the motor, and is connected between the power supply VCC and ground and supplied with power on the wiring, and the relative positional relationship between the stator and the rotor. Output the sine wave signals H + and H− of opposite phases in response to The amplifier (4) compares the sine wave signal H + with the sine wave signal H− having the opposite phase, and outputs a rectangular wave signal F. The control circuit (5) generates a control pulse C every time the rectangular wave signal F rises and falls. The resistor (102) and the capacitor (103) are connected in series between the power supply VCC and the ground, and the capacitor (103) charges according to a time constant determined by the resistance value of the resistor (102) and the capacitance of the capacitor (103). The charge / discharge control circuit (104) discharges the charge stored in the capacitor (103) every time the control pulse C is supplied. Therefore, a sawtooth signal D is generated on the non-ground side of the capacitor (103). The resistor (105) and the thermistor (106) are connected in series between the power supply VCC and the ground, and a non-ground side of the thermistor (106) generates a reference voltage Vref that changes in response to a change in ambient temperature. The comparator (107) compares the sawtooth signal D with the reference voltage Vref, and outputs a comparison signal E which goes high when the sawtooth signal D is lower than the reference voltage Vref. The control circuit (5) current-amplifies and outputs the drive signals A and B based on the comparison signal E. The NPN transistors (6) and (7) are connected between the other end of the drive coil (1) and the ground in Darlington connection, and the high level of the drive signal A is supplied to the base of the NPN transistor (6). Then, the NPN transistors (6) and (7) are turned on, and the drive current IL1 flows through the drive coil (1). Similarly, the NPN transistors (8) and (9) are connected between the other end of the drive coil (2) and the ground in a state of Darlington connection, and the high level of the drive signal B is applied to the base of the NPN transistor (8). When the level is supplied, the NPN transistors (8) and (9) are turned on and the drive current IL2 flows through the drive coil (2). The capacitor (100) is connected between the base and the collector of the NPN transistor (6), and has a slope at the fall of the drive current IL1. The capacitor (101) is connected between the base and the collector of the NPN transistor (8), and has a slope at the fall of the drive current IL2. The capacitors (100) and (101) are provided to minimize the torque fluctuation of the motor. Then, the drive currents IL1 and IL2 alternately flow through the drive coils (1) and (2) to rotate the motor.
[0004]
[Problems to be solved by the invention]
FIG. 9 is a waveform diagram showing the drive currents IL1 and IL2. The drive currents IL1 and IL2 (= IL) are represented by the following equations.
[0005]
IL = (VCC−Vsat−Ec) / RL
However, VCC: power supply voltage Vsat: saturation voltage Ec of drive transistors (7), (9) ... counter electromotive voltage RL: resistance component of drive coils (1), (2) By the way, during rotation of the motor, In the vicinity T near the phase switching point at which the drive currents IL1 and IL2 are switched, the back electromotive voltage Ec decreases, and the drive current IL increases. However, with the drive current IL in the vicinity T of the phase switching point, the efficiency of the rotation torque generation of the motor is originally poor, and the magnitude of the drive current IL is disturbed, and the rotation torque of the motor is reduced due to a sudden change in the drive current IL. There is a problem that it fluctuates and induces vibration noise of the motor.
[0006]
Further, the resistance value of the thermistor (106) decreases as the ambient temperature increases. That is, the reference voltage Vref decreases, and the falling edge of the rectangular wave signal E moves to the left. Therefore, when the ambient temperature rises beyond the specific temperature, the falling of the driving currents IL1 and IL2 exceeds the phase switching point due to the capacitance of the capacitors (100) and (101). And the starting end overlap, the motor is braked, the driving efficiency of the motor is greatly reduced, and the motor cannot be rotated at high speed.
[0007]
On the other hand, the resistance value of the thermistor (106) increases as the ambient temperature decreases. That is, the reference voltage Vref rises, and the falling of the rectangular wave signal E moves to the right. Therefore, when the ambient temperature falls below the specific temperature, the low-level periods of the drive signals A and B both become longer, and the motor cannot obtain a sufficient air volume and static pressure for forcibly cooling the housing. The conventional circuit shown in FIG. 8 is not suitable for a device such as a housing that requires a sufficient forced air cooling capability for a fan.
[0008]
Therefore, an object of the present invention is to provide a motor drive circuit that realizes noise reduction of a motor and improvement in drive efficiency.
[0009]
[Means for Solving the Problems]
The present invention has been made in order to solve the above problems, and based on a sine wave signal generated by a Hall element according to a relative positional relationship between a stator and a rotor constituting a motor, a first coil and a first coil are provided. In a motor drive circuit having a first drive transistor and a second drive transistor for driving a second coil in a complementary manner, the motor drive circuit changes in one direction when the first and second coils are driven and the phase of the first and second coils is changed. Means for comparing a sawtooth wave signal that changes in the other direction at the time of switching with a reference voltage that changes in response to a temperature change, and outputs a first rectangular wave signal; The first full-wave signal is compared with a sample-and-hold signal obtained by amplifying or attenuating the first full-wave signal and sampling and holding a second full-wave signal having a different amplitude at the timing of the first rectangular wave signal. Means for outputting a second rectangular wave signal for simultaneously turning off the first and second drive transistors in the vicinity of the phase switching point of the second coil and the upper and lower limits of the reference voltage that changes in response to a temperature change. Limiting means for setting a minimum rotation speed and a maximum rotation speed of the motor with respect to a temperature change.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
The details of the present invention will be specifically described with reference to the drawings.
[0011]
FIG. 1 is a circuit block diagram showing a motor drive circuit according to the present invention. In FIG. 1, the same elements as those in FIG. 8 are denoted by the same reference numerals, and description thereof will be omitted. FIG. 2 is a waveform diagram showing the overall operation of FIG. 1, and FIG. 3 is a waveform diagram showing the relationship between the sawtooth signal and the reference voltage.
[0012]
In FIG. 1, a control circuit (10) converts a sine wave signal output from an amplifier (4) into a rectangular wave signal A. The control pulse generating circuit (11) is supplied with the rectangular wave signal A, and generates a control pulse B at the rising and falling points of the rectangular wave signal A. The resistor (12) and the capacitor (13) form a time constant circuit, and charge according to the resistance value of the resistor (12) and the capacity of the capacitor (13). The charge / discharge control circuit (14) is connected to the control pulse generation circuit (11), and discharges the charge stored in the capacitor (13) when the control pulse B is supplied. At the time of discharging, the minimum value of the charge stored in the capacitor (13) is limited to the voltage V1, and does not become lower than the voltage V1. Therefore, a sawtooth signal C for discharging to the minimum voltage V1 is generated from the connection point of the resistor (12) and the capacitor (13) every time the phase is switched. The resistor (15) and the thermistor (16) are connected in series between the power supply VCC and the ground, and generate a voltage V2 (> V1) that changes in response to an ambient temperature change from a connection midpoint. The selection circuit (42) selects and outputs one of the voltages V2 and V4 higher than the voltage V1. The thermistor (16) has a characteristic that the resistance value decreases as the ambient temperature increases. The selection circuit (42) selectively outputs the voltage V4 when the voltage V2 becomes lower than the voltage V4 due to a change in the ambient temperature. The first comparator (17) compares the sawtooth signal C with the voltages V2, V4, V5 (V4 <V2 <V5). That is, the first comparator (17) compares the saw-tooth wave signal C with the voltage V2 when the voltage V2 is between the voltages V4 and V5, and when the voltage V2 falls below the voltage V4, the first comparator (17). Is compared with the voltage V4, and when the voltage V2 rises above the voltage V5, the sawtooth signal C is compared with the voltage V5. Then, the first comparator (17) sets the high level when the voltages V2, V4, V5 are higher than the sawtooth signal C, and sets the low level when the voltages V2, V4, V5 are lower than the sawtooth signal C. A first comparison signal D (first drive-off signal) is output. The high-level period of the first comparison signal D is shorter as the ambient temperature of the thermistor (16) is higher and longer as the ambient temperature is lower.
[0013]
The absolute value circuit (18) outputs an absolute value signal E obtained by taking the absolute value of the sine wave signals H + and H- output from the Hall element (3) at the midpoint of the amplitude. The amplifier (19) outputs an attenuation signal F obtained by attenuating the absolute value signal E at an attenuation rate determined by the resistance values of the resistors (20) and (21). The absolute value signal E and the attenuation signal F are given a common DC bias by the reference voltage (32). Note that the attenuation signal F is a waveform when the control pulse B and the comparison signal D do not act on a sample and hold circuit described later. A sample-and-hold circuit (22) samples and holds the attenuated signal F at the falling edge of the comparison signal D, and then holds the attenuated signal F down to the minimum voltage of the absolute value signal E at the rising edge of the comparison signal D. It outputs a wave signal G. The second comparator (23) compares the absolute value signal E with the trapezoidal wave signal G. When the trapezoidal wave signal G is higher than the absolute value signal E, the second comparator (23) is at a high level, and the trapezoidal wave signal G is lower than the absolute value signal E. During the period, a second comparison signal H (second drive-off signal) that is at a low level is output. The second comparison signal H is generated by a predetermined width before the phase switching of the drive coils (1) and (2). The OR circuit (41) adds the first comparison signal D and the second comparison signal H, and the first and second driving transistors (7) (7) near the first and second half of the phase switching point of the driving coils (1) and (2). 9) is to output an addition signal K for turning off simultaneously. When the first and second comparison signals D and H are added, the rising of the first comparison signal D and the falling of the second comparison signal H are based on the control pulse B. Chattering does not occur at the junction of the rising edge and the falling edge of the second comparison signal H. The control circuit (10) is supplied with the addition signal K, and based on the addition signal K, a first drive signal I for turning on the first drive transistor (7) and a second drive transistor (9) for turning on the second drive transistor (9). The second drive signal J is output. Thus, the drive currents IL1 and IL2 flow through the drive coils (1) and (2), and the motor rotates.
[0014]
From the above,
(A) In the vicinity of the first half of the phase switching point, the drive currents IL1 and IL2 can be set to zero before being affected by the decrease in the back electromotive voltage Ec, so that the drive currents IL1 and IL2 suddenly fall from a high level. Can be prevented and the motor can be made quieter.
[0015]
(B) When the amplitudes of the sine wave signals H + and H− fluctuate due to variations in the characteristics of the Hall element (3), or when the period of the sine wave signals H + and H− fluctuate due to a change in the rotation speed of the motor. However, since the simultaneous OFF period of the first and second drive transistors (7) and (9) in the vicinity of the first half of the phase switching point can be made constant and the drive current IL can be prevented from rising sharply, the variable speed motor Suitable for reducing noise.
[0016]
(C) Under the condition of constant ambient temperature, in the vicinity of the second half of the phase switching point, the drive currents IL1 and IL2 can be made zero continuously from the vicinity of the first half, so that the reactive current can be ignored and the reduction in the drive efficiency of the motor can be prevented.
[0017]
(D) Since the trapezoidal wave signal G is created from the attenuation signal F, even if the width of the first comparison signal D is affected by a change in the resistance value of the thermistor (16) due to a change in the ambient temperature, the second comparison signal H is not changed. It is inevitable that fluctuation of the rotation torque of the motor and the accompanying noise can be prevented.
[0018]
The following effects are obtained.
[0019]
However, the ends of the driving currents IL1 and IL2 exceed the phase switching point due to the capacitance of the capacitors (100) and (101), and the starting ends of the driving currents IL1 and IL2 approach the phase switching point as the ambient temperature increases. And the end and start ends of the drive currents IL1 and IL2 overlap, and the effect (c) cannot be expected. Thus, the present invention can prevent the drive efficiency of the motor from lowering even when the ambient temperature rises, and can reliably obtain the effect (c).
[0020]
FIG. 7 is a waveform diagram showing changes in drive currents IL1 and IL2 with respect to the ambient temperature.
[0021]
In FIG. 7, a period T0 is, for example, a simultaneous OFF time of the first and second driving transistors (7) and (9) at room temperature (25 ° C.), and a driving current IL is caused by the capacitance of the capacitors (100) and (101) during the period T1. It is a time required for the drive current IL to fall to zero, and for the sake of convenience of description, it is assumed that the fall of the drive current IL exceeds the phase switching point of the first and second coils (1) and (2). The period T2 is a time width during which the start end of the drive current IL tends to fluctuate as the ambient temperature increases, and the period T3 is a time width during which the start end of the drive current IL obtained according to the present invention can fluctuate. According to the present invention, the end and the start of the drive currents IL1 and IL2 can be prevented from overlapping.
[0022]
Now, the signal output operation of the sawtooth signal C, the first comparison signal D, and the trapezoidal signal G in FIG. 1 will be described using one embodiment circuit.
[0023]
FIG. 4 is a circuit diagram showing one embodiment of the charge / discharge control circuit (14). FIG. 4 shows that the base voltage of the transistor (25) and the emitter voltage of the transistor (26) having the same potential are varied according to the on / off state of the transistor (24).
[0024]
In FIG. 4, when the control pulse B is not generated, the transistor (24) is turned off, and the base voltage of the transistor (25) and the emitter voltage of the transistor (26) are obtained by subtracting the voltage across the resistor (28) from the power supply VCC. It becomes the voltage Vmax. Therefore, the capacitor (13) charges with a time constant determined by the resistance value of the resistor (12) and the capacitance of the capacitor (13), and the terminal voltage of the capacitor (13) rises. Although the generation cycle of the control pulse B changes in accordance with the number of rotations of the motor, the time constant is set to a value such that the charging voltage of the capacitor (13) does not reach the voltage Vmax during the generation cycle of the control pulse B. Is set to On the other hand, when the control pulse B is generated, the transistor (24) is turned on, and the base voltage of the transistor (25) and the emitter voltage of the transistor (26) are the divided voltage V1 (<Vmax) of the resistors (28) and (29). It becomes. At this time, since the non-ground side voltage of the capacitor (13) is higher than the voltage V1, the accumulated charge of the capacitor (13) is discharged to the voltage V1 via the transistor (27). This operation is repeated, and a sawtooth signal C is generated.
FIG. 6 is a circuit diagram showing one embodiment of the comparator (17) and the selection circuit (42). At normal temperature, the voltage V2 is a value between the voltages V4 and V5 due to the resistance of the thermistor (16).
[0025]
In FIG. 6, the NPN transistors (43) and (44) are differentially connected, a voltage V2 is applied to the base of the NPN transistor (43), and the resistor (45) ( 46) The voltage V4 divided in (47) is applied. The combined value of the resistances (45) and (46) is equal to the resistance value of the resistance (28), and the resistance values of the resistances (29) and (47) are equal, that is, the voltage V4 is higher than the voltage V1. Therefore, when the voltage V2 is higher than the voltage V4, the NPN transistor (43) is turned on, so that the reference voltage V2 is applied to one input of the comparator (17), and the comparator (17) has a sawtooth waveform. The signal C is compared with the reference voltage V2. When the ambient temperature rises and the voltage V2 becomes lower than the voltage V4, the NPN transistor (44) is turned on. Therefore, the reference voltage V4 is applied to one input of the comparator (17). The detector (17) compares the sawtooth signal C with a reference voltage V4. The reference voltage V4 is a value that can shorten the first comparison signal D only in the period T3. As a result, it is possible to prevent the drive currents IL1 and IL2 from overlapping, and to prevent generation of a reactive current. When the ambient temperature decreases and the voltage V2 becomes higher than the voltage V5 divided by the series resistors (48) and (49), the PNP transistor (50) turns off and the PNP transistor (51) turns off. Turning on, the comparator (17) compares the sawtooth signal C with the reference voltage V5. As described above, the reference voltage V2 is limited between the minimum voltage V4 and the maximum voltage V5, and is suitable for a device that constantly rotates the fan according to the ambient temperature. Then, the function of limiting the upper and lower limits of the reference voltage in FIG. 5 can be integrated on one chip.
[0026]
FIG. 5 is a circuit diagram showing an embodiment of the amplifier (19), the sample hold circuit (22), and the comparator (23).
[0027]
In FIG. 5, an amplifier (19) is provided with a series body composed of a resistor (31) and a reference voltage (32) at the input of an absolute value signal E. Therefore, the absolute value signal E represented by the current is converted by the resistor (31) with reference to the minimum voltage V3. The voltage-converted absolute value signal E is attenuated via an internal differential amplifier circuit and a current mirror circuit at an attenuation rate Rb / (Ra + Rb) determined by the resistance values Ra and Rb of the resistors (20) and (21). It becomes the attenuation signal F. Here, a sample and hold circuit (22) is interposed between the output of the amplifier (19) and the input of the comparator (23). In the sample and hold circuit (22), when the control pulse B is generated, the NPN transistor (33) is turned on, and the electric charge stored in the capacitor (34) is discharged. At this time, since the first comparison signal D is at a high level until the sawtooth signal C exceeds the voltage V2 after the generation of the control pulse B, the transistor (35) is turned on, the transistor (36) is turned off, and the capacitor is turned on. (34) performs charging through the diode (37). Thereafter, when the first comparison signal D changes to low level, the transistor (35) is turned off and the transistor (36) is turned on, so that all the current of the current source (38) flows through the collector-emitter path of the transistor (36), The capacitor (34) stops charging, and the terminal voltage of the capacitor (34) is maintained. The Darlington-connected transistors (39) and (40) are for minimizing the amount of discharge of accumulated charges when the capacitor (34) is in the voltage holding state. Thus, a trapezoidal wave signal G is generated.
[0028]
【The invention's effect】
According to the present invention, in the vicinity of the first half of the phase switching point of the first and second coils, the coil current can be made zero before being affected by the decrease in the back electromotive voltage, so that the coil current rapidly rises from a high level. The inconvenience of falling can be prevented, and the noise of the motor can be reduced. Further, even when the amplitude of the sine wave signal fluctuates due to the variation in the characteristics of the Hall element, or when the period of the sine wave signal fluctuates due to a change in the rotation speed of the motor, the vicinity of the first and second half of the phase switching point may be reduced. Therefore, the simultaneous OFF period of the first and second drive transistors can be made constant, and a steep rise of the coil current can be prevented, which is suitable for reducing the noise of the variable speed motor. In addition, even if the ambient temperature increases, it is possible to prevent the ends of the respective coil currents flowing through the first and second coils from overlapping with each other, thereby preventing a reduction in the driving efficiency of the motor. Further, a one-chip integrated circuit can provide a motor drive circuit that limits the upper and lower limits of the reference voltage that changes in response to a change in the ambient temperature, and that can always rotate the fan at a speed corresponding to the ambient temperature.
[Brief description of the drawings]
FIG. 1 is a circuit block diagram illustrating a motor drive circuit according to the present invention.
FIG. 2 is a waveform diagram showing an entire waveform of FIG.
FIG. 3 is a waveform diagram showing a relationship between the sawtooth signal of FIG. 1 and a reference voltage.
FIG. 4 is a circuit diagram showing a specific example of a sawtooth signal generation circuit of FIG. 1;
FIG. 5 is a circuit diagram showing a specific example of a trapezoidal wave signal generation circuit of FIG. 1;
FIG. 6 is a circuit diagram showing a specific example of the selection circuit of FIG. 1;
FIG. 7 is a waveform diagram showing a drive current waveform according to a change in ambient temperature.
FIG. 8 is a circuit block diagram showing a conventional motor drive circuit.
FIG. 9 is a waveform diagram showing a coil current waveform of FIG.
[Explanation of symbols]
(1) (2) Drive coil (3) Hall element (7) (9) Drive transistor (10) Control circuit (11) Control pulse generation circuit (14) Charge / discharge control circuit (17) First comparator (19) Amplifier (22) Sample hold circuit (23) Second comparator (41) OR circuit (42) Selection circuit

Claims (1)

ファンを回転させるためのモータを構成するステータ及びロータの相対的位置関係に応じてホール素子が発生する正弦波信号に基づいて、第1コイル及び第2コイルを相補的に駆動する第1駆動トランジスタ及び第2駆動トランジスタを有するモータ駆動回路において、
前記第1及び第2コイルの駆動時に一方向に変化し且つ前記第1及び第2コイルの相切り換え時に他方向に変化する鋸歯状波信号と温度変化に応答して変化する基準電圧とを比較し、第1矩形波信号を出力する手段と、
前記正弦波信号を全波変換した第1全波信号と、前記第1全波信号を増幅又は減衰した振幅が異なる第2全波信号を前記第1矩形波信号のタイミングでサンプルホールドしたサンプルホールド信号とを比較し、前記第1及び第2コイルの相切り換え点近傍において、前記第1及び第2駆動トランジスタを同時オフさせる第2矩形波信号を出力する手段と、
前記ファンを周囲温度に応じた速度で常時回転させるべく、温度変化に応答して変化する前記基準電圧の上限及び下限を制限する手段と、
を備えたことを特徴とするモータ駆動回路。
A first drive transistor that complementarily drives the first coil and the second coil based on a sine wave signal generated by a Hall element according to a relative positional relationship between a stator and a rotor that constitute a motor for rotating the fan; And a motor drive circuit having a second drive transistor,
A comparison is made between a sawtooth signal that changes in one direction when the first and second coils are driven and changes in the other direction when the first and second coils are switched, and a reference voltage that changes in response to a temperature change. Means for outputting a first rectangular wave signal;
A sample-and-hold in which a first full-wave signal obtained by full-wave conversion of the sine wave signal and a second full-wave signal obtained by amplifying or attenuating the first full-wave signal and having different amplitudes are sampled and held at the timing of the first rectangular wave signal. Means for comparing the signal with a signal and outputting a second rectangular wave signal for simultaneously turning off the first and second drive transistors near the phase switching point of the first and second coils;
Means for limiting an upper limit and a lower limit of the reference voltage that changes in response to a temperature change, so as to constantly rotate the fan at a speed according to an ambient temperature ;
A motor drive circuit comprising the.
JP21820198A 1998-07-17 1998-07-31 Motor drive circuit Expired - Fee Related JP3545214B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP21820198A JP3545214B2 (en) 1998-07-31 1998-07-31 Motor drive circuit
TW088111636A TW453018B (en) 1998-07-31 1999-07-09 Motor driving circuit
US09/351,898 US6130989A (en) 1998-07-17 1999-07-13 Motor drive circuit
TW088111972A TW453016B (en) 1998-07-17 1999-07-15 Motor driving circuit
US09/363,621 US6157151A (en) 1998-07-31 1999-07-29 Motor drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21820198A JP3545214B2 (en) 1998-07-31 1998-07-31 Motor drive circuit

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JP3545214B2 true JP3545214B2 (en) 2004-07-21

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JP4979750B2 (en) * 2009-09-04 2012-07-18 オンセミコンダクター・トレーディング・リミテッド Motor drive circuit

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