JP3400329B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device which is used for an IC card or the like and has a function of storing and processing important information such as personal privacy and money.

[0002]

2. Description of the Related Art An IC card used as a credit card or a cash card is provided with various functions for storing and processing important information such as personal privacy and money, and the IC chip is made of plastic. It is made by sealing in a package. For this reason, some people observe the surface of the IC chip with an optical microscope and illegally analyze the function, operation method, circuit method, circuit pattern, stored data, etc. of the integrated circuit to falsify the contents. Therefore, in the manufacture of the IC card, it is necessary to provide some kind of protection to the IC chip in order to prevent these illegal acts.

By the way, there are roughly two methods for such fraud. That is, there are a method of observing the inside by destroying the IC chip and a method of observing the inside without destruction. In addition, there are two different methods depending on the observation method. That is, there are a method of observing from the front surface (on the side of the element formation region) of the IC chip and a method of observing from the back surface, conversely.

Here, a specific example of such an illegal act will be described in detail. For example, for a fine pattern of 1 μm or less, when the wavelength of the observation light is close to the pattern width, the influence of diffraction becomes large. Therefore, by using a laser beam having a relatively short wavelength, the resolution and the depth of focus can be improved. Has been.

However, as the wiring layers in the IC chip are multi-layered, it is necessary to remove the upper layer film in order to accurately read the lower layer wiring pattern. Therefore, I
It is difficult to observe C in a non-destructive state while operating, and even if such a circuit observation method is used, the MO of the bottom layer is
Data is stored in the gate electrode of the S transistor
EEPROM (Electrically Erasable Programmable Read Onl
y Memory) is difficult to observe.

However, there is also used a method of observing the circuit near the front surface of the wafer nondestructively from the back surface of the wafer, that is, by using an infrared ray having a wavelength which is not easily absorbed by the silicon wafer as an observation light source, the transparency of the wafer is reduced. The wiring pattern and the like mainly made of metal can be observed from the back surface of the wafer by increasing the height. By using this method, the pattern of the transistor in the lowermost layer and the wiring pattern of the first layer can be observed nondestructively.

Particularly in the recent high-density packaging technology, I
A method of arranging a hump electrode for making an electrical connection with a mounting board on the front surface side of the C chip, turning over the chip and connecting it to the mounting board is frequently adopted. Therefore, since the back surface of the chip is exposed to the outside in such a mounted state, it becomes easy to observe the pattern from the back surface side rather than from the chip front surface side.

Further, when the chip is turned upside down and mounted, the back surface of the chip is usually coated with a chip protecting epoxy film or the like, but these can be easily removed by using a chemical agent. It is difficult to prevent the observation by these. Of course, it is not unthinkable to use a protective film that resists etching using chemicals or plasma, but since there is no material that can withstand mechanical grinding or polishing with abrasives, it is necessary to use a protective film. Backside protection is not enough.

On the other hand, as a method of preventing observation from the back surface, another method is to grind the back surface of a silicon wafer using a photo-etching technique and form a groove having a sawtooth cross section on one surface to reflect / scatter infrared light. There is also a way to do it. However, the groove can be removed by grinding and polishing the back surface of the wafer deeper than the above groove, and the back surface having high smoothness can be made to appear again. Even if you go, it is not enough as a defense from backside observation.

[0010]

As described above, once the observation and analysis for illegal activities such as the decoding of the circuit and the falsification of the stored information are carried out, these frauds are prevented by the conventional technique. However, conventional defense measures have not been sufficient, especially for observation from the backside of the wafer.
The present invention is to solve such a problem,
To provide a semiconductor device that solves the problem that important information such as personal privacy and money stored in an IC chip is easily tampered with by fraudulent activity, and particularly that the internal circuit is easily observed from the back surface of a wafer. With the goal.

[0011]

In order to achieve such an object, a semiconductor device according to a first aspect of the present invention comprises a chip having an integrated circuit and a wiring board for mounting the chip. In the semiconductor device,
It is mounted on the wiring board in a curved state around a predetermined axis parallel to the wiring board. A semiconductor device of the present invention according to claim 2 has an integrated circuit.
Equipped with a chip and a wiring board for mounting this chip
In the obtained semiconductor device, a concave portion is formed on the back surface of the chip.
Other at least one of the protrusions is formed with a plurality of said chips, the surface of the chip by facing the wiring board, are mounted on the upper Symbol substrate in a curved state, the chip rear surface
When ground into a flat shape,
Before the other side is completely removed, the collection formed on the chip surface above
A part of the product circuit is removed . Further, claim 3
The semiconductor device of the present invention according to claim 1 is the semiconductor device according to claim 1 or 2, wherein the chip includes a memory device . A semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to the third aspect, wherein the memory device is a RAM, a ROM or an EE.
At least one of the PROMs .

According to the present invention having such a configuration, the protective film for observation prevention, the irregularities for irregular reflection, etc. formed on the back surface of the wafer are planarized by a method including a mechanical mechanism such as grinding or polishing. Even if you try to remove it by grinding, a part of the wafer surface will be removed before the protective film is completely removed.
If you try to leave the active area, you cannot completely remove only the defense film. Therefore, even if an attempt is made to observe the circuit pattern on the front surface of the wafer by using infrared rays from the back surface of the wafer, the protection film for blocking the observation and the irregularities for irregular reflection are left behind, and the light is reflected and scattered to reflect the wafer surface. The circuit pattern image is significantly distorted, preventing accurate active observation.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Next, one embodiment of the present invention will be described with reference to the drawings. 1 and 2 are cross-sectional views showing one embodiment of the present invention, in which FIG.
(J) shows each step in the manufacturing process, and details thereof will be sequentially described below.

Here, in this embodiment, the chip size is 4 mm square, and the integrated circuit is formed on the surface of a silicon wafer having a diameter of 6 inches by using a thin film deposition technique and a photolithography technique. At this time, the thickness of the wafer is 625 μm,
The line width of the minimum pattern is 0.5 μm. In addition to the 8-bit central processing unit, the circuit to be formed is a 1-kilobyte RAM (Random Access Memory) and 8-kilobyte R.
A memory device such as an OM (Read Only Memory) and a non-volatile EEPROM of 8 kilobytes is included. Further, the surface of the wafer is covered with Si ₃ N ₄ and Si for surface protection.
A passivation film of O ₂ is formed to complete the wafer pretreatment process. After that, unlike the conventional process,
In order to obtain the effect according to the present invention, the following steps are added.

First, in step (a), the integrated circuit 2 is formed on the front surface side of the wafer 1 as described above. In step (b), a polymer material sheet 3 for holding the wafer 1 is attached to the front surface side of the wafer 1 using an adhesive. In step (c), the wafer 1 is thinned using a wafer grinding device and a polishing device (not shown), and the wafer 1 is polished to 50 μm. Of course, this polishing amount is determined so as not to affect the integrated circuit 2.

In step (d), the entire wafer is loaded into a laser marker device (not shown), and an irradiation trace 4 by the laser beam is formed on the back surface of the wafer 1. Here, the wavelength of the laser light source is set to 532 nm, and the light is focused by the lens to focus on the depth of the recess of the irradiation trace 4 formed in the wafer 1. Each irradiation position is irradiated with three pulses to form a circular crater-shaped irradiation trace on the back surface of the wafer 1. At this time, the silicon is melted by the heat generated by absorbing the laser beam, the central portion is depressed, and the melted material is pushed to the peripheral portion, so that the peripheral portion has a shape higher than the wafer surface.

The average shape of the trace is 60 μm in diameter, the depth of the center of the trace from the wafer surface is 5 μm, and the height of the raised portion in the peripheral portion is 3 μm, and the cross-sectional shape of the trace is close to the Gaussian distribution of the light source. By condensing while leaving the energy distribution as it is and adopting the above-described focus position setting method, a substantially V-shaped shape is obtained. As described above, a large number of crater-shaped irradiation traces are formed on the back surface of the wafer by the above-described method so as to be adjacent to each other over the entire surface.

Then, in step (e), the wafer 1
A polyimide sheet 5 is attached to the back surface of the sheet using a heat resistant adhesive. In step (f), after removing the polymer material sheet 3 on the front surface side of the wafer 1, humps 6 for electrically connecting the integrated circuit 2 to the outside are provided on the front surface of the wafer 1 at the four corners of the IC chip. There will be 8 in total, 2 in each. In step (g), the wafer 1 is diced to separate the IC chips 7.

In step (h), using a jig 8 whose surface is uniaxially curved in a semi-cylindrical shape, with the surface of the IC chip 7 facing downward, on an IC card substrate 9 made of metal and a glass epoxy plate, The electrode 10 and the hump 6 are aligned and then connected. The detailed structure of the jig 8 is as shown in FIG. 3, and the lower surface of the jig 8 is curved around an axis 12 parallel to the IC card substrate 9.

The process in step (h) is peculiar to the present invention, and the connection is usually made while maintaining the flatness of the chip, but here, the IC chip 7 is curved to form the IC.
It is characterized in that it is fixed on the card substrate 9. That is, the IC chip 7 is curved so that the chip surface side is convex and is loaded by using the flip chip mounting technique, and a part of the surface of the IC chip 7 is remarkably brought close to the surface of the IC card substrate 9. There is. For example, the gap between the IC chip 7 and the IC card substrate 9 is 70 at the peripheral edge of the chip.
μm, and 0 to 3 μm in the central part of the chip. Further, even if the central portion contacts the IC card substrate 9, there is no problem, and the IC chip 7 is mounted in a curved state such that the maximum amount of warp of the central portion with respect to the peripheral portion exceeds the thickness of the IC chip 7. Preferably.

Then, in step (i), the underfill agent 11 made of an epoxy resin having high fluidity is added to the I
After being filled in the gap between the C chip 7 and the IC card substrate 9, it is cured and cured. In step (j), after the pressure applied by the jig 8 is released, the polyimide sheet 5 is peeled off. At this time, the curved shape of the IC chip 7 is still maintained by the underfill agent 11. Then, a chemical resistant resin 12 in which a polymeric material is mixed with an inorganic antiwear agent is applied so as to cover the entire back surface of the IC chip 7 to protect the back surface. Then, using known processes, I
A desired IC card is completed by covering the C chip 7 and the like with a card substrate made of vinyl chloride resin.

Next, with respect to the IC card having such a structure, a part of the procedure for optically reading the circuit pattern inside the chip and analyzing the circuit and the stored data will be described in addition to the analysis from the external terminal. First, the surface of the IC card is ground with a cutting tool to remove a part of the vinyl chloride on the surface of the IC card and a part of the card constituent member made of epoxy resin or the like. Here, in the prior art,
The backside of the IC chip is exposed by melting the chip backside protective film made of epoxy resin using heated fuming nitric acid.
Next, the back surface of the chip was observed with an infrared microscope using a He—Ne laser with a wavelength of 1.15 μm. Thereby, the transistor circuit and the first layer wiring near the surface of the chip can be observed.

However, in this embodiment, since the chemical-resistant back surface protection resin is used, the resin cannot be completely removed only by this step. Even if the resin can be completely removed by devising the etching technique, a large number of crater-like irradiation traces 4 are formed on the surface of the IC chip 7, so that infrared light is diffusely reflected. , It is impossible to observe the circuit on the front side of the chip through the wafer from the back side of the chip.

At this time, as a contrivance on the side of observation, as a next step, the resin 12 is removed by grinding the back surface of the chip by grinding and polishing, and further, the silicon wafer is also ground to remove the irradiation trace and the back surface is removed. It is conceivable to make an observation by polishing the surface smoothly. However, in the present embodiment, since a chip having a thickness of 50 μm is mounted with a maximum curvature of 70 μm, the entire back surface of the chip is ground flat without damaging the integrated circuit 2 formed on the front surface of the chip. It is not possible. Further, when the chip is damaged by grinding, the circuit cannot be brought into the active state and observation in the operating state can be prevented.

In the above embodiment, an example in which the surface of the wafer is curved in the uniaxial direction has been described.
It is obvious that the effect can be obtained even if the method of bending is not particularly limited from the point of the present invention. However, it is preferable to take a method as easy as possible in consideration of the technology to be actually mounted. Therefore, from such a viewpoint, the uniaxial bending shown in the present embodiment is easy to process, and the direction of mechanical stress exerted on the device on the chip is relatively permissible from the viewpoint of the device mechanism. There are advantages such as easy selection.

On the other hand, in this uniaxial bending, it is necessary to apply mechanical bending stress at the time of mounting and maintain this by the mounting technique. When the chip thickness increases, the rigidity of the mounting substrate side increases. The need arises. On the other hand, when the chip is bent by using the internal stress generated from the passivation film or the metal film formed on the front surface or the back surface of the chip, the internal stress becomes uniform in the plane, and generally, it is uniaxial. A curved surface similar to a part of the spherical surface is generated instead of the curved surface, and the IC chip 7 is curved as shown in FIG. In this case, I
The chip can be curved without newly applying an external force to the C chip 7. As a result, only the IC chip 7 can be curved without applying an unnecessary force to the mounting board, which has an advantage that the rigidity of the IC card board 9 as the mounting board does not matter.

Since the internal stress applied to the chip is isotropic with respect to each direction on the surface of the chip, isotropic strain is also applied in-plane to the transistor arranged on the surface of the wafer. Even if the characteristics such as the threshold voltage of the MOS type transistor change, the values of all the transistors in the chip are shifted in parallel, and the variation between the elements can be suppressed to a sufficiently small range.

[0028]

As described above, the semiconductor device according to the present invention is one in which a chip having an integrated circuit is mounted on a wiring board in a curved state. This allows
Even if an attempt is made to grind and remove a protective film for blocking observation and irregularities for irregular reflection formed on the back surface of the wafer by a method including a mechanical mechanism such as grinding or polishing, a protective film or the like is applied to a curved IC chip. Since part of the IC chip is also removed before the above is completely removed, it is not possible to completely remove only the protective film and the like. Therefore, even if an attempt is made to observe the circuit pattern on the substrate surface using infrared rays or the like from the back surface of the semiconductor substrate, light is reflected or scattered due to the defense film for observation blocking and irregularities for diffuse reflection that could not be completely removed. The image of the circuit pattern on the surface of the substrate is significantly distorted, and accurate observation in the active state is hindered. Therefore, it is possible to prevent observation from the back surface of the IC chip for the purpose of falsification due to illegal acts. As described above, the present invention has an advantage that stored information can be protected from illegal acts such as tampering, and various information processing systems using semiconductor devices can function safely and with high reliability. Although the semiconductor wafer made of silicon is used in the above-described embodiment, the semiconductor wafer is not limited to silicon, and a compound semiconductor (for example, G
It is obvious that the present invention can be similarly applied to a wafer made of aAs, InP, or the like. It is also clear that the present invention is effective when applied to a hybrid IC on a ceramic substrate, a micromachine element, or the like.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a sectional view showing a continuation of FIG.

FIG. 3 is a perspective view showing the step (h) of FIG. 2 in detail.

FIG. 4 is a perspective view showing another embodiment of the present invention. 1 ... Wafer, 2 ... Integrated circuit, 3 ... Polymer material sheet, 4
... Irradiation trace, 5 ... Polyimide sheet, 6 ... Bump, 7 ...
IC chip, 8 ... Jig, 9 ... IC card substrate, 10 ... Electrode, 11 ... Underfill agent, 12 ... Resin.

─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Shigeo Ogawa 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Masahiko Maeda 3--19-3 Nishishinjuku, Shinjuku-ku, Tokyo No. 2 Nihon Telegraph and Telephone Corporation (56) Reference JP-A-1-244625 (JP, A) JP-A-2-134896 (JP, A) JP-A-2-153527 (JP, A) JP-A 6-140466 (JP, A) JP-A-6-202561 (JP, A) JP-A-9-213595 (JP, A) JP-A-9-246324 (JP, A) JP-A-10-201924 (JP, A) JP-A-11-121530 (JP, A) JP-A-11-175679 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/60 B42D 15/10 G06K 19 / 00 H01L 21/02 H01L 21/304 H01L 23/12

Claims (4)

(57) [Claims] 1. A semiconductor device comprising a chip having an integrated circuit and a wiring substrate for mounting the chip, wherein the chip is centered on a predetermined axis parallel to the wiring substrate.
Wherein a that are mounted on the wiring board in a state of being curved. 2. A chip having an integrated circuit and the chip
In a semiconductor device equipped with a wiring board for mounting
At least one of a concave portion and a convex portion is provided on the back surface of the chip.
A plurality of chips are formed, and the surface of the chip faces the wiring board.
By being mounted on the front Symbol wiring substrate in a curved state,
When the back surface of the chip is ground flatly , the recess or
The chip surface before removing at least one of the protrusions
A semiconductor device, wherein a part of the integrated circuit formed on the substrate is removed . 3. The semiconductor device according to claim 1, wherein the chip includes a memory device. 4. The memory device according to claim 3 , wherein the memory device is a RAM, a ROM, or an EEPROM.
Wherein a least any one der Rukoto of.