JP3433809B2 - Memory diagnosis / initialization method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory diagnosis / initialization system for an information processing apparatus equipped with a minimum instruction set computer (hereinafter simply referred to as RISC). The present invention relates to a technique effectively applied to a memory diagnosis / initialization method in a processor included in the processor.

[0002]

2. Description of the Related Art For example, a cache memory and a volatile main memory of an information processing apparatus have a diagnostic mechanism for guaranteeing the operation of the memory at the time of system startup and an ECC.
It has an initialization mechanism to guarantee (error correction code) or parity bits. Further, in a complex instruction set computer (hereinafter, simply referred to as CISC), a diagnosis and initialization mechanism is generally operated by a micro program incorporated in a CISC chip. Since the microprogram runs at high speed, the processing time for diagnosis and initialization does not pose a problem.

However, R without a microprogram
In an information processing device equipped with an ISC, a memory diagnostic program on a non-volatile main memory operates a diagnostic and initialization mechanism to diagnose and initialize a cache memory and a volatile main memory.

[0004]

However, in the prior art as described above, the processing time for memory diagnosis and initialization affects the system startup processing time, and in recent years the cache memory capacity and the number of layers have been increased. However, there is a drawback that the processing time is further increased due to the increase in capacity and the capacity of the main memory.

Therefore, a first object of the present invention is to minimize the time during which the memory diagnostic program runs on the slow main memory and to run the memory diagnostic program on the cache memory area to save the cache memory area. It is an object of the present invention to provide a technique for performing diagnosis and initialization processing and shortening the cache memory diagnosis and initialization time.

A second object of the present invention is, in a processor having a cache memory composed of a plurality of layers between itself and a main storage device, initialization or diagnosis / diagnosis of the cache memory composed of a plurality of layers. It is to provide a technique for reducing the initialization time.

Next, a third object of the present invention is to provide a processor having a volatile main memory, a non-volatile main memory and a cache memory with the time required for initialization or diagnosis / initialization of the volatile main memory. It is to provide a technology for shortening.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0009]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, according to the memory diagnosis / initialization method of the present invention, in a processor having a cache memory between itself and a main memory, a program for memory initialization or diagnosis / initialization is run on the cache memory,
A memory diagnostic / initialization method for diagnosing / initializing the cache memory, comprising means for directly reading / writing the cache memory, and initializing a partial area of the cache memory by a memory initialization program on the main memory, A program for initializing or diagnosing / initializing the cache memory by the above means is written in the cache memory area that has been initialized, and the initialization or diagnosis / initialization of the cache memory area that has not been initialized is performed in the cache memory. It is performed at high speed by the above program.

Further, the memory diagnosis / initialization system of the present invention is such that, in a processor having a cache memory composed of a plurality of layers between itself and a main memory, initialization or diagnosis / initialization of the cache memories of a plurality of layers. a diagnostic / initialization method of a memory which performs reduction, comprising means for reading and writing directly contents of each cache memory, a main memory on
The memory initialization program of the
A part of the memory is initialized and the initialized
Cache memory in the cache memory area
Write a program to initialize or diagnose / initialize
The initialization of the cache memory of the above layer is completed.
Not initializing or diagnosing cache memory area / first
The synchronization is performed by the program in the cache memory.
In addition, the program written in the cache memory is used to perform initialization or diagnosis / initialization of the cache memory in another layer at high speed.

Further, the memory diagnosis / initialization method of the present invention is a processor having a volatile main memory, a non-volatile main memory, and a cache memory, which diagnoses the volatile main memory and the cache memories of a plurality of layers. / Memory diagnosis / initialization method for initialization, which is provided with means for directly reading / writing the contents of the cache memory, and is non-volatile.
First by the memory initialization program on the main memory
Initialize part of the cache memory in the hierarchy of
In the cache memory area that has been converted,
Initialization of cache memory and volatile main memory
Write a diagnostic / initialization program,
The cache memory of the hierarchy has not been initialized yet.
Cache memory area initialization or diagnostic / initialization cache
The program in the cache memory
By the program written in the Shme memory,
Performs cache memory initialization or diagnosis / initialization
Further, the volatile main memory is initialized or diagnosed / initialized by the program.

[0013]

According to the above-mentioned memory diagnosis / initialization method, the cache memory area for the capacity for storing the memory diagnosis / initialization program is diagnosed and initialized, and thereafter, the cache memory area is directly read / written by the cache memory read / write means. The cache data corresponding to the memory diagnostic program is written in the initialized cache memory area, and the memory diagnostic program written in the cache memory mainly diagnoses and initializes the cache memory area that has not been diagnosed and initialized. By running on the cache memory faster than the storage memory, the time required for memory diagnosis and initialization can be shortened.

Further, when the cache memory is composed of a plurality of layers (for example, a cache memory built in a processor chip and an external cache memory), the cache which has been diagnosed and initialized by directly reading / writing the cache memory is used. A cache memory that is equivalent to a memory diagnostic program is written in the memory, and the memory diagnostic program written in the cache memory diagnoses and initializes another cache memory that has not been completed faster than the main memory. Running on top can reduce memory diagnostics and initialization time.

Further, in the case where the cache memory, the volatile main memory memory, and the non-volatile main memory memory are used, the memory diagnostic program is stored in the cache memory that has been diagnosed and initialized by using the means for directly reading and writing the cache memory. The cache diagnostic data written in the cache memory is written to the cache memory, and the diagnosis and initialization of the volatile main memory which is not completed to be diagnosed and initialized is executed on the cache memory faster than the main memory. By doing so, the memory diagnosis and initialization time can be shortened.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a memory diagnostic /
2 is a conceptual diagram showing a system configuration of an initialization system, FIG. 2 is a conceptual diagram showing an example of a cache memory writing circuit in the system configuration diagram of FIG. 1, and FIG. 3 is an example of an operation flow of the memory diagnosis / initialization system. FIG. 4 is a flowchart showing FIG.
Shows the memory diagnostic program 10a in the operation flow of the memory diagnostic / initialization method of FIG.
It is a flowchart figure which shows an example of the operation flow which writes in.

First, referring to FIG. 1, the memory diagnostic /
The configuration of the initialization method will be described.

The memory diagnosis / initialization method of this embodiment is as follows:
For example, in a processor having a cache memory having a plurality of layers with a main memory, a program for diagnosing / initializing the cache memory is run on the cache memory to diagnose / initialize the cache memory and the main memory. The main memory 6 is provided with a processor 1 having a plurality of layers of cache memories.

Further, in the processor 1, a cache memory 4 having a two-layer structure composed of a primary cache memory 2 and a secondary cache memory 3, a cache memory selection circuit 5 connected to the cache memory 4, and a primary cache are provided. Cache memory writing circuit 11 connected to the memory 2
Is equipped with. Then, the cache memory writing circuit 11 determines whether the cache memory 4 is valid or invalid according to a command from the processor 1, and the cache memory 4 is connected to the main storage device 6.

Next, the main memory 6 comprises a volatile main memory 7 and a non-volatile main memory 8. The non-volatile main memory 8 has a cache memory diagnostic program for diagnosing and initializing the memory. 9 and a memory diagnostic program 10a are stored.

The structure of the cache memory writing circuit 11 will now be described with reference to FIG.
Connected from the processor 1 to the primary cache memory 2
Write cache data to. Then, the cache memory writing circuit 11 includes a cache data register 20 for storing cache data including an address tag, an instruction, and data, a selector circuit 21 for selecting an arbitrary cache entry in the primary cache memory 2, and a control circuit 22. The processor 1 writes a cache data to the primary cache memory 2 according to a diagnostic command from the processor 1.

Next, the operation of the memory diagnosis / initialization method of the present invention will be described with reference to the operation flows of FIGS.

In step 301, when the power is turned on, the cache memory 4 including the primary cache memory 2 and the secondary cache memory 3 is disabled by the cache memory selection circuit 5.

Then, in order to diagnose and initialize the memory diagnostic program 10b storage area of the primary cache memory 2, the cache memory diagnostic program 9 stored in the non-volatile main memory 8 in the main memory 6 runs. At times, cache data is not stored in the invalid cache memory 4 but is stored in the non-volatile main memory 8 and is read by the processor 1 to start the diagnosis and initialization processing of the primary cache memory 2.

Next, at step 302, the cache memory diagnostic program 9 is executed by the memory diagnostic program 10a.
The primary cache memory 2 of only the capacity capable of storing
Diagnosis and initialization of. When the diagnosis and initialization of the primary cache memory 2 are completed, the cache memory diagnostic program 9 passes the cache memory writing circuit 11 to address the memory diagnostic program 10a stored in the non-volatile main memory 8. tag,
The data is written in the primary cache memory 2 as cache data including instructions and data.

Here, the memory diagnostic program 10b is set to 1
The process of writing to the next cache memory 2 will be described with reference to FIGS. 2 and 4.

That is, the writing of the cache data to the primary cache memory 2 is performed by a diagnostic command issued by the cache memory diagnostic program 9, and the primary cache memory of the memory diagnostic program 10b is executed through steps 401 to 406 below. Writing to No. 2 will be described.

First, in step 401, the cache memory diagnostic program 9 determines a cache entry for storing cache data.

Next, at step 402, the head address of the memory diagnostic program 10a in the non-volatile main memory 8 is obtained and the address is set to A. Here, A is an index indicating the address of the memory diagnostic program 10a.

Then, in step 403, the memory diagnostic program 1 stored in the non-volatile main memory 8
The data of address A of 0a is taken out and an address tag is created.

Next, at step 404, cache data consisting of an instruction and data is created from the data at address A.

Further, in step 405, the cache memory diagnostic program 9 instructs the cache memory writing circuit 11 with the cache entry of the primary cache memory 2 and the address tag, the instruction and the data to be written in the cache entry by the diagnostic instruction. Then, the instructed cache memory writing circuit 11 selects the specified cache entry by the selector circuit 21 and transfers the address tag, the instruction, and the data, which are the cache data stored in the cache data register 20, to the primary cache memory 2. Write.

Next, at step 406, it is judged whether the address of the address A is the final address of the memory diagnostic program, and if it is not the final address, the address A of the memory diagnostic program 10a and the cache entry are counted up, Returning to the creation of the address tag in step 403. In this way, the cache memory diagnostic program 9 writes all cache data corresponding to the memory diagnostic program 10a in the primary cache memory 2.

In this way, the primary cache memory 2
The cache data written in will be called a memory diagnostic program 10b.

Then, as shown in FIG. 3, step 303
Then, when the cache memory diagnostic program 9 finishes writing the memory diagnostic program 10b, the cache memory selection circuit 5 switches the cache memory 4 to the valid state. When the cache memory 4 is validated, the processor 1 searches the primary cache memory 2 for a cache hit.

At this time, the primary cache memory 2
Stores address tags, instructions, and data necessary for the memory diagnostic program 10b to run. All cache hit searches from the processor 1 hit, and the memory diagnostic program 10b is read from the primary cache memory 2. Be done.

Next, in step 304, the processor 1
The memory diagnostic program 10b read in starts the process of diagnosing and initializing the area in the primary cache memory 2 which has not been diagnosed and initialized.

After that, in step 305, the memory diagnostic program 10b starts diagnosis and initialization processing of the secondary cache memory 3 when the diagnosis and initialization of the primary cache memory 2 are completed.

Finally, in step 306, when the memory diagnostic program 10b completes the diagnosis and initialization of the secondary cache memory 3, it executes the diagnosis and initialization processing of the volatile main memory 7 in the main memory device 6. Start. The diagnosis and initialization of the volatile main memory 7 are completed, and the diagnosis and initialization processing of all the memories is completed.

Therefore, according to the memory diagnosis / initialization method of this embodiment, by placing the memory diagnosis program in the primary cache memory which is faster than the main memory, the cache memory and the volatile main memory can be operated at high speed. Diagnosis /
It can be initialized.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, although the cache memory of this embodiment has been described as having a two-level cache memory, the present invention is not limited to the above-mentioned embodiment and has a cache memory of two or more levels. Is also widely applicable.

[0043]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows.

That is, by adding a small amount of hardware such as a cache memory writing circuit and running a memory diagnostic program on the cache memory, high speed diagnosis / initialization of the cache memory and the volatile main memory can be performed. Is possible.

As a result, the diagnosis and initialization time of the memory included in the system start-up process becomes faster, and the system start-up time can be shortened.

[Brief description of drawings]

FIG. 1 is a conceptual diagram showing a system configuration of a memory diagnosis / initialization system which is an embodiment of the present invention.

FIG. 2 is a conceptual diagram showing a configuration of a cache memory write circuit that is an embodiment of the present invention.

FIG. 3 is a flowchart showing an operation flow of a memory diagnosis program for performing memory diagnosis / initialization which is an embodiment of the present invention.

FIG. 4 is a flowchart showing an operation flow of the cache memory writing circuit according to the embodiment of the present invention.

[Explanation of symbols]

1 processor 2 Primary cache memory 3 Secondary cache memory 4 cache memory 5 Cache memory selection circuit 6 main memory 7 Volatile main memory 8 Non-volatile main memory 9 Cache memory diagnostic program 10a Memory diagnostic program 10b Memory diagnostic program 11 Cache memory writing circuit 20 cash data register 21 Selector circuit 22 Control circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-170647 (JP, A) JP-A-59-173854 (JP, A) JP-A-2-503485 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) G06F 12/16 G06F 11/22 G06F 12/08 G06F 1/24

Claims (3)

(57) [Claims] 1. In a processor having a cache memory between itself and a main memory, a memory that executes a program for initializing or diagnosing / initializing the memory is executed on the cache memory, and diagnosing / initializing the cache memory. The diagnostic / initialization method of (1), which comprises means for directly reading and writing the cache memory, initializes a partial area of the cache memory by the memory initialization program on the main storage device, and initializes the cache memory area to Initializing or diagnosing cache memory by the above means
A memory diagnosis / initialization method, wherein a program for initialization is written, and initialization or diagnosis / initialization of a cache memory area that has not been initialized is performed at high speed by the program in the cache memory. 2. A memory diagnosis / initialization method for initializing or diagnosing / initializing cache memories of a plurality of layers in a processor having a cache memory composed of a plurality of layers between a main storage device. Te, comprising means for reading and writing directly contents of each cache memory, Omoki
The memory initialization program on the storage device
Initialize a part of the cache memory and complete the initialization
The cache memory area that has been
Program for initializing or diagnosing / initializing memory
Write to the cache memory of the above hierarchy
Initialization of uncompleted cache memory area or
Diagnosis / initialization of the program on the cache memory
The conducted, further, the memory diagnosis / initialization method which is characterized in that the initialization or diagnostic / initialize the cache memory of other hierarchies fast by written the program into the cache memory. 3. A processor having a volatile main memory, a non-volatile main memory and a cache memory,
A memory diagnosing / initializing method for diagnosing / initializing a volatile main memory and a plurality of layers of cache memory, comprising means for directly reading / writing the contents of the cache memory, and a memory on the non-volatile main memory Initialization program
First part of the cache memory of the first layer
To the cache memory area that has been initialized and initialized.
A cache memory and a volatile main memory memo
Write a program for initializing or diagnosing / initializing
And the initialization of the cache memory of the above layer is completed.
Not initialized or diagnosed cache memory area /
Initialization by the program in the cache memory
Executed by the program written in the cache memory
Initialization or diagnosis of cache memory of other layers
A memory diagnosis / initialization system characterized by performing initialization, and further, by initializing or diagnosing / initializing a volatile main memory by the program at high speed.