JP3443066B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a semiconductor layer standing structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art A micro optical bench having a standing structure has been realized by a micro machine technology using silicon. Using this micromachine technology, for example,
Fabrication of resonant microscanners for laser scanning displays, movable microreflectors, scanning micromirrors for external cavities of semiconductor lasers, etc. has been reported.

In this conventional micromachine technology, a part of the stacked semiconductor layers is peeled off by etching, and then the peeled part is slid to stand up and joined by a hinge part to form a stand up structure. There is. This standing structure is used to form a mirror or the like that stands on the substrate at a predetermined angle.

[0004]

However, when the standing structure is made of a semiconductor by using the conventional micromachine technique, abrasion occurs when the peeled semiconductor layer is slid. Moreover, it is difficult to accurately slide the semiconductor layer to a predetermined position. Therefore, it is difficult to accurately control the angle and position of each member forming the upright structure, and the workability is poor.

An object of the present invention is to provide a semiconductor device in which the angle and position of each member forming the standing structure can be accurately controlled and which can be easily formed by a semiconductor layer, and a manufacturing method thereof.

[0006]

Means for Solving the Problems and Effects of the Invention In a semiconductor layer according to the first invention, a first layer, a second layer and a third layer are sequentially formed on a substrate, and the second layer is A laminated structure of a first semiconductor layer having a first lattice constant and a second semiconductor layer having a second lattice constant smaller than the first lattice constant, and surrounding a predetermined region of the third layer. The third layer, the second layer, and the first layer are removed except for a partial region of the region, and the first layer in the predetermined region and the partial region is removed to remove the first layer of the first semiconductor layer. With a lattice constant of 1
The strain caused by the difference with the second lattice constant of the second semiconductor layer is relaxed.
The second layer in the predetermined region is curved in a partial region so as to be harmonized .

In the semiconductor device according to the present invention, the third layer except a part of the region surrounding the predetermined region,
Since the second layer and the first layer are removed, and the first layer in the predetermined region and the partial region is removed, the second layer in the predetermined region is in the peripheral region only in the partial region. It is in a released state while being connected. Since the lattice constant of the first semiconductor layer of the second layer is larger than the lattice constant of the second semiconductor layer, strain due to the difference in lattice constant occurs in the second layer. Thereby, the second layer is curved so as to relax the strain. Accordingly, the third layer on the second layer stands up at a predetermined angle with respect to the substrate.

As described above, the second semiconductor layer is formed so as to relax the strain caused by the difference in lattice constant between the first semiconductor layer and the second semiconductor layer.
The third layer stands up against the substrate due to the automatic bending of the layer. Therefore, the first semiconductor layer and the second semiconductor layer
The angle of the third layer can be easily and accurately controlled by adjusting the composition and thickness of the semiconductor layer.

Therefore, it is possible to realize a semiconductor device in which the angle and position of each member constituting the standing structure can be accurately controlled and which can be easily configured by the semiconductor layer.

The third layer in the partial area may be removed.
Thereby, the second layer can be easily curved in a partial area.

The third layer may include a third semiconductor layer having a lattice constant approximately equal to that of the first semiconductor layer of the second layer. In that case, the curvature of the third layer is prevented, and a flat third layer standing upright with respect to the substrate is formed.

The predetermined region may include a plurality of regions, and the third layer on the second layer, which is curved in each of the plurality of regions, may abut against each other. In this case, the plurality of third layers are in contact with each other to define the angle of each third layer, so that the composition and thickness of the first semiconductor layer and the second semiconductor layer are not precisely controlled. , The angle of each third layer can be accurately set to a desired angle.

The third layer may include a reflective film. In this case, a mirror standing upright on the substrate can be formed.

A method of manufacturing a semiconductor device according to a second aspect of the present invention includes a step of forming a first layer on a substrate, a first semiconductor layer having a first lattice constant and a first layer on the first layer. Forming a second layer including a laminated structure with a second semiconductor layer having a second lattice constant smaller than the lattice constant of
Forming a third layer on the second layer, the third layer, the second layer, and the first layer except for a part of a region surrounding a predetermined region of the third layer. And removing the first layer in the predetermined region and the partial region by selectively removing the first layer.
Due to the difference between the number and the second lattice constant of the second semiconductor layer
And a step of bending the second layer in a predetermined region in a partial region so as to alleviate the above .

According to the method of manufacturing a semiconductor device of the present invention, the third layer, the second layer and the second layer are removed except for a part of the region surrounding the predetermined region, and the predetermined region is also removed. And since the first layer in the partial region is removed, the second layer in the predetermined region is in the released state while being connected to the peripheral region only in the partial region. Since the lattice constant of the first semiconductor layer of the second layer is larger than the lattice constant of the second semiconductor layer, strain due to the difference in lattice constant occurs in the second layer.
Thereby, the second layer is curved so as to relax the strain.
Accordingly, the third layer on the second layer stands up at a predetermined angle with respect to the substrate.

As described above, the second semiconductor layer is formed so as to relax the strain caused by the difference in lattice constant between the first semiconductor layer and the second semiconductor layer.
The third layer stands up against the substrate due to the automatic bending of the third layer. Therefore, the angle of the third layer can be easily and accurately controlled by adjusting the composition and thickness of the first semiconductor layer and the second semiconductor layer.

Therefore, it is possible to realize a semiconductor device in which the angle and position of each member constituting the upright structure can be accurately controlled and which can be easily configured by the semiconductor layer.

The method may further include the step of removing the third layer in the partial area. Thereby, the second layer can be easily curved in a partial area.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1, 2, 3 and 4 are process drawings showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention, in which (a) is a schematic sectional view, (B) is a schematic plan view. This semiconductor device is a reflecting mirror device having a mirror that is erected almost vertically on a substrate.

First, as shown in FIG. 1, a GaAs substrate 1
On top, a release layer 2 made of AlGaAs,
Strain layer (strain layer) 5 and component layer
6 is epitaxially grown in order.

The release layer 2, strain layer 5 and constituent layer 6 are formed by MBE (Molecular Beam Epitaxial Growth), M
It is formed using an epitaxial growth technique such as an OCVD method (organic metal chemical vapor deposition method) or a CVD method (chemical vapor deposition method).

The strained layer 5 is made of InG having a thickness of several nm to several tens nm.
aAs layer 3 and GaAs layer 4 having a thickness of several nm to several tens of nm
It is composed of The lattice constant of the InGaAs layer 3 is G
It is larger than the lattice constant of the aAs layer 4. Therefore, the strained layer 5
Strain occurs due to the difference in lattice constant.

The component layer 6 is the InGaAs layer 6
1 and a distributed reflection film (Distributed Bragg Reflector: hereinafter referred to as a DBR film) 62. InGaAs layer 61
Is provided to prevent the deformation of the constituent layer 6 peeled off in a later step, and has the same thickness and the same composition as the InGaAs layer 3 of the strained layer 5. The DBR film 62 has a laminated structure of AlGaAs and GaAs, as described later.

Next, as shown in FIG. 2, a recess 10 defining a curved region is formed in the component layer 6 by photolithography and etching. As the etching, a wet etching method or an RIE method (reactive ion etching method) can be used.

Next, as shown in FIG. 3, the component layer 6, the strain layer 5 and the release layer 2 are removed in a substantially U shape by photolithography and etching so as to surround a predetermined region, and a groove 11 is formed. . Thereby, the InGaAs layer 61A and the DB of the component layer 6A surrounded by the groove 11 are formed.
The R film 62A is the InGaAs layer 6 of the surrounding constituent layer 6B.
1B and the DBR film 62B. The width W of the region separated by the region including the groove 11 is several tens of μm. Also in this case, the wet etching method or the RIE method is used as the etching.

After that, as shown in FIG. 4, the release layer 2 under the strained layer 5 is selectively etched by a wet etching method. As a result, the InGaAs layer 3 forming the strained layer 5
The strained layer 5 is curved in the region 12 below the recess 10 so as to relax strain caused by the difference in lattice constant between the GaAs layer 4 and the GaAs layer 4. In this case, the thickness of the InGaAs layer 3 and the GaAs layer 4
By optimally selecting the thickness and the In composition ratio in the InGaAs layer 3, the component layer 6A can be erected perpendicularly to the GaAs substrate 1.

For example, the thickness of the InGaAs layer 3 is 10n.
and the thickness of the GaAs layer 4 is 10 nm. Also,
Composition of InGaAs layer 3 I in In _X Ga _1-X As
When the n composition ratio X is 0.2, the strained layer 5 is the GaAs substrate 1.
Stand perpendicular to.

By changing the In composition ratio in the InGaAs layer 3, the difference in lattice constant between InGaAs and GaAs can be changed up to about 7%.

The thickness t1 of the InGaAs layer 3, the thickness t2 of the GaAs layer 4, and the In composition ratio X in the InGaAs layer 3.
And the radius of curvature R of the strained layer 5 have the following relationship.

R = (a / Δa)  (d / 2) where a is the lattice constant of GaAs and is 5.6533.
It is Å. Further, Δa is the difference between the lattice constant of In _X Ga _1-X As and the lattice constant of GaAs. In _0.2 Ga _0.8
The lattice constant of As is 5.7343Å. Also, d is I
The thickness t1 of the nGaAs layer 3 and the thickness t of the GaAs layer 4
It is the sum of two. When t1 = t2 = 10 [nm], d
= 20 [nm]. In this example, R = 0.698 [μ
m].

FIG. 5 shows D in the semiconductor device of FIGS.
FIG. 6 is a schematic cross-sectional view showing a detailed configuration of a BR film 62.

As shown in FIG. 5, the DBR film 62 has a laminated structure in which a plurality of AlGaAs layers 62a and a plurality of GaAs layers 62b are alternately laminated. AlGaAs
The period of the layer 62a and the GaAs layer 62b is 4 to 20.

The AlGaAs layer 62a of the DBR film 62
The thickness d ₂ of the thickness d ₁ and the GaAs layer 62b of are set as follows.

D ₁ = λ / (4n ₁ ) ... (1) d ₂ = λ / (4n ₂ ) ... (2) where λ is the emission wavelength, and n ₁ and n ₂ are AlGaAs layers 62a and 62a, respectively. It is the refractive index of the GaAs layer 62b.

Generally, when an electromagnetic wave enters a substance having a high refractive index into a substance having a low refractive index, its phase does not change, and when an electromagnetic wave enters from a substance having a low refractive index to a substance having a high refractive index, its phase changes by π. AlGaAs layer 62a and GaAs
When the layer 62b satisfies the above equations (1) and (2), the phases of the reflected waves in each layer are aligned, so that a high reflectance is obtained.

In the semiconductor device of this embodiment, D
The BR film 62A constitutes a vertical mirror.

The DBR film 62A may be formed by alternately laminating aluminum oxide layers obtained by oxidizing AlAs and AlGaAs layers.

In this way, a mirror made of the DBR film 62A standing perpendicular to the surface of the GaAs substrate 1 is manufactured.

The semiconductor device of the present embodiment can be easily and inexpensively manufactured by a general planar technique such as photolithography, etching, and epitaxial growth.

The strained layer 5 may be heated by passing an electric current through the strained layer 5. Thereby, the degree of curvature of the strained layer 5 can be adjusted and the angle of the component layer 6A can be changed. Further, the strained layer 5 can be easily curved by thermally expanding the InGaAs layer 3. In this case, n-type or p-type impurities are doped in order to impart conductivity to the InGaAs layer 3 in the step of FIG.

The voltage applied to the strained layer 5 or the strained layer 5
It is also possible to change the angle of the component layer 6A to an angle other than a right angle by changing the current flowing to the component layer 6A.

FIG. 6 is a schematic sectional view of a semiconductor device according to the second embodiment of the present invention. This semiconductor device
It is a Fabry-Perot resonator having an optical axis perpendicular to the substrate.

In FIG. 6, AlG is formed on the GaAs substrate 1.
The release layer 2 made of aAs is formed, and the strained layer 5 is formed on the release layer 2. The configuration of the strained layer 5 is similar to that of the strained layer 5 of FIG. Strained layer 5 protruding from both ends of the release layer 2
The curved portions 21 and 22 are curved upward in a U shape.

The component layer 6B is formed on the upper surface of the strain layer 5 on the release layer 2, and the component layer 6C is formed on the lower surface of one end of the strain layer 5, and the other end of the strain layer 5 is formed. A component layer 6D is formed on the lower surface of the. Component layers 6B, 6C,
The configuration of 6D is similar to that of the component layer 6A of FIG.

One end of the strained layer 5 and the component layer 6C are
It is sandwiched between the component layer 6B and the component layer 6D. In this case, the lengths and curvatures of the curved portions 21 and 22 are adjusted to adjust the upper surface of the component layer 6B and the component layer 6D.
Is parallel to the bottom surface of. In this case, the distance L1 between the constituent layer 6B and the constituent layer 6D is defined by the thicknesses of the strain layer 5 and the constituent layer 6C.

In this way, a Fabry-Perot resonator composed of the component layers 6B and 6D is manufactured. This Fabry-Perot resonator has a GaA
s It has an optical axis perpendicular to the substrate 1 and has a relatively short resonator length L1 (for example, about several μm or less) defined by the thickness of the strain layer 5 and the component layer 6C.

FIG. 7 is a schematic sectional view of a semiconductor device according to the third embodiment of the present invention. This semiconductor device
It is a Fabry-Perot resonator having an optical axis perpendicular to the substrate.

In FIG. 7, AlG is formed on the GaAs substrate 1.
The release layer 2 made of aAs is formed, and the strained layer 5 is formed on the release layer 2. The configuration of the strained layer 5 is similar to that of the strained layer 5 of FIG. The strained layer 5 protruding from one end of the release layer 2
One end of the curved portion is curved upward at the curved portion 23 and stands vertically. The other end of the strained layer 5 protruding from the other end of the release layer 2 is curved upward at the curved portion 24 and stands upright, and further curved inward at the curved portion 25 to extend horizontally.

The component layer 6E is formed on the upper surface of the strained layer 5 on the release layer 2, and the component layer 6G is formed on the inner surface of one end of the strained layer 5 which is erected. The constituent layer 6H is formed on the inner surface on the other end side, and the constituent layer 6F is formed on the lower surface of the other end of the strained layer 5. The constituent layers 6E, 6F, 6G, and 6H have the same structure as the constituent layer 6A in FIG.

The lower surface of the component layer 6F below the other end of the strain layer 5 is in contact with one end of the strain layer 5 and the end face of the component layer 6G. In this case, by adjusting the lengths and curvatures of the curved portions 23, 24, 25 and the lengths of the component layers 6G, 6H, the upper surface of the component layer 6E and the component layer 6 can be adjusted.
The lower surface of F becomes parallel. In this case, the distance L2 between the constituent layer 6E and the constituent layer 6F is defined by the length of the constituent layer 6G.

In this way, a Fabry-Perot resonator composed of the component layers 6E and 6F is manufactured. This Fabry-Perot resonator has a GaA
The component layer 6 has an optical axis perpendicular to the substrate 1.
It has a relatively long resonator length L2 defined by the length of G.

FIG. 8 is a schematic view showing a method of manufacturing a semiconductor device according to the fourth embodiment of the present invention. Figure 8 (a)
FIG. 8 is a plan view showing a state before the component layers are erected, and FIG.
(B) is a perspective view showing a state after standing of the component layer. This semiconductor device has an inclined surface fixed at a predetermined angle with respect to the substrate.

In FIG. 8, the GaAs substrate 1, the release layer 2 and the strained layer 5 shown in FIGS. 1 to 4 are omitted.

In FIG. 8A, the groove 31 shown by the thick solid line is formed in the component layer 6, so that the component layers 6I, 6J, 6K are separated from the rest of the component layer 6. . The component layers 6I, 6J, 6K bend upward at the curved portion 32 shown by the broken line. Component layers 6I, 6
The configurations of J and 6K are similar to the configuration of the component layer 6A of FIG.

As a result, the standing structure shown in FIG. 8B is formed. In this case, the upper end of the component layer 6I and the upper end of the component layer 6J are in contact with each other, and one side of the component layer 6K is in contact with the sides of the component layers 6I and 6J. Thereby,
The inclination angles of the component layers 6I and 6J are determined by the component layers 6I and 6J.
It is defined by the dimension J, and the inclination angle of the component layer 6 is defined by the shapes of the component layers 6I and 6J. For example,
The component layers 6I, 6J, 6K are inclined at an angle of 45 degrees with respect to the substrate.

Therefore, the inclination angles of the component layers 6I, 6J, 6K can be accurately set to desired angles without precisely controlling the composition and thickness of the strained layer.

In this way, a semiconductor device having an inclined surface fixed at a predetermined angle with respect to the substrate is realized.

The constituent layers 6I, 6J, and 6K are not limited to the constituent layer 6A shown in FIG. 4, but layers made of any material can be used. For example, metal films may be used as the component layers 6I, 6J, 6K. In that case, a mirror inclined at a predetermined angle with respect to the substrate is produced.

The shape and number of the constituent layers are not limited to the example shown in FIG. 8. By combining constituent layers having any shape and any size, the standing structure inclined at any angle with respect to the substrate. Can be configured.

FIG. 9 is a schematic sectional view of a semiconductor device according to the fifth embodiment of the present invention. This semiconductor device
A reflecting mirror device having a cylindrical mirror standing on a substrate.

In the semiconductor device of FIG. 9, the component layer 6L has a structure in which the component layer 6A in the semiconductor device of FIG.
The configuration is different. The component layer 6L is made of a DBR film,
The InGaAs layer 61A of FIG. 4 is not included. Therefore, as the strained layer 5 is curved, the component layer 6L is also curved in a cylindrical surface shape. The configuration of the other parts of the semiconductor device of FIG. 9 is similar to that of the semiconductor device of FIG.

In this way, a cylindrical mirror standing upright on the surface of the GaAs substrate 1 is realized. By using this semiconductor device, a laser beam emitted from a laser diode and having an astigmatic difference can be focused.

FIG. 10 is a schematic diagram of a semiconductor device according to a sixth embodiment of the present invention. This semiconductor device is an optical system that splits a laser beam into different optical paths.

The semiconductor device of FIG. 10 is formed by combining the semiconductor devices of FIG. In FIG. 10, the GaAs substrate 1, the release layer 2 and the strained layer 5 are not shown in FIG.

A plurality of component layers 6M, 6N, 6O, 6P are arranged in front of the laser diode 100. The component layer 6M, 6N, 6O is a half mirror that reflects half of the incident light and transmits the other half, and the component layer 6P is a total reflection mirror that totally reflects the incident light.

Half of the laser beam emitted from the laser diode 100 is reflected by the component layer 6M, and the other half is transmitted through the component layer 6M. Component layer 6M
Half of the laser beam transmitted through is reflected by the component layer 6N, and the other half is transmitted through the component layer 6N. Half of the laser beam transmitted through the constituent layer 6N is reflected by the constituent layer 6O, and the other half is transmitted through the constituent layer 6O. All the laser beams transmitted through the component layer 6O are reflected by the component layer 6P.

In this way, the laser diode 100
The laser beam emitted from is 1/2, 1/4, 1/8
And 1/16 each of which is divided into four optical paths.

FIG. 11 is a plan view showing a state before the component layers of the semiconductor device according to the seventh embodiment of the present invention are erected. This semiconductor device has a polyhedral structure.

In FIG. 11 as well, G shown in FIG.
Illustration of the aAs substrate 1, the release layer 2, and the strained layer 5 is omitted.

In FIG. 11, by forming the groove 33 shown by the thick solid line in the component layer 6, the square component layers 6Q, 6R, 6S, 6T, 6U, 6V are formed in the remaining portion of the component layer 6. Separated from. Component layers 6Q, 6
The length of one side of R, 6S, 6T, 6U, 6V is, for example, several tens of μm. Component layers 6Q, 6R, 6S, 6T, 6
U and 6V bend upward at the curved portion 34 shown by the broken line.

In this case, the component layers 6Q, 6R, 6S,
Each side of 6T, 6U, 6V abuts the other component layers.
Thereby, the adjacent component layers 6Q, 6R, 6S, 6
T, 6U, 6V are at right angles to each other. Therefore, an accurate cube can be realized without precisely controlling the composition and thickness of the strained layer.

In the above embodiment, an example in which the strained layer 5 is curved upward has been described. However, when the order of the substrate, the release layer, the strained layer and the component layer is turned upside down, the strained layer is moved downward. It can be curved and the component layers can be raised downwards. Further, when the substrate, the release layer, the strain layer and the component layer are arranged vertically, the strain layer can be curved laterally, and the component layer can be erected sideways.

The shape and the number of component layers are as shown in FIG.
It is not limited to one example, and various polyhedra can be formed by combining any number and shape of component layers.

In the above embodiment, InGa is used as the strained layer.
Although the laminated structure of the As layer and the GaAs layer is used, the present invention is not limited to this, and a combination of various semiconductor layers having different lattice constants can be used. Other as strained layer 5
A laminated structure of a III-V group compound semiconductor or a laminated structure of a II-VI group compound semiconductor may be used. Also, as the strained layer, Si
A laminated structure of semiconductor layers containing (silicon) and Ge (germanium) may be used.

Further, in the above embodiment, the GaAs substrate is used, but other substrates such as Si substrate may be used in consideration of the materials of the release layer, the strain layer and the component layer.

Furthermore, although AlGaAs is used as the material of the release layer in the above-mentioned embodiment, the material is not limited to this, and other materials may be used in consideration of selective etching.

Further, the material of the constituent layer is not limited to the above embodiment, and any material can be used depending on the use of the constituent layer.

The semiconductor device of the present invention can be applied to various optical devices such as mirrors, multiplex mirrors, half mirrors, diffraction gratings, optical resonators, and optical benches. Further, the semiconductor device of the present invention includes a light emitting diode, a laser diode, a VCSEL (Vertical Cavity Surface Emitting L).
aser; surface emitting laser), an optical system using a photodetector, an optical modulator, and the like.

[Brief description of drawings]

FIG. 1 is a schematic sectional view and a schematic plan view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view and a schematic plan view showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 3 is a schematic cross-sectional view and a schematic plan view showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 4 is a schematic sectional view and a schematic plan view showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

5 is a schematic cross-sectional view showing a detailed configuration of a DBR film in the semiconductor device of FIGS.

FIG. 6 is a schematic cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a schematic cross-sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 8 is a schematic plan view and a schematic perspective view showing a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 9 is a schematic sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 10 is a schematic diagram of a semiconductor device according to a sixth embodiment of the present invention.

FIG. 11 is a plan view showing a state before standing of a component layer of a semiconductor device according to a seventh embodiment of the present invention.

[Explanation of symbols]

1 GaAs substrate 2 release layer 3 InGaAs layer 4 GaAs layer 5 strained layer 6, 6A, 6B, 6C, 6D, 6E, 6F, 6G, 6
H, 6I, 6J, 6K, 6L, 6M, 6N, 6O, 6
P, 6Q, 6R, 6S, 6T, 6U, 6V Constituent layer 10 Recesses 11, 31, 33 Grooves 21, 22, 23, 24, 25, 32, 34 Curved portions 61, 61A, 61B InGaAs layers 62, 62A, 62B DBR film 100 Laser diode

─────────────────────────────────────────────────── ─── Continued Front Page (58) Fields surveyed (Int.Cl. ⁷ , DB name) B81B 1/00-7/00 B81C 1/00-5/00 H01L 33/00

Claims (7)

(57) [Claims] 1. A first layer, a second layer and a third layer on a substrate.
Layers are sequentially formed, and the second layer has a laminated structure of a first semiconductor layer having a first lattice constant and a second semiconductor layer having a second lattice constant smaller than the first lattice constant. And removing the third layer, the second layer, and the first layer except a part of a region surrounding the predetermined region of the third layer, and the predetermined region. and said first layer in said partial region is removed before
The first lattice constant of the first semiconductor layer and the second semiconductor
Alleviates strain due to the difference between the layer and the second lattice constant
Thus, the semiconductor device, wherein the second layer in the predetermined region is curved in the partial region. 2. The semiconductor device according to claim 1, wherein the third layer in the partial region is removed. 3. The semiconductor device according to claim 2, wherein the third layer includes a third semiconductor layer having a lattice constant substantially equal to that of the first semiconductor layer of the second layer. 4. The predetermined region includes a plurality of regions, and the third layers on the second layer curved in the plurality of regions abut each other.
The semiconductor device according to any one of 1. 5. The semiconductor device according to claim 1, wherein the third layer includes a reflective film. 6. A step of forming a first layer on a substrate, a first semiconductor layer having a first lattice constant on the first layer, and a second semiconductor layer having a first lattice constant smaller than the first lattice constant. Forming a second layer having a laminated structure with a second semiconductor layer having a lattice constant, forming a third layer on the second layer, and forming a third layer on a predetermined region of the third layer. A step of removing the third layer, the second layer and the first layer except a part of a region surrounding the periphery; and the first layer in the predetermined region and the part region. Before the first semiconductor layer by selectively removing
Said second grid of the the serial first lattice constant second semiconductor layer
And a step of bending the second layer in the predetermined region in the partial region so as to relax strain caused by a difference from a constant . 7. The method of manufacturing a semiconductor device according to claim 6, further comprising the step of removing the third layer in the partial region.