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JP3469697B2 - Single wafer processing method - Google Patents
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JP3469697B2 - Single wafer processing method - Google Patents

Single wafer processing method

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Publication number
JP3469697B2
JP3469697B2 JP670696A JP670696A JP3469697B2 JP 3469697 B2 JP3469697 B2 JP 3469697B2 JP 670696 A JP670696 A JP 670696A JP 670696 A JP670696 A JP 670696A JP 3469697 B2 JP3469697 B2 JP 3469697B2
Authority
JP
Japan
Prior art keywords
wafer
processing
process chamber
chamber
cassette
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP670696A
Other languages
Japanese (ja)
Other versions
JPH09199427A (en
Inventor
久嵩 杉山
繁 鈴木
信吾 林
伸夫 柏木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shibaura Machine Co Ltd
Original Assignee
Toshiba Machine Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Machine Co Ltd filed Critical Toshiba Machine Co Ltd
Priority to JP670696A priority Critical patent/JP3469697B2/en
Publication of JPH09199427A publication Critical patent/JPH09199427A/en
Application granted granted Critical
Publication of JP3469697B2 publication Critical patent/JP3469697B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】例えば、枚葉式減圧CVD装
置の様な、反応室内で加熱雰囲気下でウエハに処理を施
す枚葉式の半導体製造装置におけるウエハの処理方法に
関する。 【0002】 【従来の技術】枚葉式の半導体製造装置の一例を図3及
び図4に示す。図3は枚葉式減圧CVD装置の概要を示
す平面図であり、図4は図3のA−A部の断面図であ
る。図中、1はトランスファチャンバ、2は搬送ロボッ
ト、3、4はカセットチャンバ、5、6はプロセスチャ
ンバ(反応室)、30はウエハ、34はカセットを表
す。 【0003】トランスファチャンバ1の側面には、2つ
のカセットチャンバ3、4、及び2つのプロセスチャン
バ5、6が接続されている。トランスファチャンバ1の
内部には、ウエハをカセットチャンバとプロセスチャン
バとの間で移載する搬送ロボット2が設けられ、トラン
スファチャンバ1とカセットチャンバ3、4、あるいは
プロセスチャンバ5、6との間は、それぞれ、ゲートバ
ルブ9、10、11、12で仕切られている。カセット
チャンバ3、4の内部に設けられたカセットリフタ33
の上には、カセット34がセットされ、カセット34の
中にはウエハ30が収納されている。プロセスチャンバ
5、6の内部には、カーボン製のサセプタ41が備えら
れ、その上にウエハ40がセットされる。また、プロセ
スチャンバ5、6の内部には、内部の温度を検出する温
度検出器46が配置され、プロセスチャンバ5、6の天
井部には、石英ガラス窓45が設けられるとともに、こ
の石英ガラス窓45の上方には、プロセスチャンバ5、
6の内部を加熱するための赤外線ランプ43が配置され
ている。温度検出器46の出力は、制御装置37に送ら
れ、赤外線ランプ43の出力制御は、この制御装置37
によって行われる。 【0004】この設備を用いて、概略、以下の様にウエ
ハの処理が行われる。搬送ロボット2によって、カセッ
トチャンバ3(あるいは4)の中のカセット34からウ
エハ30を抜き出し、プロセスチャンバ6(あるいは
5)の中へ搬送し、サセプタ41の上にセットし、赤外
線ランプ43によって所定の温度まで加熱した後、プロ
セスチャンバ6(あるいは5)の内部に反応ガスを供給
して、ウエハ表面に薄膜を形成する。処理が終了した
後、再び、搬送ロボット2を用いて、ウエハ40をカセ
ットチャンバ3(あるいは4)の中の元のカセット34
内へ回収する。 【0005】ところで、枚葉式の半導体製造装置におい
て、上記の様にウエハに処理を施す際、従来、カセット
チャンバ3(あるいは4)のカセット34から、上から
順にあるいは下から順に、ウエハ30を抜き出して、プ
ロセスチャンバ6(あるいは5)の中へセットして、順
次、処理を行っていた。この様な順序で処理を行う場
合、装置の立ち上げ時あるいは一時停止後の再起動時に
は、プロセスチャンバの内部の温度が低下しているた
め、所定温度まで昇温させて安定化させる必要があるの
で、プロセスチャンバ内にウエハをセットせずに内部の
加熱を行い、内部の温度が十分に安定した後に、プロセ
スチャンバの中にウエハをセットして処理を開始するこ
とが一般的に行われている。 【0006】しかし、ウエハをセットして処理を始める
と、ウエハの存在によってプロセスチャンバ6の内部の
構成部品の温度分布に微妙な差異が生ずるために、一枚
目のウエハの処理結果と、プロセスチャンバ6の内部の
温度を大きく低下させることなく、引き続いて行われる
2枚目以降の処理結果に差が現れることが判明してい
る。即ち、ウエハが存在しない状態でプロセスチャンバ
6の内部の温度を昇温させ、一旦、安定させても、ウエ
ハをローディングすることによって、プロセスチャンバ
6の内部における熱の流れの状況が変動するので、制御
用の温度検出器46による測定値は同一であっても、ウ
エハ40の有無によって、プロセスチャンバ6の内部の
温度分布に差異が生ずる。このため、空の状態で加熱さ
れて温度が安定したプロセスチャンバ6内へセットされ
た一枚目のウエハと、先行のウエハを取り出した後の状
態のプロセスチャンバ6内へセットされた二枚目以降の
ウエハとの間で、その温度分布に微妙な差異が生じて、
処理結果に影響が現れる。 【0007】この様な問題に対処すべく、最初からウエ
ハをセットした状態でプロセスチャンバ6内を加熱昇温
させて、内部の温度を安定させる方法も採用されている
が、この方法の場合、プロセスチャンバ6内の温度がす
でに所定の温度に近い状態になっているところへローデ
ィングされる2枚目以降のウエハとの間で熱履歴に差異
が生じ、やはり、一枚目のウエハの処理結果にその影響
が現れる。 【0008】そこで、従来は、装置の立ち上げ時などの
際、先頭の一枚目のウエハにはダミーウエハを使用し
て、二枚目以降のウエハについて正規の処理を施した
り、あるいは、調整用に別のダミーウエハ専用のカセッ
トを設けておいて、一枚目の処理にはこのカセットの中
のダミーウエハを出して処理するなどの対策が採用され
ていた。 【0009】 【発明が解決しようとする課題】本発明は、上記の様な
問題点に鑑みなされたもので、その目的とするところ
は、枚葉式の半導体製造装置において、装置の立ち上げ
時あるいは一時停止後の再起動時に、ダミーウエハ等を
使用することなく、全てのウエハを正規のウエハとして
処理を行うことが可能なウエハの処理方法を提供するこ
とにある。 【0010】 【課題を解決するための手段】本発明のウエハの枚葉式
処理方法は、反応室内において加熱雰囲気下でウエハに
処理を施す枚葉式の半導体処理装置におけるウエハの処
理方法であって、装置の立ち上げ時あるいは一時停止後
の再起動時に、一枚目のウエハを反応室内へセットし、
反応室内の温度分布が安定した後、当該一枚目のウエハ
の処理を行わずに反応室内から抜き出し、二枚目以降の
ウエハについては、順次、反応室内へセットしてその処
理を行い、先に抜き出された当該一枚目のウエハについ
ては、二枚目以降のウエハの処理の間に順序を割り込ま
せて処理を行うことを特徴とする。 【0011】上記の枚葉式処理方法を採用した場合、反
応室の内部の温度の安定のために反応室へセットした当
該一枚目のウエハについては、処理を行わずに、一旦、
プロセスチャンバの外に抜き出して、放冷する。当該一
枚目のウエハの温度が二枚目以降のウエハと同等な水準
まで低下した後、当該一枚目の処理を行う。なお、当該
一枚目のウエハの処理の順序は、二枚目以降のウエハの
処理の間に適宜、割り込ませて行うことができる。 【0012】 【発明の実施の形態】図3及び図4に一例として示した
枚葉式の半導体製造装置においてウエハの処理を行う
際、本発明による枚葉式処理方法を適用した場合に、プ
ロセスチャンバ6(反応室)内へセットされたウエハ4
0が受ける熱エネルギのモデル図を、図1に示す。ま
た、比較のため、同様の装置において従来の方法を適用
した場合に、ウエハが受ける熱エネルギのモデル図を、
図2に示す。図1及び図2中、縦軸は、プロセスチャン
バ6内の温度検出器46による温度測定値、横軸は、経
過時間及びプロセスチャンバ6内にセットされているウ
エハの番号を示す。また、図3及び図4に示した装置
は、従来の技術の項において説明した装置と同一である
ので、その説明は省略する。 【0013】図1に示す様に、本発明によるウエハの枚
葉式処理方法を適用した場合、装置の立ち上げ時あるい
は一時停止後の再起動時に、プロセスチャンバ6内の温
度分布を安定させることを目的として、先ず、一枚目の
ウエハをプロセスチャンバ6内へセットする。プロセス
チャンバ6内の温度分布が安定した後、当該一枚目のウ
エハの処理を行わずにプロセスチャンバ6内から抜き出
して、一旦、カセットチャンバ3内のカセット30内に
回収する。次いで、二枚目のウエハをプロセスチャンバ
6内へセットして、正規の処理を開始する。二枚目のウ
エハが処理されている間、先に抜き出された一枚目のウ
エハは、カセット30内で放冷され、他のウエハと同等
な温度まで低下する。この一枚目のウエハについては、
二枚目のウエハの処理が終了した後、二枚目と三枚目と
の間に、順序を割り込ませて正規の処理を行う(図4参
照)。 【0014】なお、一枚目のウエハの処理を割り込ませ
るタイミングについては、上記の例の様に二枚目と三枚
目との間に限定されるものではなく、一枚目のウエハの
温度が十分、低下して安定するために必要な時間、及
び、三枚目以降のウエハの処理のための装置の動作の都
合などを勘案して、決定すればよい。 【0015】図1に示す様に、プロセスチャンバ内の温
度分布の安定化の際に一枚目のウエハが受けるエネルギ
ーをE0 、二枚目のウエハが正規の処理の際に受けるエ
ネルギーをE2 、一枚目のウエハが正規の処理の際に受
けるエネルギをE1 、n枚目のウエハが正規の処理の際
に受けるエネルギをEn とすると、これらのエネルギの
値の間で、概略、以下の様な関係が成り立つ。 【0016】E0 > E1 = E2 = En これに対して、図2に示す様に、一枚目のウエハをプロ
セスチャンバ内の温度分布の安定化のために用いた後、
引き続いて、そのまま当該一枚目のウエハの正規の処理
を開始した場合、上記のエネルギの値の間の関係は、概
略、以下の様になる。 【0017】E1 > E2 = En 以上の様に、本発明によるウエハの枚葉式処理方法を適
用することによって、正規の処理の際、各ウエハをセッ
トする前におけるプロセスチャンバ内の温度分布、及び
処理の間に各ウエハが受ける熱履歴が共に同等なものと
なる結果、一枚目にダミーウエハを組み入れたり、ある
いは一枚目のウエハを規格外れ品として処分したりする
必要が無くなる。 【0018】 【発明の効果】本発明によるウエハの枚葉式処理方法を
適用することによって、枚葉式の半導体製造装置におい
て、装置の立ち上げ時あるいは一時停止後の再起動時
に、ダミーウエハ等を使用することなく、全てのウエハ
を正規のウエハとして処理することが可能となる。その
結果、装置の生産能率の向上、あるいは歩留まりの向上
に効果がある。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer in a single-wafer type semiconductor manufacturing apparatus in which a wafer is processed under a heating atmosphere in a reaction chamber, such as a single-wafer low-pressure CVD apparatus. Regarding the processing method. 2. Description of the Related Art An example of a single-wafer type semiconductor manufacturing apparatus is shown in FIGS. FIG. 3 is a plan view showing an outline of a single-wafer type low-pressure CVD apparatus, and FIG. 4 is a cross-sectional view taken along the line AA in FIG. In the figure, 1 is a transfer chamber, 2 is a transfer robot, 3 and 4 are cassette chambers, 5 and 6 are process chambers (reaction chambers), 30 is a wafer, and 34 is a cassette. [0003] Two cassette chambers 3 and 4 and two process chambers 5 and 6 are connected to the side surface of the transfer chamber 1. A transfer robot 2 for transferring a wafer between the cassette chamber and the process chamber is provided inside the transfer chamber 1. A transfer robot 1 is provided between the transfer chamber 1 and the cassette chambers 3 and 4 or the process chambers 5 and 6. They are partitioned by gate valves 9, 10, 11, and 12, respectively. Cassette lifter 33 provided inside cassette chambers 3 and 4
A cassette 34 is set on the top, and the wafers 30 are stored in the cassette 34. A susceptor 41 made of carbon is provided inside the process chambers 5 and 6, and a wafer 40 is set thereon. A temperature detector 46 for detecting the internal temperature is disposed inside the process chambers 5 and 6, and a quartz glass window 45 is provided on the ceiling of the process chambers 5 and 6. Above 45, the process chamber 5,
6 is provided with an infrared lamp 43 for heating the inside. The output of the temperature detector 46 is sent to the controller 37, and the output of the infrared lamp 43 is controlled by the controller 37.
Done by [0004] Using this equipment, wafer processing is generally performed as follows. The transfer robot 2 extracts the wafer 30 from the cassette 34 in the cassette chamber 3 (or 4), transfers the wafer 30 into the process chamber 6 (or 5), sets it on the susceptor 41, and sets the predetermined After heating to the temperature, a reactive gas is supplied into the process chamber 6 (or 5) to form a thin film on the wafer surface. After the processing is completed, the wafer 40 is again transferred to the original cassette 34 in the cassette chamber 3 (or 4) by using the transfer robot 2.
Collect inside. In the single-wafer type semiconductor manufacturing apparatus, when processing wafers as described above, conventionally, the wafers 30 are sequentially processed from the top of the cassette 34 of the cassette chamber 3 (or 4) or from the bottom. It was taken out, set in the process chamber 6 (or 5), and the processing was performed sequentially. When processing is performed in such an order, when the apparatus is started up or restarted after a temporary stop, the temperature inside the process chamber has dropped, so it is necessary to raise the temperature to a predetermined temperature and stabilize it. Therefore, it is common practice to heat the inside without setting the wafer in the process chamber and set the wafer in the process chamber to start processing after the internal temperature is sufficiently stabilized. I have. However, when the wafer is set and the processing is started, a slight difference occurs in the temperature distribution of the components inside the process chamber 6 due to the presence of the wafer. It has been found that a difference appears in the processing results of the second and subsequent sheets performed subsequently without significantly lowering the temperature inside the chamber 6. That is, even if the temperature inside the process chamber 6 is increased in a state where no wafer is present and once stabilized, the situation of the heat flow inside the process chamber 6 is changed by loading the wafer. Even if the values measured by the control temperature detector 46 are the same, a difference occurs in the temperature distribution inside the process chamber 6 depending on the presence or absence of the wafer 40. For this reason, the first wafer set in the process chamber 6 which has been heated in an empty state and has a stable temperature, and the second wafer set in the process chamber 6 in a state after the previous wafer has been taken out. There is a slight difference in the temperature distribution between the subsequent wafers,
The processing result is affected. In order to deal with such a problem, a method of heating the inside of the process chamber 6 with the wafer set from the beginning to stabilize the temperature inside the process chamber 6 has been adopted. There is a difference in the thermal history between the second and subsequent wafers loaded to a place where the temperature in the process chamber 6 is already close to the predetermined temperature, and the processing result of the first wafer is also changed. The effect appears. Therefore, conventionally, when the apparatus is started, a dummy wafer is used as the first wafer, and normal processing is performed on the second and subsequent wafers. In this case, another cassette for exclusive use of a dummy wafer is provided, and a countermeasure such as taking out the dummy wafer in the cassette and processing the first sheet is adopted for the first processing. SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a single-wafer type semiconductor manufacturing apparatus at the time of starting up the apparatus. Another object of the present invention is to provide a wafer processing method capable of processing all wafers as regular wafers without using a dummy wafer or the like at the time of restart after a temporary stop. A single wafer processing method of the present invention is a method of processing a wafer in a single wafer processing apparatus for processing a wafer in a reaction chamber under a heated atmosphere. When the apparatus is started up or restarted after a pause, the first wafer is set in the reaction chamber,
After the temperature distribution in the reaction chamber is stabilized, the first wafer is removed from the reaction chamber without performing the processing, and the second and subsequent wafers are sequentially set in the reaction chamber and the processing is performed. For the first wafer extracted in step (1), the processing is performed by interrupting the order between the processing of the second and subsequent wafers. When the above-mentioned single wafer processing method is adopted, the first wafer set in the reaction chamber for stabilizing the temperature inside the reaction chamber is not processed, but is temporarily
Pull out of the process chamber and allow to cool. After the temperature of the first wafer has dropped to a level equivalent to that of the second and subsequent wafers, the processing of the first wafer is performed. The order of processing the first wafer can be appropriately interrupted between the processing of the second and subsequent wafers. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS When processing a wafer in a single-wafer type semiconductor manufacturing apparatus shown as an example in FIG. 3 and FIG. Wafer 4 set in chamber 6 (reaction chamber)
FIG. 1 shows a model diagram of the thermal energy received by 0. For comparison, a model diagram of thermal energy received by a wafer when a conventional method is applied to a similar apparatus is shown in FIG.
As shown in FIG. 1 and 2, the vertical axis indicates the temperature measured by the temperature detector 46 in the process chamber 6, and the horizontal axis indicates the elapsed time and the number of the wafer set in the process chamber 6. The apparatus shown in FIGS. 3 and 4 is the same as the apparatus described in the section of the related art, and thus the description thereof is omitted. As shown in FIG. 1, when the single wafer processing method according to the present invention is applied, it is necessary to stabilize the temperature distribution in the process chamber 6 when the apparatus is started up or restarted after a temporary stop. First, the first wafer is set in the process chamber 6. After the temperature distribution in the process chamber 6 is stabilized, the first wafer is extracted from the process chamber 6 without being processed, and is once collected in the cassette 30 in the cassette chamber 3. Next, the second wafer is set in the process chamber 6, and normal processing is started. While the second wafer is being processed, the first wafer extracted earlier is allowed to cool in the cassette 30 and drops to a temperature equivalent to the other wafers. For this first wafer,
After the processing of the second wafer is completed, normal processing is performed between the second and third wafers by interrupting the order (see FIG. 4). The timing at which the processing of the first wafer is interrupted is not limited to between the second and third wafers as in the above-described example. May be determined in consideration of the time required for sufficiently lowering and stabilizing, and the convenience of the operation of the apparatus for processing the third and subsequent wafers. As shown in FIG. 1, the energy received by the first wafer during the stabilization of the temperature distribution in the process chamber is E 0 , and the energy received by the second wafer during the normal processing is E 0 . 2. Assuming that the energy received by the first wafer during normal processing is E 1 and the energy received by the n-th wafer during normal processing is E n , the energy between these energy values is approximately , The following relationship is established. E 0 > E 1 = E 2 = E n On the other hand, as shown in FIG. 2, after the first wafer is used for stabilizing the temperature distribution in the process chamber,
Subsequently, when normal processing of the first wafer is started as it is, the relationship between the above energy values is roughly as follows. By applying the wafer-by-wafer processing method according to the present invention such that E 1 > E 2 = E n or more, the temperature in the process chamber before setting each wafer during regular processing is set. As a result, the distribution and the thermal history received by each wafer during the processing are the same, so that there is no need to incorporate a first dummy wafer or dispose of the first wafer as a nonstandard product. By applying the single wafer processing method according to the present invention, a dummy wafer or the like can be removed from a single-wafer semiconductor manufacturing apparatus when the apparatus is started up or restarted after a temporary stop. It is possible to process all wafers as regular wafers without using them. As a result, it is effective in improving the production efficiency of the device or the yield.

【図面の簡単な説明】 【図1】本発明のウエハの枚葉式処理方法を適用した場
合に、プロセスチャンバ内へセットされたウエハが受け
る熱エネルギを示すモデル図。 【図2】従来のウエハの枚葉式処理方法を適用した場合
に、プロセスチャンバ内へセットされたウエハが受ける
熱エネルギを示すモデル図。 【図3】枚葉式の半導体製造装置の概要を示す平面図。 【図4】図3の枚葉式の半導体製造装置のAA部の断面
図。 【符号の説明】 1・・・トランスファチャンバ、2・・・搬送ロボッ
ト、3、4・・・カセットチャンバ、5、6・・・プロ
セスチャンバ、30・・・ウエハ、33・・・カセット
リフタ、34・・・カセット、37・・・制御装置、4
0・・・ウエハ、41・・・サセプタ、43・・・赤外
線ランプ、45・・・石英ガラス窓、46・・・温度検
出器、En ・・・n枚目のウエハがプロセスチャンバ内
において処理の際に受けるエネルギ。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a model diagram showing thermal energy received by a wafer set in a process chamber when a single wafer processing method of the present invention is applied. FIG. 2 is a model diagram showing thermal energy received by a wafer set in a process chamber when a conventional single wafer processing method of a wafer is applied. FIG. 3 is a plan view showing an outline of a single-wafer type semiconductor manufacturing apparatus. FIG. 4 is a sectional view of an AA portion of the single-wafer type semiconductor manufacturing apparatus of FIG. [Description of Signs] 1 ... Transfer chamber, 2 ... Transport robot, 3, 4 ... Cassette chamber, 5, 6 ... Process chamber, 30 ... Wafer, 33 ... Cassette lifter, 34 ... cassette, 37 ... control device, 4
0 ... wafer, 41 ... susceptor, 43 ... infrared lamp, 45 ... a quartz glass window, 46 ... temperature detectors, E n ... n-th wafer in the process chamber Energy received during processing.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 柏木 伸夫 静岡県沼津市大岡2068の3 株式会社東 芝機械マイテック沼津内 (56)参考文献 特開 平1−236616(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/02 H01L 21/205 H01L 21/68 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Nobuo Kashiwagi 2068-3 Ooka, Numazu City, Shizuoka Prefecture Toshiba Machine Mytec Numazunai (56) References JP-A-1-236616 (JP, A) (58) Field surveyed (Int.Cl. 7 , DB name) H01L 21/02 H01L 21/205 H01L 21/68

Claims (1)

(57)【特許請求の範囲】 【請求項1】 反応室内において加熱雰囲気下でウエハ
に処理を施す枚葉式の半導体処理装置におけるウエハの
処理方法であって、 装置の立ち上げ時あるいは一時停止後の再起動時に、一
枚目のウエハを反応室内へセットし、 反応室内の温度分布が安定した後、当該一枚目のウエハ
の処理を行わずに反応室内から抜き出し、 二枚目以降のウエハについては、順次、反応室内へセッ
トしてその処理を行い、 先に抜き出された当該一枚目のウエハについては、二枚
目以降のウエハの処理の間に順序を割り込ませて処理を
行うことを特徴とするウエハの枚葉式処理方法。
(1) A method of processing a wafer in a single-wafer type semiconductor processing apparatus for processing a wafer under a heating atmosphere in a reaction chamber, wherein the processing is started or temporarily stopped. At the later restart, the first wafer is set in the reaction chamber, and after the temperature distribution in the reaction chamber is stabilized, the first wafer is removed from the reaction chamber without processing the first wafer, and the second and subsequent wafers are removed. Wafers are sequentially set in the reaction chamber and the processing is performed. For the first wafer extracted earlier, the processing is performed by interrupting the sequence between the processing of the second and subsequent wafers. A single wafer processing method for a wafer.
JP670696A 1996-01-18 1996-01-18 Single wafer processing method Expired - Lifetime JP3469697B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP670696A JP3469697B2 (en) 1996-01-18 1996-01-18 Single wafer processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP670696A JP3469697B2 (en) 1996-01-18 1996-01-18 Single wafer processing method

Publications (2)

Publication Number Publication Date
JPH09199427A JPH09199427A (en) 1997-07-31
JP3469697B2 true JP3469697B2 (en) 2003-11-25

Family

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Family Applications (1)

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JP670696A Expired - Lifetime JP3469697B2 (en) 1996-01-18 1996-01-18 Single wafer processing method

Country Status (1)

Country Link
JP (1) JP3469697B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4703891B2 (en) * 2001-06-07 2011-06-15 ルネサスエレクトロニクス株式会社 Thin film manufacturing method

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