JP3502385B2 - Laser gyro dither stripper - Google Patents

Description

The present invention relates generally to laser gyros, and more particularly to a method and apparatus for removing dither signal components from the inertial output of a laser gyro.

BACKGROUND OF THE INVENTION Ring laser angular velocity sensors, also called laser gyros, are well known in the art. One example of a ring laser angular velocity sensor is US Pat. No. 4,751,781 issued to Hanse et al., Which is also incorporated herein by reference.
No. Today's ring laser angular velocity sensors include a thermally stable and mechanically stable laser block with a plurality of cavities formed to surround the void. Mirrors that reflect the laser beam and form a closed loop optical path are arranged at both ends of the cavity.

In connection with such sensors, there is an undesirable phenomenon known as lock-in, which has heretofore been recognized in the prior art. In the prior art, by rotationally oscillating, or dithering, such a sensor,
I was dealing with the lock-in phenomenon. Rotational vibrations are typically provided by a dither motor. Conventional dither motors typically have a suspension system that includes, for example, an outer rim, a central hub member, and a plurality of three dither motor leads that project radially from the hub member and are coupled between the hub member and the rim. Traditionally, a set of piezoelectric elements that act as actuators have been coupled to a suspension system. When actuated by applying an electrical signal to the piezo element, the suspension system acts as a dither motor that causes the block of sensors to angularly vibrate at the system's natural mechanical resonance frequency. This dither motion is superimposed on the inertial rotation of the sensor in inertial space. Such dither motors may be used in connection with a single laser gyro, or may be used to dither multiple laser gyros. The prior art includes various schemes for recovering dither-free inertial rotation data.

SUMMARY OF THE INVENTION The present invention provides a laser gyro dither stripper apparatus. The dither stripper system of the present invention comprises a microcontroller based stripping system that senses the dither analog signal from the dither pickoff. The dither analog signal is converted to digital form and compensated by a closed loop system using a microcontroller to adjust the signal gain. The dither signal is compared to a value to generate an error signal. The dither signal is then subtracted from the laser read to form a dither stripped read signal of inertial navigation information. Further processing of the stripped signal completes the closed loop gain control function of the present invention.

It is an object of the present invention to provide a dither stripping method and apparatus for a modular laser gyro.

Yet another object of the present invention is to provide an improved dither stripping method and apparatus which utilizes a microprocessor incorporated in a microcontroller having an integrated A / D converter.

Another object of the present invention is to provide an improved dither stripping method and apparatus for sampling dither pickoffs and performing scheduled dither A / D conversion at system sample time.

Yet another object of the present invention is to provide a dither stripping method and apparatus capable of stripping dither from more than one laser gyro.

It is an object of the present invention to provide an improved dither stripping method and apparatus for a laser gyro that orders the execution of a single A / D converter between dither stripper operation and dither drive operation.

Other objects, features and advantages of the invention will be apparent to those skilled in the art from the description of the preferred embodiments, the claims and the drawings. In the drawings, the same reference numerals indicate the same elements.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A shows a block diagram of one embodiment of a laser gyro employing the novel features of the present invention.

FIG. 1B shows a graph of a dither signal with an example system sample strobe.

FIG. 2 schematically shows a circuit diagram of an example of a dither pickoff circuit constructed according to the present invention.

FIG. 3 schematically illustrates the dither stripping method of the present invention.

FIG. 4 shows a detailed diagram of one embodiment of a dither stripping circuit provided in accordance with one aspect of the present invention.

FIG. 5 shows a register block diagram of an automatic gain control register used in the dither stripping apparatus of the present invention.

FIG. 6 illustrates the method of the invention used to predict the sample strobe.

FIG. 7 illustrates a method of monitoring a modular gyro with a monitor control loop.

FIG. 8 illustrates a schematic diagram of the method and apparatus of the present invention used to order a single analog-to-digital converter among multiple dither applications.

FIG. 9 shows a schematic diagram of a method of processing an A / D conversion when called by a dither driven process, a dither stripper process or a background process.

FIG. 10 shows a schematic diagram of an interrupt service routine associated with a software timer interrupt.

FIG. 11 illustrates the method of the present invention utilizing multiple analog to digital converters.

FIG. 12 illustrates the method of the present invention for queuing background analog-to-digital conversion.

Description of the Preferred Embodiment The laser gyro stripper performs phase-locked dither stripping of the dither signal from the inertial navigation signal. The dither stripper uses a microcontroller to control the gain factor in the dither stripper feedback loop.

Reference is now made to FIG. 1A, which shows a block diagram of one embodiment of a modular laser gyro employing the novel features of the present invention. The present invention will be described by way of examples. Those skilled in the art having the benefit of this disclosure will understand that the examples provided herein are for purposes of illustrating the principles of the invention and not for purposes of limitation. The laser gyro 10 has a control device 100,
Laser gyro block 200 and active current controller 300
A dither pick-off amplifier 400, a direct digital dither driver 500, a path length control (PLC) device 600, a read-out unit 700, and a digital logic 800.

In one embodiment, the dither stripper of the present invention is a controller.
Achieved with a microcontroller used as 100. The dither stripper is the dither pickoff 244A,
Dither pickoff amplifier circuit 400, A / D converter 110,
Controller 100, PWM output 115, direct dither driver 500
And a dither motor 244B. The A / D converter 110 may be integrated with the control device,
It would also be advantageous to have a 10 bit A / D converter. The controller 100 may advantageously further include a microprocessor 120.

Briefly, in operation, the PLG block position represented by pickoff voltage 245A is first amplified by dither pickoff amplifier 400. The amplified dither pickoff signal 501A is transmitted to the A / D converter 110 and the comparator 40
It also sends to 1, where the comparator produces a square wave 501C, which is sent to one shot 810 to limit the maximum frequency of the interrupt. One-shot 810 is reset periodically at a rate of about 1000Hz. One shot output interrupts the controller at the positive zero crossing.

In a preferred embodiment of the present invention, the microcontroller 10
0 is composed of Intel (registered trademark) 80C196KC Microcontroller. Microcontroller 100 includes three pulse width modulators used for various control functions in this embodiment of the invention. First pulse width modulator PW
M1 is used to control the dither drive circuit. A number of software modules are associated with the default control of the microcontroller 100. The software program is executed by the microprocessor 120 contained within the microcontroller 100.

Reference is now made to FIG. 1B, which shows a graph of the dither pickoff signal versus time for the modular laser gyro of FIG. 1A. As shown, the dither pick signal 12 passes through the zero crossing 18. The zero crossing 18 represents the position of the laser block intermediate the minimum and maximum dithers. FIG. 1B also shows sample times 14 and 16. Sample times 14 and 16 are established by an external system. The sample block used by the external system synchronizes other inertial navigation measurements such as other gyros and other accelerometers to ensure that all readings from all inertial navigation systems occur at the same time.

Reference is now made to FIG. 2 which shows a circuit diagram of an example of a dither pickoff circuit constructed in accordance with the present invention. In one example, the dither pickoff device includes at least first, second and third capacitors 402, 406, 412 and first to seventh resistors 404, 40.
7,410,414,422,424,426 and first and second amplification means 40
Equipped with 8,420. Also shown in this figure is dither pickoff 244A, symbolized by the intrinsic capacitance. The first capacitor 402 is connected in parallel with the first resistor 404 at a connection point 405. The dither pickoff is also connected to connection point 405. The second capacitor 406 is connected at its first terminal to the connection point 405 and, at the other terminal, to the non-inverting input terminal of the first amplifier 408. First
Amplifier 408, resistors 410, 414 and 426, and capacitor 4
Twelve are connected to the dither pick-off circuit in a configuration suitable for executing the first gain coefficient and phase compensation. The output 418 of the first amplifier provides a substantially sinusoidal signal 416 representing dither pickoff to the analog / digital input terminal of the microcontroller 100. Second amplifier 42
0 and resistors 422 and 424 provide a substantially square wave signal 430 at the zero-crossing input terminal of the one-shot 810 in the digital logic 800.
Are connected and arranged in a well-known manner in order to supply the signal to the control device 100 and finally to supply the signal to the control device 100. Signal 43
0 also represents dither pickoff and forms the basic zero-crossing detection signal upon which the dither period is calculated. Oneshot 810 limits the maximum interrupt frequency to 1000Hz, thereby eliminating false interrupts during startup.

Reference is now made to FIG. 3 which shows a schematic block diagram of the inventive method for removing dither components from a read signal.
The readout signal includes both the inertial navigation signal and the dither frequency signal. To measure the inertial position accurately and reproducibly, remove the dither signal from the read signal,
That is, stripping is necessary.

FIG. 3 shows a method of stripping the dither signal from the read signal. Process block 20 illustrates the A / D conversion from dither pickoff 244A to a scratch pad random access memory location labeled "DSADCNT". The method of analog / digital conversion will be described in more detail below. DSADCNT represents the dither pickoff voltage. To strip the dither,
It is necessary to convert the dither pick-off voltage 101 into an angular displacement that represents the motion of the gyro block.

The conversion from the pickoff voltage 501A (DSADCNT) to the angular displacement α _N follows the formula: α _N = [K _COMP + AGC] ^* DSADCNT. _Where K _COMP is the compensation factor used to adjust the magnitude of the conversion in relation to the AGC factor, and AGC is an automatic factor that helps compensate for changes in dither pick-off characteristics due to temperature, aging, etc. It is a gain control coefficient, and DSADCNT is the conversion dither pickoff voltage 501A.

In the preferred embodiment of FIG. 3, in step 22, the AG
Access the AGC coefficient from the C register. The process then proceeds to step 24 where the dither angular displacement α _N is calculated as the sum of K _COMP + AGC multiplied by DSADCNT. In a preferred embodiment of the invention, the compensation factor is 1000. α _N
Is the read count unit (1.11 read count 1
Arc seconds), which represents the conversion from the voltage represented by the DSADCNT register.

The dither stripper must then calculate the change in dither motor angular displacement from the last time the process was sampled. Process is process block 26
Proceed to and read the previous calculated value α _N-1 of the dither angular displacement from the memory. The process then proceeds to process block 28 where the current angular displacement α _N and the previously measured angular displacement α _N-1.
The difference between and is calculated and stored in a variable called α _DELTA . α _DELTA represents the dither component of the gyro block motion.

The dither stripper must then calculate the change in measured displacement of the laser gyro in order to calculate the net inertial displacement of the gyro block 200. The process proceeds to process block 30 to read the value θ _A of the read counter 700A from the laser gyro. The process then proceeds to process block 32 which reads the most recently read read counter value θ _N-1 from memory. In step 34, the difference between the read counter values θ _DELTA is calculated as θ _N −θ _N-1 . The process then proceeds to process block 36 where the actual inertial navigation rotation change, called θ _NET , is calculated as θ _DELTA −α _DELTA .

If the dither signal has been stripped, then the process using a laser angular rate sensor of the present invention, theta _NET
Supply to the inertial navigation system. At the same time, in step 38, the process enters the stage of performing adjustments on the AGC coefficients. The process proceeds to process block 38 which multiplies the net output with a predetermined gain adjustment factor K prior to the operation of the method of the present invention to further speed up the conversion of the system. During initial turn-on, K is set to a high value and goes down as the gyro approaches steady state. The process then proceeds to process block 40, which adjusts the automatic gain control constant AGC according to the magnitude of θ _NET and α _N. If α _N and θ _NET have the same sign, AGC is compensated in the positive direction. The process then proceeds to process block 42, to update the automatic gain control accumulator "AGCACC" the new theta _{net Non} by multiplied by the constant K. AGC Accumulator "AGCAC
“C” is the sum of all θ _net multiplied by a constant K,
θ _net and K may be any signs. Next, process block 44 gain limits the AGC coefficients. The process then proceeds to process 46 which stores the new AGC coefficients for reuse in the method of the present invention.
The dither stripping algorithm of FIG. 3 is repeated for each new measurement of the angular displacement of the dither drive motor.

In one embodiment of the present invention, an Intel 80C196KC microcontroller is used to implement the dither stripper method of the present invention. The software description below outlines one way to implement a dither stripper.

Procedure Name: DITHER STRIP Procedure Description: This procedure implements the phase synchronization dither stripping algorithm. A special consideration is that the real-time clock handler changes dither gain based on clock time. The gain is high during the initialization time.

Procedure input: dither stripper A / D conversion value, DSADCNT,
The other preceding data stored is the preceding A / D conversion,
Read ahead count and current agc gain.

Data structure used: EXTRN FUNCTLW: WORD; Function control word EXTRN LAX: LONG; General register EXTRN LBX: LONG; General register EXTRN AX: WORD; General register EXTRN BX: WORD; General register EXTRN DX: WORD; General register EXTRN AGCGAIN: LONG; AGC gain register gyro # 1 EXTRN AGCACC: LONG; AGC accumulator register gyro # 1 EXTRN AGCAN1; A / D conversion value from the previous sample period # 1 EXTRN UPDNCNT1: WORD; Read cntr value from the previous sample period # 1 EXTRN NETTHETA: WORD; Net uncompensated theta output Shilo # 1 EXTRN DSADCNT: WORD; Dither stripper A / D conversion value EXTRN DSGAIN: WORD; Dither stripper accumulator gain factor; Common to all three dither strippers EXTRN GAIOMAP: NULL; Gyro Read Counter Address CSEG PUBLIC DITHER STRIP DITHER STRIP Dither Stripper A new dither stripper based on whether the accumulator flag is set or not. To load the obtained value.

JBC FUNCTLW, 3, NSDTIME; Change gain only when interval flag is set ANDB FUNCTLW, # 11110111B; Clear dither stripper accumulator flag This accumulator interval, recalculate dither stripper agc gain for all gyros .

LD AGCCAIN, AGCACC + 2; 16 most significant bits of AGCACC to the least 16 gain bits EXT AGCGAIN; Sign extension AGCGAIN of gain register is 326
To NSDTIME; Multiply A / D conversion by gain coefficient ADD LAX, AGCGAIN, # 1000; 1000 ＋ AGCGAIN ADDC LAX ＋ 2, AGCGAIN ＋ 2; LAX is a long integer MUL LAX, DSADCNT; A / D conversion value * (1000 ＋ AGCGAIN) _An Subtract A _n from _-1 to form the dither stripped theta (net theta).

LD LBX, LAX; AN TO LBX AN to LBX LD LBX ＋ 2, LAX ＋ 2; DIV LBX, # 1000D; Divide by 1000 DIV AGCAN1, # 1000D; AN-1 divide by 1000 SUB LBX, AGCCAN1; Form Delta Alpha LD AGCAN1, LAX; AN <-AN-1 LD AGCAN1 + 2, LAX + 2 Read and assemble read counter data from the gate array.

LDDX, # GAIOMAP; Gate array memory I / O map ADDRPT
Load R LDB AX, [DX] +; Acquire LS nibble from gate array ANDB AX, # OFH; Bitmask STB AX, BX; LDB AX, [DX]; Acquire next nibble SHLB AX, # 4; Move to upper nibble position ADDB BX, AX; Move to upper nibble of lower byte LDB AX, [DX] +; Acquire next nibble ANDB AX, # OFH; Bit mask STB AX, BX + 1; Upper byte Lower nibble LDB AX, [DX]; Earlier [MS] nibble SHLB AX, # 4; Move to upper nibble position ADDB BX + 1, AX; Move to upper nibble of upper byte Current up / down count and preceding up / SUB NETTHETA, BX, UPDNCNTN1; forming unstripped delta theta from down-counting; dither stripped delta theta net output LD UPDNCNTN1, BX; accumulator accumulating the earliest delta theta net in the agc accumulator.

MUL LAX, NETTHETA, DSGAIN; Significant increase in gain CMP DSADCNT, # 508D; A / D conversion <2.5V, then in positive half cycle.

JLE NEGACCUM1; Performs subtraction ADDAGCACC, AGCACC, LAX; Performs 32-bit addition ADDC AGCACC + 2, LAX + 2 RET NEGACCUM1: SUB AGCACC, AGCACC, LAX; Performs 32-bit subtraction SUB AGCACC + 2, LAX + 2 RET END Next, laser gyro Reference is now made to FIG. 4 which illustrates the method of the dither stripping algorithm of the present invention used to strip the dither signal from the. In FIG. 4, the 10-bit A / D conversion value from the dither pick-off 244A is input via the signal line 101. The signal line 101 feeds into an adding and multiplying unit 102 which adds a predetermined constant, which in this embodiment of the invention is determined to be 1000, to the automatic gain control constant AGC. The DSADCNT register is multiplied by the sum of the predetermined constant and the AGC coefficient. Signal line 1 with K _cv as α _n
Output to 16. K _cv is used in the LASER GYRO DIRECT DITHER DRIVE method and apparatus of the applicant's earlier cited co-pending application. Next, the comparator 105 sets α _n to A
Compare with the last sampled α _n-1 106 from the / D converter. The output of the comparator 105 is provided on the 32-bit bus as α _DELTA equal to α _N / 1000-α _N-1 / 1000. Number 1
Those skilled in the art will appreciate that 000 has been selected to adjust the measured gain and measured dither pickoff signal and the stored angular displacement of the dither to match them to the word width of the system. Will be recognized.

The output signal from the comparator 105 compares the current change in angular displacement of the gyro block to the measured angular displacement change θ _{DELTA of} the laser gyro read out given in block 700A as a signal line α _DELTA to an additional comparator 108. Supplied via 114. The comparator 108 then provides a 32-bit representation of the actual inertial navigation output, θ _NET = θ −α, that is θ _NET . The net output is provided via a 32-bit bus shown as signal line 112. The θ _NET output is also sent to a phase-locked switch 121 which is switched based on the comparison of the angular displacement of α _N and the gyro dither pickoff bias. If the bias is less than α _N , the gain adjustment is positive with respect to θ _NET . If the bias is greater than the angular displacement output, the gain adjustment is negative with respect to θ _NET . After gain adjustment by the gain adjustment block 122, the net output is also a 32-bit quantity θ
It is supplied as _{NET_A} via the signal line 124. theta _{Net_A} signal is supplied to the accumulator / integrator stage 128, where, in the theta _{Net_A} 32
Bit representation of the previous θ from other stripping cycles
_Integrate with the _{NET_A} value.

The internal representation of the 32-bit value found in the AGC accumulator is shown in Figure 5. FIG. 5 shows the AGC accumulator register 127.
And the least significant 16 bits of the 32-bit AGC accumulator register 126. AGC accumulator
129 is known as 129. The process then gain limits (130) the output of accumulator 130, thereby
Only the most significant 16 bits of AGC accumulator 129 are new AG
Supplied as C signal. This method prevents the automatic gain control loop 180 from introducing oscillations and small excursions of AGC. Reference is now made to FIG. 6 which illustrates the method of the present invention used to calculate and predict the occurrence of the next system sample clock. The importance of predicting the sample clock is illustrated by the need for the external system to obtain inertial navigation data that is synchronized with the external clock that is uniform throughout the inertial navigation system. Without this capability, inertial navigation data would be provided asynchronously, resulting in inaccurate inertial position estimates.

The process of FIG. 6 starts a counter at process block 150 when the process is first initialized. The process then proceeds to process block 152, which catches the edge of the sample clock from the system, which causes an interrupt at process block 154. There, the interrupt initiates a process called interrupt loop 170. The interrupt loop schedules A / D conversion. The count value from the counter of step 150 is stored at the time of the interrupt when the interrupt occurred in process step 154. The process then proceeds to 158 and reads the last time the interrupt occurred from memory. The process then proceeds to 160, where the time difference between the old and new interrupt is t
Calculate as _DELTA . The process then proceeds to 162 to set up A / D conversion on the high speed output of the microphone processor. The new time when high speed output should occur is t _NET + t _DELTA . The process then proceeds to 164 where t _OLD is set up equal to t _NEW and the process
Go back to figure out the next sample clock. The method of FIG. 6 dynamically compensates for changes in the system sample clock period and dynamically tracks the operation of the system sample clock. The dither stripper A / D conversion is set up in HSO logic at 162. The A / D converter 162 is also used by the direct digital dither driver described in co-pending application by the applicant's name LASER GYRO DIRECT DITHER DRIVE, attorney docket number A41-14356 / 1362.

The monitor control loop 390 shown in FIG. 7 is the main process execution loop associated with the digital modular gyro 10. The monitor control loop waits for the dither stripper A / D conversion to complete before continuing execution of the monitor control loop process. A conversion complete flag, which when set, indicates that A / D conversion is complete, is included in the device of the present invention. The monitor control loop 390 first illustrates the execution of the dither stripper algorithm 302. Compensation of rotational inertial navigation data related to temperature bias drift and age occurs in the next step 304. At 306, the monitor control loop 390 performs the system I / O setup. The process then proceeds to the bias drift improvement and random drift improvement steps of 308. The process then proceeds to 310 to process the commands provided by the external system for the modular gyro. The process performs the built-in test function at 312 and the process 314 checks for laser mode limits. Next, the monitor control loop 390
This series of processes is repeated until the modular gyro 10 is shut down.

Reference is now made to FIG. 12, which illustrates a method of scheduling A / D background conversion. Scheduling of A / D background conversion occurs in a hardware system that has a predetermined set of A / D conversion events that can be queued. The number of A / D conversions is predetermined. In one embodiment of the invention, the queue contains seven A / D conversions. The process of ordering those A / D conversions by the monitor control loop shown in FIG. 9 begins first with the step 870 of checking the A / D background conversion done flag. The process then proceeds to 872 and checks the flag to see if the conversion done flag is set. If the flag is not set, the process exits the routine and returns to the monitor control loop at step 870. In this case, the A / D involved in the A / D conversion that was scheduled first
A / D conversion cannot be performed because the conversion has not yet been performed. If the conversion done flag is set, the process proceeds to step 874 and stores the current background A / D conversion in the background conversion A / D register. This currently correlates background A / D conversion with functions set up by another routine such as temperature measurement, PLC monitoring. Then the process is a step
Proceed to 878 to check the background A / D conversion multiplexer pointer. The process then proceeds to 880 to determine what to do after examining the pointer. If the pointer points to the previous background function, then in step 882 the queue is reset to point to the first function. If the pointer is not the previous background function pointer, the process increments at 884 to the next background function pointer. In either case, the process proceeds to step 886 to schedule another background conversion in the queue. The process then exits at 876 into the monitor control loop.

Reference is now made to FIG. 8 which illustrates a method of ordering a single analog-to-digital converter among multiple analog signals in a dither stripper application of the method of the present invention. FIG. 8 shows a process flow diagram for the digital modular gyro 10 to transfer the dither stripper conversion time 702 to step 702. The conversion time HsiTime1 is calculated as t _NEW from the dither stripper process of FIG. 6 and HsiDelta is calculated as t _DELTA .

The process then flows to calculate the expected stripper time calculated from the two values sent in in process 702. The first value is HsiTime1, which is the beginning of the dither stripper conversion time, and HsiDelta, which is also sent from the external system via process 702. The expected dither stripper sample time is the sum of HsiTime1 and HsiDelta. This time is called HsiTime2. The process then proceeds to 706, where a window is created around HsiTime2 to lock out the A / D converter involved in dithering. This is a dither driven A / D converter and a dither stripper A / D.
Prevents them from interfering with each other if the conversions occur simultaneously. The A / D converter in this embodiment of the invention is an asynchronous converter. The A / D conversion happens asynchronously to the process of setting up the A / D conversion. Process step 708 calculates whether the A / D conversion involved in dither driving occurs in the dither stripper window. The process then branches to either process step 712 or process step 710. Process step 710 sets up a high speed output content addressable memory (HSO CAM) for specific dither drive scheduling and phase compensation A / D conversion and software timer flags and interrupts. Process step 712 uses the HSO to schedule the software timer flags and interrupts specific for dithering to share the already scheduled dither stripper A / D conversion.
Set up the CAM. The method of the present invention determines which type of action should be taken at a scheduled time, dither stripper transformation, dither driven transformation, dither stripper and dither driven shared transformation, or background transformation. , Check the status of the software time flag. Process step 708
Provides a way to schedule new A / D conversions or share the scheduled conversions with those that occur. Implicit in the method of the invention is that the dither stripper A / D conversion always has the highest priority, so that a single A / D in the window is
The assumption is that D conversion is appropriate for dither driven applications. In process 712, a flag is set that indicates another routine, namely the dither drive routine and the dither stripper routine where A / D conversion is shared. In process step 710, the A / D conversion is scheduled and the result of the conversion is sent to the content-accessible memory in the microcontroller 100 involved in the fast output logic described below. A / D conversion is the name of the applicant LASER GYRO DIRE
Scheduled at phase compensated times Q1 and Q3 as described in the co-pending PCT application by CT DITHER DRIVE. The process then proceeds to 714 where the A / D converter execution ordering is complete.

Reference is now made to FIG. 9 which shows a schematic diagram of the A / D conversion handler of the laser gyro dither stripper. In a modular gyro, A / D conversions are required for dither driven transformations, dither stripper transformations and background transformations as required to calculate the quadrature of dither. The process shown in FIG. 9 is a method of processing an A / D conversion depending on which process requested the A / D conversion. The method begins at 930 with an A / D conversion interrupt. At process block 932, the source of the A / D conversion comes from the dither drive process at 934, the dither stripper process at 936, the dither stripper and drive process 938, or the background process 940.
Determine if it occurs from. Stripper and drive step 938 indicates that a dither driven A / D conversion has occurred within the dither stripper A / D conversion window. The dither stripper window is also suitable for dithering, so the process proceeds to step 942 exactly as for a simple dither stripping operation. Digital drive 934, which requires A / D conversion, goes directly to 946 dither drive. The dither drive routine is described in further detail in FIG.

By the time the A / D conversion "occurs", we already know which process requested the A / D conversion. This is Figure 8
It was previously determined by the T2CAP interrupt shown in and the software timer interrupt.

If the dither stripper, or the dither drive and dither stripper, requests A / D conversion, the process proceeds to step 942 to read the A / D value in the stripper register.
Next, at 944, the A / D conversion complete flag is set to indicate that the stripper or stripper and drive most recent A / D conversion value is in the stripper register and was requested by the stripper and drive. Next, the process is run 94 if either drive or stripper and drive.
Proceed to 6 dither drive. In the case of background A / D conversion, the process proceeds to 940 where the A / D value is taken from the background register at 948 and the conversion done flag is set for background conversion at 950. In either case, the process ends at 952.

Next, a diagram showing an interrupt service routine of a software timer interrupt for scheduling either a dither only conversion, a shared conversion or a background conversion.
See 10. The process starts at 1000, step 1002
Take out the software timer flag from the special function register with. The process then checks to see if the software timer flag is set for dither driven A / D conversion. If set, the process proceeds to step 1020 where the dither drive A / D in the A / D priority register in the scratchpad RAM of the microcontroller 100.
The conversion-only flag is set, and the process ends at step 1022.
If dither driven conversion is not indicated, the process proceeds to step 1006, where the process checks to see if the software timer flag is set for the drive and stripper conversions. If set,
The process proceeds to step 1018, where the microcontroller 100
The dither stripper and dither drive common A / D conversion flag are set in the A / D priority register in the scratch pad RAM of the above, and the process ends in step 1022. If shared conversion is not indicated, the process proceeds to step 1008, where the method of the present invention checks if a dither stripper A / D conversion is in progress. Implicit in the method of FIG. 10 is the condition that if there is no shared or dither driven conversion, it must be a background conversion. The process then proceeds to step 1010 to check if dither stripper A / D conversion occurs in the window defined as HsiTime + HsiDelta as described in step 702. If the conversion occurs within the window, the process ends at step 1022. If no conversion takes place in the window, the process is step 10.
Go to 14 and wait for background conversion to complete. Background conversion occurs during a specified period, and in one embodiment of the invention, background conversion is 20
It happens within microseconds. Then the process is step 1016.
Proceed to and store the converted value in the background A / D register. The process then ends at step 1022. Those skilled in the art will recognize that the situation of waiting for the completion of the background A / D conversion process can be interrupt driven as described in FIG. 9 or polled as described in FIG. Ah

Reference is now made to FIG. 11 which illustrates the method and apparatus of the present invention for driving a laser gyro dither utilizing three analog to digital conversions. It will be appreciated by those skilled in the art that the method of the present invention could be applied to the device described in FIG.

In this embodiment, the first A / D converter 1212 provides a digital representation of the dither pickoff voltage that is appropriately timed for the dither stripper operation described above. The A / D conversion involving the dither stripper must occur when DS1 is active. Micro controller 100
Uses the result of the A / D conversion and the output 1222 of the edge triggered read counter register 1220 to generate the dither stripped inertial navigation output 1224.

The second A / D converter 1214 provides a properly timed digital representation of the dither pickoff voltage for the dither driving operation described above. The A / D conversion involved in dithering must occur when the zero crossing detector 820 is active. The microcontroller 100 uses the A / D conversion result 1204 to perform the dither drive operation.

The third A / D converter 1216 provides a digital representation of background processes such as temperature measurements, RIM and LIM measurements, PLC monitoring. Background A / D conversion is enabled by the microcontroller via enable line 1218.

Corresponding hereto in order to provide the person skilled in the art with the information necessary to apply the present invention in accordance with the patent law and to apply the novel principles and to configure and use such specialized devices as required. Explained in detail. However, it should be understood that the invention may be specified and practiced by different equipment and devices, and that various variations can be realized in both the details of the equipment and the operating procedure without departing from the scope of the invention itself.

Front Page Continuation (72) Inventor Brent, Dale F United States 55441 Minnesota Plymouth Pineview Rain North 335 (56) References Japanese Patent Publication No. 5-501306 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G01C 19/68 H01S 3/083

Claims (15)

(57) [Claims] 1. A dither stripper device for a laser gyro (10) having a dither gyro block (200) with a dither motor (244) and a dither pickoff (244A): a. Connected to the dither pickoff (244A), and It has a dither pick-off output (245A) and a dither pick-off (24A).
4A) means for sensing (402,404,406,407); b. Having amplification dither pick-off output (501A) and means for amplifying dither pick-off output (245A) (400); c. Amplified dither pick-off output (501A). An analog-to-digital conversion means (110) connected to the digital dither signal output (101); d. A digital control means (100) connected to the digital dither signal (101) and having a dither strip inertial navigation output (I) Digital dither signal output (1
The digital dither signal output (101) is converted into an angular displacement value (α _N ) by multiplying the 01) value by (automatic gain control value + compensation coefficient value), and (ii) the angular displacement value (α _N ) is converted. Generating a change in angular displacement (Δα) by subtracting from the previous angular displacement value (α _N-1 ), reading a new read counter value and subtracting the previous read counter value from the new read counter value And (iii) digital control means (100) for generating a change in the read counter value by (3) and generating a dither stripped inertial navigation output as the difference between the change in the angular displacement and the change in the read value. A dither stripper device characterized in that a gain control value is adjusted by a phase locked loop (118-132) to compensate for a digital dither signal output (101). 2. Means for sensing dither pickoff (244) include: a. Having a first terminal (405) and a second terminal (403),
A first capacitor (402) in parallel with the dither pickoff (244A); b. Connected between the first terminal (405) and the second terminal (403), the dither pickoff (244A) and the first capacitor (402). A first resistor (404) in parallel with the capacitor (402) of c; and c. Connected to the input of the first terminal (405) and the first amplifier (408) to turn off the dither pickoff (244A). Join,
A second capacitor (406) having a filtering dither output (409); d. An analog dither pickoff output (418), a first input (409) and a second input (411); One input (409) is connected to the filtering dither output (409) and the second input (411) is connected in parallel via a second resistor (410) and a fourth capacitor (412) for analog dither. First amplifier means for amplifying the filtering dither output (409) connected to the pickoff output (418) and the second input (411) connected to ground via the third resistor (426). (408); e. Dither zero-crossing detector output (430) and first input (4
18) and a second input (419), the first input (41
8) is connected to the analog dither pickoff output (418), and the second input (419) is connected to the dither zero crossing detector output (430) via the fifth resistor (422).
Has an input (419) connected to a ground point through a sixth resistor (424), and has an analog dither pickoff output (41).
A dither stripper device according to claim 1, comprising a second amplifier means (420) for amplifying 8). 3. A dither stripper method for a laser gyro having a dither gyro block with dither motor and dither pickoff: a. Sensing an analog dither signal from the dither pickoff (244A); b. Analog dither. A / D conversion process for converting the signal to digital pickoff signal; c. Process for reading digital pickoff signal; d. Process for reading automatic gain control value from memory; e. Digital pickoff signal to its value ( The process of converting into the angular displacement value (α _N ) by multiplying the automatic gain control value + the compensation coefficient value; f. The process of reading the old angular displacement (α _N-1 ) from the memory; g. The converted in the angular displacement, the process of calculating the angular displacement change from the old angular displacement that is read (Δα);. h process and reading the read counter value (θ _N);. i old read mosquito A step of reading pointer value _{(θ N-1);.} J in the read was read counter values, processes and calculating a counter value change from the old readout counter value ([Delta] [theta]);. A k dither stripping value, the angular displacement And a process of calculating as a difference (θ _NET ) between a change (Δα) and a counter value change (Δθ). 4. The dither stripping method according to claim 3, wherein the automatic gain control value is a 16-bit value. 5. The automatic gain control accumulator (129) is 32.
4. A dither stripping method as claimed in claim 3, which is a bit accumulator and wherein the automatic gain control value is the 16 most significant bits of a 32-bit automatic gain control value accumulator. 6. The dither stripping method according to claim 3, implemented in a microcontroller. 7. The analog / digital converter scheduling procedure further comprising a laser gyro further comprising a direct digital dither driver sharing the analog / digital conversion means, the analog / digital converter scheduling procedure comprising: a. Dither stripping. A. Determining the start time and dither stripping duration; b. Calculating the expected strip time as the dither stripping start time plus the dither stripper duration; c. Creating a window of predetermined time around the strip time. D. Calculate whether a given analog / digital conversion involving the digital dither signal occurs in the window and, if so, the stripper analog / digital conversion is shared with the driving analog / digital conversion. Tell that 4. The dither stripper method of claim 3, comprising the step of setting a flag to do so. 8. The dither stripper method according to claim 7, wherein the dither stripping start time includes an analog / digital conversion time. 9. An A / D conversion is performed by designating an execution order among a dither driving procedure, a dither stripper procedure, and a background procedure, and the A / D conversion is performed by the dither driving procedure and the dither stripper. May be shared with the procedure, and the procedure for specifying its execution order is: a. Whether the A / D conversion was invoked by a dither driven procedure, a dither stripper procedure, or a dither driven and dither stripper sharing procedure. A./A/D conversion is called by the dither stripper procedure or the dither stripper and dither driven shared procedure;
Storing the D value in the dither stripper register; c. Setting the A / D conversion completion flag related to the dither stripper procedure; d. Driving the dither motor; e. A / D conversion in the background procedure. 4. The dither stripper method according to claim 3, comprising the steps of storing the A / D value in a background register when called by f .; and f. Setting an A / D conversion completion flag related to the background procedure. 10. A / D priority register, dither dedicated analog / digital conversion, shared analog / digital conversion,
Or a timing procedure for scheduling the execution of the background analog-to-digital conversion with a dither only flag, a dither and stripper flag, a background flag, the activity flag should perform the corresponding conversion. And the dither and stripper flags are active; and a. Setting the dither only flag in the A / D priority register if the dither only flag is active; and b. If the dither-only flag is inactive, setting the dither and stripper flags in the A / D priority register; and c. Stripper conversion occurs within a given window,
If the dither and stripper flags are inactive and the dither only flag is inactive, perform background analog-to-digital conversion and background the results of analog-to-digital conversion.
4. The dither stripper method according to claim 3, further comprising the step of storing in an A / D conversion register. 11. A dither gyro block (20) with a dither motor (244B) and a dither pickoff (244A).
In a laser gyro dither stripper device having a (0): a. Means for sensing an analog dither signal from a dither pickoff (244A) (400); b. An analog dither signal to a digital pickoff signal (10).
Means (110) for converting into 1); c. Means (10) for reading the digital pickoff signal (101)
2) and; d. Means for reading the automatic gain control value from the memory; and e. The digital pickoff signal (101) by multiplying its value by (automatic gain control value + compensation coefficient value) means (102) for converting into α _N ); and f. means (106) for reading the old angular displacement (α _N-1 ) from the memory.
And g. Means for calculating the angular displacement change (Δα) from the read old angular displacement in the converted angular displacement (105); and h. Means for reading the read counter value (θ _N ); i. Means for reading the old read counter value (θ _N-1 ); j. Means for calculating the change in the read value of the read counter value from the old read counter value (Δθ); k. The dither stripping value A dither stripper device comprising means for calculating as a difference (θ _NET ) between a displacement change (Δα) and a counter value change (Δθ). 12. The dither stripping apparatus as claimed in claim 11, wherein the automatic gain control value is a 16-bit value. 13. Automatic gain control value accumulator (129)
Is a 32-bit accumulator and the automatic gain control value is
The dither stripping apparatus according to claim 11, which is the 16 most significant bits of a 16-bit automatic gain control accumulator. 14. The dither stripping device according to claim 11, wherein each means is implemented in a microcontroller (100). 15. A means for sensing dither pickoff comprises: a. First having a terminal (405) and a second terminal (403),
A first capacitor (402) in parallel with the dither pickoff (244A); b. Connected between the first terminal (405) and the second terminal (403), the dither pickoff (244A) and the first capacitor (402). A first resistor (404) in parallel with the capacitor (402) of c; and c. Connected to the input of the first terminal (405) and the first amplifier (408) to turn off the dither pickoff (244A). Join,
A second capacitor (406) having a filtering dither output (409); d. An analog dither pickoff output (418), a first input (409) and a second input (411); One input (409) is connected to the filtering dither output (409) and the second input (411) is connected in parallel via a second resistor (410) and a fourth capacitor (412) for analog dither. First amplifier means for amplifying the filtering dither output (409) connected to the pickoff output (418) and the second input (411) connected to ground via the third resistor (426). (408); e. Dither zero-crossing detector output (430) and first input (4
18) and a second input (419), the first input (41
8) is connected to the analog dither pickoff output (418), and the second input (419) is connected to the dither zero crossing detector output (430) via the fifth resistor (422).
Has an input (419) connected to a ground point through a sixth resistor (424), and has an analog dither pickoff output (41).
12. The dither stripper device according to claim 11, comprising a second amplifier means (420) for amplifying 8).