JP3544707B2 - Liquid crystal display - Google Patents

Description

となる。
【００６２】
このようにして、本発明の液晶表示装置においては、異なる電圧の組み合わせによって少ない種類の電圧から多種類のレベルの電圧を形成して多階調表示が可能である。
【００６３】
（参考例）本発明に係る参考例の液晶表示装置を、図４に基づいて詳細に説明する。本参考例においては、3ビットの階調情報を含む画像表示データを用いて8階調表示が可能なアクティブマトリックス型液晶表示装置に本発明を適用した場合について述べる。
【００６４】
3ビットの階調情報を含む、デジタル画像データＤ2 （ＭＳＢ）、Ｄ1 、Ｄ0 （ＬＳＢ）に対してそれぞれ対応する、 3つの異なるレベルの電圧Ｖ3 、Ｖ2 、Ｖ1 を用意する。このとき、電圧値が 0の場合（Ｖ0)も含めて合計 4種類の電圧が用意されていることになる。
【００６５】
これらの電圧は、それぞれについて 1本ずつが対応する合計4本の電圧供給配線４０１で各々供給される。そして3ビット・ラッチ回路４０２によって外部から供給されるＯＥ信号に基づいて、電圧供給配線４０１の供給する電圧のなかから電圧が選択され、この選択された電圧が加算される。その結果、異なったレベルの7種類の電圧を発生する。ここで、前述したように加算する電圧として上記の 3つのレベルに加えて0Ｖ（0ボルト）すなわちＶ0を用意することによって、3ビットのデジタル画像データがすべて0（Ｌｏｗ）即ち（0,0,0）のときにも電圧として0Ｖを供給することができる。このように、3ビットのデジタル画像データに対して合計4本の電圧供給配線を用意することで、本参考例では最終的に合計8種類の異なったレベルの電圧を発生させることができる。つまり8階調表示を行なうことが可能である。
【００６６】
また、例えば電圧Ｖ1 ＋Ｖ2 がＶ3 よりも大きくならないように、Ｖ1 、Ｖ2 、Ｖ3 の各電圧のレベルをあらかじめ設定するなどしておけば、それらの電圧の組み合わせによって、それぞれ異なったレベルの電圧を生成することができる。デジタル画像データＤ0 、Ｄ1 、Ｄ2 の組み合わせと、それに対応して生成される電圧との対応関係の一例を図４（ｂ）に示した。
【００６７】
次に3ビット・ラッチ回路４０２は、本参考例のような3ビットのデジタル画像データＤ0、Ｄ1、Ｄ2にラッチをかける。こうしてパラレルに保持された3ビットのデジタル画像データＤ0、Ｄ1、Ｄ2は3個のＡＮＤ回路４０３ａ、ｂ、ｃおよび1個のＮＯＲ回路４０４にそれぞれ入力される。
【００６８】
例えば、データ（ 0、 0、 0）が入力されたときには、ＮＯＲ回路４０４の出力が 1となり、アナログスイッチ４０５ｄが動作して電圧供給配線４０１のうちＶ0 のみが選択されて電圧Ｖ0 として信号線１０２に出力される。
【００６９】
また 3個のＡＮＤ回路４０３ａ、４０３ｂ、４０３ｃにおいては、それぞれの2つの入力端子のうち一方には常にデータ 1（Ｈｉ）が入力されている。例えば、デジタル画像データとして（ 0、 1、 1）が入力された場合には、４０３ａ、４０３ｂの出力が 1となりこれに接続されているアナログスイッチ４０５ａ、および４０５ｂのみがオン状態となって、それぞれ電圧Ｖ1 、Ｖ2 が出力され、これらが抵抗Ｒ1 、Ｒ2 、Ｒ3 を備えた電流変換回路４０６を通って各電圧に対応した電流に変換され、さらにそれらは加算回路４０７で加算され、加算された電流に対応したレベルの電圧としてこの加算回路４０７に設定されている増幅率で増幅されて、階調表示を行なう電圧（Ｖ2 ＋Ｖ1 ）として出力される。
【００７０】
このように、ｋ個のレベル数の電圧を用意し、このレベルのうちからＡＮＤ回路４０３ａ〜ｃおよびＮＯＲ回路４０４のデジタル画像データに対応したスイッチングによって、選択する電圧の組み合わせを変えることにより、合計２ⁿ 個の異なるレベルの電圧を発生させることができる。このとき、前述したようにＶ0 を計算に入れれば、ｎ＋１個の電圧を用意することで２ⁿ 個の異なるレベルの電圧を発生させて、２ⁿ 階調の階調数を有する画像の表示が可能となる。
【００７１】
この計算式に従えば、前述した 3ビットの（階調情報を含んだ）デジタル画像データに対しては、レベルの異なる 8種類の電圧を発生させて、 8階調の階調表現を有する画像を実現することができる。
【００７２】
このとき、レベルの異なるｎ種類の電圧Ｖ1、Ｖ2、…Ｖnには、Ｖn＞Ｖn-1＋…Ｖ2＋Ｖ1、Ｖn-1＞Ｖn-2＋…＋Ｖ2＋Ｖ1…の関係が成り立つ。このように、この参考例に示したような回路構成および電圧の選択方式によっても、少ない電圧の組み合わせによって、効果的に多くの異なる多種類の電圧を発生させて、それに対応した多階調の表示を行なうことが可能となる。この参考例の場合にも、階調数が多くなるほど本発明は有効であることは、上述の計算式から明らかである。
【００７３】
例えば、この参考例の方式で32階調の階調数を有する表示を実現するためには、上式から32＝2⁵であるからｎ＝5であって、0Ｖを含めて合計6本の電圧供給配線を形成するだけでよく、従来の技術の場合に必要な32本と比較して約1/5の本数で済む。
【００７４】
なお、電流変換回路４０６は、本参考例では並列に接続されたＲ1、Ｒ2、Ｒ3によってそれぞれが接続されたＶ1、Ｖ2、Ｖ3の各電圧をそれぞれ抵抗Ｒ1、Ｒ2、Ｒ3によって電流の違いへと変換されるように形成したもので、これらの電流をＲ1、Ｒ2、Ｒ3の端部で並列に1本に接続することによって電流を合計し、今度はその合計された電流に基づいて加算回路４０７で電圧へと再変換して、最終的に電圧Ｖ1、Ｖ2、Ｖ3の組み合わせを種々変えて加算して新たなレベルの電圧を形成していることは上述した通りであるが、このような入力された電圧を加算して一つの電圧として出力する回路構造は、本参考例の回路構造のみには限定されないことは言うまでもない。
【００７５】
本発明は上述のようにあらかじめ用意したＶ0〜Ｖ3のような異なった電圧の組み合わせを変えることによってそれらの用意した電圧とは異なったレベルの電圧を発生させることによってさらに多種類の電圧を得ることができるような回路であれば、上記参考例のような論理回路素子の組み合わせによる回路構成のみには限定されないことは言うまでもない。
【００７６】
【発明の効果】
以上、詳細な説明で明示したように、本発明によれば、特に少ない電圧レベル数すなわち少ない本数の電圧供給配線で多階調表示が可能な液晶駆動回路を備えて、特に液晶駆動回路の小型化によって装置全体としても小型化を図りつつ多階調で高品位な画像表示を可能とした液晶表示装置を提供することができる。
【図面の簡単な説明】
【図１】本発明に係る実施例の液晶表示装置の構造の概要を示す図である。
【図２】本発明に係る実施例の液晶表示装置の信号線駆動回路の構造を示す図である。
【図３】本発明に係る実施例の液晶表示装置に用いられる制御信号ＯＥおよび制御信号Ｓの波形を示す図である。
【図４】本発明に係る参考例の液晶表示装置の構造の概要を示す図（ａ）およびそれに用いられる階調情報の組み合わせを示す図（ｂ）である。
【図５】従来の多階調表示が可能なアクティブマトリックス型液晶表示装置の信号線駆動回路の構造を示す図である。
【図６】図５に示す電圧選択回路に供給される電圧Ｖ 1 、Ｖ 2 、…Ｖ（ 2 ⁿ ）を示す図である。
【符号の説明】
１…デジタル画像信号ＤＳ
２…直並列変換回路
３…第１のデコーダ
４…第２のデコーダ
５…第１の電圧選択回路
６…第２の電圧選択回路
７…第１のホールドコンデンサ
８…第２のホールドコンデンサ
９…短絡スイッチ
１０…電流バッファ
１１…電圧供給配線
１０１…走査線
１０２…信号線
１０３…ＴＦＴ
１０４…画素電極
１０５…走査線駆動回路
１０６…信号線駆動回路
１０７…対向電極駆動回路[0001]
[Industrial applications]
The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device capable of multi-gradation display and having a small liquid crystal drive circuit system.
[0002]
[Prior art]
Liquid crystal display devices have been used in various fields, taking advantage of their features such as thinness, light weight, and low power consumption. Among them, liquid crystal display devices capable of multi-gradation display include television screens and personal computers. Has attracted attention as a display device for electronic devices.
[0003]
In recent years, in order to achieve higher definition and higher display quality, it is necessary to increase the number of pixels, increase the pixel density, further refine each pixel size, and further increase the number of gradations. Therefore, various research and development are being promoted. In order to satisfy such technical requirements, for example, an active matrix liquid crystal display device in which a switching element such as a thin film transistor is provided for each pixel has a large number of scanning lines and signal lines, that is, a display having a large number of pixels. On the other hand, since it is possible to display an image in which the generation of crosstalk between adjacent electrodes is suppressed, attention has been paid in recent years, and research, development and practical use have been made actively.
[0004]
Such an active matrix type liquid crystal display device will be described as an example of a conventional liquid crystal display device, particularly focusing on its liquid crystal drive circuit.
[0005]
In an active matrix liquid crystal display device, a plurality of signal lines and a plurality of scanning lines are arranged in a matrix, and a switching element connected to a pixel electrode is arranged at each intersection thereof, and the pixel electrode is formed of the above-described pixel electrode. Are formed in each of the grids surrounded by the above matrix and are formed for each pixel region. The first substrate on which the scanning lines, the signal lines, the pixel electrodes, and the switching elements connected to them are formed, and the second substrate on which the common electrode is formed are opposed to each other with a gap therebetween. A liquid crystal composition is injected and sandwiched by sealing the periphery in the gap to form a liquid crystal cell, and a liquid crystal driving circuit for applying a liquid crystal driving electrode to each pixel electrode and common electrode of the liquid crystal cell is, for example, the liquid crystal driving circuit described above. Is formed on the first substrate. Its output is connected to a signal line and a scanning line to supply a signal voltage and a scanning voltage, respectively. In order to reduce the size of the device and simplify the connection wiring, the liquid crystal driving circuit is integrated as an IC, for example, and is mounted on the first substrate (so-called array substrate) by a COG (Chip On Glass) method. Mounted. Alternatively, there is also a method in which the circuit system of this portion is formed as a TFT element on the same substrate as that of the pixel portion by using the material for forming the switching TFT. This is a so-called drive circuit integrated type liquid crystal display device.
[0006]
The image signal voltage is supplied (applied) to each signal line by such a liquid crystal drive circuit. The analog image signal is input, and the sampled and held sample is sequentially held to obtain a parallel image signal for one horizontal line. And a digital system in which a parallel image signal for a horizontal line is obtained by inputting a digital image signal and processing the digital image signal.
[0007]
Therefore, regarding the signal line drive circuit of the conventional active matrix type liquid crystal display device capable of multi-tone display,5 and 6It will be described based on.
[0008]
FIG.As shown in (1), the main part of the signal line driving circuit 301 includes a serial-parallel conversion circuit 302 in which a main part is formed by combining a shift register and a latch, k decoders 303, and k voltage selection circuits 304. Have been.
[0009]
The serial-to-parallel conversion circuit 302 includesⁿAn n-bit multi-gradation digital image signal DS for gradation representation, a shift clock signal CPH, and a horizontal start signal STH are input. The multi-tone digital image signal DS is subjected to serial-parallel conversion by the shift clock signal CPH and the horizontal start signal STH so as to be simultaneously output to each decoder 303, and becomes n-bit display data.
[0010]
Then, in each voltage selection circuit 304,As shown in FIG.The voltages V1, V2,... V (2) whose polarity is inverted around the reference voltage VSC every period T of an integral multiple of the frame cycle or an integral multiple of the line cycle.ⁿ) Is supplied. The reason why such a voltage waveform is inverted with respect to the center voltage is that it is necessary to use an AC voltage waveform in order to prevent deterioration of the liquid crystal composition.
[0011]
The display data including the n-bit multi-gradation information is decoded by the decoder 303, and based on the decoded data, the on / off of each switch 305 in the voltage selection circuit 304 is controlled. Voltages V1, V2, ... V (2ⁿ) Is selected, and the voltage level is supplied to each connected signal line.
[0012]
As described above, in the conventional signal line driving circuit 301, the digital image signal DS having the gray scale information composed of n bits isⁿThe different levels of dynamic voltages V1, V2,... V (2ⁿ) Was selected one by one and output as an image signal voltage to each signal line. For this reason, as the number of display gradations of the liquid crystal display device increases, the number n of bits of the digital image signal and the type of voltage level required as the image signal voltage 2ⁿWill increase.
[0013]
This causes problems such as an increase in the chip size of the IC chip when the liquid crystal drive circuit is integrated, a reduction in the manufacturing yield of the liquid crystal drive circuit, and an increase in cost.
[0014]
In particular, the type of image signal voltage level is proportional to the number of gradations.ⁿTherefore, at least one drive voltage supply wiring 306 is required for each voltage level, which hinders progress in downsizing and miniaturization of the entire liquid crystal drive circuit. That is, when such a large number of drive voltage supply wirings 306 are provided, the area occupied by the wirings on the substrate is significantly increased. Alternatively, in order to form such a large number of wirings within a limited chip size, the pattern design rules of the liquid crystal driving circuit, including the wirings, must be further refined. There is a problem that the yield is reduced. Such a problem becomes even more remarkable in order to reduce the size of the liquid crystal display device, increase the number of pixels of a display image, and realize multi-gradation display.
[0015]
[Problems to be solved by the invention]
As described above, in the signal line driving circuit 301 of the digital driving method using the analog switch 305, n-bit digital image data isⁿIt is necessary to prepare different levels of voltages. Therefore, when further multi-gradation display is to be performed, the number of drive voltage supply wirings 306 and the number of switches 305 for selecting one of the multi-level voltage levels are significantly increased. It is necessary to increase the circuit size and further refine the pattern design rule. As a result, when the liquid crystal driving circuit is integrated, it is necessary to increase the element size of the integrated circuit or to further increase the density in order to keep the element size unchanged, and the pattern design rule is required. Further, there is a problem that the yield becomes lower and the cost is increased.
[0016]
The present invention has been made to solve such a problem, and an object of the present invention is to enable a multi-gradation display with a small number of voltage supply wirings, to reduce the size of a liquid crystal driving circuit, and to realize an overall device. It is an object of the present invention to provide a liquid crystal display device which can be reduced in size and capable of displaying high-quality images with multiple gradations.
[0017]
[Means for Solving the Problems]
In order to solve the above problems, a liquid crystal display device of the present invention isThe signal lines and the scanning lines are arranged in a matrix on the first substrate, and are connected to the pixel electrodes and the pixel electrodes in a region surrounded by the signal lines and the scanning lines, and are connected to the signal lines and the scanning lines. An array substrate on which a switching element formed is formed, a counter substrate on which a counter electrode facing the pixel electrode of the array substrate is formed on a second substrate, and a gap between the array substrate and the counter substrate. A liquid crystal layer injected and sandwiched in a liquid crystal cell which is disposed facing and is sealed around the periphery, a scanning line driving circuit for applying a scanning voltage to the scanning line, and an image signal voltage to the signal line. Serial-parallel conversion circuit for converting an image signal having gradation data input in a serial data format into a parallel data format and outputting the same in a liquid crystal display device having a signal line driving circuit to be applied A first control for decoding an image signal in the form of parallel data output from the serial-parallel conversion circuit based on first decode information stored in advance and controlling on / off of a plurality of switches in parallel; A first decoder that outputs a signal and an image signal in the form of parallel data output by the serial / parallel conversion circuit are converted based on second decoding information stored in advance as a decoding rule different from that of the first decoder. A second decoder for decoding and outputting a control signal for controlling on / off of a plurality of switches other than the switches in parallel, and a plurality of switches to which a plurality of types of voltages of different levels are respectively applied; A voltage supply line and a plurality of switches whose on / off are controlled in parallel by the first decoder are formed. One end of each of the switches is connected to a different one of the voltage supply wirings, and the other end is turned on / off by a first voltage selection circuit connected to a common output terminal and the second decoder. A plurality of switches each of which is controlled to be turned off in parallel are formed, one end of each of the switches is connected to a different one of the voltage supply wirings, and the other end is connected to a common output terminal. A second voltage selection circuit, a first capacitor having one end connected to an output terminal of the first voltage selection circuit and the other end grounded or a constant voltage applied thereto, and the second voltage selection circuit One end is connected to the output end of the second capacitance, and the other end is connected to the ground or a constant voltage. A short-circuit switch that controls a short circuit between the one end of the second electric capacitance and the one end of the second electric capacitance when the short-circuit switch is closed. A short-circuit switch for averaging the electric charge accumulated in the first electric capacitance and the electric charge accumulated in the second electric capacitance, and the one end of the first electric capacitance and the one end of the second electric capacitance. A voltage corresponding to the averaged charge is amplified at a predetermined amplification rate, and a current buffer connected to each of the signal lines so as to be applied to each of the signal lines, comprising: Including at least an intermediate level voltage between a plurality of different levels of voltages supplied by the voltage supply wiring, and at least a plurality of different levels of voltages than the plurality of different levels of voltage supplied by the voltage supply wiring. Form It is provided with a signal line driver circuit for applying to each of the signal lines as an image signal voltage for displaying an image having a gradation number than the number of said voltage supply linesIt is characterized by.
[0018]
Alternatively, in the above liquid crystal display device,K (K + 1) / 2 ≧ 2, where n is the number of bits of gradation data, and K is the number of levels of a plurality of types of voltages having different levels. ⁿ Satisfy the relationshipIt is characterized by:
[0021]
[Action]
The liquid crystal display device of the present invention modulates the wave height (amplitude) of a signal voltage to display a gradation corresponding to each voltage so that the voltage level used in the liquid crystal display device is larger than the number of gradations to be displayed. A signal line drive circuit that prepares a small number of them and changes the combination of these voltages to generate at least the same kind of voltage level as the number of gradations, and applies this to a predetermined signal line as an image signal voltage Is provided, it is possible to realize further multi-pixel / multi-gradation display while reducing the number of voltage supply wirings inside the signal line drive circuit itself without increasing it. That is, further downsizing can be realized while reducing the size of the signal line driver circuit.
[0022]
In order to form various types of voltages corresponding to the multi-gradation display by combining a small number of types of voltage levels as described above, there are mainly two types of circuit systems as described above.
[0023]
As one of them, two types of selection circuits such as a first voltage selection circuit and a second voltage selection circuit are prepared as voltage selection circuits. These two types of selection circuits select a plurality of lines at once from among the prepared few voltage supply wirings, and combine the small number of voltage levels supplied from those voltage supply wirings, A multi-level voltage including a different new level voltage can be formed. In this manner, it is possible to obtain more voltage levels corresponding to more gray scales by merely preparing a small number of voltage levels without increasing the number of voltage levels input to the signal line driving circuit. As a result, it is possible to cope with further multi-tone display.
[0024]
Therefore, according to the present invention, it is possible to provide a liquid crystal drive circuit capable of performing multi-gradation display with a small number of voltage supply wirings, and in particular, to reduce the size of the liquid crystal drive circuit and downsize the entire device. It is also possible to provide a liquid crystal display device capable of displaying high-quality images with multiple gradations.
[0025]
【Example】
Hereinafter, embodiments of the liquid crystal display device of the present invention will be described in detail with reference to the drawings.
[0026]
FIG.FIG. 1 is a diagram showing an outline of a structure of a liquid crystal display device of the present invention. This liquid crystal display device has m scanning lines 101 (Y1 to Ym) to which a scanning voltage (scanning pulse) is applied on a transparent insulating substrate, and an image signal voltage provided orthogonal to the scanning lines 101. The k signal lines 102 (X1 to Xk) to be applied are formed in a matrix, and a thin film transistor (hereinafter abbreviated as TFT) is used as a pixel electrode switching element at each intersection of the scanning line 101 and the signal line 102. The TFT 103 has a gate electrode electrically connected to the scanning line 101, a drain electrode connected to the signal line 102, and a source electrode connected to the pixel electrode 104. A scanning line driving circuit 105 for applying a scanning voltage (scanning pulse) to the scanning line 101 and a signal for applying an image signal voltage to the signal line 102 are provided around the TFT array substrate having such a schematic structure. Line drive line circuits 106 are respectively formed. An opposing substrate (not shown) on which opposing electrodes are formed is disposed so as to face with a gap to the TFT array substrate having such a schematic structure, and the periphery of both substrates is sealed. Then, a liquid crystal composition is injected into the gap to be sandwiched as a liquid crystal layer, and a counter electrode driving circuit 107 is connected to the counter electrode to form a main part of the liquid crystal display device according to the present invention.
[0027]
FIG. 2 is a diagram showing in detail the structure of the signal line driving circuit 106 of the liquid crystal display device according to the present invention.
[0028]
The signal line drive circuit 106 includes a serial-parallel converter 2 having a main part formed by combining a shift register and a latch, to which a signal related to display such as a digital image signal (DS) 1 is input from the outside, and k The first decoder 3, k second decoders 4, k first voltage selection circuits 5, k second voltage selection circuits 6, k first hold capacitors 7, k From the second hold capacitor 8, k short-circuit switches 9, k current buffers 10, and n voltage supply lines 11 for supplying different n-level voltages V1, V2... Vn. A part is formed. The voltages output from each of the k current buffers 10 are respectively connected to one of the k signal lines 102, and are switched by the TFT 103 so that a so-called image signal is applied to the corresponding pixel electrode 104. It is applied as a voltage.
[0029]
The serial / parallel conversion circuit 2 receives a digital image signal (DS) 1 including multi-bit information of n bits, a shift clock signal CPH, and a horizontal start signal STH. The digital image signal (DS) 1 is serial-parallel converted by the shift clock signal CPH and the horizontal start signal STH so as to be simultaneously output to the first decoder 3 and the second decoder 4. The display data converted by the serial-parallel conversion circuit 2 in this manner is similarly supplied to the subsequent first decoder 3 and second decoder 4 in parallel, respectively.
[0030]
The display data thus input is decoded by the first decoder 3. On / off of each switching element 12 in the voltage selection circuit 5 of the next stage is controlled based on the n-bit gradation information included in the display data, and the voltage V1 supplied from the voltage supply wiring 11 is controlled. , V2,... Vn. The voltage selected in the first voltage selection circuit 5 in this way is written (stored) in the first-stage first hold capacitor 7. On the other hand, the display data is also input to the second decoder 4 in parallel with the first decoder 3, but the n-bit gradation information included in the input display data is based on the second decoder 4. Is decoded based on a decoding rule different from that of the first decoder, and the switch in the second voltage selection circuit 6 at the subsequent stage is controlled on / off by an operation independent of the first decoder, so that the voltage is One voltage is selected from a plurality of levels of voltages V1, V2,... Vn supplied from the supply wiring 11. Then, the selected voltage is written (stored) in the second hold capacitor 8 in the subsequent stage.
[0031]
Here, the first hold capacitor 7 and the second hold capacitor 8 have the same electric capacity in this embodiment. This is because, when taking the average of the electric charges accumulated in both, the calculation becomes simpler when the electric capacity of both is equal. However, it goes without saying that the electric capacity of these two capacitors may be set to different electric capacities. In this case, the first decoder and the second decoder of the preceding stage are arranged such that the voltage finally obtained by averaging the electric charges accumulated in both of them becomes a voltage of a level corresponding to each gradation display. It is necessary to make decoding rules and the like appropriately correspond.
[0032]
The voltages selected by opening and closing the switches 12 of the first voltage selection circuit 5 and the second voltage selection circuit 6 are written into the first hold capacitor 7 and the second hold capacitor 8 within a predetermined period, respectively. After the voltage is sufficiently accumulated in each of the hold capacitors 7 and 8, the plurality of switches 12 in the first voltage selection circuit 5 and the plurality of switches 12 in the second voltage selection circuit 6 are both turned off at once. Then, the first hold capacitor 7 and the second hold capacitor 8, which are separated from the preceding stage, are short-circuited by the short-circuit switch 9, and the electric charges separately accumulated in each of them are averaged. . The operation of the short-circuit switch 9 is controlled based on the control signal S. The current flows to the current buffer 10 according to the voltage formed by averaging the charges held in the first hold capacitor 7 and the second hold capacitor 8 in this manner. Then, the input current is amplified at a predetermined amplification rate, and applied to the signal lines 102 connected to each as an image signal voltage for displaying an image. The current buffer 10 is formed in a circuit having a high input impedance, and its control is controlled in synchronization with a control signal OE, a frame period for performing image display, and a selection period for each pixel.
[0033]
FIG. 3 shows the waveforms of the control signal OE and the control signal S. FIG. 3 also shows the relationship between such control signals and the timing of the output of the first decoder 3 and the output of the second decoder 4.
[0034]
Here, the period for writing the voltage to the first and second hold capacitors 7 and 8 and the period for averaging the charges by short-circuiting them are provided during the period for displaying the screen (so-called display period). These periods are not preferable because they may adversely affect the quality of the displayed image. Therefore, these periods are set to correspond to the so-called horizontal blanking period. That is, in the present embodiment, writing to the first and second hold capacitors 7 and 8 and averaging of the voltages are performed during a period not related to display. However, needless to say, even if the writing period and the averaging period are set in addition to the blanking period as long as the display image is hardly adversely affected.
[0035]
Subsequently, the averaging of the voltage performed by the first and second hold capacitors 7 and 8 in the liquid crystal display device of the present invention and the new level voltage formed thereby will be described.
[0036]
Now, if the voltage V1 is written to the first hold capacitor 7, the charge Q1 stored in the first hold capacitor 7 becomes Q1 = C.V1. At the same time, if the voltage V2 is written to the second hold capacitor 8, the charge Q2 stored in the second hold capacitor 8 at that time becomes Q2 = CV2. Thereafter, as described above, the switch 12 in the first voltage selection circuit 5 and the switch 12 in the second voltage selection circuit 6 are both turned off, and then the short-circuit switch 9 is turned on. The electric charges stored in the hold capacitor 7 and the second hold capacitor 8 are averaged. The charge Q0 at that time is
Q0 = Q1 + Q2 = C. (V1 + V2) = 2 C.V0
And the voltage V0 held by the first hold capacitor 7 and the second hold capacitor 8 is
V0 = (V1 + V2) / 2
It becomes. It can be seen that this is an intermediate voltage level (potential) between V1 and V2.
[0037]
That is, in the signal line driving circuit of the liquid crystal display device as in the present embodiment, voltages of a plurality of different levels prepared in advance as described above can be combined to form voltages of further various levels. Such various levels of voltages are used as various levels of image signal voltages. Multi-tone display corresponding to such various levels of image signal voltages can be performed.
[0038]
Therefore, multi-gradation display can be performed with a smaller number of voltages than in the related art, so that it is possible to further increase the gradation of a display image while reducing the number of voltage supply wirings without increasing them.
[0039]
Here, assuming that the capacities of the first hold capacitor 7 and the second hold capacitor 8 are C1 and C2, respectively,ExampleShows an example in the case of C1 = C2.
[0040]
Here, specifically, for example, consider a case where the digital image signal is 3 bits.
[0041]
When the digital image signal is 3 bits, 2^Three= It is necessary to have image signal voltages having eight different levels of voltages to display eight gradations. In the conventional configuration, eight different levels of voltages are prepared as described above, and one of them is selected by the signal line drive circuit and output to each signal line as an image signal voltage.
[0042]
However, the above-mentionedExampleIn the liquid crystal display device, if four types of voltages having different levels are prepared, eight or more types of voltages having different levels necessary for preparing the eight gradations as described above are formed by combining them. It can be output as an image signal voltage.
[0043]
The voltages supplied to the first voltage selection circuit 5 are four types of voltages V1, V2, V3 and V4 having different levels.
[0044]
On the other hand, the voltages supplied to the second voltage selection circuit 6 are four types of voltages V1, V2, V3, and V4 having different levels as described above.
[0045]
In combinationThe type of voltage level obtained by using16 Street combinationsOf these, 10 combinations are possible. That is, voltages of ten different levels can be formed. The reason why there are ten types is that, for example, the combination of V1 and V2 and the combination of V2 and V1 are the same when C1 and C2 are the same. If eight of the remaining ten voltages are used, it is possible to display an image having eight gradations corresponding to the digital image signal (3 bits) as described above.
[0046]
Further, as described above, when the digital image signal is 4 bits, the types of voltage of different levels to be prepared are 2^Four= 16 types for displaying 16 gradations are required. In a conventional liquid crystal display device, it was necessary to prepare 16 types of voltages having different levels. That is, 16 voltage supply wirings were required. However, according to the present invention, the number of voltage levels to be prepared may be six.
[0047]
Furthermore, when the digital image signal is 6 bits, the same⁶2 for displaying gradation⁶There were 64 types of voltages required. However, according to the present invention, only eleven kinds of voltages need to be prepared.
[0048]
Furthermore, when the digital image signal is 8 bits, 2⁸Conventionally, 256 different voltages were required to display 256 gradations. According to the present invention, 23 kinds of voltages are prepared, and a voltage of 256 levels or more is formed by a combination of these voltages. It is possible to do.
[0049]
Furthermore, the conventional liquid crystal display device has twoⁿDifferent voltage levels were required. However, in the liquid crystal display device of the present invention, the number of gradations and the type of voltage k required to realize the gradation are k (k + 1) / 2 ≧ 2ⁿIt suffices to prepare k types of voltage levels. As described above, it is possible to perform the same or a larger number of gradation displays with a small number of voltage levels.
[0050]
Next, the case where the capacitances of the first hold capacitor 7 and the second hold capacitor 8 are different from each other, that is, the case where C1: C2 = 1: m (m is other than 1) is considered.
[0051]
When the digital image signal is 3 bits, 2^Three= Eight different voltages at different levels to display eight gradations are required. In a liquid crystal display device having a conventional structure, such eight types of voltages are required. However, in the liquid crystal display device of the present invention, only three types of voltages are required. Combine these three voltages to form more than eight voltagesIt is.
[0052]
When C1: C2 = 1: m (m is other than 1), the types of voltage levels that can be formed are: voltage type = {(first selection voltage) + m (second selection voltage)} / ( 1 + m).
[0053]
Such a relation andThe aforementionedAs is evident from the voltage combination,9 Kind ofCombinations are possible. Therefore, it is possible to display eight gradations by using eight kinds of voltages from nine kinds of different voltages formed by such a combination.
[0054]
Similarly, considering the case where the digital image signal is 4 bits, 2^Four= It is necessary to prepare 16 different levels of voltages for displaying 16 gradations. In the conventional case, it was necessary to prepare 16 types of voltages. However, according to the present invention, only four types of voltages are prepared, and 16 or more types of voltages can be formed by combining these.
[0055]
When the digital image signal is 6 bits, 2⁶= Display of 64 gradations is required, and 64 types of voltage levels for realizing this are required. According to the present invention, in order to form such 64 different voltages, eight different voltages may be used. In this manner, multi-gradation display can be performed by preparing only a very small number of types of voltages.
[0056]
If the digital image signal is 8 bits, 2⁸= Display of 256 gradations was required, and 256 kinds of voltages for realizing this were required. However, according to the present invention, it is possible to display 256 or more gray levels using 16 types of voltages. Thus, it is apparent that the present invention becomes more effective as the number of gradation expression bits of the digital image signal increases.
[0057]
Generally, when the capacitance ratio between C 1 and C 2 is different, 2ⁿAccording to the present invention, the type of voltage required for gray scale display is k^Two≧ 2ⁿSince it is only necessary to supply a voltage of a type that satisfies certain conditions, the apparatus can be extremely simplified.
[0058]
Next, the operation of the liquid crystal display device of the present invention for forming various types of voltages by the two capacitors as described above will be described.
[0059]
A voltage V is applied to each of the capacitances C 1 and C 2 of the first hold capacitor 7 and the second hold capacitor 8._x, V_yIs applied, the electric charges Q 1 and Q 2 stored in the respective capacitors are
Q 1 = C 1 · V_x
Q2 = C2V_Y
It becomes.
[0060]
After each capacitor is sufficiently charged by applying such a voltage, C 1 and C 2 are connected in parallel and their respective one terminals are connected to each other. The averaged charge is averaged. The averaged voltage V of both the first hold capacitor 7 and the second hold capacitor 8 at that time_zAnd the relationship between the total accumulated charge amount Q 3 and
Q_Three= (C1 + C2) V_zIt becomes. Here, since the sum of the charge amounts before and after the voltage averaging is basically stored (assuming that error loss due to charge discharge or the like can be ignored)
Q_Three= Q1 + Q2,
(C1 + C2) V_z＝ C 1 ・ V_x+ C2 · V_y,
Therefore, V_z= (C 1 · V_x+ C2 · V_y) / (C 1 + C 2). Here, when the capacitances of the two hold capacitors 7 and 8 are equal (C 1 = C 2),
V_z= (C 1 · V_x+ C 1 · V_y) / (C 1 + C 1) = (V_x+ V_y) / 2
It becomes.
[0061]
When the capacitances of the first and second hold capacitors are not equal (C1: C2 = 1: m, m is other than 1),

It becomes.
[0062]
In this manner, in the liquid crystal display device of the present invention, a multi-level display can be performed by forming voltages of various levels from a small number of voltages by a combination of different voltages.
[0063]
(Reference example) According to the inventionReference exampleThe liquid crystal display device will be described in detail with reference to FIG.This reference exampleIn the following, a case will be described in which the present invention is applied to an active matrix liquid crystal display device capable of displaying eight gradations using image display data including 3-bit gradation information.
[0064]
Three different levels of voltages V3, V2, V1 corresponding to the digital image data D2 (MSB), D1, D0 (LSB), respectively, including 3-bit gradation information are prepared. At this time, a total of four types of voltages are prepared, including the case where the voltage value is 0 (V0).
[0065]
These voltages are supplied by a total of four voltage supply wires 401, one for each. Then, based on the OE signal supplied from the outside by the 3-bit latch circuit 402, a voltage is selected from the voltages supplied from the voltage supply wiring 401, and the selected voltages are added. The result is seven different voltages at different levels. Here, as described above, by preparing 0 V (0 volt), that is, V0, in addition to the above three levels as voltages to be added, all the 3-bit digital image data is 0 (Low), that is, (0, 0, In the case of 0), 0 V can be supplied as a voltage. Thus, by preparing a total of four voltage supply wirings for 3-bit digital image data,This reference exampleCan finally generate a total of eight different levels of voltage. That is, it is possible to perform eight gradation display.
[0066]
Also, for example, if the levels of V1, V2, and V3 are set in advance so that the voltage V1 + V2 does not become larger than V3, voltages of different levels are generated depending on the combination of these voltages. can do. FIG. 4B shows an example of a correspondence relationship between a combination of digital image data D0, D1, and D2 and a voltage generated corresponding thereto.
[0067]
Next, the 3-bit latch circuit 402This reference exampleAre latched on 3-bit digital image data D0, D1, and D2. The 3-bit digital image data D0, D1, and D2 held in parallel in this manner are input to three AND circuits 403a, 403b, and c and one NOR circuit 404, respectively.
[0068]
For example, when data (0, 0, 0) is input, the output of the NOR circuit 404 becomes 1, and the analog switch 405d operates to select only V0 of the voltage supply wiring 401 and to set the signal line 102 as the voltage V0. Is output to
[0069]
In the three AND circuits 403a, 403b, and 403c, data 1 (Hi) is always input to one of the two input terminals. For example, when (0, 1, 1) is input as digital image data, the outputs of 403a and 403b become 1, and only the analog switches 405a and 405b connected thereto are turned on. Voltages V1 and V2 are output, and these are passed through a current conversion circuit 406 having resistors R1, R2 and R3 and converted into currents corresponding to the respective voltages. Further, they are added by an addition circuit 407, and the added currents are added. Is amplified at the amplification factor set in the addition circuit 407 and output as a voltage (V2 + V1) for performing gradation display.
[0070]
As described above, k levels of voltages are prepared, and the voltages selected from the levels are changed by switching corresponding to the digital image data of the AND circuits 403a to 403c and the NOR circuit 404, so that the total voltage is obtained. 2ⁿDifferent levels of voltage can be generated. At this time, if V0 is taken into account as described above, by preparing n + 1 voltages, 2ⁿTo generate different levels of voltage,ⁿIt is possible to display an image having the number of gradations.
[0071]
According to this formula, for the above-mentioned 3-bit digital image data (including gradation information), eight types of voltages having different levels are generated, and an image having eight gradations is expressed. Can be realized.
[0072]
At this time, n types of voltages V1, V2,... Vn having different levels include Vn> Vn-1 +.,Vn-1> Vn-2 +... + V2 + V1. Thus, thisReference exampleAccording to the circuit configuration and the voltage selection method shown in the above, it is possible to effectively generate many different types of voltages by a combination of a small number of voltages and to perform multi-gradation display corresponding thereto. Become. thisReference exampleIt is clear from the above formula that the present invention is more effective as the number of gradations increases in the case of.
[0073]
For example, thisReference exampleIn order to realize a display having the number of gradations of 32 gradations by the method of the above, 32 = 2^FiveTherefore, n = 5, and it is sufficient to form a total of six voltage supply wirings including 0 V, which is only about one fifth of the number required for 32 in the conventional technique. .
[0074]
Note that the current conversion circuit 406This reference exampleAre formed such that the respective voltages of V1, V2, and V3, which are respectively connected by R1, R2, and R3 connected in parallel, are converted into current differences by resistors R1, R2, and R3, respectively. Are connected in parallel at the ends of R1, R2 and R3 to sum the currents. This time, based on the summed currents, a summing circuit 407 reconverts the currents into voltages, and the final As described above, the combination of the voltages V1, V2, and V3 is changed and added to form a new level voltage. However, such input voltages are added to form a single voltage. The output circuit structure isThis reference exampleIt is needless to say that the present invention is not limited only to the above circuit structure.
[0075]
As described above, the present invention is to obtain a greater variety of voltages by generating different levels of voltage from the prepared voltages by changing combinations of different voltages such as V0 to V3 prepared in advance. If the circuit is capable ofReference exampleIt is needless to say that the circuit configuration is not limited only to the combination of the logic circuit elements as described above.
[0076]
【The invention's effect】
As described in the detailed description above, according to the present invention, a liquid crystal driving circuit capable of performing a multi-gradation display with a particularly small number of voltage levels, that is, a small number of voltage supply wirings is provided. Accordingly, it is possible to provide a liquid crystal display device capable of displaying high-quality images with multiple gradations while reducing the size of the device as a whole.
[Brief description of the drawings]
FIG. 1 according to the inventionExampleFIG. 2 is a diagram showing an outline of the structure of the liquid crystal display device of FIG.
FIG. 2 according to the inventionExampleFIG. 3 is a diagram illustrating a structure of a signal line driving circuit of the liquid crystal display device of FIG.
FIG. 3 according to the inventionExampleFIG. 6 is a diagram showing waveforms of a control signal OE and a control signal S used in the liquid crystal display device of FIG.
FIG. 4 according to the inventionReference example(A) showing an outline of the structure of the liquid crystal display device of FIG. 1 and a diagram showing a combination of gradation information used therein.(B)It is.
FIG. 5FIG. 11 is a diagram illustrating a structure of a signal line driving circuit of a conventional active matrix type liquid crystal display device capable of multi-gradation display.
FIG. 6The voltage V supplied to the voltage selection circuit shown in FIG. 1 , V Two , ... V ( Two ⁿ )FIG.
[Explanation of symbols]
1: Digital image signal DS
2. Serial-to-parallel conversion circuit
3. First decoder
4. Second decoder
5. First voltage selection circuit
6. Second voltage selection circuit
7 ... first hold capacitor
8 Second hold capacitor
9 Short-circuit switch
10 ... Current buffer
11 Voltage supply wiring
101 scanning line
102 ... signal line
103 ... TFT
104: Pixel electrode
105 ... Scanning line drive circuit
106 ... signal line drive circuit
107: Counter electrode drive circuit

Claims (2)

The signal lines and the scanning lines are arranged in a matrix on the first substrate, and are connected to the pixel electrodes and the pixel electrodes in a region surrounded by the signal lines and the scanning lines, and are connected to the signal lines and the scanning lines. An array substrate on which a switching element formed is formed, a counter substrate on which a counter electrode facing the pixel electrode of the array substrate is formed on a second substrate, and a gap between the array substrate and the counter substrate. A liquid crystal layer injected and sandwiched in a liquid crystal cell which is disposed facing and is sealed around the periphery, a scanning line driving circuit for applying a scanning voltage to the scanning line, and an image signal voltage to the signal line. A liquid crystal display device having a signal line drive circuit for applying
A serial-parallel conversion circuit that converts an image signal having gradation data input in a serial data form into a parallel data form and outputs the converted signal;
A first control signal for decoding an image signal in the form of parallel data output from the serial / parallel conversion circuit based on first decode information stored in advance and controlling on / off of a plurality of switches in parallel; A first decoder that outputs
An image signal in the form of parallel data output from the serial-parallel conversion circuit is decoded based on second decoding information stored in advance as a decoding rule different from that of the first decoder, and a plurality of image signals different from the switches are output. A second decoder that outputs a control signal for controlling on / off of the switches in parallel;
A plurality of voltage supply wirings to which a plurality of different levels of voltages are applied,
A plurality of switches whose on / off are controlled in parallel by the first decoder are formed, and one end of each of the switches is connected to a different one of the voltage supply wirings, and the other end is connected to a different one of the voltage supply wirings. A first voltage selection circuit connected to a common output terminal;
A plurality of switches whose on / off are respectively controlled in parallel by the second decoder are formed, and one end of each of the switches is connected to a different one of the voltage supply wirings, and the other end is connected to a different one of the voltage supply wirings. A second voltage selection circuit connected to the common output terminal;
One end is connected to an output end of the first voltage selection circuit, and the other end is a first capacitance to which a ground or a constant voltage is applied;
One end is connected to the output end of the second voltage selection circuit, and the other end is grounded or a second capacitance to which a constant voltage is applied;
A short-circuit switch for controlling a short circuit between the one end of the first electric capacitance and the one end of the second electric capacitance, wherein the one end of the first electric capacitance is connected to the one end of the first electric capacitance when the short-circuit switch is closed. A short-circuit switch for short-circuiting the one end of the second capacitance and averaging the charge accumulated in the first capacitance and the charge accumulated in the second capacitance;
A voltage corresponding to the averaged electric charge of the one end of the first electric capacitance and the second electric capacitance is amplified at a predetermined amplification factor, and the voltage of the signal line is set to be applied to the signal line. With a current buffer connected to each one,
A voltage of a higher level than a voltage of a plurality of different levels supplied by the voltage supply wiring, including a voltage of an intermediate level between a plurality of types of voltages of different levels supplied by the voltage supply wiring; And a signal line driving circuit for applying to each of the signal lines as an image signal voltage for displaying an image having the number of gradations equal to or more than the number of the voltage supply wirings. K (K + 1) / 2 ≧ 2, where n is the number of bits of the gradation data and K is the number of levels of the plurality of types of voltages having different levels. ⁿ 2. The liquid crystal display device according to claim 1, wherein the following relationship is satisfied.

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