JP3550294B2 - Semiconductor capacitor, semiconductor device having the same, and method of manufacturing the same - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a parallel plate capacitor, a semiconductor device including the same, and a method of manufacturing the same.
[0002]
[Prior art]
2. Description of the Related Art Semiconductor integrated circuit devices are becoming smaller and more highly integrated, and capacitors used therein are required to have excellent frequency characteristics and high reliability.
[0003]
Here, a conventional semiconductor capacitor will be described with reference to the drawings. In the following drawings, the same portions are denoted by the same reference numerals, and description thereof will be omitted as appropriate.
[0004]
FIG. 11 is a schematic cross-sectional view showing a first example of a semiconductor capacitor according to the related art.
[0005]
As shown in FIG. 1, a polycrystalline silicon layer 43 serving as a lower electrode is formed on an oxide film 2 for element isolation formed on a silicon substrate 1.
[0006]
Among the regions on the polycrystalline silicon layer 43, the silicon nitride film 4 as a dielectric is formed in the charge storage region 52, and its peripheral portion reaches the peripheral portion of the upper surface along the side surface of the insulating film 49. Extends to On the dielectric film 4, aluminum as a conductive material is deposited so as to cover the entire surface of the dielectric film 4, and a metal electrode 45 serving as an upper electrode is formed.
[0007]
On the other region of the polycrystalline silicon layer 43, a metal extraction electrode 6 made of aluminum is formed slightly apart from the charge storage portion, and the lower end thereof is connected to the polycrystalline silicon layer 43 serving as a lower electrode. Thus, the upper end is connected to an external circuit by being connected to a first-layer wiring (not shown).
[0008]
FIG. 12 is an explanatory diagram showing a positional relationship between the charge storage portion and the metal extraction electrode 6 in the semiconductor capacitor 100 shown in FIG.
[0009]
In the figure, a region indicated by a dotted line in a main portion of the polycrystalline silicon layer 43 serving as a lower electrode of the semiconductor capacitor 100 is a charge storage region 52 serving as a charge storage portion, and is slightly separated from the charge storage region 52. Thus, a region 7 ′ where the metal extraction electrode 7 is to be formed is shown around the polycrystalline silicon layer 43.
[0010]
The semiconductor capacitor 100 shown in FIG. 11 has a disadvantage that the frequency characteristic in a high frequency band is inferior due to the RC delay during signal propagation because the resistance value of the lower electrode is relatively large.
[0011]
If a large-capacity capacitor is required, multiple capacitors must be connected in parallel to avoid this increase in resistance.However, the number of lead-out electrodes for each capacitor increases, and therefore miniaturization is required. There was also the disadvantage of hindering.
[0012]
FIG. 13 is an explanatory diagram showing a second example of a semiconductor capacitor according to the related art, and shows a positional relationship between components of a semiconductor capacitor 120 having a plurality of charge storage units. .
[0013]
A semiconductor capacitor 120 shown in FIG. 13 has four charge storage regions 53 on a polycrystalline silicon layer 23 serving as a lower electrode, and each charge storage portion is provided two vertically in FIG. .
[0014]
Around each charge storage region 53, an electrode contact region 26, which is a region where a large number of metal extraction electrodes are to be formed, is formed, thereby reducing the distance to the center of each charge storage portion 53 and increasing the resistance value. Has been prevented.
[0015]
As described above, in the conventional technique, since the resistance value of the lower electrode is large, it is necessary to form a large number of electrode contacts in order to provide a large number of charge accumulation portions. There is a drawback that there is a limit in improving the degree of integration.
[0016]
In order to solve the above drawbacks, a semiconductor capacitor in which a refractory metal silicide film is formed on the entire surface of the lower electrode and then a dielectric film is formed has been devised.
[0017]
Examples of the high melting point metal forming the silicide film include titanium, cobalt, nickel, tungsten, platinum and the like. However, in general, many refractory metals have a fine line effect that a resistance value is increased when a narrow silicide film is formed, while cobalt does not have this fine line effect, so that forming a metal silicide film is difficult. And cobalt are often used.
[0018]
FIG. 14 is a schematic cross-sectional view of a semiconductor capacitor 110 as a third example of the related art provided with such a cobalt silicide film.
[0019]
As is clear from comparison with FIG. 11, in the semiconductor capacitor 110 shown in FIG. 14, a cobalt silicide film 60 is formed on the entire surface of the polycrystalline silicon 53 as the lower electrode.
[0020]
According to the semiconductor capacitor 110, the presence of the cobalt silicide film 60 has the advantage that the resistance of the lower electrode is greatly reduced and the high-frequency characteristics are improved.
[0021]
[Problems to be solved by the invention]
However, the above-described semiconductor capacitor 110 has the following problems.
[0022]
That is, although the cobalt silicide film has an advantage that there is no thin wire effect, it has a disadvantage that since it is weak to heat, the surface shape is deteriorated by high-temperature treatment when forming the silicide film. As a result, when a capacitor is used at a high voltage, current leakage may occur. Also, in this heat treatment step, cobalt atoms may diffuse into the nitride film which is a dielectric film, causing a circuit malfunction.
[0023]
As described above, the conventional technique has a problem that it is difficult to provide a highly reliable semiconductor capacitor.
[0024]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor capacitor having high integration and reliability, excellent in high frequency characteristics, a semiconductor device having the same, and a method of manufacturing the same. It is in.
[0025]
[Means for Solving the Problems]
The present invention aims to solve the above problems by the following means.
[0026]
That is, according to the present invention,
A silicon growth layer serving as a lower electrode formed on a silicon oxide film formed on a semiconductor substrate,
A nitride film as a dielectric film formed in a region where a charge storage portion is to be formed on the silicon growth layer;
An extraction electrode formed in another partial region on the silicon growth layer,
A refractory metal silicide film formed only on the surface of the region between the nitride film and the extraction electrode in the surface region of the silicon growth layer;
A semiconductor capacitor comprising: a conductive metal layer serving as an upper electrode formed on the nitride film;
[0027]
The refractory metal silicide film may be formed so as to extend to at least a part of a surface portion of the silicon growth layer in a peripheral region of the charge storage portion.
[0028]
Further, it is more preferable that the refractory metal silicide film is formed on the entire surface of the silicon growth layer in the peripheral region of the charge storage portion so as to go around the charge storage portion.
[0029]
According to the present invention,
A silicon growth layer serving as a lower electrode formed on a silicon oxide film formed on a semiconductor substrate,
A plurality of nitride films serving as dielectric films formed in a region serving as a charge storage portion on the silicon growth layer;
An extraction electrode formed on another region on the silicon growth layer,
A metal layer serving as an upper electrode formed on the nitride film,
There is provided a semiconductor capacitor comprising a refractory metal silicide film formed only on a surface portion of the silicon growth film except for a region around the charge storage portion.
[0030]
The silicon growth layer may be made of amorphous silicon.
[0031]
According to the present invention,
An element isolation insulating film formed on a surface around an active element formation region of the semiconductor substrate of the first conductivity type;
A first polysilicon film of a second conductivity type serving as a gate formed on a first oxide film formed on a part of the active element formation region, and a side wall formed on a side surface of the polysilicon film A first nitride film serving as a protective film and a second conductivity type impurity diffusion region serving as a source or a drain formed on a surface portion of the semiconductor substrate separated by a width of the polysilicon film; A MOS field effect transistor having a second conductivity type having a refractory metal silicide film on the surface of the region;
A second conductivity type second polysilicon film formed on a partial region of the element isolation insulating film; and a second nitride film formed at a central portion on the second polysilicon film. A resistor having a refractory metal silicide film on the surface of the electrode contact portion of the second polysilicon film;
A third polysilicon film of a second conductivity type serving as a lower electrode formed on another region of the element isolation insulating film; and a dielectric film formed at a central portion on the third polysilicon film. A semiconductor capacitor comprising: a third nitride film; a metal layer serving as an upper electrode formed on the third nitride film; and a refractory metal silicide film only on a surface of a periphery of the lower electrode. With
The first to third polysilicon films have the same thickness and the same impurity diffusion concentration;
A semiconductor device is provided in which the refractory metal silicide films are the same refractory metal silicide films.
[0032]
According to the present invention,
Forming an element isolation insulating film on the surface of the semiconductor substrate of the first conductivity type to define an active element formation region;
Forming an oxide film on the active element forming region;
Growing a polycrystalline silicon film while doping the entire surface with an impurity of the second conductivity type;
After forming the first resist pattern, the gate of the MOS field effect transistor is formed by anisotropic etching, and the resistance of the resistor and the lower electrode of the semiconductor capacitor are simultaneously formed on the element isolation insulating film. Process and
Forming a first impurity diffusion region serving as a source or a drain of a MOS field effect transistor by implanting and diffusing a second conductivity type impurity ion using the gate as a mask;
After the first resist pattern is removed, a step of forming a nitride film on the entire surface, and forming a second resist pattern, and using this as a mask, anisotropic etching is performed to form a gate protection film on the gate sidewall protection film and the resistor. Forming a nitride film and a dielectric film on the lower electrode,
Impurity ions of the second conductivity type are implanted using the second resist pattern as a mask. Forming two impurity diffusion regions simultaneously;
Forming a refractory metal silicide film simultaneously on each surface of the second impurity diffusion region by heat treatment after sputtering the refractory metal, thereby providing a method of manufacturing a semiconductor device.
[0033]
The refractory metal is desirably cobalt.
[0034]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, some embodiments of the present invention will be described with reference to the drawings.
[0035]
FIG. 1 is a schematic sectional view showing a first embodiment of a semiconductor capacitor according to the present invention. The feature of the present embodiment lies in the shape of the metal silicide 10 as shown in the figure, which is formed in a region other than the charge accumulation region in the surface portion of the lower electrode.
[0036]
As shown in FIG. 1, a polycrystalline silicon layer 3 doped with phosphorus is formed on an element isolation silicon oxide film 2 formed on a semiconductor substrate 1. It is the lower electrode.
[0037]
On the polycrystalline silicon layer 3, a charge storage portion and an extraction electrode are formed at substantially the same position and shape as the semiconductor device according to the conventional technique shown in FIGS.
[0038]
That is, a silicon nitride film 4 as a dielectric film is formed with a thickness of 0.05 μm on the charge storage region 52 of the polycrystalline silicon layer 3, and its peripheral portion is formed around the silicon nitride film 4. It extends along the side surface of the silicon oxide film 9 serving as the insulating film until it reaches the periphery of the upper surface of the silicon oxide film 9. Further, an aluminum metal layer 5 is deposited on the silicon nitride film 4 so as to cover the entire surface of the silicon nitride film 4, and serves as an upper electrode of the capacitor.
[0039]
Further, an aluminum extraction electrode 6 is formed on the periphery of the polycrystalline silicon film 3 slightly separated from the charge storage portion, and the lower end thereof is connected to the polycrystalline silicon layer 3 serving as a lower electrode, thereby storing the charge. And an upper end thereof is connected to an external circuit by being connected to a first-layer wiring (not shown).
[0040]
The cobalt silicide film 10 characteristic of the present invention is formed on the entire surface of the polycrystalline silicon layer 3 except for the peripheral portion 3 and the region of the charge storage portion 52.
[0041]
FIG. 2 is an explanatory diagram showing a positional relationship between the charge storage portion and the cobalt silicide film 10 of the semiconductor device 20 shown in FIG.
[0042]
As shown in the figure, a cobalt silicide film 10 is formed on the entire surface of the polycrystalline silicon layer 3 except for the peripheral portion of the polycrystalline silicon layer 3 and the charge storage region 52. In the figure, a region slightly separated from the charge storage region 52 and indicated by a dotted line is a region 7 ′ where the aluminum extraction electrode 6 is to be formed.
[0043]
As shown in FIGS. 1 and 2, in the semiconductor capacitor 20 according to the present embodiment, the cobalt silicide film 10 is formed on the surface of the lower electrode except for the charge storage region 52, and the surface of the charge storage region 52 is formed. Is not formed. For this reason, a current flows through the cobalt silicide film 10 having a low resistance value to the lower electrode of the charge storage region, so that the value of RC at the time of signal propagation becomes small, so that excellent high frequency characteristics can be obtained. .
[0044]
On the other hand, since the cobalt silicide film is not formed on the surface of the charge storage region 52 of the surface of the lower electrode 3, the contact surface between the silicon nitride film 4 and the lower electrode has good adhesion. In addition, there is no fear that cobalt atoms diffuse into the silicon nitride film 4. Thereby, the reliability of the semiconductor capacitor is maintained.
[0045]
Next, a second embodiment of the present invention will be described with reference to the drawings.
[0046]
This embodiment is an embodiment in which the present invention is applied to a semiconductor capacitor having a plurality of charge storage units.
[0047]
FIG. 3 is a schematic sectional view showing a second embodiment of the semiconductor capacitor according to the present invention.
[0048]
The feature of the semiconductor capacitor 40 according to the present embodiment is that the semiconductor capacitor 40 includes a plurality of charge storage units connected in parallel and a single extraction electrode connecting the lower electrode to the first layer wiring.
[0049]
As shown in FIG. 3, a polycrystalline silicon layer 23 doped with phosphorus is formed on a silicon oxide film 2 formed on a semiconductor substrate 1 to form a lower electrode.
[0050]
A silicon nitride film 14, which is a dielectric film, is formed on the charge storage regions 33a, 33b of the polycrystalline silicon layer 23, and a peripheral portion of the silicon nitride film 14 is formed of the silicon oxide film 9 formed on the polycrystalline silicon layer 23. It extends along the side surface until reaching the upper surface thereof, and is formed by bonding on the upper surface of the silicon oxide film 9 in a region between the charge storage regions 33a and 33b.
[0051]
An aluminum metal layer 15 is deposited on the silicon nitride film 14 so as to cover the entire silicon nitride film 14, and serves as an upper electrode of the capacitor 40.
[0052]
Further, an aluminum extraction electrode 26 is formed on the periphery of the polycrystalline silicon film slightly separated from the charge storage portion, and the lower end thereof is connected to the charge storage portion by being connected to the polycrystalline silicon layer 23, The upper end is connected to an external circuit by being connected to a first-layer wiring (not shown).
[0053]
Further, in the region of the lower electrode 23, a cobalt silicide film 30 is formed between the charge storage regions 33a and 33b and on the surface of the peripheral region, thereby reducing the resistance value of the lower electrode. ing.
[0054]
FIG. 4 is an explanatory diagram showing the relationship between the lower electrode and the charge storage unit of the semiconductor device 40 shown in FIG.
[0055]
As shown in FIG. 4, the semiconductor capacitor 40 of the present embodiment has four charge storage regions 33a to 33d arranged in a lattice, and thereby the charge storage units are connected in parallel.
[0056]
A cobalt silicide film 30 is formed between the charge accumulation regions 33a to 33d and on the surface of the lower electrode 23 in the peripheral region.
[0057]
A single aluminum extraction electrode 26 is formed near the left end of the paper at the boundary between the charge accumulation regions 33a and 33c.
[0058]
As described above, in the semiconductor capacitor 40 according to the present embodiment, the plurality of charge storage units are disposed so as to be connected in parallel. By forming the film 30, the overall charge storage capacity of the capacitor is increased, and the distance from the region where the cobalt silicide film 30 is formed to the center of each charge storage portion is shortened.
[0059]
Thus, even in a large-capacity capacitor having a large area, a semiconductor capacitor having excellent high-frequency characteristics is provided because the resistance value is low and the RC value is small.
[0060]
On the other hand, as shown in FIG. 3 and FIG. 4, since the cobalt silicide film is not formed on the surface portions of the charge accumulation regions 33a to 33d among the surface portions of the lower electrode, the silicon nitride film 14 and the lower electrode The adhesion on the contact surface with the silicon nitride film 23 is good, and there is no danger of cobalt atoms diffusing into the silicon nitride film 14. Thereby, a highly reliable semiconductor capacitor is provided.
[0061]
Further, as is apparent from comparison with FIG. 13 showing the semiconductor capacitor 120 according to the related art, in the semiconductor capacitor 40 of the present embodiment, since the resistance value is low, one aluminum extraction electrode can be used. Thus, the area of the entire capacitor can be reduced, and a highly integrated semiconductor capacitor can be provided.
[0062]
Next, a semiconductor device provided with a semiconductor capacitor having the above effects will be described as one embodiment of a semiconductor device according to the present invention.
[0063]
FIG. 10 is a schematic cross-sectional view of the semiconductor device 80 according to the present embodiment.
[0064]
The semiconductor device 80 shown in the figure includes an n-channel MOS field-effect transistor (hereinafter simply referred to as a MOS transistor) 50 having an LDD (Lightly Doped Drain) structure on the same p-type silicon substrate, a resistor 60, The semiconductor capacitor 70 is provided.
[0065]
The MOS transistor 50 has a gate formed of a polysilicon film 24 formed on an oxide film 25 formed on a p-type silicon semiconductor substrate 1 and doped with phosphorus, which is an n-type impurity, and a width separation gap of the gate. The n + impurity diffusion layers 37 and 38 formed on the surface of the semiconductor substrate 1 and the n + impurity ion-implanted at a high concentration using the sidewall protective film 27 formed on the sidewall of the gate as a mask. A source or a drain composed of diffusion layers 13 and 14;
[0066]
A cobalt silicide film 10 is formed on each surface of the polysilicon film 24 and the impurity diffusion regions 37 and 38. Source, drain and gate electrodes are provided in a silicon oxide film 56 which is an interlayer insulating film. It is connected to the first layer wiring on the silicon oxide film 56 via the metal extraction electrodes 41 and 42.
[0067]
A field oxide film 2 is formed on the surface of the semiconductor substrate 1 around the MOS transistor 50, thereby isolating the MOS transistor 50.
[0068]
Resistor 60 and semiconductor capacitor 70 are formed on field oxide film 2.
[0069]
Resistor 60 includes a resistor 22 formed on field oxide film 2 and doped with the same impurity as polysilicon film 24 at the same concentration, and a silicon nitride film 17 formed in a central region on resistor 22. It has.
[0070]
A cobalt silicide film 10 is formed on the surface of the electrode contact portion of the resistor 22, and is connected to the first layer wiring on the silicon oxide film 56 via a metal lead electrode 43 formed thereon. .
[0071]
The semiconductor capacitor 70 includes a polysilicon film 23 formed on the field oxide film 2 and serving as a lower electrode doped with the same impurity as the polysilicon film 24 at the same concentration, and a central portion of the polysilicon film 23. And a metal electrode 15 serving as an upper electrode formed on the silicon nitride film 16 as a dielectric film.
[0072]
A cobalt silicide film 10 is formed on the surface of the peripheral portion of the polysilicon film 23, and is connected to the first layer wiring on the silicon oxide film 56 via the lead electrode 43 formed thereon. .
[0073]
Since the semiconductor device 80 of the present embodiment includes the semiconductor capacitor 70 according to the present invention, a semiconductor device having a capacitor with excellent high-frequency characteristics and high reliability is provided.
[0074]
In addition, since the cobalt silicide film 10 is formed in each electrode contact region also for the MOS transistor 50 and the resistor 60, a semiconductor device that realizes ohmic contact in the electrode contact portion is provided.
[0075]
Next, an embodiment of a method of manufacturing a semiconductor capacitor according to the present invention will be described with reference to FIGS.
[0076]
This embodiment is characterized in that a MOS transistor, a resistor, and a semiconductor capacitor having the above-described effects are simultaneously formed in a small number of steps.
[0077]
First, as shown in FIG. 5, a silicon oxide film having a thickness of about 700 nm is selectively formed on the surface of a P-type silicon substrate 1 to form an element isolation oxide film 2 and define a MOS transistor formation region. Thereafter, a silicon oxide film 25 having a thickness of about 8 nm is formed in the MOS transistor formation region.
[0078]
Next, as shown in FIG. ²⁰ cm ^-3 About 200 nm of polycrystalline silicon containing high-concentration phosphorus is selectively deposited by patterning using a resist, and a polycrystalline silicon film 24 serving as a gate of a MOS transistor, a resistor 22, and a lower electrode of a capacitor are formed. And a polycrystalline silicon film 23 to be formed.
[0079]
Next, using the polycrystalline silicon film 24 as a mask, phosphorus is dosed to 6.0 × 10 ^Thirteen cm ^-2 Ion implantation at an acceleration energy of 60 keV and a low concentration of n through a heat treatment. ⁻ The impurity diffusion regions 37 and 38 are formed.
[0080]
Next, as shown in FIG. 7, after a silicon nitride film 46 is deposited on the entire surface of the silicon substrate 1 to a thickness of about 100 nm, resist patterns 47 and 48 are formed on regions where resistors and capacitors are to be formed.
[0081]
Next, as shown in FIG. 8, using the resist patterns 47 and 48 as masks, anisotropic etching is performed by RIE (Reactive Ion Etching) to form a sidewall protection film 27 of the polysilicon film 24 and a nitride film 17 on the resistor. And a dielectric film 16 of the capacitor are simultaneously formed.
[0082]
Then, phosphorus is accelerated at an energy of 30 keV and a dose of 5 × 10 5 while the resist patterns 47 and 48 are left. ^Fifteen cm ^-2 And heat treatment is performed, and n becomes the source or drain of the MOS transistor. ⁺ At the same time as forming the impurity diffusion regions 37 and 38, the impurity diffusion regions are formed in the electrode contact regions of the resistor and the lower electrode of the capacitor.
[0083]
Next, as shown in FIG. 9, after removing the resist patterns 47 and 48, cobalt is deposited on the entire surface of the silicon substrate 1 by sputtering until the thickness becomes about 20 nm, and a high temperature of about 600 ° C. and about 80 seconds is applied. By performing annealing for a short time, only cobalt in contact with the polycrystalline silicon is reacted with silicon, and a cobalt silicide film 10 is formed. Unreacted cobalt is selectively etched and removed by a mixed solution of sulfuric acid and hydrogen peroxide solution.
[0084]
Thereafter, as shown in FIG. 10, a silicon oxide film 56 is deposited to a thickness of about 800 nm, and contact holes 31, 32, and 39 are formed by anisotropic etching. Thereafter, aluminum is deposited in the contact holes 31, 32, and 39 by sputtering, and lead electrodes 41 to 43 of each element are formed. Then, a wiring layer is formed on the silicon oxide film 56 to complete the semiconductor device 80. Let it.
[0085]
As described above, according to the method for manufacturing a semiconductor device according to the present embodiment, a semiconductor device including a MOS transistor, a resistor, and the semiconductor capacitor according to the present invention can be manufactured with a small number of steps.
[0086]
When a metal silicide film is formed in each of the above-described devices, an insulating film is formed to cover these regions so that the side wall of the MOS transistor, the element region of the resistor, and the charge storage portion of the capacitor are not formed into silicide films. There is a need to. According to this embodiment, since these insulating film covers are formed only by the single silicon nitride film 46, the manufacturing process can be greatly simplified.
[0087]
In the present embodiment, a method of manufacturing a semiconductor device including a MOS transistor having an LDD structure has been described. However, in the case of a MOS transistor having no LDD structure, a gate side wall protective film is formed thin, and the side wall protective film is formed. If heat treatment is performed by implanting boron ions using the film as a mask, the impurity diffusion regions of the source / drain and the impurity diffusion regions of the electrode contact regions of the resistor and the capacitor are simultaneously formed by a single ion implantation process. And the number of steps can be further reduced.
[0088]
As described above, the embodiments of the present invention have been described. However, the present invention is not limited to the above-described embodiments, and can be variously modified and applied without departing from the gist thereof. In addition, materials, shapes, and the like can be appropriately changed according to specifications. For example, in the above-described embodiment, the cobalt silicide film is used as the metal silicide film. However, as long as the metal is a high melting point metal, it is not limited to cobalt, but may be titanium, nickel, tungsten, or platinum. Also, the lower electrode of the semiconductor capacitor is not limited to polycrystalline silicon, but may be amorphous silicon.
[0089]
【The invention's effect】
As described above in detail, the present invention has the following effects.
[0090]
That is, according to the present invention, since the refractory metal silicide film is formed on the surface of the silicon growth film except for the charge storage portion, the resistance of the lower electrode can be reduced. Thereby, a semiconductor capacitor having excellent high-frequency characteristics is provided.
[0091]
In addition, since the metal silicide film is not formed on the surface portion of the charge accumulation portion in the surface portion of the silicon growth film, the adhesion at the contact surface between the silicon nitride film and the lower electrode is good, and When a cobalt silicide film is used, there is no danger that cobalt atoms diffuse into the silicon nitride film 4. Thereby, a highly reliable semiconductor capacitor can be provided.
[0092]
Further, according to the present invention, in a large-capacity capacitor having a large area, the cobalt silicide film is formed between the plurality of charge storage units connected in parallel and on the surface of the lower electrode in a region around the charge storage units. Since the resistance value is low and the value of RC at the time of signal propagation is small, a semiconductor capacitor having excellent high frequency characteristics can be provided.
[0093]
Further, since the resistance value is low, the number of aluminum extraction electrodes can be reduced to one, so that the area of the entire capacitor can be reduced, and a highly integrated semiconductor capacitor can be provided.
[0094]
Further, according to the present invention, a MOS transistor, a resistor, and a semiconductor capacitor having the above-described effects are provided, and each electrode of each element is interposed via a high melting point metal silicide film formed in each electrode contact region. Therefore, it is possible to provide a semiconductor device in which ohmic contact is realized in the electrode contact portion of each element.
[0095]
Further, according to the present invention, the gate of the MOS transistor, the resistance of the resistor, and the lower electrode of the capacitor are simultaneously formed, and the side wall protective film, the nitride film on the resistor, and the dielectric film of the capacitor are used as masks. Since the ion implantation and the formation of the metal silicide film can be performed in a self-aligned manner, it is possible to provide a method of manufacturing a semiconductor device that can easily manufacture a semiconductor device having a semiconductor capacitor having the above-described effects with a small number of steps. .
[0096]
In addition, since each electrode of each element is connected to each extraction electrode via the refractory metal silicide film formed in each electrode contact region, an ohmic contact is realized at the electrode contact portion of each element. A manufacturing method can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view showing a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is an explanatory diagram showing a positional relationship between a charge storage portion and a cobalt silicide film of the semiconductor device shown in FIG.
FIG. 3 is a schematic sectional view showing a semiconductor device according to a second embodiment of the present invention.
FIG. 4 is an explanatory diagram illustrating a relationship between a lower electrode and a charge storage unit of the semiconductor device illustrated in FIG. 3;
FIG. 5 is a schematic sectional view for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention.
FIG. 6 is a schematic sectional view for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention.
FIG. 7 is a schematic cross-sectional view for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention.
FIG. 8 is a schematic sectional view for explaining an embodiment of a method of manufacturing a semiconductor device according to the present invention.
FIG. 9 is a schematic sectional view for explaining an embodiment of a method of manufacturing a semiconductor device according to the present invention.
FIG. 10 is a schematic sectional view of a third embodiment of the semiconductor device according to the present invention.
FIG. 11 is a schematic plan view showing a first example of a semiconductor capacitor according to the related art.
FIG. 12 is an explanatory diagram showing a positional relationship between a charge storage portion and a metal extraction electrode in the semiconductor capacitor shown in FIG.
FIG. 13 is an explanatory diagram showing a second example of a semiconductor capacitor according to the related art.
FIG. 14 is a cross-sectional view illustrating a third example of a semiconductor capacitor according to the related art.
[Explanation of symbols]
1 Silicon semiconductor substrate
2 Field oxide film
3,23,43,53 Polycrystalline silicon layer to be lower electrode
4,16 Silicon nitride film as dielectric film
5,15 Aluminum metal layer to be upper electrode
6,26,41-43 Metal extraction electrode
7, 31, 32, 39 Contact hole
9 Silicon oxide film
10,30,60 Cobalt silicide film
13, 14, 37, 38 Impurity diffusion region
16,17,46 Silicon nitride film
20, 40, 70 Semiconductor capacitor according to the present invention
22 Resistance
25 oxide film
27 Sidewall protective film
33, 52, 53 charge storage region
47,48 resist pattern
49 Insulating film
50 MOS transistor
60 resistor
80 Semiconductor Device According to Present Invention

Claims (9)

A silicon growth layer serving as a lower electrode formed on a silicon oxide film formed on a semiconductor substrate,
A nitride film as a dielectric film formed in a region where a charge storage portion is to be formed on the silicon growth layer;
An extraction electrode formed in another partial region on the silicon growth layer,
A refractory metal silicide film formed only on the surface of the region between the nitride film and the extraction electrode in the surface region of the silicon growth layer;
And a conductive metal layer serving as an upper electrode formed on the nitride film. 2. The semiconductor capacitor according to claim 1, wherein the refractory metal silicide film is formed to extend over at least a part of a surface portion of the silicon growth layer in a peripheral region of the charge storage unit. 3. 2. The refractory metal silicide film is formed on the entire surface of the silicon growth layer in a peripheral region of the charge storage portion so as to go around the charge storage portion. Or the semiconductor capacitor according to 2. A silicon growth layer serving as a lower electrode formed on a silicon oxide film formed on a semiconductor substrate,
A plurality of nitride films serving as dielectric films formed in a region serving as a charge storage portion on the silicon growth layer;
An extraction electrode formed on another region on the silicon growth layer,
A metal layer serving as an upper electrode formed on the nitride film,
A semiconductor capacitor, comprising: a refractory metal silicide film formed only on a surface portion of the silicon growth film, excluding a region around the charge storage portion. The semiconductor capacitor according to claim 1, wherein the refractory metal is cobalt. 6. The semiconductor capacitor according to claim 1, wherein said silicon growth layer is made of amorphous silicon. An element isolation insulating film formed on a surface around an active element formation region of the semiconductor substrate of the first conductivity type;
A first polysilicon film of a second conductivity type serving as a gate formed on a first oxide film formed on a part of the active element formation region, and a side wall formed on a side surface of the polysilicon film A first nitride film serving as a protective film and a second conductivity type impurity diffusion region serving as a source or a drain formed on a surface portion of the semiconductor substrate separated by a width of the polysilicon film; A MOS field effect transistor having a second conductivity type having a refractory metal silicide film on the surface of the region;
A second conductivity type second polysilicon film formed on a partial region of the element isolation insulating film; and a second nitride film formed at a central portion on the second polysilicon film. A resistor having a refractory metal silicide film on the surface of the electrode contact portion of the second polysilicon film;
A third polysilicon film of a second conductivity type serving as a lower electrode formed on another region of the element isolation insulating film; and a dielectric film formed at a central portion on the third polysilicon film. A semiconductor capacitor comprising: a third nitride film; a metal layer serving as an upper electrode formed on the third nitride film; and a refractory metal silicide film only on a surface of a periphery of the lower electrode. With
The first to third polysilicon films have the same thickness and the same impurity diffusion concentration;
The semiconductor device, wherein the refractory metal silicide films are the same refractory metal silicide films. Forming an element isolation insulating film on the surface of the semiconductor substrate of the first conductivity type to define an active element formation region;
Forming an oxide film on the active element forming region;
Growing a polycrystalline silicon film while doping the entire surface with an impurity of the second conductivity type;
After forming the first resist pattern, the gate of the MOS field effect transistor is formed by anisotropic etching, and the resistance of the resistor and the lower electrode of the semiconductor capacitor are simultaneously formed on the element isolation insulating film. Process and
Forming a first impurity diffusion region serving as a source or a drain of a MOS field effect transistor by implanting and diffusing a second conductivity type impurity ion using the gate as a mask ;
After the first resist pattern is removed, a step of forming a nitride film on the entire surface, and forming a second resist pattern, and using this as a mask, anisotropic etching is performed to form a gate protection film on the gate sidewall protection film and the resistor. Forming a nitride film and a dielectric film on the lower electrode,
Impurity ions of the second conductivity type are implanted using the second resist pattern as a mask. Forming two impurity diffusion regions simultaneously;
Forming a refractory metal silicide film simultaneously on each surface of the second impurity diffusion region by heat treatment after sputtering the refractory metal. 9. The method according to claim 8, wherein the refractory metal is cobalt.

Images