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JP3629149B2 - Multilayer wiring board - Google Patents
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JP3629149B2 - Multilayer wiring board - Google Patents

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Publication number
JP3629149B2
JP3629149B2 JP21628098A JP21628098A JP3629149B2 JP 3629149 B2 JP3629149 B2 JP 3629149B2 JP 21628098 A JP21628098 A JP 21628098A JP 21628098 A JP21628098 A JP 21628098A JP 3629149 B2 JP3629149 B2 JP 3629149B2
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Japan
Prior art keywords
conductor
hole
lid
resin layer
wiring board
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Expired - Fee Related
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JP21628098A
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JP2000049458A (en
Inventor
照久 林
光二 西浦
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は、コア基板を含む複数の絶縁層と、その間に形成した複数の導体層、及びこれらを基板の厚さ方向で導通するビア導体とを有し、表面に半導体素子等の電子部品を搭載する多層配線基板に関する。
【0002】
【従来の技術】
一般に、樹脂製の多層配線基板50は、図4(A)に示すように、図示で上下方向(厚さ方向)の中央に、絶縁性のコア基板52を有し、このコア基板52の両面に複数の導体層60,62と樹脂層64,66が略対称に形成される。
上記導体層60,62間を導通するため、上記コア基板52に穿設したスルーホール54内には、円筒形のスルーホール導体56が形成されると共に、その中空部57内には熱硬化性樹脂59が充填される。
【0003】
また、スルーホール導体56の上下端から水平に延びる各水平片58の上には、メッキによる円形の蓋導体70が形成されると共に、一対の蓋導体70は中空部57内の熱硬化性樹脂59を密封する。
上記蓋導体70の中央部には、略円錐形のビア導体74の底部76が接続され、このビア導体74は、蓋導体70及びスルーホール導体56を介して、コア基板52を挟んだ反対側のビア導体74と接続される。尚、ビア導体74は例えばその水平片78を介して樹脂層64,66上の図示しない導体層と接続される。
【0004】
【発明が解決すべき課題】
しかしながら、図4(B)に示すように、前記中空部57内に充填した熱硬化性樹脂59を熱硬化させると、これに応じて熱硬化性樹脂59が硬化収縮して、その中央部に凹み71が形成されることがある。上記蓋導体70を水平片58及び熱硬化性樹脂59の上に銅メッキにより形成すると、蓋導体70にも凹み71に倣ってそのメッキ表面に凹み72が形成されてしまう。すると、前記樹脂層64の形成に先立って予め塗布される段差補正用で非感光性の樹脂層68の一部が、上記凹み72内に残留することがある。
その結果、蓋導体70とビア導体74との接続不良を生じて、両者間の導通が不安定になるという問題があった。
【0005】
係る問題点を防ぐため、図4(C)に示すように、コア基板82のスルーホール84内にスルーホール導体86を形成し、その上端からコア基板82の表面上に延在させた接続パッド88を形成した配線基板80が用いられる。この場合、ビア導体87はスルーホール84上ではなく、パッド88上に形成される。しかし、上記接続パッド88を形成すると、このパッド88がコア基板82の表面上に形成される導体層のスペースを狭めるため、高密度のファインピッチ化が図れないという問題があった。
本発明は、以上に説明した従来の技術における問題点を解決し、スルーホール導体とビア導体との導通、又はビア導体同士間の導通が確実に取れると共に、導体層の高密度化にも支障のない多層配線基板を提供することを課題とする。
【0006】
【課題を解決するための手段】
本発明は、上記の課題を解決するため、凹みを有する蓋導体の中央付近を避けてスルーホール導体とビア導体とを接続することに着目して成されたものである。
即ち、本発明の多層配線基板は、絶縁性のコア基板に穿設したスルーホール内に形成したスルーホール導体と、このスルーホール導体の中空部に充填した充填材と、この充填材及びスルーホール導体の上端に形成した蓋導体と、この蓋導体と同一平面をなすようにコア基板の上に形成した下部樹脂層と、上記蓋導体及び下部樹脂層の上に形成した上部樹脂層と、上記スルーホール又はスルーホール導体の円周上に位置し且つ上記蓋導体に底部が接続するように、上部樹脂層のビアホール内に形成したビア導体とを含む、ことを特徴とする。
また、本発明の多層配線基板は、絶縁性のコア基板に穿設したスルーホール内に形成したスルーホール導体と、このスルーホール導体の中空部に充填した充填材と、上記充填材及びスルーホール導体の上端に形成した円形の蓋導体と、この蓋導体と同一平面をなすようにコア基板の上に形成した下部樹脂層と、上記蓋導体及び下部樹脂層の上に形成した上部樹脂層と、上記蓋導体の中央部を避けて且つこの蓋導体の平坦部に底部が接続するように、上部樹脂層のビアホール内に形成したビア導体を含む、ことも特徴とする。
【0007】
れらの配線基板によれば、蓋導体の中央付近に前記凹みが形成されても、蓋導体とビア導体との接続が確実に行え、複数の導体層間の導通を安定して取ることができると共に、コア基板表面の導体層の高密度化にも支障を来すことがない。
尚、コア基板には後述するBT樹脂−ガラス繊維の複合材の他、公知の絶縁基板、或いは金属板の表面を絶縁材でコーティングしたものを用いることもできる。また、下部樹脂層は蓋導体と導体層の間に充填され、これらとコア基板との段差を解消する非感光性の樹脂が用いられる。更に、上部樹脂層にはビアホールを形成するため感光性の樹脂が用いられる。
【0008】
一方、本発明の別の多層配線基板は、第1の樹脂層に穿設したビアホール内に形成した第1のビア導体と、この第1のビア導体内の凹部に充填した充填材と、この充填材及び上記第1のビア導体の上端に形成した蓋導体と、この蓋導体と同一平面をなすように上記第1の樹脂層の上に形成した下部層と、その上に形成した上部層とからなる第2の樹脂絶縁層と、上記第1のビア導体における上端の円周上に位置し且つ上記蓋導体に底部が接続するように、上記第2の樹脂層の上部層のビアホール内に形成した第2のビア導体とを含む、ことを特徴とする。
この配線基板によれば、蓋導体の中央部に前記凹みが形成されても、この蓋導体を介して上下の各ビア導体同士の接続が確実に行え、複数の導体層間の導通を安定して取ることができ、各導体層の高密度化にも支障を来すことがない。
【0009】
更に、前記充填材が、導電性物質およびメッキ触媒成分の一方または双方を含んでいる、多層配線基板も提案する。これによれば、銅ペースト等の導電性物質、又はメッキ用の触媒核、或いはこれらの両者を含む充填材を用いることにより、その上端にメッキ等で形成される蓋導体を容易且つ薄く形成し得る。上記メッキ触媒成分には、銅メッキの付着と成長を促すPd等のメッキ用触媒核が含まれる。尚、セラミック粉を含むペースト等の非導電性物質を充填材とした場合には、その収縮を低減して蓋導体に形成される凹みを浅く且つ小さなものとし、ビア導体を接続すべき蓋導体における範囲を拡大することが可能となる。
【0010】
【発明の実施の形態】
以下において本発明の実施に好適な形態を図面と共に説明する。
図1(A)は本発明の多層配線基板1における要部の断面を示す。この配線基板1は、上下(厚さ)方向の中央のコア基板2と、その両面に形成された導体層15,15′と、下部樹脂層16,16′、及び上部樹脂層18,18′とを有する。
コア基板2は、BT(ビスマレイミド・トリジアン)樹脂とガラス繊維布との複合材からなり、スルーホール4が多数穿設されている。スルーホール4内には、銅メッキにより略円筒形のスルーホール導体6が形成されると共に、その中空部7内には熱硬化性樹脂(充填材)9がマスク印刷により充填されている。また、スルーホール導体6の上下端には、コア基板2の表面上にリング形に延びた水平片8,8′が一体に形成される。
【0011】
更に、スルーホール導体6の各水平片8,8′及び熱硬化性樹脂9の上には、円形の蓋導体10,10′が形成され、スルーホール導体6と接続される。各水平片8,8′及び蓋導体10,10′と導体層15との間隙には、これらと同じ厚さで同一平面を形成するよう非感光性樹脂からなる下部樹脂層16,16′が配設されている。また、それらの上の略全面を被覆するように感光性樹脂からなる上部樹脂層18,18′が形成される。この樹脂層18,18′には、スルーホール4上のうち、スルーホール導体6の略円周(円筒体)上の位置に、略円錐形状のビア導体20,20′がそれぞれ形成され、蓋導体10,10′と接続される。
【0012】
図1(B)に拡大して示すように、スルーホール導体6の中空部7内に未硬化(ワニス)状態で充填された熱硬化性樹脂9は、熱硬化した際にその上下端部が若干収縮し、熱硬化性樹脂9の上端には凹み11が形成される。水平片8及び熱硬化性樹脂9上の蓋導体10の中央付近には、上記凹み11に倣った凹み12が形成される。しかし、図示のように、ビア導体20は、その底部22の中心が上記凹み12が形成されたスルーホール4の中央から離れたスルーホール導体6の略円周上付近に位置する平坦部14上に形成される。この結果、スルーホール導体6とビア導体20とは、蓋導体10の平坦部14を介して接続され、互いに導通する。
【0013】
従って、この多層配線基板1によれば、蓋導体10中央の凹み12内に非感光性の下部樹脂層16の一部が残留している場合でも、上記の導通は確保され、コア基板2の表面上の導体層15と図示しない上方の導体層との導通も確保される。更には、ビア導体20と上部樹脂層18の上に形成される図示しないソルダーレジスト層の表面に搭載される電子部品との導通を確実に取ることができる。しかも、導体層15(15′)の高密度化にも何ら支障にならず、多層配線基板1を緻密で信頼性の高いものにすることができる。
【0014】
図2は、多層配線基板1の製造方法に関し、図2(A)はコア基板2のスルーホール4内にスルーホール導体6を形成し、且つその中空部7内に熱硬化性樹脂9を充填すると共に、上記導体6の水平片8に蓋導体10を接続した状態を示す。
コア基板2は、予めその両面全体に銅箔が被覆され、これを貫通する孔をドリルにより穿設してスルーホール4を形成し、その内部に無電解銅メッキ及び電解銅メッキを施し、スルーホール導体6を形成する。次に、コア基板2の銅箔の表面全体に図示しない感光性樹脂を被覆した後、所定パターンに倣った露光と現像を施される。この結果、コア基板の両面に上記水平片8(8′)と導体層15(15′)が形成される。
【0015】
上記スルーホール導体6の中空部7に熱硬化性の樹脂素材を充填し、熱硬化させて熱硬化性樹脂9を形成した後、各水平片8(8′)及び熱硬化性樹脂9の上下端面と導体層15(15′)の上に更に銅メッキを施す。すると、水平片8(8′)及び熱硬化性樹脂9の上には、円形の蓋導体10(10′)が形成され、且つ導体層15(15′)はこのメッキ分の厚みを増す。尚、熱硬化性樹脂9の中央部には上記熱硬化時に凹み11が形成されているため、これに倣って図示のように、蓋導体10の中央部に凹み12が形成される。
【0016】
次に、図2(B)に示すように、前記導体層15と蓋導体10を覆うように、コア基板2の表面に例えばエポキシ系で非感光性の樹脂16aが塗布される。
更に、図示しない弾性を有する円筒形状の研磨ロールを上記樹脂16aの表面に沿って図示で水平方向に移動させる。その結果、図2(C)に示すように、上方の過剰な樹脂16aは除去され、蓋導体10及び前記導体層15と略同じ厚さで同一平面をなすように下部樹脂層16が形成される。この際、蓋導体10の中央部の凹み12内には、上記樹脂16aの一部が残留する。
【0017】
次いで、下部樹脂層16の上に例えばエポキシ系で且つ感光性を有する上部樹脂層18が形成されると共に、所定パターンに倣った露光と現像を施される。その結果、図2(D)に示すように、前記スルーホール導体6の略円周上における上部樹脂層18に略円錐状のビアホール19が穿設される。
次に、このビアホール19の内部を含む上部樹脂層18の表面全体に無電解銅メッキ及び電解銅メッキにより銅皮膜を被覆した後、図示しない感光性樹脂フィルムを貼付け、所定パターンに倣った露光と現像及びエッチングを施すと、図2(E)に示すように、ビアホール19内にビア導体20が形成される。このビア導体20は、その底部22が上記凹み12から離れた蓋導体10の平坦部14上に接続され、これを介してスルーホール導体6の水平片8と導通する。
【0018】
尚、ビア導体20の水平片24はニッケル及び金メッキを施すことにより、電子部品接続用のランドとして用いることもできる。また、本形態では、ビア導体20は1層のみ形成されているが、2層以上の各樹脂層内にそれぞれ形成可能であることは言うまでもない。更に、充填材9を銅ペースト等の導電性物質で形成したり、パラジウム等のメッキ用触媒核を含んでいる場合には、蓋導体10が前記銅メッキで容易に形成できる。また、蓋導体10をスパッタリング(真空蒸着)による厚さ10μm以下の金属蒸着薄膜によって形成することも可能である。
【0019】
図3は本発明における異なる形態の多層配線基板40の要部を示す断面図である。尚、前記の形態と共通する部分や要素には同じ符号を用いるものとする。
この配線基板40は、前記と同じコア基板2に複数のスルーホール4と、その内部のスルーホール導体6と熱硬化性樹脂(充填材)9、及びその上下端に蓋導体10,10′を有し、コア基板2の両面には導体層15,15′を形成する。蓋導体10,10′及び導体層15,15′の上には、前記下部樹脂層16,16′及び上部樹脂層18,18′からなる第1の樹脂層17,17′がそれぞれ形成されると共に、上部樹脂層18,18′のビアホール19,19′内には第1のビア導体20,20′が形成されている。
【0020】
このビア導体20,20′の凹部26,26′内にも、前記同様の充填材28,28′が充填されると共に、ビア導体20,20′の各水平片24,24′の上には充填材28,28′を覆う円形の蓋導体30,30′が形成される。また、上部樹脂層18,18′の上には、ビア導体20,20′の各水平片24,24′、蓋導体30,30′、及び導体層33,33′が形成される。更に、蓋導体30,30′と導体層33,33′との間には、これらと同一平面を形成するように第2の樹脂層34,34′の下部層35,35′が配設される。
そして、各蓋導体30,30′周縁の平坦部上で且つ各ビア導体20,20′の上端の円周上に第2のビア導体38,38′が形成され、その周囲には導体層33,33′等を覆う第2の樹脂層34の上部層36,36′が形成される。
【0021】
ビア導体20,20′の各凹部26,26′内に充填された充填材28,28′が収縮し、各蓋導体30,30′の中央部が前記と同様に凹むことがある。その場合でも、その上に接続されるビア導体38,38′は、その底部39,39′の中心が係る凹みを外れた蓋導体30,30′の周縁の平坦部上に形成されるので、ビア導体20,38及びビア導体20′,38′同士間の導通を確実に取ることができる。しかも、配線基板40は、ビア導体20,20′同士が蓋導体10,10′及びスルーホール導体6を介して導通しているので、コア基板2を挟んで両面に形成された各導体層15,15′,33,33′間を確実に接続した信頼性を有する立体回路が形成される。
尚、第2の樹脂層34,34′上に別の導体層42,42′を形成したり、その上に形成するソルダーレジスト層46の表面に突出するハンダバンプ44を形成したり、或いはソルダーレジスト層46′の間に露出する端子48を形成して、搭載する電子部品等と導通できることも明らかである。
【0022】
本発明は、以上において説明した各形態に限定されるものではない。
例えば、コア基板には銅箔が被覆されていないBT樹脂−ガラス繊維布の複合材を使用し、これにスルーホールを穿設し且つスルーホール導体を形成した後で、無電解銅メッキ等を施して、その表面に導体層を形成しても良い。また、コア基板には、ガラス−エポキシ材、ガラス−PPE材、又は、紙−エポキシ材等の複合材の他、公知の絶縁基板、或いは金属板の表面を絶縁材でコーティングしたものを用いることも可能である。
【0023】
尚、絶縁材の樹脂層が所要の強度を有する場合には、コア基板を省略した多層配線基板も本発明の対象に含まれることは明白である。
更に、コア基板の両面に形成する導体層と樹脂層は、コア基板を挟んでその両面に対称に形成する必要はなく、両面に非対称に導体層と樹脂層を形成した多層配線基板としても良い。
また、スルーホール導体、ビア導体、及び導体層の配線パターンには銅以外のNi等の金属やその合金を用いることも可能である。
【0024】
【発明の効果】
以上において説明した本発明の多層配線基板(請求項1,2)によれば、コア基板に形成したスルーホール導体と樹脂層に形成したビア導体との導通を容易且つ確実にでき、且つコア基板上の導体層のファインピッチ化の支障にもならず、高密度の配線パターンを形成することができる。
また、請求項3の多層配線基板によれば、厚さ方向に沿い配置されたビア導体同士を確実に導通でき、且つ各導体層の高密度にも寄与することが可能となる。
更に、請求項4の多層配線基板によれば、蓋導体のメッキ等を容易化し且つその肉厚を薄くすることも可能である。
【図面の簡単な説明】
【図1】(A)は本発明における1形態の多層配線基板の要部を示す端面図、(B)は(A)中の一点鎖線部分Bの拡大図。
【図2】(A)乃至(E)は図1の多層配線基板の各製造工程を示す端面図。
【図3】本発明における異なる形態の多層配線基板の要部を示す端面図。
【図4】(A)は従来の多層配線基板の要部を示す端面図、(B)は(A)中の一点鎖線部分Bの拡大図、(C)は従来の異なる多層配線基板の部分概略図。
【符号の説明】
1,40……多層配線基板
2……………コア基板
4……………スルーホール
6……………スルーホール導体
7……………中空部
9,28……熱硬化性樹脂(充填材)
10,30…蓋導体
16…………下部樹脂層
17…………第1の樹脂層
18…………上部樹脂層
19…………ビアホール
20,38…ビア導体
22,39…底部
26…………凹部
34…………第2の樹脂層
35…………下部層
36…………上部層
[0001]
BACKGROUND OF THE INVENTION
The present invention has a plurality of insulating layers including a core substrate, a plurality of conductor layers formed therebetween, and via conductors that conduct these in the thickness direction of the substrate, and an electronic component such as a semiconductor element is provided on the surface. The present invention relates to a multilayer wiring board to be mounted.
[0002]
[Prior art]
In general, as shown in FIG. 4A, the resin multilayer wiring board 50 has an insulating core substrate 52 in the center in the vertical direction (thickness direction) in the figure, and both surfaces of the core substrate 52 are provided. A plurality of conductor layers 60 and 62 and resin layers 64 and 66 are formed substantially symmetrically.
In order to conduct between the conductor layers 60 and 62, a cylindrical through-hole conductor 56 is formed in the through-hole 54 formed in the core substrate 52, and a thermosetting property is formed in the hollow portion 57 thereof. Resin 59 is filled.
[0003]
A circular lid conductor 70 is formed by plating on each horizontal piece 58 extending horizontally from the upper and lower ends of the through-hole conductor 56, and the pair of lid conductors 70 is formed of a thermosetting resin in the hollow portion 57. 59 is sealed.
A bottom portion 76 of a substantially conical via conductor 74 is connected to the center portion of the lid conductor 70, and the via conductor 74 is opposite to the core substrate 52 with the via conductor 70 and the through-hole conductor 56 interposed therebetween. The via conductor 74 is connected. The via conductor 74 is connected to a conductor layer (not shown) on the resin layers 64 and 66 through the horizontal piece 78, for example.
[0004]
[Problems to be Solved by the Invention]
However, as shown in FIG. 4B, when the thermosetting resin 59 filled in the hollow portion 57 is thermoset, the thermosetting resin 59 is cured and contracted accordingly, and the central portion thereof is A recess 71 may be formed. When the lid conductor 70 is formed on the horizontal piece 58 and the thermosetting resin 59 by copper plating, the lid conductor 70 also has a recess 72 formed on its plating surface following the recess 71. As a result, a part of the non-photosensitive resin layer 68 for step correction applied in advance prior to the formation of the resin layer 64 may remain in the recess 72.
As a result, there is a problem that connection failure between the lid conductor 70 and the via conductor 74 occurs, and conduction between the two becomes unstable.
[0005]
In order to prevent such a problem, as shown in FIG. 4C, a through-hole conductor 86 is formed in the through-hole 84 of the core substrate 82, and the connection pad is extended from the upper end to the surface of the core substrate 82. A wiring board 80 on which 88 is formed is used. In this case, the via conductor 87 is formed not on the through hole 84 but on the pad 88. However, when the connection pad 88 is formed, the pad 88 narrows the space of the conductor layer formed on the surface of the core substrate 82, so that there is a problem that a high-density fine pitch cannot be achieved.
The present invention solves the problems in the prior art described above, and can reliably establish conduction between the through-hole conductor and the via conductor or between the via conductors, and also hinder the density of the conductor layer. It is an object of the present invention to provide a multilayer wiring board free from any problem.
[0006]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention has been made paying attention to connecting the through-hole conductor and the via conductor while avoiding the vicinity of the center of the lid conductor having a recess.
That is, the multilayer wiring board of the present invention includes a through-hole conductor formed in a through-hole formed in an insulating core substrate, a filler filled in a hollow portion of the through-hole conductor, and the filler and the through-hole. A lid conductor formed on the upper end of the conductor; a lower resin layer formed on the core substrate so as to be flush with the lid conductor; an upper resin layer formed on the lid conductor and the lower resin layer; And a via conductor formed in the via hole of the upper resin layer so as to be located on the circumference of the through hole or the through hole conductor and connected to the bottom of the lid conductor.
The multilayer wiring board of the present invention includes a through-hole conductor formed in a through-hole formed in an insulating core substrate, a filler filled in a hollow portion of the through-hole conductor, the filler and the through-hole. A circular lid conductor formed on the upper end of the conductor; a lower resin layer formed on the core substrate so as to be flush with the lid conductor; and an upper resin layer formed on the lid conductor and the lower resin layer; And a via conductor formed in the via hole of the upper resin layer so as to avoid the central portion of the lid conductor and to connect the bottom portion to the flat portion of the lid conductor.
[0007]
According to these wiring board, even if the recess is formed near the center of the lid conductor, the connection between the lid conductor and via conductors reliably performed, it can take stably conduction of a plurality of conductor layers In addition, the density of the conductor layer on the core substrate surface is not hindered.
In addition to the composite material of BT resin-glass fiber described later, a known insulating substrate or a metal plate whose surface is coated with an insulating material can be used as the core substrate. Further, the lower resin layer is filled between the lid conductor and the conductor layer, and a non-photosensitive resin that eliminates a step between the lower resin layer and the core substrate is used. Further, a photosensitive resin is used for forming a via hole in the upper resin layer.
[0008]
On the other hand, another multilayer wiring board according to the present invention includes a first via conductor formed in a via hole formed in the first resin layer, a filler filled in a recess in the first via conductor, A lid conductor formed at the upper end of the filler and the first via conductor, a lower layer formed on the first resin layer so as to be flush with the lid conductor, and an upper layer formed thereon In the via hole in the upper layer of the second resin layer so as to be located on the circumference of the upper end of the first via conductor and to be connected to the bottom of the lid conductor. And a second via conductor formed on the substrate.
According to this wiring board, even if the recess is formed in the center portion of the lid conductor, the upper and lower via conductors can be reliably connected via the lid conductor, and the conduction between the plurality of conductor layers can be stably performed. It can be taken, and there is no hindrance to increasing the density of each conductor layer.
[0009]
Furthermore, a multilayer wiring board in which the filler contains one or both of a conductive substance and a plating catalyst component is also proposed. According to this, by using a conductive material such as copper paste, a catalyst core for plating, or a filler containing both of them, a lid conductor formed by plating or the like is easily and thinly formed on the upper end thereof. obtain. The plating catalyst component includes a catalyst core for plating such as Pd that promotes adhesion and growth of copper plating. When a non-conductive substance such as a paste containing ceramic powder is used as a filler, the shrinkage is reduced, the recess formed in the lid conductor is shallow and small, and the via conductor is to be connected to the via conductor. It becomes possible to expand the range in.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
In the following, preferred embodiments of the present invention will be described with reference to the drawings.
FIG. 1A shows a cross section of the main part of the multilayer wiring board 1 of the present invention. The wiring substrate 1 includes a core substrate 2 at the center in the vertical (thickness) direction, conductor layers 15 and 15 'formed on both sides thereof, lower resin layers 16 and 16', and upper resin layers 18 and 18 '. And have.
The core substrate 2 is made of a composite material of BT (bismaleimide trizian) resin and glass fiber cloth, and has a large number of through holes 4 formed therein. A substantially cylindrical through-hole conductor 6 is formed in the through-hole 4 by copper plating, and a thermosetting resin (filler) 9 is filled in the hollow portion 7 by mask printing. Further, horizontal pieces 8 and 8 ′ extending in a ring shape on the surface of the core substrate 2 are integrally formed at the upper and lower ends of the through-hole conductor 6.
[0011]
Further, circular lid conductors 10 and 10 ′ are formed on the horizontal pieces 8 and 8 ′ of the through-hole conductor 6 and the thermosetting resin 9, and are connected to the through-hole conductor 6. In the gaps between the horizontal pieces 8, 8 'and the cover conductors 10, 10' and the conductor layer 15, there are lower resin layers 16, 16 'made of non-photosensitive resin so as to form the same plane with the same thickness as these. It is arranged. Further, upper resin layers 18 and 18 'made of a photosensitive resin are formed so as to cover substantially the entire surface above them. In the resin layers 18 and 18 ′, substantially conical via conductors 20 and 20 ′ are respectively formed on the through holes 4 at positions on the substantially circumference (cylindrical body) of the through hole conductor 6. Connected to conductors 10 and 10 '.
[0012]
As shown in an enlarged view in FIG. 1 (B), the thermosetting resin 9 filled in the hollow portion 7 of the through-hole conductor 6 in an uncured (varnish) state has upper and lower ends when it is thermally cured. The dent 11 is formed at the upper end of the thermosetting resin 9 by slightly shrinking. A recess 12 is formed in the vicinity of the center of the lid conductor 10 on the horizontal piece 8 and the thermosetting resin 9, following the recess 11. However, as shown in the figure, the via conductor 20 has a bottom 22 on the flat portion 14 that is located approximately on the circumference of the through-hole conductor 6 away from the center of the through-hole 4 in which the recess 12 is formed. Formed. As a result, the through-hole conductor 6 and the via conductor 20 are connected via the flat portion 14 of the lid conductor 10 and are electrically connected to each other.
[0013]
Therefore, according to this multilayer wiring board 1, even when a part of the non-photosensitive lower resin layer 16 remains in the recess 12 at the center of the lid conductor 10, the above-described conduction is ensured, and the core board 2 Conduction between the conductor layer 15 on the surface and an upper conductor layer (not shown) is also ensured. Furthermore, electrical connection between the via conductor 20 and an electronic component mounted on the surface of a solder resist layer (not shown) formed on the upper resin layer 18 can be ensured. In addition, the density of the conductor layer 15 (15 ') is not hindered, and the multilayer wiring board 1 can be made dense and highly reliable.
[0014]
FIG. 2 relates to a method of manufacturing the multilayer wiring board 1, and FIG. 2A shows that a through-hole conductor 6 is formed in the through-hole 4 of the core substrate 2, and a thermosetting resin 9 is filled in the hollow portion 7. In addition, a state in which the lid conductor 10 is connected to the horizontal piece 8 of the conductor 6 is shown.
The core substrate 2 is coated with copper foil on both surfaces in advance, and a through-hole is formed by drilling a hole penetrating the copper foil, and electroless copper plating and electrolytic copper plating are applied to the inside thereof. A hole conductor 6 is formed. Next, after covering the entire surface of the copper foil of the core substrate 2 with a photosensitive resin (not shown), exposure and development according to a predetermined pattern are performed. As a result, the horizontal piece 8 (8 ') and the conductor layer 15 (15') are formed on both surfaces of the core substrate.
[0015]
After filling the hollow portion 7 of the through-hole conductor 6 with a thermosetting resin material and thermosetting to form the thermosetting resin 9, the horizontal pieces 8 (8 ') and the upper and lower sides of the thermosetting resin 9 are Further copper plating is performed on the end face and the conductor layer 15 (15 '). Then, a circular lid conductor 10 (10 ') is formed on the horizontal piece 8 (8') and the thermosetting resin 9, and the conductor layer 15 (15 ') increases the thickness of this plating. In addition, since the dent 11 is formed in the center part of the thermosetting resin 9 at the time of the said thermosetting, the dent 12 is formed in the center part of the lid | cover conductor 10 according to this in illustration.
[0016]
Next, as shown in FIG. 2B, for example, an epoxy non-photosensitive resin 16 a is applied to the surface of the core substrate 2 so as to cover the conductor layer 15 and the lid conductor 10.
Further, a cylindrical polishing roll having elasticity (not shown) is moved in the horizontal direction in the drawing along the surface of the resin 16a. As a result, as shown in FIG. 2C, the excessive resin 16a on the upper side is removed, and the lower resin layer 16 is formed so as to have the same plane as the lid conductor 10 and the conductor layer 15 in the same plane. The At this time, a part of the resin 16a remains in the recess 12 at the center of the lid conductor 10.
[0017]
Next, for example, an epoxy-based and photosensitive upper resin layer 18 is formed on the lower resin layer 16, and exposure and development according to a predetermined pattern are performed. As a result, as shown in FIG. 2D, a substantially conical via hole 19 is formed in the upper resin layer 18 on the substantially circumference of the through-hole conductor 6.
Next, after covering the entire surface of the upper resin layer 18 including the inside of the via hole 19 with a copper film by electroless copper plating and electrolytic copper plating, a photosensitive resin film (not shown) is pasted, and exposure according to a predetermined pattern is performed. When development and etching are performed, a via conductor 20 is formed in the via hole 19 as shown in FIG. The via conductor 20 is connected to the horizontal piece 8 of the through-hole conductor 6 through the bottom conductor 22 connected to the flat portion 14 of the lid conductor 10 away from the recess 12.
[0018]
The horizontal piece 24 of the via conductor 20 can also be used as a land for connecting electronic parts by applying nickel and gold plating. In this embodiment, only one layer of the via conductor 20 is formed, but it goes without saying that it can be formed in each of two or more resin layers. Further, when the filler 9 is formed of a conductive material such as copper paste or includes a catalyst core for plating such as palladium, the lid conductor 10 can be easily formed by the copper plating. It is also possible to form the lid conductor 10 with a metal-deposited thin film having a thickness of 10 μm or less by sputtering (vacuum deposition).
[0019]
FIG. 3 is a cross-sectional view showing a main part of a multilayer wiring board 40 of a different form according to the present invention. In addition, the same code | symbol shall be used for the part and element which are common in the said form.
The wiring board 40 includes a plurality of through holes 4, a through hole conductor 6 and a thermosetting resin (filler) 9 in the same core substrate 2 as described above, and lid conductors 10 and 10 'on upper and lower ends thereof. And conductor layers 15 and 15 ′ are formed on both surfaces of the core substrate 2. First resin layers 17 and 17 'including the lower resin layers 16 and 16' and the upper resin layers 18 and 18 'are formed on the lid conductors 10 and 10' and the conductor layers 15 and 15 ', respectively. In addition, first via conductors 20, 20 'are formed in the via holes 19, 19' of the upper resin layers 18, 18 '.
[0020]
The recesses 26 and 26 ′ of the via conductors 20 and 20 ′ are also filled with the same fillers 28 and 28 ′, and on the horizontal pieces 24 and 24 ′ of the via conductors 20 and 20 ′. Circular lid conductors 30 and 30 'covering the fillers 28 and 28' are formed. On the upper resin layers 18 and 18 ', horizontal pieces 24 and 24' of the via conductors 20 and 20 ', cover conductors 30 and 30', and conductor layers 33 and 33 'are formed. Further, lower layers 35 and 35 'of the second resin layers 34 and 34' are disposed between the lid conductors 30 and 30 'and the conductor layers 33 and 33' so as to form the same plane as these. The
Then, second via conductors 38 and 38 'are formed on the flat portions of the periphery of the lid conductors 30 and 30' and on the circumference of the upper ends of the via conductors 20 and 20 ', and the conductor layer 33 is formed around the second via conductors 38 and 38'. , 33 ', etc., upper layers 36, 36' of the second resin layer 34 are formed.
[0021]
The fillers 28 and 28 ′ filled in the recesses 26 and 26 ′ of the via conductors 20 and 20 ′ may contract, and the center portions of the lid conductors 30 and 30 ′ may be recessed as described above. Even in that case, the via conductors 38 and 38 'connected to the via conductors 38 and 38' are formed on the flat portions of the peripheral edges of the lid conductors 30 and 30 'where the centers of the bottom portions 39 and 39' are out of the recesses. The conduction between the via conductors 20 and 38 and the via conductors 20 'and 38' can be ensured. Moreover, since the via conductors 20, 20 ′ are electrically connected to each other through the lid conductors 10, 10 ′ and the through-hole conductor 6, the wiring substrate 40 has the conductor layers 15 formed on both sides with the core substrate 2 interposed therebetween. , 15 ', 33, 33' is formed as a reliable three-dimensional circuit.
Further, another conductor layer 42, 42 'is formed on the second resin layer 34, 34', a solder bump 44 protruding on the surface of the solder resist layer 46 formed thereon, or a solder resist It is also clear that the exposed terminals 48 can be formed between the layers 46 'so that they can be electrically connected to the mounted electronic components and the like.
[0022]
The present invention is not limited to the embodiments described above.
For example, a BT resin-glass fiber cloth composite material not coated with copper foil is used for the core substrate, a through hole is formed in the core substrate and a through hole conductor is formed, and then electroless copper plating or the like is performed. And a conductor layer may be formed on the surface. In addition to a composite material such as a glass-epoxy material, a glass-PPE material, or a paper-epoxy material, a known insulating substrate or a metal plate whose surface is coated with an insulating material is used for the core substrate. Is also possible.
[0023]
When the resin layer of the insulating material has a required strength, it is obvious that a multilayer wiring board in which the core board is omitted is also included in the subject of the present invention.
Furthermore, the conductor layer and the resin layer formed on both surfaces of the core substrate need not be formed symmetrically on both surfaces of the core substrate, and may be a multilayer wiring substrate in which the conductor layer and the resin layer are formed asymmetrically on both surfaces. .
Further, it is also possible to use a metal such as Ni other than copper or an alloy thereof for the wiring patterns of the through-hole conductor, via conductor, and conductor layer.
[0024]
【The invention's effect】
According to the multilayer wiring board of the present invention described above (claims 1 and 2), conduction between the through-hole conductor formed in the core substrate and the via conductor formed in the resin layer can be easily and reliably performed, and the core substrate A high-density wiring pattern can be formed without hindering the fine pitch of the upper conductor layer.
Moreover, according to the multilayer wiring board of claim 3, via conductors arranged along the thickness direction can be reliably conducted to each other, and it is possible to contribute to higher density of each conductor layer.
Furthermore, according to the multilayer wiring board of the fourth aspect, it is possible to facilitate the plating of the lid conductor and reduce the thickness thereof.
[Brief description of the drawings]
1A is an end view showing a main part of a multilayer wiring board according to one embodiment of the present invention, and FIG. 1B is an enlarged view of a one-dot chain line portion B in FIG.
FIGS. 2A to 2E are end views showing respective manufacturing steps of the multilayer wiring board of FIG.
FIG. 3 is an end view showing a main part of a multilayer wiring board of a different form according to the present invention.
4A is an end view showing a main part of a conventional multilayer wiring board, FIG. 4B is an enlarged view of a one-dot chain line portion B in FIG. 4A, and FIG. Schematic.
[Explanation of symbols]
1, 40... Multilayer wiring board 2... Core substrate 4... Through hole 6... Through hole conductor 7. (Filler)
DESCRIPTION OF SYMBOLS 10, 30 ... Cover conductor 16 ............ Lower resin layer 17 ............ 1st resin layer 18 ............ Upper resin layer 19 ............ Via hole 20, 38 ... Via conductor 22, 39 ... Bottom part 26 ………… Recess 34 ………… Second resin layer 35 ………… Lower layer 36 ………… Upper layer

Claims (4)

絶縁性のコア基板に穿設したスルーホール内に形成したスルーホール導体と、
上記スルーホール導体の中空部に充填した充填材と、
上記充填材及びスルーホール導体の上端に形成した蓋導体と、
上記蓋導体と同一平面をなすようにコア基板の上に形成した下部樹脂層と、
上記蓋導体及び下部樹脂層の上に形成した上部樹脂層と、
上記スルーホール又はスルーホール導体の円周上に位置し且つ上記蓋導体に底部が接続するように、上部樹脂層のビアホール内に形成したビア導体とを含む、
ことを特徴とする多層配線基板。
A through-hole conductor formed in a through-hole drilled in an insulating core substrate;
A filler filled in the hollow portion of the through-hole conductor;
A lid conductor formed at the upper end of the filler and through-hole conductor;
A lower resin layer formed on the core substrate so as to be flush with the lid conductor;
An upper resin layer formed on the lid conductor and the lower resin layer;
A via conductor formed in the via hole of the upper resin layer so as to be positioned on the circumference of the through hole or the through hole conductor and connected to the bottom of the lid conductor.
A multilayer wiring board characterized by that.
絶縁性のコア基板に穿設したスルーホール内に形成したスルーホール導体と、
上記スルーホール導体の中空部に充填した充填材と、
上記充填材及びスルーホール導体の上端に形成した円形の蓋導体と、
上記蓋導体と同一平面をなすようにコア基板の上に形成した下部樹脂層と、
上記蓋導体及び下部樹脂層の上に形成した上部樹脂層と、
上記蓋導体の中央部を避けて且つこの蓋導体の平坦部に底部が接続するように、上部樹脂層のビアホール内に形成したビア導体を含む、
ことを特徴とする多層配線基板。
A through-hole conductor formed in a through-hole drilled in an insulating core substrate;
A filler filled in the hollow portion of the through-hole conductor;
A circular lid conductor formed at the upper end of the filler and through-hole conductor;
A lower resin layer formed on the core substrate so as to be flush with the lid conductor;
An upper resin layer formed on the lid conductor and the lower resin layer;
Including a via conductor formed in the via hole of the upper resin layer so as to avoid the center portion of the lid conductor and to connect the bottom to the flat portion of the lid conductor.
A multilayer wiring board characterized by that.
第1の樹脂層に穿設したビアホール内に形成した第1のビア導体と、
上記第1のビア導体内の凹部に充填した充填材と、
上記充填材及び第1のビア導体の上端に形成した蓋導体と、
上記蓋導体と同一平面をなすように上記第1の樹脂層の上に形成した下部層と、その上に形成した上部層とからなる第2の樹脂層と、
上記第1のビア導体における上端の円周上に位置し且つ上記蓋導体に底部が接続するように、上記第2の樹脂層の上部層のビアホール内に形成した第2のビア導体とを含む、ことを特徴とする多層配線基板。
A first via conductor formed in a via hole formed in the first resin layer;
A filler filled in the recess in the first via conductor;
A lid conductor formed on an upper end of the filler and the first via conductor;
A second resin layer comprising a lower layer formed on the first resin layer so as to be flush with the lid conductor, and an upper layer formed thereon;
A second via conductor formed in a via hole in the upper layer of the second resin layer so as to be located on the circumference of the upper end of the first via conductor and to have a bottom connected to the lid conductor. A multilayer wiring board characterized by that.
前記充填材が、導電性物質およびメッキ触媒成分の一方または双方を含んでいる、
ことを特徴とする請求項1乃至3の何れか一項に記載の多層配線基板。
The filler includes one or both of a conductive material and a plating catalyst component;
The multilayer wiring board according to any one of claims 1 to 3, characterized in that.
JP21628098A 1998-07-30 1998-07-30 Multilayer wiring board Expired - Fee Related JP3629149B2 (en)

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JP2001352169A (en) * 2000-06-05 2001-12-21 Victor Co Of Japan Ltd Multi-layer printed circuit board and method for manufacturing the same
JP2004282033A (en) * 2003-02-28 2004-10-07 Ngk Spark Plug Co Ltd Resin wiring board
JP4508540B2 (en) * 2003-03-04 2010-07-21 京セラ株式会社 Wiring board and electronic device
WO2009008066A1 (en) * 2007-07-10 2009-01-15 Ibiden Co., Ltd. Wiring substrate, and its manufacturing method
US8044306B2 (en) 2007-07-11 2011-10-25 Ibiden Co., Ltd. Wiring board and method of manufacturing the same
KR102028713B1 (en) * 2018-01-19 2019-10-07 삼성전자주식회사 Semiconductor package

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