JP3789814B2 - Semiconductor device and method for forming semiconductor layer - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element and a method for forming a semiconductor layer, and more particularly to a semiconductor element and a method for forming a semiconductor layer, in which a semiconductor layer made of a material different from the base is formed by hetero growth.
[0002]
[Prior art]
Conventionally, a technique for hetero-growing a semiconductor made of a material different from the base on the base is known. For example, in the crystal growth of GaN, which is one of nitride-based semiconductors, since there are few lattice-matched substrates, hetero-growth is performed on a heterogeneous substrate such as a sapphire substrate. In this case, in order to grow GaN with good crystallinity with few crystal defects, conventionally, a technique of inserting a buffer layer by low temperature growth between a substrate and a GaN layer is known.
[0003]
However, even when the above-described low-temperature buffer layer is used, the density of defects that can be reduced is limited, and it is difficult to further reduce dislocations. Therefore, conventionally, a technique has been proposed in which a base layer in which dislocations are reduced by selective lateral growth (ELOG) is used when growing GaN. This selective lateral growth is disclosed, for example, in pages 53 to 58 and pages 210 to 215 of the Journal of Applied Electronic Physical Properties, Vol. 4 (1998).
[0004]
23 to 26 are cross-sectional views for explaining an example of a method for forming a nitride-based semiconductor layer using a conventional selective lateral growth technique. Next, an example of a method for forming a nitride-based semiconductor layer using a conventional selective lateral growth technique will be described with reference to FIGS.
[0005]
First, as shown in FIG. 23, a low temperature buffer layer 202 is formed on a sapphire substrate 201, and then a GaN layer 203 serving as a base is grown on the low temperature buffer layer 202.
[0006]
Next, as shown in FIG. 24, in a predetermined region on the GaN layer 203, SiO ₂ A striped (elongated) mask layer 204 is formed. When regrowth is performed using the mask layer 204 as a selective growth mask and the GaN layer 203 as a base layer, a GaN layer 205 having a facet structure with a triangular cross section is first formed on the exposed portion of the GaN layer 203.
[0007]
Further, as the growth proceeds, the GaN layer 205 having a facet structure is bonded as shown in FIG. 25, and the lateral growth becomes dominant. For this reason, the dislocation extending in the c-axis direction (longitudinal direction) is bent at the facet joint and does not reach the upper part. However, dislocations remain on the facet connection.
[0008]
Further, as the growth proceeds, as shown in FIG. 26, the GaN layers 205 having the facet structure are combined to form a continuous film. Thereby, the GaN layer 205 having a flat upper surface is formed. Dislocations reaching the surface of the planarized GaN layer 205 are greatly reduced as compared with the underlayer.
[0009]
[Problems to be solved by the invention]
In the conventional method for forming a nitride-based semiconductor layer shown in FIGS. 23 to 26, when the GaN layer 205 is formed by selective lateral growth, dislocations remain concentrated on the upper portion of the mask layer 204 to which facets are bonded. For this reason, in order to reduce dislocations, the width of the mask layer 204 is preferably small. However, if the width of the mask layer 204 is reduced in order to reduce dislocations, the width of the exposed portion of the underlying GaN layer 203 is increased, so that the facet made of GaN formed on the exposed portion of the GaN layer 203 is also large. (Higher). For this reason, in order to combine and flatten the large facets, it is necessary to form the GaN layer 205 thick. Thus, conventionally, it has been difficult to obtain a GaN layer 205 with a small thickness and few dislocations.
[0010]
Conventionally, a method of directly forming a mask layer on a substrate and growing a GaN layer using selective lateral growth has also been proposed. FIG. 27 is a cross-sectional view for explaining the conventional proposed method for forming a nitride-based semiconductor layer. Referring to FIG. 27, in this conventional proposed method, SiO 2 is directly formed on sapphire substrate 211. ₂ After forming the mask layer 212 made of GaN, a low-temperature buffer layer 213 made of GaN and a GaN layer 214 grown at a high temperature are formed thereon, thereby forming the GaN layer 214 with reduced dislocations in one growth. In this conventional proposed method, since the mask layer 212 is formed directly on the sapphire substrate 211, the total film thickness is reduced by the absence of the underlying layer.
[0011]
However, the conventional proposed method shown in FIG. 27 has the same problem as the conventional example shown in FIGS. That is, even when the mask layer 212 is directly formed on the sapphire substrate 211 and selective lateral growth is performed, the width of the mask layer 212 needs to be reduced in order to reduce dislocations. However, when the width of the mask layer 212 is reduced, the exposed area of the sapphire substrate 211 is increased, so that the facet made of GaN formed on the low-temperature buffer layer 213 in the exposed portion becomes larger (higher). For this reason, in order to bond the large facets and planarize the GaN layer 214, it is necessary to form the GaN layer 214 with a large thickness of about 5 μm or more. As a result, even in the conventional proposed method shown in FIG. 27, it was difficult to obtain a GaN layer 214 with a small thickness and few dislocations.
[0012]
Conventionally, when a mixed crystal such as AlGaN, InN, InGaN, BGaN, BAlGaN, BInGaN, or AlGaInN is grown thick, it is more difficult to obtain a lattice-matched substrate. For example, when InGaN is directly grown on a sapphire substrate, it is difficult to grow an InGaN layer thick because of a large difference in lattice constant. Therefore, conventionally, as shown in FIG. 28, first, a GaN layer 223 is grown on the sapphire substrate 221 via the buffer layer 222. Then, after forming the mask layer 224 on the GaN layer 223, the low-dislocation GaN layer 225 is formed by performing selective lateral growth using the mask layer 224 as a selective growth mask. Then, an InGaN layer 226 is grown on the low dislocation GaN layer 225. In this way, by growing the InGaN layer 226 on the low dislocation GaN layer 225 formed using selective lateral growth, the low dislocation InGaN layer 226 can be grown to a certain extent.
[0013]
In the conventional method for forming a nitride-based semiconductor layer made of a mixed crystal shown in FIG. 28, as described above, in order to obtain an InGaN layer 226 with few dislocations, selective dislocation growth is used as an underlayer so that low dislocations can be obtained. The GaN layer 225 needs to be formed. For this reason, in the conventional example shown in FIG. 28, the entire thickness is increased, and as a result, it has been difficult to obtain an InGaN layer 226 with a small overall thickness and few dislocations. Further, in the conventional method for forming a nitride-based semiconductor layer made of a mixed crystal shown in FIG. 28, the InGaN layer 226 is further grown using the GaN layer 225 formed by selective lateral growth as an underlayer, There was also a problem that became complicated.
[0014]
The present invention has been made to solve the above problems,
Another object of the present invention is to provide a semiconductor element having a structure capable of forming a thin semiconductor layer having a low dislocation on a base layer by hetero growth.
[0015]
One object of the present invention is to provide a method for forming a semiconductor layer on which a low dislocation semiconductor layer can be easily hetero-grown with a thin film thickness.
[0016]
[Means for Solving the Problems]
A semiconductor element according to a first aspect of the present invention includes a plurality of mask layers formed at predetermined intervals so as to be in contact with the upper surface of the base and to expose a part of the base, and on the upper surface of the base and A first semiconductor layer formed on the mask layer and having an element region, and a shortest distance between adjacent mask layers has a first maximum value at a first height position from a lower surface of the mask layer; Having a second distance smaller than the first distance at a second height position lower than the first height from the lower surface of the mask layer, and less than the first height from the lower surface of the mask layer; Also Having a third distance smaller than the first distance at a high third height position Both of the mask layers are a first layer formed at the first height position, a second layer formed at the second height position, and a third layer formed at the third height position. And the second layer and the third layer are made of a material that is harder to etch than the first layer. .
[0017]
In the semiconductor element according to the first aspect, as described above, the shortest distance between adjacent mask layers has a first distance of the maximum value at the first height position from the lower surface of the mask layer, and A third height having a second distance smaller than the first distance at a second height position lower than the first height from the lower surface and higher than the first height from the lower surface of the mask layer. Since the central portion in the height direction of the mask layer has a constriction by forming the third distance smaller than the first distance at the position, the first semiconductor layer is formed using the mask layer as a mask. At the time of growth, the mask layer is formed in the upper part of the mask layer having the constriction (first height position), so that the raw material is difficult to reach. Thereby, in the portion having the constriction of the mask layer, the growth of the first semiconductor layer is delayed as compared with the central portion between the mask layers, so that the first semiconductor layer is likely to grow in a trapezoidal shape. For this reason, since the lateral growth is promoted from the initial growth stage where the film thickness of the first semiconductor layer is thinner than that of the mask layer, the dislocations are bent laterally from the initial growth stage of the first semiconductor layer. As a result, since dislocations propagating in the vertical direction from the initial growth stage of the first semiconductor layer can be reduced, the low-dislocation first semiconductor layer can be grown with a small thickness on the base.
[0019]
Also, In the above semiconductor element Is A mask layer having a constriction can be easily formed by using etching.
[0020]
In the above semiconductor element, preferably, the base includes a substrate, and the mask layer is formed in contact with the upper surface of the substrate. If comprised in this way, the 1st semiconductor layer of a low dislocation with a thin film thickness can be directly grown on a board | substrate. In this case, preferably, the upper surface of the substrate includes a material that is more easily evaporated than the first semiconductor layer. If comprised in this way, the following effects can be acquired. That is, when a material that evaporates more easily than the first semiconductor layer is used as the base, the substrate material is likely to be mixed into the first semiconductor layer that is epitaxially grown on the substrate. In the present invention, unlike the constricted portion, the raw material is likely to reach the whole at the second height position located under the constricted portion of the mask layer, so that the first semiconductor layer can be easily covered with the entire exposed portion of the substrate. Can grow into. For this reason, evaporation of the substrate material can be easily prevented. Accordingly, it is possible to prevent the substrate material from being mixed into the first semiconductor layer epitaxially grown on the substrate and to prevent the substrate from being deteriorated.
[0021]
A method for forming a semiconductor layer according to a second aspect of the present invention includes a step of forming a plurality of mask layers at predetermined intervals so as to be in contact with an upper surface of a base and to expose a part of the base. Forming a first semiconductor layer having an element region on the upper surface and the mask layer, The step of forming the mask layer includes the step of laminating the first layer, the second layer, and the third layer in order from the lower surface of the mask layer, and the second layer is the first layer and Constructed from a material that is less etched than the third layer, and by etching the first layer, the second layer, and the third layer, Minimum distance between adjacent mask layers But , Having a first maximum value at a first height position from the lower surface of the mask layer, and smaller than the first distance at a second height position lower than the first height from the lower surface of the mask layer. From the first height from the lower surface of the mask layer having a second distance Also Having a third distance less than the first distance at a high third height position Form a mask layer .
[0022]
In the method for forming a semiconductor layer according to the second aspect, as described above, the shortest distance between adjacent mask layers has a first distance with a maximum value at a first height position from the lower surface of the mask layer, and A third distance having a second distance smaller than the first distance at a second height position lower than the first height from the lower surface of the mask layer and higher than the first height from the lower surface of the mask layer; By having the third distance smaller than the first distance at the height position of the mask layer, the center portion in the height direction of the mask layer has a constricted structure. When the semiconductor layer is grown, since the mask layer is formed above the constricted portion (first height position) of the mask layer, the raw material is difficult to reach. Thereby, in the portion having the constriction of the mask layer, the growth of the first semiconductor layer is delayed as compared with the central portion between the mask layers, so that the first semiconductor layer is likely to grow in a trapezoidal shape. For this reason, since the lateral growth is promoted from the initial growth stage where the film thickness of the first semiconductor layer is thinner than that of the mask layer, the dislocations are bent laterally from the initial growth stage of the first semiconductor layer. As a result, since dislocations propagating in the vertical direction from the initial growth stage of the first semiconductor layer can be reduced, the low-dislocation first semiconductor layer can be grown with a small thickness on the base.
[0023]
In the semiconductor device described above, the base may include a substrate, and the substrate may be made of a material different from that of the first semiconductor layer. With this configuration, a low-dislocation semiconductor layer can be hetero-grown with a thin film thickness on the base. The first semiconductor layer may include a nitride semiconductor layer. The base may include a second semiconductor layer formed on the substrate, and a mask layer may be formed on the second semiconductor layer.
[0024]
DETAILED DESCRIPTION OF THE INVENTION
Before describing embodiments of the present invention, the concept of the present invention will be described first. 1 to 4 are sectional views for explaining the concept of the present invention. The concept of the present invention will be described below with reference to FIGS.
[0025]
First, in the present invention, as shown in FIG. 1, an overhang portion 2a is provided on a base 1 made of a base substrate or a base layer formed on the substrate, and a constricted portion 2b is provided at the center in the height direction. The mask layer 2 is formed in a stripe shape (elongated shape). The shortest distance between the adjacent mask layers 2 has a first distance (W1) having a maximum value at the constricted portion 2b at the first height position (H1) from the lower surface of the mask layer 2, and the mask layer 2 A second distance (W2) smaller than the first distance (W1) at a second height position (H2) lower than the first height (H1) from the lower surface, and the mask layer 2 The third distance (W3) is smaller than the first distance (W1) at the third height position (H3) higher than the first height (H1) from the lower surface.
[0026]
When a semiconductor layer is grown using the mask layer 2 as described above, first, from the lower surface of the mask layer 2 to the second height position (H2), as shown in FIG. A semiconductor layer 3a is formed on the exposed upper surface. When the semiconductor layer 3a is further grown, lateral growth is promoted at the constricted portion 2b as shown in FIG. That is, in the constricted part 2b, since the overhang part 2a is located in the upper part, it becomes difficult to reach the raw material. As a result, in the constricted portion 2b, the growth rate of the semiconductor layer 3a is slower than in the vicinity of the central portion between the mask layers 2, so that the semiconductor layer 3a grows in a trapezoid shape. And since the side surface of the trapezoidal semiconductor layer 3a gradually grows in the lateral direction in the constricted portion 2b, the lateral growth of the semiconductor layer 3a is promoted in the constricted portion 2b.
[0027]
When the semiconductor layer 3a is further grown from the state shown in FIG. 3, the semiconductor layer 3 having a flat upper surface is formed on the base 1, as shown in FIG.
[0028]
As described above, in the present invention, since the lateral growth of the semiconductor layer 3 can be promoted in the constricted portion 2b of the mask layer 2, the semiconductor layer 3 is thinner than the mask layer 2 in the initial stage of growth. Dislocations can be bent laterally. Thereby, since dislocations in the semiconductor layer 3 can be reduced from the initial stage of the growth of the semiconductor layer 3, the semiconductor layer 3 having low dislocations can be grown on the base 1 with a thin film thickness.
[0029]
In the present invention, the following effects can also be obtained. That is, when a material that evaporates more easily than the semiconductor layer 3 a is used as the base 1, the constituent material of the base 1 is likely to be mixed into the semiconductor layer 3 a epitaxially grown on the base 1. In the present invention, when the semiconductor layer 3 a is grown on the exposed upper surface of the base 1 in the step shown in FIG. 2, the exposed upper surface of the base 1 is the case of the constricted portion 2 b of the mask layer 2. In contrast, since the overhang portion 2a does not exist above, the raw material easily reaches the entire surface. For this reason, since the semiconductor layer 3a can be easily grown so as to cover the entire exposed portion of the base 1, evaporation of the base 1 can be easily prevented. As a result, when a material that evaporates more easily than the semiconductor layer 3a is used as the base 1, it is possible to prevent the material of the base 1 from being mixed into the semiconductor layer 3a that is epitaxially grown on the base 1. Deterioration of the ground 1 can be prevented.
[0030]
Next, an embodiment that embodies the concept of the present invention described above will be described.
[0031]
(First embodiment)
FIG. 5 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the first embodiment of the present invention. FIG. 6 is a sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the first embodiment shown in FIG.
[0032]
First, a method for forming a nitride-based semiconductor layer according to the first embodiment will be described with reference to FIG. In the first embodiment, first, a mask layer 12 having an overhang portion 12e at the upper portion and a constricted portion 12d at the central portion is formed directly on the upper surface of the sapphire substrate 11 as a base. The mask layer 12 includes a lower SiN layer 12a formed with an RF power of 250 W using a plasma CVD method, an intermediate SiN layer 12 b formed with an RF power of 150 W using a plasma CVD method, and a plasma CVD method. It has a three-layer structure composed of an upper SiN layer 12c formed with an RF power of 250 W using a method. In this case, the upper SiN layer 12c and the lower SiN layer 12a formed as described above are less likely to be etched than the intermediate SiN layer 12b. In this mask layer 12, the shortest distance between the constricted portions 12d of the adjacent mask layer 12 is the shortest distance between the overhang portions 12e of the adjacent mask layer 12 and the adjacent mask layer 12 as in the case shown in FIG. Greater than the shortest distance between the underlying SiN layers 12a.
[0033]
As a method of forming such a mask layer 12, first, a lower SiN layer 12a, an intermediate SiN layer 12b, and an upper SiN layer 12c were sequentially formed on the entire surface of the sapphire substrate 11 under the above-described conditions. Thereafter, a striped resist (not shown) is formed in a predetermined region on the upper SiN layer 12c. Then, using the resist as a mask, the upper SiN layer 12c, the intermediate SiN layer 12b, and the lower SiN layer 12a are wet-etched using a hydrofluoric acid-based etchant to form an overhang portion 12e on the upper portion. The mask layer 12 having a three-layer structure having the constricted portion 12d at the center can be easily formed. A constriction size W4 (see FIG. 5) of the constricted portion 12d is formed to be about 10% to about 200% of the thickness of the mask layer 12. For example, when the thickness of the mask layer 12 is about 1 μm, the mask layer 12 is formed so that the constriction size W4 is about 1 μm. The mask layer 12 is formed in a stripe shape (elongated shape) having a period of about 7 μm and a thickness of about 10 nm to about 2 μm. Moreover, it is preferable to form the opening part of the mask layer 12 in the [11-20] direction or the [1-100] direction of the sapphire substrate 11, for example.
[0034]
Thereafter, a low-temperature buffer layer 13 made of AlGaN or GaN having a thickness of about 10 nm to about 50 nm is grown on the sapphire substrate 11 under a temperature condition of about 500 ° C. to about 700 ° C. Then, using the MOCVD method (Metal Organic Chemical Deposition method) or the HVPE method (Hydride Vapor Epitaxy method), using the mask layer 12 as a selective growth mask, the low temperature buffer layer 13 is formed. Next, the undoped GaN layer 14 is grown in the selective lateral direction. The undoped GaN layer 14 is formed to have a thickness of about 2 μm under a temperature condition of about 950 ° C. to about 1200 ° C. The undoped GaN layer 14 is an example of the “first semiconductor layer” in the present invention.
[0035]
When the undoped GaN layer 14 is grown, since the overhang portion 12e is located above the constricted portion 12d, it is difficult for the raw material to reach the constricted portion 12d. As a result, the growth rate of the undoped GaN layer 14 increases in the vicinity of the central portion between the mask layers 12 where the raw material easily reaches, and the growth rate of the undoped GaN layer 14 decreases in the constricted portion 12d where the raw material does not easily reach. Therefore, as in the conceptual diagram shown in FIG. 3, a trapezoidal undoped GaN layer (not shown) is easily formed from the initial stage of growth, and the side surface of the trapezoidal undoped GaN layer is gradually laterally expanded. Therefore, the lateral growth is promoted from the initial growth stage where the film thickness of the undoped GaN layer 14 is smaller than the film thickness of the mask layer 12. Thereby, since the dislocation is bent in the lateral direction from the initial growth stage of the undoped GaN layer 14, the dislocation propagating in the vertical direction from the initial growth stage of the undoped GaN layer 14 can be reduced. As a result, the low-dislocation undoped GaN layer 14 can be hetero-grown on the sapphire substrate 11 with a small thickness.
[0036]
Next, the structure of the semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the first embodiment will be described with reference to FIG.
[0037]
In the semiconductor laser device of the first embodiment, the first conductivity type contact layer 105 made of n-type GaN having a thickness of about 4 μm is formed on the undoped GaN layer 14 shown in FIG. 5 as shown in FIG. ing. A first conductivity type cladding layer 106 made of n-type AlGaN having a thickness of about 0.45 μm is formed on the first conductivity type contact layer 105. A multiple quantum well (MQW) light emitting layer 107 made of InGaN is formed on the first conductivity type cladding layer 106. A second conductivity type cladding layer 108 made of p-type AlGaN having a thickness of about 0.45 μm is formed on the MQW light emitting layer 107. A second conductivity type contact layer 109 made of p-type GaN having a thickness of about 0.15 μm is formed on the second conductivity type cladding layer 108. Each of the layers 105 to 109 is an example of the “first semiconductor layer” in the present invention. An n-side electrode 110 is formed on the exposed upper surface of the first conductivity type contact layer 105. A p-side electrode 111 is formed on the upper surface of the second conductivity type contact layer 109.
[0038]
In the semiconductor laser device according to the first embodiment described above, the layers 105 to 109 are formed on the undoped GaN layer 14 which is formed by using the formation method shown in FIG. In 105 to 109, good crystallinity can be realized. Therefore, in the first embodiment, it is possible to obtain a semiconductor laser device having a thin thickness and good device characteristics.
[0039]
(Second Embodiment)
FIG. 7 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the second embodiment of the present invention. FIG. 8 is a cross-sectional view showing a semiconductor laser device manufactured using the nitride-based semiconductor layer forming method of the second embodiment shown in FIG.
[0040]
First, a method for forming a nitride-based semiconductor layer according to the second embodiment will be described with reference to FIG. In this second embodiment, ZrB as the base ₂ On the surface of the substrate 21, a mask layer 22 having an overhang portion 22e at the top and a constricted portion 22d at the center is formed. The mask layer 22 has a SiN layer 22a having a thickness of about 3 nm to about 1 μm as a lower layer, a tungsten layer 22b having a thickness of about 4 nm to about 2 μm as an intermediate layer, and a thickness of about 3 nm to about 1 μm as an upper layer. It has a three-layer structure composed of the SiN layer 22c. In this mask layer 22, the shortest distance between the constricted portions 22d of the adjacent mask layer 22 is the shortest distance between the overhang portions 22e of the adjacent mask layer 22 and the adjacent mask layer 22 as in the case shown in FIG. It is larger than the shortest distance between the lower SiN layers 22a.
[0041]
As a method of forming such a mask layer 22, ZrB ₂ After the SiN layer 22a, the tungsten layer 22b, and the SiN layer 22c are sequentially formed on the substrate 21, a resist (not shown) is formed in a predetermined region on the SiN layer 22c. Then, by using the resist as a mask and wet etching using a hydrofluoric acid-based etchant, the difference in etching rate between the tungsten layer 22b, the SiN layer 22a, and the SiN layer 22C is utilized, as shown in FIG. As shown, a mask layer 22 having a three-layer structure having an overhang portion 22e at the top and a constricted portion 22d at the center is formed. As the size of the constriction of the constricted portion 22d (corresponding to W4 in FIG. 5), for example, the thickness of the lower SiN layer 22a is about 200 nm, the thickness of the intermediate tungsten layer 22b is about 1.5 μm, and the upper SiN layer When the thickness of the layer 22c is about 1 μm, the mask layer 22 is formed so that the size of the constriction is about 3.5 μm. The mask layer 22 is formed in a stripe shape (elongated shape) having a period of about 7 μm and a thickness of about 10 nm to about 1000 nm.
[0042]
Then ZrB ₂ A low temperature buffer layer 23 made of AlGaN or GaN having a thickness of about 10 nm to about 50 nm is grown on the substrate 21 under a temperature condition of about 500 ° C. to about 700 ° C. Then, an n-type GaN layer 24 is formed on the low-temperature buffer layer 23 using the mask layer 22 as a selective growth mask using MOCVD or HVPE. The n-type GaN layer 24 is formed to have a thickness of about 2 μm under a temperature condition of about 950 ° C. to about 1200 ° C. The n-type GaN layer 24 is an example of the “first semiconductor layer” in the present invention.
[0043]
When the n-type GaN layer 24 is grown, since the overhang portion 22e is located above the region of the constricted portion 22d, it is difficult for the raw material to reach the constricted portion 22d. As a result, the growth rate of the n-type GaN layer 24 increases near the central portion between the mask layers 22 where the raw material easily reaches, and the growth rate of the n-type GaN layer 24 decreases at the constricted portion 22d where the raw material hardly reaches. . Therefore, as in the conceptual diagram shown in FIG. 3, a trapezoidal n-type GaN layer (not shown) is easily formed from the initial stage of growth, and the side surface of the trapezoidal n-type GaN layer is gradually formed. Since the growth is in the lateral direction, the lateral growth is promoted from the initial growth stage where the film thickness of the n-type GaN layer 24 is smaller than the film thickness of the mask layer 22. Thereby, since the dislocation is bent in the lateral direction from the initial growth stage of the n-type GaN layer 24, the dislocation propagating in the vertical direction from the initial growth stage of the n-type GaN layer 24 can be reduced. As a result, ZrB ₂ A low dislocation n-type GaN layer 24 can be hetero-grown on the substrate 21 with a small thickness.
[0044]
In addition, as described above, the mask layer 22 of the second embodiment is configured such that the lower SiN layer 22a, the upper SiN layer 22c, and the intermediate tungsten layer 22b are made of different materials, thereby providing a difference in etching rate. Therefore, the size of the constriction of the constricted portion 22d can be easily increased. Thereby, the lateral growth of the n-type GaN layer 24 in the constricted portion 22d can be more effectively promoted. In addition, by forming the mask layer 22 using different materials, the constricted shape of the constricted portion 22d can be easily formed with good reproducibility using etching or the like.
[0045]
Next, with reference to FIG. 8, the structure of the semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the second embodiment will be described.
[0046]
In the semiconductor laser device of the second embodiment, an n-type layer 115 made of n-type GaN having a thickness of about 4 μm is formed on the n-type GaN layer 24 shown in FIG. 7 as shown in FIG. Yes. A first conductivity type cladding layer 116 made of n-type AlGaN having a thickness of about 0.45 μm is formed on the n-type layer 115. An MQW light emitting layer 117 made of InGaN is formed on the first conductivity type cladding layer 116. A second conductivity type cladding layer 118 made of p-type AlGaN having a thickness of about 0.45 μm is formed on the MQW light emitting layer 117. On the second conductivity type cladding layer 118, a second conductivity type contact layer 119 made of p-type GaN having a thickness of about 0.15 μm is formed. Each of the layers 115 to 119 described above is an example of the “first semiconductor layer” in the present invention. ZrB ₂ An n-side electrode 120 is formed on the back surface of the substrate 21. A p-side electrode 121 is formed on the upper surface of the second conductivity type contact layer 119.
[0047]
In the semiconductor laser device according to the second embodiment, ZrB ₂ After the n-type GaN layer 24 with a reduced thickness and reduced dislocation is formed on the substrate 21, the layers 115 to 119 are formed on the n-type GaN layer 24. Can be realized. Thereby, in the second embodiment, a semiconductor laser device having a thin thickness and good device characteristics can be obtained.
[0048]
(Third embodiment)
FIG. 9 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the third embodiment of the present invention. FIG. 10 is a sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the third embodiment shown in FIG. In the third embodiment, unlike the second embodiment described above, an example in which a SiC substrate is used as a base will be described. The remaining structure of the third embodiment is the same as that of the second embodiment. This will be described in detail below.
[0049]
First, a method for forming a nitride-based semiconductor layer according to the third embodiment will be described with reference to FIG. In the third embodiment, a mask layer 22 having an overhang portion 22e at the upper portion and a constricted portion 22d at the center portion is formed directly on the surface of the SiC substrate 31 as a base. As in the second embodiment, the mask layer 22 includes a SiN layer 22a having a thickness of about 3 nm to about 1 μm as a lower layer, a tungsten layer 22b having a thickness of about 4 nm to about 2 μm as an intermediate layer, and about an upper layer. It has a three-layer structure including a SiN layer 22c having a thickness of 3 nm to about 1 μm. The other structure, dimensions, and formation method of the mask layer 22 are the same as those in the second embodiment.
[0050]
Thereafter, low temperature buffer layer 23 made of AlGaN or GaN having a thickness of about 10 nm to about 50 nm is formed on SiC substrate 31 under a temperature condition of about 500 ° C. to about 700 ° C. Then, using the MOCVD method or HVPE method, the n-type GaN layer 24 is selectively grown in the lateral direction on the low-temperature buffer layer 23 using the mask layer 22 as a selective growth mask. The n-type GaN layer 24 is formed with a thickness of about 2 μm under a temperature condition of about 950 ° C. to about 1200 ° C.
[0051]
When the n-type GaN layer 24 is grown, since the overhang portion 22e is located above the constricted portion 22d, it is difficult for the raw material to reach the region of the constricted portion 22d. Accordingly, since the growth rate of the n-type GaN layer 24 is slower in the constricted portion 22d than in the central portion between the mask layers 22, a trapezoidal n-type GaN layer (see FIG. 3), similar to the conceptual diagram shown in FIG. (Not shown) is easily formed. Since the side surface of the trapezoidal n-type GaN layer gradually grows in the lateral direction, the lateral growth is promoted from the initial growth stage where the film thickness of the n-type GaN layer 24 is smaller than the film thickness of the mask layer 22. Is done. Thereby, as in the second embodiment, the dislocations are bent in the lateral direction from the initial growth stage of the n-type GaN layer 24, so that the dislocations propagating in the vertical direction from the initial growth stage of the n-type GaN layer 24 can be reduced. it can. As a result, the low dislocation n-type GaN layer 24 can be hetero-grown on the SiC substrate 31 with a small thickness.
[0052]
Similarly to the second embodiment, the mask layer 22 of the third embodiment is formed by forming the lower SiN layer 22a, the upper SiN layer 22c, and the intermediate tungsten layer 22b with different materials, thereby providing an etching rate. Therefore, it is possible to easily increase the size of the constriction 22d. Thereby, the lateral growth of the n-type GaN layer 24 in the constricted portion 22d can be more effectively promoted. In addition, by forming the mask layer 22 using different materials, the constricted shape of the constricted portion 22d can be easily formed with good reproducibility using etching or the like.
[0053]
Next, with reference to FIG. 10, the structure of the semiconductor laser device manufactured using the formation method of the third embodiment shown in FIG. 9 will be described. In the semiconductor laser device of the third embodiment, as in the second embodiment, the n-type layer 115 made of n-type GaN and the first conductivity type made of n-type AlGaN are formed on the n-type GaN layer 24 shown in FIG. A cladding layer 116, an MQW light emitting layer 117 made of InGaN, a second conductivity type cladding layer 118 made of p-type AlGaN, and a second conductivity type contact layer 119 made of p-type GaN are formed. An n-side electrode 120 is formed on the back surface of the SiC substrate 31. A p-side electrode 121 is formed on the upper surface of the second conductivity type contact layer 119. The film thickness of each of the layers 115 to 119 is the same as that of the semiconductor laser device of the second embodiment shown in FIG.
[0054]
In the semiconductor laser device according to the third embodiment, the layers 115 to 119 are formed on the low-dislocation n-type GaN layer 24 formed on the SiC substrate 31 by using the forming method shown in FIG. Good crystallinity can be realized at ˜119. Further, in the method of forming the nitride-based semiconductor layer shown in FIG. 9, the entire thickness is formed thin, so that when the layers 115 to 119 are formed thereon, the thickness of the semiconductor laser element is reduced. Thereby, in the third embodiment, a semiconductor laser device having a thin thickness and good device characteristics can be obtained as in the second embodiment.
[0055]
(Fourth embodiment)
FIG. 11 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the fourth embodiment of the present invention. FIG. 12 is a cross-sectional view showing a semiconductor laser device manufactured using the nitride-based semiconductor layer forming method of the fourth embodiment shown in FIG.
[0056]
First, a method for forming a nitride-based semiconductor layer according to the fourth embodiment will be described with reference to FIG. In the fourth embodiment, an overhang portion 42e is directly provided on the surface of an n-type GaAs (111) A substrate (n-type GaAs substrate) 41 as a base, and a constricted portion 42d is provided at the center portion. A mask layer 42 is formed. The mask layer 42 is a SiO 2 layer having a thickness of about 3 nm to about 1 μm as a lower layer. ₂ Layer 42a, an intermediate layer SiN layer 42b having a thickness of about 4 nm to about 2 μm, and an upper layer SiO 2 having a thickness of about 3 nm to about 1 μm. ₂ It has a three-layer structure composed of the layer 42c. In this mask layer 42, the shortest distance between the constricted portions 42 d of the adjacent mask layer 42 is the shortest distance between the overhang portions 42 e of the adjacent mask layer 42 and SiO under the adjacent mask layer 42. ₂ It is larger than the shortest distance between the layers 42a.
[0057]
As a method for forming such a mask layer 42, SiO 2 is formed on an n-type GaAs substrate 41. ₂ Layer 42a, SiN layer 42b and SiO ₂ After sequentially forming the layer 42c, SiO ₂ A resist (not shown) is formed in a predetermined region on the layer 42c. Then, by using the resist as a mask, wet etching is performed using a hydrofluoric acid-based etching solution, whereby the SiN layer 42b and SiO ₂ Layer 42a and SiO ₂ Using the difference in etching rate with the layer 42c, as shown in FIG. 11, a mask layer 42 having a three-layer structure having an overhang portion 42e in the upper portion and a constricted portion 42d in the central portion is formed. As the size of the constricted portion 42d (corresponding to W4 in FIG. 5), for example, the lower SiO 2 ₂ The thickness of the layer 42a is about 100 nm, the thickness of the intermediate SiN layer 42b is about 1 μm, and the upper SiO2 layer ₂ When the thickness of the layer 42c is about 0.5 μm, the mask layer 42 is formed so that the size of the constriction is about 2 μm. The mask layer 42 is formed in a stripe shape (elongated shape) having a period of about 5 μm and a thickness of about 10 nm to about 1000 nm.
[0058]
Thereafter, the low-temperature buffer layer 23 and the n-type GaN layer 24 are formed on the n-type GaAs substrate 41 by using the same manufacturing process as that of the second embodiment shown in FIG. That is, the low-temperature buffer layer 23 made of AlGaN or GaN having a thickness of about 10 nm to about 50 nm is grown on the n-type GaAs substrate 41 under a temperature condition of about 500 ° C. to about 700 ° C. Then, using the MOCVD method or the HVPE method, the n-type GaN layer 24 is selectively grown in the lateral direction on the low-temperature buffer layer 23 using the mask layer 42 as a selective growth mask. The n-type GaN layer 24 is formed to have a thickness of about 2 μm under a temperature condition of about 950 ° C. to about 1200 ° C.
[0059]
Here, in the fourth embodiment, the n-type GaAs substrate 41 used as a base is a material that evaporates more easily than the n-type GaN layer 24, so that the n-type GaN layer 24 grown on the n-type GaAs substrate 41. As, which is a constituent material of the n-type GaAs substrate 41, is easily mixed. In the fourth embodiment, when the low temperature buffer layer 23 is grown, in the exposed upper surface region of the n-type GaAs substrate 41, unlike the case of the constricted portion 42d, the overhang portion 42e is not located above. The raw material tends to reach the entire exposed upper surface of the n-type GaAs substrate 41. For this reason, the low temperature buffer layer 23 can be easily grown so as to cover the entire exposed portion of the n-type GaAs substrate 41. As a result, evaporation of As from the n-type GaAs substrate 41 can be easily prevented. As a result, it is possible to prevent the As of the n-type GaAs substrate 41 from entering the n-type GaN layer 24 epitaxially grown thereafter and to prevent the n-type GaAs substrate 41 from being deteriorated.
[0060]
Further, when the n-type GaN layer 24 is grown, the overhang portion 42e is located above the constricted portion 42d, so that the raw material does not easily reach the constricted portion 42d. As a result, the growth of the n-type GaN layer 24 is slower in the constricted part 42d than in the central part between the mask layers 42, and therefore, a trapezoidal n-type GaN layer (not shown) as in the conceptual diagram shown in FIG. ) Are easily formed. Since the side surface of the trapezoidal n-type GaN layer gradually grows in the lateral direction, the lateral growth is promoted from the initial stage of growth where the film thickness of the n-type GaN layer 24 is smaller than the film thickness of the mask layer 42. . Thereby, as in the second embodiment, the dislocations are bent in the lateral direction from the initial growth stage of the n-type GaN layer 24, so that the dislocations propagating in the vertical direction from the initial growth stage of the n-type GaN layer 24 can be reduced. it can. As a result, the low-dislocation n-type GaN layer 24 can be hetero-grown on the n-type GaAs substrate 41 with a small thickness.
[0061]
Further, as described above, the mask layer 42 of the fourth embodiment is formed of the lower SiO 2 layer. ₂ Layer 42a and upper SiO ₂ By configuring the layer 42c and the intermediate SiN layer 42b with different materials, the difference in the etching rate can be increased, so that the constriction of the constricted portion 42d can be easily increased. Thereby, the lateral growth of the n-type GaN layer 24 can be promoted more effectively. Further, by forming the mask layer 42 using different materials, the constricted shape of the constricted portion 42d can be easily formed with good reproducibility using etching or the like.
[0062]
Next, with reference to FIG. 12, the structure of the semiconductor laser device manufactured by using the formation method of the fourth embodiment shown in FIG. 11 will be described. In the semiconductor laser device of the fourth embodiment, as in the second embodiment, the n-type layer 115 made of n-type GaN and the first conductivity type made of n-type AlGaN are formed on the n-type GaN layer 24 shown in FIG. A cladding layer 116, an MQW light emitting layer 117 made of InGaN, a second conductivity type cladding layer 118 made of p-type AlGaN, and a second conductivity type contact layer 119 made of p-type GaN are formed. An n-side electrode 120 is formed on the back surface of the n-type GaAs substrate 41. A p-side electrode 121 is formed on the upper surface of the second conductivity type contact layer 119. The film thickness of each of the layers 115 to 119 is the same as that of the semiconductor laser device of the second embodiment shown in FIG.
[0063]
In the semiconductor laser device according to the fourth embodiment, the layers 115 to 119 are formed on the low dislocation n-type GaN layer 24 formed by using the forming method shown in FIG. Crystallinity can be realized. In addition, in the method for forming a nitride-based semiconductor layer shown in FIG. 11, the entire thickness is formed thin. Therefore, when the layers 115 to 119 are formed thereon, the thickness of the semiconductor laser element is reduced. Thereby, in the fourth embodiment, as in the second embodiment, it is possible to obtain a semiconductor laser device having a thin thickness and good device characteristics.
[0064]
(Fifth embodiment)
FIG. 13 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a fifth embodiment of the present invention. FIG. 14 is a cross-sectional view showing a semiconductor laser device manufactured using the nitride-based semiconductor layer forming method of the fourth embodiment shown in FIG. In the fifth embodiment, unlike the first to fourth embodiments, a mask layer having two constricted portions is formed. This will be described in detail below.
[0065]
First, a method for forming a nitride-based semiconductor layer according to the fifth embodiment will be described with reference to FIG. In the fifth embodiment, two overhang portions 52h and 52i and two constricted portions 52f and 52g are directly provided on the surface of an n-type Si (111) substrate (n-type Si substrate) 51 as a base. A mask layer 52 is formed. The mask layer 52 has a thickness of about 3 nm to about 1 μm in the lower layer from the bottom to the top. ₂ Layer 52a, intermediate layer SiN layer 52b having a thickness of about 4 nm to about 2 μm, and intermediate layer SiO 2 having a thickness of about 3 nm to about 1 μm. ₂ Layer 52c, an intermediate layer SiN layer 52d having a thickness of about 4 nm to about 2 μm, and an upper layer SiO 2 having a thickness of about 3 nm to about 1 μm. ₂ It has a five-layer structure composed of the layer 52e. In this mask layer 52, the shortest distance between the constricted portions 52f of the adjacent mask layer 52 and the shortest distance between the constricted portions 52g are the shortest distance between the overhang portions 52h of the adjacent mask layer 52 and between the overhang portions 52i. Shortest distance and underlying SiO ₂ It is larger than the shortest distance between the layers 52a.
[0066]
As a method for forming such a mask layer 52, an SiO 2 film is formed on an n-type Si substrate 51. ₂ Layer 52a, SiN layer 52b, SiO ₂ Layer 52c, SiN layer 52d and SiO ₂ After sequentially forming the layer 52e with the film thickness described above, SiO ₂ A resist (not shown) is formed in a predetermined region on the layer 52e. Then, using the resist as a mask, wet etching is performed using a hydrofluoric acid-based etching solution to thereby form a SiN layer 52b and a SiN layer 52d, and SiO 2 ₂ Layer 52a, SiO ₂ Layer 52c and SiO ₂ A mask layer 52 having a five-layer structure having two overhang portions 52h and 52i and two constricted portions 52f and 52g as shown in FIG. 13 is formed using the difference in etching rate with respect to layer 52e. To do. As the size (corresponding to W4 in FIG. 5) of the constricted portion 52f and the constricted portion 52g, for example, the lower SiO 2 ₂ The thickness of the layer 52a is about 100 nm, the thickness of the SiN layer 52b of the intermediate layer is about 0.5 μm, and the SiO of the intermediate layer ₂ The thickness of the layer 52c is about 0.5 μm, the thickness of the intermediate SiN layer 52d is about 0.5 μm, and the upper SiON layer ₂ When the thickness of the layer 52e is about 0.5 μm, the mask layer 52 having a constriction size of about 1.5 μm is formed. The mask layer 52 is formed in a stripe shape (elongated shape) having a period of about 5 μm and a thickness of about 10 nm to about 1000 nm.
[0067]
Thereafter, in the fifth embodiment, a buffer layer 53 made of AlGaN having a thickness of about 10 nm to about 50 nm is grown on the n-type Si substrate 51 under a temperature condition of about 1100 ° C. Then, using the MOCVD method or the HVPE method, the n-type GaN layer 54 is selectively grown in the lateral direction on the buffer layer 53 using the mask layer 52 as a selective growth mask. The n-type GaN layer 54 is formed to have a thickness of about 2 μm under a temperature condition of about 950 ° C. to about 1200 ° C. The n-type GaN layer 54 is an example of the “first semiconductor layer” in the present invention.
[0068]
Here, in the fifth embodiment, as in the fourth embodiment, the n-type Si substrate 51 used as the base is a material that evaporates more easily than the n-type GaN layer 54. Si that is a constituent material of the n-type Si substrate 51 is likely to be mixed into the grown n-type GaN layer 54. In the fifth embodiment, when the buffer layer 53 is grown, on the exposed upper surface of the n-type Si substrate 51, the overhang portions 52h and 52i are positioned above the constricted portion 52f and the constricted portion 52g. Therefore, the raw material tends to reach the entire exposed upper surface of the n-type Si substrate 51. Therefore, the buffer layer 53 can be easily grown so as to cover the entire exposed upper surface of the n-type Si substrate 51. As a result, the evaporation of Si from the n-type Si substrate 51 can be easily prevented. As a result, unintentional excess Si can be prevented from entering the n-type GaN layer 54 that is subsequently epitaxially grown, and the n-type Si substrate 51 can be prevented from deteriorating.
[0069]
Further, when the n-type GaN layer 54 is grown, since the overhang portion 52h is located above the constricted portion 52f, it is difficult for the raw material to reach the region of the constricted portion 52f. Accordingly, since the growth rate of the n-type GaN layer 54 is slower in the constricted portion 52f than in the central portion between the mask layers 52, the trapezoidal n-type GaN layer (see FIG. 3) as in the conceptual diagram shown in FIG. (Not shown) is easily formed. Since the side surface of the trapezoidal n-type GaN layer gradually grows in the lateral direction, the lateral growth is promoted from the initial stage of growth where the thickness of the n-type GaN layer 54 is smaller than the thickness of the mask layer 52. Is done. Thereby, since the dislocation is bent in the lateral direction from the initial growth stage of the n-type GaN layer 54, the dislocation propagating in the vertical direction from the initial growth stage of the n-type GaN layer 54 can be reduced. In the nitride-based semiconductor layer of the fifth embodiment, a constricted portion 52g is further formed above the constricted portion 52f. Therefore, like the constricted portion 52f, a trapezoidal GaN layer (not shown) is easily formed in the constricted portion 52g, and as a result, the lateral growth of the n-type GaN layer 54 is promoted again.
[0070]
Thus, in the fifth embodiment, the lateral growth is repeated by the two constricted portions 52f and 52g, so that the lateral growth can be further promoted. As a result, the low-dislocation n-type GaN layer 54 can be hetero-grown on the n-type Si substrate 51 with a thinner film thickness.
[0071]
Further, as described above, the mask layer 52 of the fifth embodiment is formed of the lower SiO 2 layer. ₂ Layer 52a, middle layer SiO ₂ Layer 52c and upper SiO ₂ By configuring the layer 52e, the intermediate SiN layer 52b, and the intermediate SiN layer 52d with different materials, the difference in etching rate can be increased, so that the constricted portion 52f and the constricted portion 52g can be easily formed. The size of the constriction can be increased. Thereby, the lateral growth of the n-type GaN layer 54 can be promoted more effectively. Further, by forming the mask layer 52 using different materials, the constricted shapes of the constricted portions 52f and 52g can be easily formed with good reproducibility using etching or the like.
[0072]
Next, with reference to FIG. 14, the structure of the semiconductor laser device manufactured by using the forming method of the fifth embodiment shown in FIG. 13 will be described. In the semiconductor laser device of the fifth embodiment, as in the second embodiment, the n-type layer 115 made of n-type GaN and the first conductivity type made of n-type AlGaN are formed on the n-type GaN layer 54 shown in FIG. A cladding layer 116, an MQW light emitting layer 117 made of InGaN, a second conductivity type cladding layer 118 made of p-type AlGaN, and a second conductivity type contact layer 119 made of p-type GaN are formed. An n-side electrode 120 is formed on the back surface of the n-type Si substrate 51. A p-side electrode 121 is formed on the upper surface of the second conductivity type contact layer 119. The film thickness of each of the layers 115 to 119 is the same as that of the semiconductor laser device of the second embodiment shown in FIG.
[0073]
In the semiconductor laser device according to the fifth embodiment, the layers 115 to 119 are formed on the low dislocation n-type GaN layer 54 formed by using the forming method shown in FIG. Crystallinity can be realized. Further, in the method of forming the nitride-based semiconductor layer according to the fifth embodiment shown in FIG. 13, the lateral growth of the n-type GaN layer 54 can be further promoted by the two constricted portions 52f and 52g. The thickness can be further reduced. Thereby, when each layer 115-119 is formed on the n-type GaN layer 54, it becomes possible to make the thickness of a semiconductor laser element thinner. As a result, in the fifth embodiment, a semiconductor laser device having a thinner thickness and good device characteristics can be obtained.
[0074]
(Sixth embodiment)
FIG. 15 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the sixth embodiment of the present invention. FIG. 16 is a cross-sectional view showing a semiconductor laser device manufactured using the nitride-based semiconductor layer forming method of the sixth embodiment shown in FIG. In the sixth embodiment, an n-type GaN substrate is used as a base and a mask layer similar to that in the first embodiment is used as a mask layer. This will be described in detail below.
[0075]
First, a method for forming a nitride-based semiconductor layer according to the sixth embodiment will be described with reference to FIG. In the sixth embodiment, a mask layer 12 similar to that of the first embodiment having an overhang portion 12e directly on the upper surface and a constricted portion 12d on the surface of an n-type GaN substrate 61 as a base. Form. That is, the mask layer 12 includes a lower SiN layer 12a formed with an RF power of 250W using a plasma CVD method, an intermediate SiN layer 12b formed with an RF power of 150W using a plasma CVD method, and a plasma CVD method. It has a three-layer structure composed of an upper SiN layer 12c formed with an RF power of 250 W using a method. In this case, the upper SiN layer 12c and the lower SiN layer 12a formed as described above are less likely to be etched than the intermediate SiN layer 12b. In this mask layer 12, the shortest distance between the constricted portions 12 d of the adjacent mask layer 12 is the shortest distance between the overhang portions 12 e of the adjacent mask layer 12 and the shortest distance between the SiN layers 12 a below the adjacent mask layer 12. Greater than distance. The other configuration, dimensions, and formation method of the mask layer 12 are the same as those in the first embodiment shown in FIG.
[0076]
Thereafter, in the sixth embodiment, the n-type Al is directly formed on the n-type GaN substrate 61 using the MOCVD method or the HVPE method with the mask layer 12 as a selective growth mask. _W B _X Ga _Y In _Z Tl _1-WXYZ N layers are grown in the selected lateral direction. Al _W B _X Ga _Y In _Z Tl _1-WXYZ The composition of N is a composition excluding X = Y = 0, and Al _W B _X Ga _Y In _Z Tl _1-WXYZ The lattice constant of N is smaller than that of GaN. For example, Al _W Ga _1-W N (0 <W ≦ 1) or B _X Ga _1-X N (0 <X ≦ 1). In the sixth embodiment, for example, n-type B _0.05 Ga _0.95 The N layer 63 is selectively laterally grown with a thickness of about 2 μm under a temperature condition of about 850 ° C. to about 1400 ° C. This n-type B _0.05 Ga _0.95 The N layer 63 is an example of the “first semiconductor layer” in the present invention.
[0077]
This n-type B _0.05 Ga _0.95 When the N layer 63 is grown, since the overhang portion 12e is located above the constricted portion 12d, it is difficult for the raw material to reach the region of the constricted portion 12d. As a result, the constricted portion 12d is n-type B compared to the central portion between the mask layers 12. _0.05 Ga _0.95 Since the growth rate of the N layer 63 is slow, the trapezoidal n-type B is similar to the conceptual diagram shown in FIG. _0.05 Ga _0.95 An N layer (not shown) is easily formed. And the trapezoidal n-type B _0.05 Ga _0.95 Since the side surface of the N layer gradually grows laterally, n-type B _0.05 Ga _0.95 Lateral growth is promoted from the initial growth stage where the N layer 63 is thinner than the mask layer 12. As a result, n-type B _0.05 Ga _0.95 Since dislocations are bent laterally from the initial growth stage of the N layer 63, n-type B _0.05 Ga _0.95 Dislocations propagating in the vertical direction from the initial growth stage of the N layer 63 can be reduced. As a result, even when there is no underlying GaN layer, low dislocation n-type B is formed on the n-type GaN substrate 61. _0.05 Ga _0.95 The N layer 63 can be formed thick. In this case, since there is no GaN layer as a base layer, the overall thickness can be increased compared to the conventional example shown in FIG.
[0078]
Next, with reference to FIG. 16, the structure of the semiconductor laser device manufactured by using the forming method of the sixth embodiment shown in FIG. 15 will be described. In the semiconductor laser device of this sixth embodiment, the n-type B shown in FIG. _0.05 Ga _0.95 On the N layer 63, an n-type layer 115 made of n-type GaN, a first conductive clad layer 116 made of n-type AlGaN, an MQW light emitting layer 117 made of InGaN, a second conductive-type clad layer 118 made of p-type AlGaN, and A second conductivity type contact layer 119 made of p-type GaN is formed. An n-side electrode 120 is formed on the back surface of the n-type GaN substrate 61. A p-side electrode 121 is formed on the upper surface of the second conductivity type contact layer 119. The film thickness of each of the layers 115 to 119 is the same as that of the semiconductor laser device of the second embodiment shown in FIG.
[0079]
In the semiconductor laser device according to the sixth embodiment, the low dislocation n-type B formed by using the forming method shown in FIG. _0.05 Ga _0.95 Since the layers 115 to 119 are formed on the N layer 63, good crystallinity can be realized in the layers 115 to 119. Further, in the nitride-based semiconductor layer forming method shown in FIG. 15, since the entire thickness is formed thin, when each layer 115 to 119 is formed thereon, the thickness of the semiconductor laser element is reduced. Thereby, in the sixth embodiment, a semiconductor laser device having a thin thickness and good device characteristics can be obtained, as in the second embodiment.
[0080]
(Seventh embodiment)
FIG. 17 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the seventh embodiment of the present invention. 18 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the seventh embodiment shown in FIG. In the seventh embodiment, an example is shown in which a GaN layer formed on a sapphire substrate is used as a base, and a mask layer similar to that of the first embodiment is used as a mask layer. This will be described in detail below.
[0081]
First, a method for forming a nitride-based semiconductor layer according to the seventh embodiment will be described with reference to FIG. In the seventh embodiment, a low temperature buffer layer 72 made of AlGaN is formed on a sapphire substrate 71. On the low-temperature buffer layer 72, an underlying GaN layer 73 is formed with a thickness of about 2 μm using MOCVD or HVPE. Then, on the surface of the GaN layer 73 as the base, a mask layer 12 similar to that of the first embodiment having the overhang portion 12e at the upper portion and the constricted portion 12d at the center portion is formed. That is, the mask layer 12 includes a lower SiN layer 12a formed with an RF power of 250W using a plasma CVD method, an intermediate SiN layer 12b formed with an RF power of 150W using a plasma CVD method, and a plasma CVD method. It has a three-layer structure composed of an upper SiN layer 12c formed with an RF power of 250 W using a method. In this case, the upper SiN layer 12c and the lower SiN layer 12a formed as described above are less likely to be etched than the intermediate SiN layer 12b. In this mask layer 12, the shortest distance between the constricted portions 12 d of the adjacent mask layer 12 is the shortest distance between the overhang portions 12 e of the adjacent mask layer 12 and the shortest distance between the SiN layers 12 a below the adjacent mask layer 12. Greater than distance. The other structure, dimensions, and formation method of the mask layer 12 are the same as those in the first embodiment shown in FIG.
[0082]
After that, in the seventh embodiment, on the GaN layer 73, using the MOCVD method or the HVPE method, using the mask layer 12 as a selective growth mask, Al _1-WXYZ B _W Ga _X In _Y Tl _Z N layers are grown in a selective lateral direction. Al _1-WXYZ B _W Ga _X In _Y Tl _Z The composition of N is a composition excluding Y = Z = 0, and Al _1-WXYZ B _W Ga _X In _Y Tl _Z The lattice constant of N is larger than that of GaN. For example, Ga _1-Y In _Y N (0 <Y ≦ 1) or Ga _1-Z Tl _Z N (0 <Z ≦ 1). In the seventh embodiment, for example, the AlGaInN layer 75 is selectively laterally grown with a thickness of about 1 μm under a temperature condition of about 600 ° C. to about 1200 ° C. The AlGaInN layer 75 is an example of the “first semiconductor layer” in the present invention.
[0083]
When the AlGaInN layer 75 is grown, since the overhang portion 12e is located above the constricted portion 12d, it is difficult for the raw material to reach the region of the constricted portion 12d. Accordingly, since the growth rate of the AlGaInN layer 75 is slower in the region of the constricted portion 12d than in the central portion between the mask layers 12, a trapezoidal AlGaInN layer (not shown) is formed as in the conceptual diagram shown in FIG. ) Is easily formed. Since the side surface of the trapezoidal AlGaInN layer gradually grows in the lateral direction, the lateral growth is promoted from the initial stage of growth where the thickness of the AlGaInN layer 75 is smaller than the thickness of the mask layer 12. Thereby, since dislocations are bent in the lateral direction from the initial growth stage of the AlGaInN layer 75, dislocations propagating in the vertical direction from the initial growth stage of the AlGaInN layer 75 can be reduced. As a result, the low-dislocation AlGaInN layer 75 can be hetero-grown with a small thickness on the underlying GaN layer 73.
[0084]
Next, the structure of a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the seventh embodiment will be described with reference to FIG. In the semiconductor laser device of the seventh embodiment, a first conductive contact layer 105 made of n-type GaN, a first conductive clad layer 106 made of n-type AlGaN, and an InGaN layer on the AlGaInN layer 75 shown in FIG. An MQW light emitting layer 107, a second conductivity type cladding layer 108 made of p-type AlGaN, and a second conductivity type contact layer 109 made of p-type GaN are formed. An n-side electrode 110 is formed on the exposed upper surface of the first conductivity type contact layer 105. A p-side electrode 111 is formed on the upper surface of the second conductivity type contact layer 109. The film thickness of each of the layers 105 to 109 is the same as that of the semiconductor laser device of the first embodiment shown in FIG.
[0085]
In the semiconductor laser device of the seventh embodiment described above, the layers 105 to 109 are formed on the AlGaInN layer 75 having a thin thickness and reduced dislocations formed by using the forming method shown in FIG. In ~ 109, good crystallinity can be realized. Therefore, in the seventh embodiment, it is possible to obtain a semiconductor laser device having a thin thickness and good device characteristics.
[0086]
(Eighth embodiment)
FIG. 19 is a cross-sectional view illustrating a method for forming a semiconductor layer according to an eighth embodiment of the present invention. FIG. 20 is a cross-sectional view showing a semiconductor laser device manufactured by using the semiconductor layer forming method of the eighth embodiment shown in FIG. In the eighth embodiment, unlike the first to seventh embodiments, a method for forming a semiconductor layer (GaAs layer) other than the nitride-based semiconductor layer will be described. In the eighth embodiment, a mask layer having two constricted portions is used. This will be described in detail below.
[0087]
First, a method for forming a semiconductor layer according to the eighth embodiment will be described with reference to FIG. In the eighth embodiment, two overhang portions 82g and 82h are directly provided on the surface of an n-type Si (111) substrate (n-type Si substrate) 81 as a base, and two constricted portions 82e and 82f are provided. A mask layer 82 is formed. The mask layer 82 includes a tungsten layer 82a having a thickness of about 4 nm to about 2 μm as a lower layer and a SiO layer having a thickness of about 3 nm to about 1 μm as an intermediate layer from bottom to top. ₂ Layer 82b, an intermediate layer tungsten layer 82c having a thickness of about 4 nm to about 2 μm, and an upper layer SiO 2 having a thickness of about 3 nm to about 1 μm. ₂ It has a four-layer structure including the layer 82d. In this mask layer 82, the shortest distance between the constricted portions 82e of the adjacent mask layer 82 and the shortest distance between the constricted portions 82f are the shortest distance between the overhang portions 82g of the adjacent mask layer 82 and the distance between the overhang portions 82h. Greater than the shortest distance.
[0088]
As a method for forming such a mask layer 82, a tungsten layer 82 a, SiO 2 is formed on an n-type Si substrate 81. ₂ Layer 82b, tungsten layer 82c and SiO ₂ After sequentially forming the layer 82d, SiO ₂ A resist (not shown) is formed in a predetermined region on the layer 82d. Then, using the resist as a mask, a wet etching is performed using a hydrofluoric acid-based etchant to obtain SiO. ₂ Layer 82b and SiO ₂ Using the difference in etching rate between the layer 82d and the tungsten layer 82a and the tungsten layer 82c, four layers having two overhang portions 82g and 82h and two constricted portions 82e and 82f as shown in FIG. A mask layer 82 having a structure is formed. As the size of the constricted portion 82e and the constricted portion 82f (corresponding to W4 in FIG. 5), for example, the thickness of the lower tungsten layer 82a is about 1 μm and the intermediate layer SiO 2 ₂ The thickness of the layer 82b is about 0.5 μm, the thickness of the intermediate tungsten layer 82c is about 1.5 μm, and the upper SiO layer ₂ When the thickness of the layer 82d is about 0.5 μm, a mask layer 82 is formed in which the constriction size of the lower tungsten layer 82a is about 2 μm and the constriction size of the intermediate tungsten layer 82c is about 3 μm. The mask layer 82 is formed in a stripe shape (elongated shape) having a period of about 5 μm and a thickness of about 10 nm to about 1000 nm.
[0089]
Thereafter, in the eighth embodiment, an n-type Si substrate 81 is used as a selective growth mask on the underlying n-type Si substrate 81 by using the MOCVD method or the MBE method (Molecular Beam Epitaxy). On the substrate 81, an n-type GaAs layer 83 is selectively grown in the lateral direction. The n-type GaAs layer 83 has a thickness of about 2 μm under a temperature condition of about 600 ° C. The n-type GaAs layer 83 is an example of the “first semiconductor layer” in the present invention.
[0090]
Further, when the n-type GaAs layer 83 is grown, since the overhang portion 82g is located above the constricted portion 82e, it is difficult for the raw material to reach the constricted portion 82e. As a result, in the region of the constricted portion 82e, the growth rate of the n-type GaAs layer 83 is slower than in the central portion between the mask layers 82. Therefore, as in the conceptual diagram shown in FIG. (Not shown) is easily formed. Since the side surface of the trapezoidal n-type GaAs layer gradually grows in the lateral direction, the lateral growth is promoted from the initial stage of growth where the thickness of the n-type GaAs layer 83 is smaller than the thickness of the mask layer 82. Is done. Thereby, since the dislocation is bent in the lateral direction from the initial growth stage of the n-type GaAs layer 83, the dislocation propagating in the vertical direction from the initial growth stage of the n-type GaAs layer 83 can be reduced. In the eighth embodiment, a constricted portion 82f is further formed above the constricted portion 82e. Therefore, similarly to the constricted portion 82e, a trapezoidal GaAs layer (not shown) is easily formed in the region of the constricted portion 82f, and as a result, the lateral growth of the n-type GaAs layer 83 is promoted again. Thus, in the eighth embodiment, the lateral growth is repeated by the two constricted portions 82e and 82f, so that the lateral growth can be further promoted. Thereby, the low-dislocation n-type GaAs layer 83 can be hetero-growth on the n-type Si substrate 81 with a thinner film thickness.
[0091]
In addition, as described above, the mask layer 82 of the eighth embodiment includes the lower tungsten layer 82a and the intermediate tungsten layer 82c, and the intermediate SiO layer. ₂ Layer 82b and upper SiO ₂ By configuring the layer 82d with a different material, the difference in etching rate can be increased, so that the constriction of the constricted portion 82e and the constricted portion 82f can be increased. Thereby, the lateral growth of the n-type GaAs layer 83 can be more effectively promoted. Further, by forming the mask layer 82 using different materials, the mask shapes of the constricted portions 82e and 82f can be easily formed with good reproducibility using etching or the like.
[0092]
Next, with reference to FIG. 20, the structure of the semiconductor laser device manufactured by using the forming method of the eighth embodiment shown in FIG. 19 will be described. In the semiconductor laser device of the eighth embodiment, an n-type layer 84 made of n-type GaAs, an n-type AlGaAs cladding layer 85, and an MQW light-emitting layer 86 made of GaAs / AlGaAs are formed on the n-type GaAs layer 83 shown in FIG. A p-type AlGaAs cladding layer 87 and a p-type GaAs contact layer 88 are formed. An n-side electrode 120 is formed on the back surface of the n-type Si substrate 81. A p-side electrode 121 is formed on the upper surface of the p-type GaAs contact layer 88.
[0093]
In the semiconductor laser device according to the eighth embodiment, the layers 84 to 88 are formed on the low dislocation n-type GaAs layer 83 formed by using the forming method shown in FIG. Crystallinity can be realized. Further, in the method for forming a semiconductor layer according to the eighth embodiment shown in FIG. 19, since the two constricted portions 82e and 82f can further promote the lateral growth of the n-type GaAs layer 83, the overall thickness is reduced. Further, it can be formed thinner. Thereby, when the layers 84 to 88 are formed on the n-type GaAs layer 83, the thickness of the semiconductor laser element can be further reduced. As a result, in the eighth embodiment, it is possible to obtain a semiconductor laser device having a thinner thickness and good device characteristics.
[0094]
(Ninth embodiment)
FIG. 21 is a cross-sectional view for explaining a method of forming a semiconductor layer according to the ninth embodiment of the present invention. FIG. 22 is a cross-sectional view showing a semiconductor laser device manufactured by using the semiconductor layer forming method of the ninth embodiment shown in FIG. In the ninth embodiment, unlike the first to seventh embodiments, a method for forming a semiconductor layer (ZnO layer) other than the nitride-based semiconductor layer will be described. The configuration of the mask layer in the ninth embodiment is the same as that in the first embodiment. This will be described in detail below.
[0095]
First, with reference to FIG. 21, the formation method of the semiconductor layer of 9th Embodiment is demonstrated. In the ninth embodiment, similar to the first embodiment, on the sapphire substrate 91 as a base, the overhang portion 12e is directly provided at the upper portion, and the constricted portion 12d is provided at the center portion. A mask layer 12 is formed. That is, the mask layer 12 includes a lower SiN layer 12a formed with an RF power of 250W using a plasma CVD method, an intermediate SiN layer 12b formed with an RF power of 150W using a plasma CVD method, and a plasma CVD method. It has a three-layer structure composed of an upper SiN layer 12c formed with an RF power of 250 W using a method. In this case, the upper SiN layer 12c and the lower SiN layer 12a formed as described above are less likely to be etched than the intermediate SiN layer 12b. In this mask layer 12, the shortest distance between the constricted portions 12 d of the adjacent mask layer 12 is the shortest distance between the overhang portions 12 e of the adjacent mask layer 12 and the shortest distance between the SiN layers 12 a below the adjacent mask layer 12. Greater than distance. The other structure, dimensions, and formation method of the mask layer 12 are the same as those in the first embodiment shown in FIG.
[0096]
Thereafter, in the ninth embodiment, the MOCVD method or the MBE method is used on the underlying sapphire substrate 91 at a growth rate of about 0.08 μm / second and a growth temperature of about 150 ° C. to about 250 ° C., about 2 nm. A ZnO thin film 93 having a thickness of ˜about 10 nm is grown. Then, an undoped ZnO layer 94 is formed on the ZnO thin film 93 using the mask layer 12 as a selective growth mask. The undoped ZnO layer 94 is formed at a growth rate of about 1 μm / second and a growth temperature of about 400 ° C. The undoped ZnO layer 94 is an example of the “first semiconductor layer” in the present invention.
[0097]
When the undoped ZnO layer 94 is grown, the overhang portion 12e is located above the constricted portion 12d, so that it is difficult for the raw material to reach the constricted portion 12d. As a result, in the region of the constricted portion 12d, the growth rate of the undoped ZnO layer 94 is slower than that in the central portion between the mask layers 12, so that the trapezoidal undoped ZnO layer (see FIG. 3) is similar to the conceptual diagram shown in FIG. (Not shown) is easily formed. Since the side surface of the trapezoidal undoped ZnO layer gradually grows in the lateral direction, the lateral growth is promoted from the initial stage of growth where the thickness of the undoped ZnO layer 94 is smaller than the thickness of the mask layer 12. . Thereby, since the dislocation is bent in the lateral direction from the initial growth stage of the undoped ZnO layer 94, the dislocation propagating in the vertical direction from the initial growth stage of the undoped ZnO layer 94 can be reduced. As a result, the low-dislocation undoped ZnO layer 94 can be hetero-grown on the sapphire substrate 91 with a small thickness.
[0098]
Next, with reference to FIG. 22, the structure of the semiconductor laser device manufactured by using the semiconductor layer forming method of the ninth embodiment will be described. In the semiconductor laser device of the ninth embodiment, a first conductivity type contact layer 95 made of Ga-doped n-type ZnO having a thickness of about 4 μm is formed on the undoped ZnO layer 94 shown in FIG. Ga-doped n-type Mg with thickness _0.15 Zn _0.85 First conductivity type cladding layer 96 made of O, ZnO / ZnO _0.9 S _0.1 MQW light-emitting layer 97 comprising nitrogen-doped p-type Mg having a thickness of about 0.45 μm _0.15 Zn _0.85 A second conductivity type cladding layer 98 made of O, and a nitrogen-doped p-type ZnO having a thickness of about 0.15 μm _0.95 S _0.05 A second conductivity type contact layer 99 made of is formed in this order. An n-side electrode 100 made of Al or Ti is formed on the exposed upper surface of the first conductivity type contact layer 95. A p-side electrode 101 made of Ni, Pd, Pt or the like is formed on the upper surface of the second conductivity type contact layer 99.
[0099]
In the semiconductor laser device according to the ninth embodiment described above, the layers 95 to 99 are formed on the undoped ZnO layer 94 formed by the formation method shown in FIG. In 95-99, good crystallinity can be realized. Therefore, in the ninth embodiment, it is possible to obtain a semiconductor laser device having a thin thickness and good device characteristics.
[0100]
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.
[0101]
For example, in the above-described embodiment, the mask layer having one or two constricted portions is formed. However, the present invention is not limited to this and may be a mask layer having three or more constricted portions.
[0102]
In the above embodiment, the stripe-shaped mask layer is formed on the base. However, the present invention is not limited to this. For example, a mask in which a hexagonal mask layer, a triangular mask layer, and a hexagonal opening are formed. You may form the mask layer which formed the layer and the triangular opening part.
[0103]
In the above embodiment, the case where a semiconductor laser element is manufactured has been described. However, the present invention is not limited to this, and the case where other semiconductor elements such as a light emitting diode, a field effect transistor, a photodiode, or a solar cell are manufactured. Is also applicable.
[0104]
In the above embodiment, wet etching is used as a method for manufacturing a constricted mask layer. However, the present invention is not limited to this, and the mask layer is manufactured using dry etching or both dry etching and wet etching. May be. For example, after first forming a mask layer having no constriction by dry etching, the constriction may be formed by wet etching.
[0105]
In the second embodiment, the third embodiment, and the eighth embodiment, the difference in etching rate between the tungsten layer and the SiN layer is used. In the fourth embodiment and the fifth embodiment, SiO is used. ₂ A mask layer having a constriction at the center was formed by utilizing the difference in etching rate between the layer and the SiN layer, but the present invention is not limited to this, and a layer having no constriction is etched more than a layer having a constriction. Other combinations may be used as long as they are difficult to be made. For example, in the second and third embodiments, the upper layer or the lower layer is made of SiO. ₂ , SiN, TiO ₂ TiN or the like, and the intermediate layer may be made of a metal such as tungsten. Alternatively, in the fourth embodiment, the upper layer or the lower layer is TiN, TiO. ₂ And the intermediate layer is made of SiO ₂ , SiN or the like.
[0106]
In the first to fifth embodiments, the substrate is a sapphire substrate, Si substrate, SiC substrate, or ZrB. ₂ Although the substrate or the GaAs substrate is used, the present invention is not limited to this. For example, a Supinel substrate, a GaP substrate, an InP substrate, or a quartz substrate may be used. When using substrates other than these nitride-based semiconductors, the effect of reducing dislocation is particularly great.
[0107]
In the sixth embodiment, a GaN substrate is used as the substrate. However, the present invention is not limited to this, and the sapphire substrate, Si substrate, SiC substrate, GaAs substrate, spinel substrate, GaP substrate, InP substrate, or quartz substrate. Etc. may be used.
[0108]
In the fourth and fifth embodiments, the GaAs substrate and the Si substrate are used as the substrates that easily evaporate the constituent materials. However, the present invention is not limited to this, and a GaP substrate, an InP substrate, a Ge substrate, or the like is used. The same effect can be obtained when other easily evaporated substrates are used.
[0109]
【The invention's effect】
As described above, according to the present invention, a low-dislocation semiconductor layer can be easily hetero-grown on a base with a thin film thickness.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view for explaining the concept of the present invention.
FIG. 2 is a cross-sectional view for explaining the concept of the present invention.
FIG. 3 is a cross-sectional view for explaining the concept of the present invention.
FIG. 4 is a cross-sectional view for explaining the concept of the present invention.
FIG. 5 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to the first embodiment of the present invention.
6 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the first embodiment shown in FIG.
FIG. 7 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a second embodiment of the present invention.
8 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the second embodiment shown in FIG.
FIG. 9 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a third embodiment of the present invention.
10 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the third embodiment shown in FIG.
FIG. 11 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a fourth embodiment of the present invention.
12 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the fourth embodiment shown in FIG.
FIG. 13 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a fifth embodiment of the present invention.
14 is a cross-sectional view showing a semiconductor laser device manufactured by using the method for forming a nitride-based semiconductor layer according to the fifth embodiment shown in FIG.
FIG. 15 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a sixth embodiment of the present invention.
16 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the sixth embodiment shown in FIG.
FIG. 17 is a cross-sectional view illustrating a method for forming a nitride-based semiconductor layer according to a seventh embodiment of the present invention.
18 is a cross-sectional view showing a semiconductor laser device manufactured by using the nitride-based semiconductor layer forming method of the seventh embodiment shown in FIG.
FIG. 19 is a cross-sectional view illustrating a method for forming a semiconductor layer according to an eighth embodiment of the present invention.
20 is a cross-sectional view showing a semiconductor laser device manufactured by using the semiconductor layer forming method of the eighth embodiment shown in FIG.
FIG. 21 is a sectional view illustrating a method for forming a semiconductor layer according to a ninth embodiment of the present invention.
22 is a cross-sectional view showing a semiconductor laser device manufactured by using the semiconductor layer forming method of the ninth embodiment shown in FIG. 21;
FIG. 23 is a cross-sectional view for explaining an example of a method for forming a nitride-based semiconductor using a conventional selective lateral growth technique.
FIG. 24 is a cross-sectional view for explaining an example of a method for forming a nitride-based semiconductor using a conventional selective lateral growth technique.
FIG. 25 is a cross-sectional view for explaining an example of a method for forming a nitride-based semiconductor using a conventional selective lateral growth technique.
FIG. 26 is a cross-sectional view for explaining an example of a method for forming a nitride-based semiconductor using a conventional selective lateral growth technique.
FIG. 27 is a cross-sectional view for explaining a conventional method of forming a nitride-based semiconductor layer directly on a substrate using selective lateral growth.
FIG. 28 is a cross-sectional view for explaining a conventional method for forming a nitride-based semiconductor layer made of a mixed crystal.
[Explanation of symbols]
1 groundwork
2, 12, 22, 42, 52, 82 Mask layer
11, 71, 91 Sapphire substrate (base)
21 ZrB ₂ Substrate (base)
31 SiC substrate (base)
41 n-type GaAs substrate (underlayer)
51, 81 n-type Si substrate (underlayer)
61 n-type GaN substrate (base)
3 Semiconductor layer (first semiconductor layer)
14 Undoped GaN layer (first semiconductor layer)
24, 54 n-type GaN layer (first semiconductor layer)
63 BGaN layer (first semiconductor layer)
75 AlGaInN layer (first semiconductor layer)
83 n-type GaAs layer (first semiconductor layer)
94 Undoped n-type ZnO layer (first semiconductor layer)

Claims (4)

A plurality of mask layers formed at predetermined intervals so as to be in contact with the upper surface of the base and to expose a part of the base;
A first semiconductor layer formed on the upper surface of the base and on the mask layer and having an element region;
The shortest distance between the adjacent mask layers has a first maximum value at a first height position from the lower surface of the mask layer, and a second distance lower than the first height from the lower surface of the mask layer. a height of the first small second distance greater than the distance at the position of, and, from the first distance at a third height position higher than the first height from the bottom surface of the mask layer both as having even smaller third distance,
The mask layer is formed at the first height position, the second layer formed at the second height position, and the third height position. A three-layer structure comprising a third layer;
The second layer and the third layer are made of a material that is harder to etch than the first layer . The base includes a substrate,
The semiconductor element according to claim 1 , wherein the mask layer is formed so as to contact an upper surface of the substrate. The semiconductor element according to claim 2 , wherein the upper surface of the substrate includes a material that is more easily evaporated than the first semiconductor layer. Forming a plurality of mask layers at predetermined intervals so as to be in contact with the upper surface of the base and to expose a part of the base;
Forming a first semiconductor layer having an element region on the upper surface of the base and on the mask layer,
The step of forming the mask layer includes a step of laminating a first layer, a second layer, and a third layer in order from the lower surface of the mask layer,
The second layer is made of a material that is harder to be etched than the first layer and the third layer, and the first layer, the second layer, and the third layer are etched to be adjacent to each other. the shortest distance of the mask layers that is, has a first distance from a lower surface maximum at a first height position of the mask layer, the lower surface of the second lower than the first height of the mask layer It has a second distance smaller than the first distance at a height position, and is higher than the first distance at a third height position higher than the first height from the lower surface of the mask layer. A method for forming a semiconductor layer, wherein a mask layer having a small third distance is formed.

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