JP3848639B2 - Packet conditioner - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
In the present invention, a series of information is divided into a plurality of packets, each packet is distributed and transmitted to a plurality of paths by a transmission side apparatus, and each packet received via each path is received and combined by a reception side apparatus. In particular, the present invention relates to a packet adjustment device that adjusts fluctuations in input time to a reception-side device due to transmission through different paths in each packet.
[0002]
[Prior art]
When transmitting a large series of continuous information such as still images, moving images, and music over a long distance at high speed, as shown in the transmission system of FIG. This series of large-capacity information is divided into a plurality of packets and sent to the transmission side device 3 via the signal path 2. The transmission side device 3 distributes each packet sequentially input via the signal path 2 to a plurality of routes 4a, 4b, and 4c of the network and transmits the packets to the target reception side device 5. The receiving side device 5 receives each packet that has passed through each path 4 a, 4 b, 4 c and outputs it to one signal path 6. The information processing device 7 which is the final information receiving device converts each packet sequentially input from the signal path 6 into a continuous series of information, processes the information, and displays it on a display screen, for example.
[0003]
FIG. 16 is a schematic diagram showing a transmission state of each packet 8 from the information processing apparatus 1 which is an information transmission source to the information processing apparatus 7 which is a final information reception apparatus. Variable packet length T constituting a series of information from the information processing apparatus 1₁A plurality of packets 8 having a gap time T₂A certain transmission time interval T₀Is sent to the signal path 2.
[0004]
The transmission side device 3 selects each of the packets 8 sequentially input from the signal path 2 from among the plurality of paths 4a, 4b, and 4c, and selects the path 4a, 4b, and 4c having the lightest transmission load at the current time point and sends it to the corresponding path. To do. Since the transmission load of each path 4a, 4b, 4c varies with time, a plurality of packets 8 constituting a series of information are distributed and transmitted to a plurality of paths 4a, 4b, 4c without going through the same path. Often done.
[0005]
The paths 4a, 4b, and 4c constituting the network do not have the same path length, and a plurality of transmission / reception devices for accessing the paths are inserted in the paths 4a, 4b, and 4c. Accordingly, the transmission time of each packet 8 in each path 4a, 4b, 4c is different for each path 4a, 4b, 4c. As a result, when the receiving device 5 receives each packet 8 via each path 4a, 4b, 4c and outputs it to the signal path 6, the transmission time interval T of each packet 8 is set.₀There is a concern that the change. Transmission time interval T of each packet 8₀Fluctuate, the gap time T between adjacent packets 8 in time₂Fluctuates. In addition, when the transmission time of each packet 8 on each path 4a, 4b, 4c varies excessively, the order of the packets 8 may change.
[0006]
In the information processing apparatus 7 which is the final information receiving apparatus, the gap time T between the packets 8₂When the value exceeds a certain allowable range, there is a concern that a situation may occur in which each packet 8 sequentially input cannot be normally converted into a continuous series of information. Furthermore, when the order of the packets 8 is changed, there is a concern that the quality of a series of continuous information such as still images, moving images, music, and the like may deteriorate.
[0007]
In Patent Document 1, in a loop network system configured in a multiple manner, when communication is performed between communication processing apparatuses connected to the multiple loop network, a packet is divided into cells of a certain length, A technique for distributing and outputting to each loop network is disclosed. And in this patent document 1, in the communication processing apparatus of a transmission side, each cell is attached to order information, and is transmitted to each loop network. In the communication processing apparatus on the receiving side, each cell received via each loop network is reproduced into a packet according to the order information.
[0008]
[Patent Document 1]
JP-A-5-207041
[0009]
[Problems to be solved by the invention]
However, in the technique described in Patent Document 1, when the time with respect to the communication processing device on the reception side of each cell changes greatly as the reception order changes, the correct order is corrected. No information is disclosed about conditions for playback.
[0010]
Therefore, in the technique described in Patent Document 1, the gap time T between the packets 8 is determined.₂If the value exceeds a certain allowable range, the concern that the information processing apparatus 7 may not normally convert the sequentially input packets 8 into a continuous series of information cannot be resolved.
[0011]
The present invention has been made in view of such circumstances, and received each packet via each route by detecting the reception time difference between the packets transmitted to each route or the packet transmission time. In some cases, an object of the present invention is to provide a packet adjustment apparatus in which the transmission time interval of each packet is always controlled to a constant value and can be normally converted from a plurality of packets into a series of information.
[0012]
[Means for Solving the Problems]
In order to solve the above problem, the packet adjustment apparatus of the present invention distributes a plurality of packets input from one signal path in a transmission side apparatus to a plurality of paths, and transmits the plurality of paths in a reception side apparatus. Is inserted between each path and the receiving side apparatus in the transmission system that receives each packet passing through and outputs to one signal path, and adjusts the input time of each packet to the receiving side apparatus.
[0013]
  And the packet adjustment device of the present invention comprises:A plurality of packet identification units for identifying whether each packet sequentially input from each path is a packet subject to adjustment of an input time to the reception side device;Each packet input sequentially from each routeOf each packet identified as a packet to be adjustedThe reception time measuring means for measuring the reception time is adjacent in time from each measured reception time.Identified as a packet to be adjustedUsing the reception time difference calculating means for calculating the reception time difference between packets and the calculated reception time difference between packets, all the routes that are sequentially output to the receiving side device are covered.Identified as a packet to be adjustedA delay time calculation unit for calculating a delay time from the packet reception time for each route, in which the output time interval of each packet becomes a specified value, and each routeFrom the relevant routeA plurality of packet buffers for storing input packets and each packet provided corresponding to each path and sequentially input from each pathEach packet identified as a packet to be adjustedWrite to packet buffer,Each packet that is not identified as an adjustment target packet is sent to the receiving device as it is,Packet bufferPacket written toFrom the reception timeThe route calculated by the delay time calculatorDelay time elapsedRead laterAnd a plurality of buffer control units for outputting to the receiving side device.
[0014]
In the packet adjustment device configured as described above, each packet input to the packet adjustment device via each route is temporarily stored in a packet buffer provided for each route.
[0015]
In order to always control the output time interval of each packet synthesized from the receiving side device and sequentially output to one signal path to a specified value, the receiving side reads out from the packet buffer from the reception time of each packet to this packet adjustment device. It is necessary to change the delay time until the output time to be sent to the apparatus according to the transmission time of each packet path.
[0016]
Since the transmission time in each path of the packet cannot be easily measured directly on the receiving side, the reception time difference between adjacent packets is calculated from the measured reception time of each packet, and using this reception time difference, A delay time is calculated for each route where the output time interval of each packet over all routes sequentially output to the receiving device is a specified value.
[0017]
Therefore, even if each packet is input to the receiving side device via a path having a different transmission time, the output time interval of each packet that is synthesized from this receiving side device and sequentially output to one signal path is always set. Controlled to the specified value.
[0018]
In another aspect of the invention, the packet adjustment apparatus according to the present invention includes transmission order reading means for reading a transmission order attached to each packet sequentially input from each path. Further, the delay time calculation unit calculates the delay time of each packet sequentially output to the reception side device using the calculated reception time difference between the packets and the transmission order of each packet read by the transmission order reading unit. calculate.
[0019]
In the packet adjustment apparatus configured as described above, even if the transmission time in each path of the packet changes greatly and the reception order of the packets with respect to the packet adjustment apparatus is changed, the packet adjustment apparatus changes to the reception side apparatus. The order of each packet that is sequentially output to is automatically corrected to the correct order.
[0020]
Furthermore, in another invention, the specified value in the packet adjustment device of each of the above-mentioned inventions is a time obtained by adding the required time of the packet and the gap time between adjacent packets in time.
[0021]
In the packet adjustment device configured as described above, when the operator converts the output time interval of each packet output to one signal path from the receiving-side device into, for example, a continuous series of information. It can be arbitrarily set in consideration of the above conditions.
[0022]
  Another invention is the above-described packet adjustment device,A plurality of packet identifying units for identifying whether or not each packet sequentially input from each path is a packet subject to adjustment of input time to the receiving side device, a test packet;The test packet transmission device inserted between the transmission side device and each route is sent to each route., Identified by the packet identifierA transmission time calculating means for receiving each test packet and calculating a transmission time of each path from a transmission time included in each test packet and a reception time of the test packet;From the relevant routeUsing a plurality of packet buffers for storing input packets and the calculated transmission time of each route, all the routes that are sequentially output to the receiving side device are covered.Identified as a packet to be adjustedA delay time calculation unit that calculates a delay time from the packet reception time for each route, where the output time interval of each packet becomes a specified value, and is provided corresponding to each route,Among packets input sequentially from each route, they were identified as adjustment target packetsWrite each packet to the packet buffer,Each packet that is not identified as an adjustment target packet is sent to the receiving device as it is,Packet bufferPacket written toFrom the reception timeThe route calculated by the delay time calculatorDelay time elapsedRead laterAnd a plurality of buffer control units for outputting to the receiving side device.
[0023]
In the packet adjustment apparatus configured as described above, a test packet transmission apparatus is interposed between the transmission side apparatus and each path. A test packet in which a transmission time (time stamp) is incorporated is transmitted from the test packet transmitter to each path. The packet adjustment apparatus can measure the transmission time of the packet in each route by receiving each test packet.
[0024]
Therefore, from the transmission time of each path, it is possible to calculate the delay time for each path where the output time interval of each packet over all the paths that are sequentially output to the receiving side apparatus becomes a specified value.
[0025]
Further, in another invention, the specified value in the packet adjustment device of each invention described above is a packet obtained by adding a required time of each packet inputted from one signal path to the transmission side device and a gap time between packets. This is the transmission time interval.
[0026]
In the packet adjustment apparatus configured as described above, the gap time between the packets output from the reception side apparatus to one signal path is the same as the packet time of each packet input from one signal path to the transmission side apparatus. It corresponds to the gap time between.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a schematic diagram showing a schematic configuration of a transmission system in which a packet adjustment device according to a first embodiment of the present invention is incorporated. The same parts as those in the conventional transmission system shown in FIG. 15 are denoted by the same reference numerals, and detailed description of the overlapping parts is omitted.
[0028]
In this transmission system, the packet adjustment device 10 of the first embodiment is interposed between each path 4a, 4b, 4c and the receiving side device 5. As shown in FIG. 2A, the information processing apparatus 1 that is a transmission source of information has a variable packet length T that constitutes a series of large-capacity information such as still images, moving images, and music.₁A plurality of packets 8 having a gap time T₂A certain transmission time interval T₀Then, the data is sent to the transmission side device 3 via the signal path 2. The transmission side device 3 distributes each packet 8 sequentially input via the signal path 2 to a plurality of routes 4a, 4b, and 4c of the network and outputs them to the target reception side device 5.
[0029]
The packet adjustment device 10 receives each packet 8 from each route 4a, 4b, 4c and outputs it to the receiving device 5 for each route 4a, 4b, 4c. In this case, the receiving side of each packet 8 The output time to the device 5 is adjusted.
[0030]
The receiving side device 5 receives and synthesizes each packet 8 that has passed through each of the routes 4 a, 4 b, 4 c and the packet adjustment device 10, and outputs it to one signal path 6. The information processing device 7 which is the final information receiving device converts each packet 8 sequentially input from the signal path 6 into a continuous series of information, processes the information, and displays it on a display screen, for example.
[0031]
Each packet 8 output from the information processing device 1 to the signal path 2 is shown in FIGS. 2B, 2C, and 2D depending on the type of information to which the packet 8 belongs and the type of the information processing device 1. There are multiple types of formats shown.
[0032]
FIG. 2B shows a basic packet 8 format. In the format of the packet 8, each MAC address of the transmission destination and the transmission source, each IP address of the transmission destination and the transmission source, and transmission data are incorporated.
[0033]
FIG. 2C shows a format of the packet 8 in which a transmission order in the case of transmitting a plurality of packets 8 is incorporated. The format of the packet 8 includes each MAC address of the transmission destination and the transmission source, each IP address of the transmission destination and the transmission source, an RTP (real-time transport protocol) sequence number 9a as a transmission order (packet number), transmission Data is incorporated.
[0034]
FIG. 2D shows the format of the packet 8 in which the transmission order in the case of transmitting a plurality of packets 8 is incorporated. The format of the packet 8 includes a MAC address of the transmission destination and the transmission source, an IP address of the transmission destination and the transmission source, a fragment identifier 9b as a transmission order (packet number), and transmission data.
[0035]
FIG. 3 is a block configuration diagram showing a schematic configuration of the packet adjustment apparatus 10 configured by, for example, a computer.
Various packets 8 sequentially input from the paths 4a, 4b, and 4c are input to the buffer control units 12a, 12b, and 12c and the packet identification units 13a, 13b, and 13c through I / Fs (interfaces) 11a, 11b, and 11c. To do. The packet identification units 13a, 13b, and 13c examine the frame shown in FIGS. 2B, 2C, and 2D of each input packet 8, and each destination MAC address n included in this frame and the source MAC address n or From each IP address of the transmission destination and the transmission source, it is determined whether or not the corresponding packet 8 is an adjustment target packet whose output time to the reception-side apparatus 5 is to be adjusted, and the determination result is indicated by the buffer control units 12a, 12b, To 12c.
[0036]
If the determination results from the packet identification units 13a, 13b, and 13c are adjustment target packets, the buffer control units 12a, 12b, and 12c write the input packet 8 to the packet buffers 14a, 14b, and 14c. The buffer controllers 12a, 12b, and 12c pass the input packet 8 through the I / F (interfaces) 15a, 15b, and 15c as they are unless the determination result from the packet identifiers 13a, 13b, and 13c is an adjustment target packet. To the receiving side device 5.
[0037]
If the input packet 8 is an adjustment target packet, the packet identification units 13a, 13b, and 13c send the adjustment target packet 8 to the reception time measurement unit 17. The reception time measuring unit 17 receives the reception time t of each input packet 8._AIs measured and sent to the time difference calculator 18. The reception time measurement unit 17 adds a packet number (transmission order) N to each input packet 8._AIf is attached, this packet number is also read.
[0038]
The time difference calculation unit 18 receives a difference in reception time (t between adjacent packets 8 in time from each measured reception time._B-T_A) And is sent to the delay time calculation unit 19. The delay time calculation unit 19 calculates the reception time difference (t_B-T_A), The output time interval of each packet 8 over all the paths 4a, 4b, 4c sequentially output to the receiving side device 5 is a specified value (= transmission time interval T).₀The packet reception time t for each of the routes 4a, 4b, and 4c_ADelay time Td (= t_B+ T₀-T_A) Is calculated.
[0039]
Note that the specified value is determined by the setting unit 20 so that the operator can sequentially output the packet length T of each packet 8 from the receiving side device 5 to the signal path 6.₁And the optimum gap time T between packets₂Can be set in consideration of
[0040]
The reception time measuring unit 17, the time difference calculating unit 18, and the delay time calculating unit 19 constitute a delay setting processing unit 21.
[0041]
The delay time calculation unit 19 of the delay setting processing unit 21 designates the calculated delay times Td of the paths 4a, 4b, and 4c to the buffer control units 12a, 12b, and 12c via the delay control units 16a, 16b, and 16c, respectively. To do. The buffer controllers 12a, 12b, and 12c receive the packet 8 stored in the packet buffers 14a, 14b, and 14c at the reception time t._AIs read out after the lapse of the specified delay time Td, and is sent to the receiving apparatus 5 via the I / F (interfaces) 15a, 15b, 15c.
[0042]
As a result, the output interval of each packet 8 that is sequentially output from the receiving side device 5 to the signal path 6 is the transmission time interval T of each packet 8 that is sequentially output from the information processing device 1 to the signal path 2.₀Or the transmission time interval set by the setting unit 20.
[0043]
Next, a specific calculation process of the delay time Td of each packet 8 sequentially input in the delay setting processing unit 21 will be described with reference to the flowchart of FIG. 4 and FIG. In this example, it is assumed that the adjustment target packet is a packet 8 in which the transmission order (packet number) shown in FIGS.
[0044]
In the flowchart of FIG. 4, when the packet 8 to be adjusted is input from any of the packet identification units 13a, 13b, and 13c (program step P1), the reception time measuring unit 17 is activated and the input packet 8 Reception time t_A, Packet number N_AIs detected (P2). And packet number N of packet 8_AIs the first number (N_A= 1) (P3), the delay time Td for this packet 8 is set to a specified value (= transmission time interval T).₀) (Td = T₀). Then, the delay time Td is designated to the buffer controllers 12a, 12b, and 12c of the paths 4a, 4b, and 4c that have received the packet 8 (P4).
[0045]
Thereafter, the output time t of the packet 8 to the receiving side device 5_B(= T_A+ Td) and packet number N of this packet 8_AOutput packet number N_BAnd And output time t_BAnd output packet number N_BIs written into the immediately preceding output memory (not shown in FIG. 3) (P5).
[0046]
Packet number N of input packet 8_AIs not the first number (P3), this packet number N_AIs the output packet number N stored in the previous output memory_BNext number (N_BIf it is not +1) (P6), the reception of the packet 8 in the normal order is delayed, and it is determined that the packet 8 input this time is the packet 8 to be received next to the packet 8 in the normal order, Receive time t of packet 8 input this time_A, Packet number N_AIs once written in a spare memory (not shown in FIG. 3) (P7).
[0047]
Packet number N of input packet 8_AIs the output packet number N stored in the previous output memory_BNext number (N_BIn the case of +1) (P6), as shown in FIG. 5, the output time t of the packet 8 output immediately before the delay time Td for the packet 8 input this time is stored in the output memory immediately before._BCalculate using. The delay time Td is designated to the buffer controllers 12a, 12b, and 12c of the paths 4a, 4b, and 4c that have received the packet 8 (P8).
[0048]
Td = t_B+ T₀-T_A
Then, the output time t of this packet 8 to the receiving side device 5_B(= T_A+ Td) and packet number N of this packet 8_AOutput packet number N_B(P9). And output time t_B, Output packet number N_BThe output time t stored in the previous output memory at_B, Output packet number N_BIs updated (P10).
[0049]
Next, the reception time t of the packet 8 is stored in the spare memory._A, Packet number N_AIs stored (P11), the process returns to P6, and the packet number N of the packet 8 stored in this spare memory_AIs the output packet number N stored in the previous output memory_BNext number (N_B+1) is checked. If they match, the delay time Td for the packet 8 stored in the spare memory is calculated, and the stored contents of the spare memory are cleared.
[0050]
In the transmission system in which the packet adjustment device 10 of the first embodiment configured as described above is incorporated, each packet 8 with a packet number N = 1 to 5 output from the transmission side device 3 to each path 4a, 4b, 4c. Is input to the packet adjustment apparatus 10 at the timing shown in FIG. In FIG. 6, the route 4c is congested, and the packet 8 with the packet number N = 3 is input to the packet adjustment device 10 later than the packet 8 with the packet number N = 4 on the route 4a.
[0051]
In this case, the packet adjustment device 10 calculates the delay times Td1, Td2, Td3, Td4, and Td5 of the packets 8 with the packet numbers N = 1 to 5 so that the packets 8 are output in the order of the packet numbers N. . Note that the delay time Td1 of the leading packet 8 is set to the transmission time interval T.₀The reason for setting the packet 8 is that the packet 8 is output from the receiving side device 5 to the signal path 6 as shown in FIG. 6 even if the packet 8 is greatly delayed like the packet 8 with the packet number N = 3. This is because it is possible to incorporate the packets 8 in the correct order.
[0052]
In this way, even if the transmission time of each path 4a, 4b, 4c of the packet 8 changes greatly and the reception order of the packet 8 with respect to the packet adjustment device 10 is changed, as shown in FIG. Since the order of the packets 8 sequentially output from the packet adjustment device 10 to the reception side device 5 is automatically corrected to the correct order, each packet input from the reception side device 5 to the information processing device 7 via the signal path 6 8 transmission time interval, gap time, and transmission order maintain normal values.
[0053]
Note that, even when the packet to be adjusted is a packet 8 that does not have a transmission order (packet number) as shown in FIG. 2B, the packet of each packet 8 that has passed through the paths 4a, 4b, and 4c. As long as the receiving order with respect to the adjusting device 10 is not changed, the transmission time interval and gap time of each packet 8 over the entire paths 4a, 4b, 4c output from the packet adjusting device 10 to the receiving side device 5 are set to normal values. maintain.
[0054]
(Second Embodiment)
FIG. 8 is a schematic diagram showing a schematic configuration of a transmission system in which the packet adjustment apparatus 10a according to the second embodiment of the present invention is incorporated. The same parts as those in the transmission system in which the packet adjustment device 10 of the first embodiment shown in FIG. 1 is incorporated are denoted by the same reference numerals, and detailed description of the overlapping parts is omitted.
[0055]
In this transmission system, the packet adjustment device 10a of the second embodiment is inserted between each path 4a, 4b, 4c and the receiving side apparatus 5, and the transmitting side apparatus 3 and each path 4a, 4b, A test packet transmission device 22 is inserted between 4c and 4c.
[0056]
The test packet transmission device 22 relays each packet 8 output from the transmission side device 3 toward each of the routes 4a, 4b, and 4c as it is to each route 4a, 4b, and 4c on the packet adjustment device 10a side. Further, as shown in FIG. 10, the test packet transmission device 22 sends the test packet 23 to the packet adjustment device 10a via the paths 4a, 4b, and 4c in a time zone in which each packet 8 is not transmitted. Note that the test packet transmitter 22 outputs the test packet 23 to each of the paths 4a, 4b, and 4c at predetermined time intervals.
[0057]
As shown in FIG. 9, the frame of the test packet 23 includes each MAC address of the transmission destination and the transmission source, each IP address of the transmission destination and the transmission source, and the transmission time t of the test packet 23._SIs incorporated.
[0058]
FIG. 11 is a block diagram showing a schematic configuration of the packet adjustment apparatus 10a of the second embodiment. The same parts as those of the packet adjustment apparatus 10 of the first embodiment shown in FIG.
[0059]
The packet identification units 13 a, 13 b, and 13 c examine the frame of each input packet to determine whether or not the packet is an adjustment target packet for adjusting the output time to the receiving side device 5, and is a test packet 23. And the determination result is sent to the buffer controllers 12a, 12b and 12c.
[0060]
If the determination result is the adjustment target packet, the buffer control units 12a, 12b, and 12c write the input packet 8 into the packet buffers 14a, 14b, and 14c. The buffer control units 12a, 12b, and 12c, if the determination result from the packet identification units 13a, 13b, and 13c is not the adjustment target packet or the test packet 23, use the input packet 8 as it is as I / F (interface) 15a, 15b. , 15c to the receiving side device 5. The buffer control units 12a, 12b, and 12c discard the input test packet 23 when the determination result from the packet identification units 13a, 13b, and 13c is the test packet 23.
[0061]
If the input packet is the adjustment target packet or the test packet 23, the packet identification units 13a, 13b, and 13c send the adjustment target packet 8 or the test packet 23 to the transmission time calculation unit 25. First, the transmission time calculation unit 25 receives the reception time t of the packet 8 to be adjusted._AOr the reception time t of the test packet 23_RMeasure. Next, the transmission time t of the time stamp 24 included in the test packet 23_S, And the transmission time T of the test packet 23 of the paths 4a, 4b, and 4c that has received the test packet 23_S(= T_R-T_S) Is calculated. The transmission time calculation unit 25 calculates the transmission time T of the calculated corresponding route._SIs sent to the delay time calculation unit 19a.
[0062]
The delay time calculation unit 19a transmits the transmission time T of all the paths 4a, 4b, and 4c from the transmission time calculation unit 25._SIs obtained, the transmission time T for each of the paths 4a, 4b, 4c is obtained._S, The output time interval of each packet 8 over all the routes 4a, 4b, 4c sequentially output to the reception side device 5 is a specified value (= transmission time interval of each packet 8 input to the transmission side device 3) T₀The packet reception time t for each of the routes 4a, 4b, and 4c_ADelay time Td = (T_Sm-T_S) Is calculated. Where T_SmRepresents the longest transmission time.
[0063]
The transmission time calculator 25 and the delay time calculator 19a constitute a delay setting processor 21a.
[0064]
The delay time calculation unit 19a of the delay setting processing unit 21a specifies the calculated delay times Td of the paths 4a, 4b, and 4c to the buffer control units 12a, 12b, and 12c via the delay control units 16a, 16b, and 16c, respectively. To do. The buffer controllers 12a, 12b, and 12c receive the packet 8 stored in the packet buffers 14a, 14b, and 14c at the reception time t._AIs read out after the lapse of the specified delay time Td, and is sent to the receiving apparatus 5 via the I / F (interfaces) 15a, 15b, 15c.
[0065]
As a result, the output interval of each packet 8 that is sequentially output from the receiving side device 5 to the signal path 6 is the transmission time interval T of each packet 8 that is sequentially output from the information processing device 1 to the signal path 2.₀become.
[0066]
Next, a specific calculation process of the delay time Td of each packet 8 sequentially input in the delay setting processing unit 21a will be described with reference to the flowchart of FIG.
[0067]
When the test packet 23 designating one route is input, the transmission time calculation unit 25 is activated (Q1), and the transmission time T of the test packet 23 in the corresponding route is determined by the method described above._S(= T_R-T_S) Is calculated (Q2). The calculated transmission time T in the corresponding route_SIs written into a transmission time memory (not shown in FIG. 11) (Q3). And the transmission time T of all the paths 4a, 4b, 4c_S(Q4), the delay time calculation unit 19a is activated and four transmission times T_S(Q5), and the four transmission times T as reference transmission times_SLongest transmission time T_SmIs adopted. Then, the delay time Td set for each path is set to the longest transmission time Td._SmTo T_S(Q6).
[0068]
Td = T_Sm-T_S
In other words, each packet 8 to be adjusted from the transmission side device 3 is transmitted to each path 4a, 4b, 4c with a prescribed transmission time interval T.₀Since it is output every time, the transmission time T of each route_SIf they are equal, the reception time t of each packet 8 to the packet adjustment apparatus 10a_AIs the specified transmission time interval T₀Should be. Therefore, the transmission time T of each route_SIs different, this transmission time T_SIf each packet 8 is transmitted with a delay of the difference from the reference transmission time in, the output interval of each packet 8 output from the packet adjustment device 10a to the receiving side device 5 is a specified transmission time interval. T₀become.
[0069]
The delay time calculation unit 19a instructs the buffer control units 12a, 12b, and 12c via the delay control units 16a, 16b, and 16c via the delay control units 16a, 16b, and 16c (Q7).
[0070]
Then, the process returns to Q1, and waits for the next cycle test packet 23 to be input.
[0071]
In the packet adjustment device 10a of the second embodiment configured as described above, the output interval of each packet 8 sequentially output from the receiving device 5 to the signal path 6 is sequentially output from the information processing device 1 to the signal path 2. Time interval T of each packet 8 to be transmitted₀become. Therefore, it is possible to achieve substantially the same operational effects as the packet adjustment device 10 of the first embodiment described above.
[0072]
FIG. 13 is a schematic diagram showing a transmission system showing an application example of the packet adjustment apparatus 10a of the second embodiment shown in FIG.
[0073]
In this transmission system, a first packet adjustment device 10c is interposed between the transmission side device 3 and each path 4a, 4b, 4c, and the reception side device 5 and each path 4a, 4b, 4c. A second packet adjustment device 10d is interposed between the two.
[0074]
The first packet adjustment device 10c outputs the test packet 23 to each path 4a, 4b, 4c. The second packet adjustment device 10d sets each delay time Td for each path 4a, 4b, 4c using the time stamp 24 of each test packet 23 received from each path 4a, 4b, 4c. However, the transmission time T in the specific paths 4a, 4b, 4c_SIs extremely large, and with only the second packet adjustment device 10d, the variation in the delay time Td for each packet 8 received from each path 4a, 4b, 4c may exceed the allowable limit.
[0075]
In such a case, the first packet adjustment device 10c adjusts the output time of each packet 8 with respect to each path 4a, 4b, 4c, and the time when each packet 8 reaches the second packet adjustment device 10d (reception) Time t_A) Should be close to the transmission time interval T0. For this purpose, the second packet adjustment apparatus 10d sends out the delay instruction packet 26 shown in FIG. 14 via the paths 4a, 4b, and 4c. In this delay instruction packet 26, delay amount information 27 indicating the delay time of the corresponding routes 4a, 4b, 4c that the first packet adjustment device 10c wants to take charge of is incorporated.
[0076]
The first first packet adjustment apparatus 10c that receives each delay instruction packet 26 via each path 4a, 4b, 4c, based on the delay time of the delay amount information 27 included in each delay instruction packet 26, The output time for each path 4a, 4b, 4c of each packet 8 is adjusted.
[0077]
In the transmission system configured as described above, the transmission time T of the paths 4a, 4b, and 4c is the same._SEven if the packet 8 varies greatly, the output interval of each packet 8 that is sequentially output from the receiving side device 5 to the signal path 6 is equal to the transmission time interval T of each packet 8 that is sequentially output from the information processing device 1 to the signal path 2.₀become.
[0078]
【The invention's effect】
As described above, in the packet adjustment device of the present invention, the reception time difference between the packets transmitted to each path or the packet transmission time is measured, and the reception for each packet received through each path is received. The output delay time for the side device is set.
[0079]
Therefore, even if each packet received via multiple paths is received and combined, the transmission time interval of each packet is always controlled to a constant value, and a series of information is normally obtained from the combined packets. Can be converted to
[Brief description of the drawings]
FIG. 1 is a schematic diagram showing a schematic configuration of a transmission system in which a packet adjustment apparatus according to a first embodiment of the present invention is incorporated.
FIG. 2 is a view showing a packet length, a gap time and a transmission time interval, and a frame configuration of each packet transmitted in the transmission system.
FIG. 3 is a block diagram showing a schematic configuration of the packet adjustment apparatus according to the first embodiment.
FIG. 4 is a flowchart showing the operation of a delay setting unit incorporated in the packet adjustment apparatus of the first embodiment;
FIG. 5 is a diagram for explaining a delay time calculation method in the delay setting unit;
FIG. 6 is a diagram showing the relationship between the reception timing of each packet from each path and the delay time of each packet
FIG. 7 is a diagram showing a transmission state of each packet transmitted through each part of the transmission system
FIG. 8 is a schematic diagram showing a schematic configuration of a transmission system in which a packet adjustment apparatus according to a second embodiment of the present invention is incorporated.
FIG. 9 is a view showing a frame configuration of a test packet transmitted in the transmission system
FIG. 10 is a diagram showing a transmission state of each packet transmitted through each part of the transmission system
FIG. 11 is a block diagram showing a schematic configuration of a packet adjustment apparatus according to a second embodiment.
FIG. 12 is a flowchart showing the operation of the delay setting unit incorporated in the packet adjustment apparatus of the second embodiment;
FIG. 13 is a schematic diagram showing a transmission system showing an application example of the packet adjustment apparatus according to the second embodiment of the present invention;
FIG. 14 is a diagram showing a frame configuration of a delay instruction packet transmitted in the transmission system
FIG. 15 is a schematic diagram showing a schematic configuration of a conventional transmission system.
FIG. 16 is a diagram showing a transmission state of each packet transmitted through each part of the transmission system
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1,7 ... Information processing apparatus, 2, 6 ... Signal path, 3 ... Transmission side apparatus, 4a, 4b, 4c ... Path, 5 ... Reception side apparatus, 8 ... Packet, 9a ... RTP sequence number, 9b ... Fragment identifier, DESCRIPTION OF SYMBOLS 10,10a ... Packet adjustment apparatus, 12a, 12b, 12c ... Buffer control part, 13a, 13b, 13c ... Packet identifier, 14a, 14b, 14c ... Packet buffer, 16a, 16b, 16c ... Delay control part, 17 ... Reception time Measurement unit, 18 ... time difference calculation unit, 19, 19a ... delay time calculation unit, 20 ... setting unit, 21, 21a ... delay setting processing unit, 22 ... test packet transmitter, 23 ... test packet, 24 ... time stamp, 25 ... Transmission time calculator

Claims (5)

A plurality of packets (8) input from one signal path (2) by the transmission side apparatus (3) are distributed and transmitted to a plurality of paths (4a to 4c), and the plurality of packets are transmitted by the reception side apparatus (5). Is inserted between each path and the receiving side apparatus in the transmission system that receives each packet via the path and outputs it to one signal path (6), and sends each packet to the receiving side apparatus. A packet adjustment device (10) for adjusting an input time,
A plurality of packet identification units (13a to 13c) for identifying whether or not each packet sequentially input from each path is a packet subject to adjustment of input time to the receiving side device;
A reception time measuring means (17) for measuring a reception time of each packet identified as the adjustment target packet among the packets sequentially input from the respective paths;
A reception time difference calculating means (18) for calculating a reception time difference between packets that have been identified as adjacent adjustment target packets in terms of time from the measured reception times;
Using the calculated reception time difference between the packets, the output time interval of each packet identified as the adjustment target packet over all the routes sequentially output to the receiving side device becomes a specified value. A delay time calculation unit (19) for calculating a delay time from the packet reception time;
A plurality of packet buffers (14a to 14c) that are provided corresponding to the respective paths and store packets input from the paths ;
Each packet that is provided corresponding to each path and that is identified as the packet to be adjusted among the packets that are sequentially input from each path is written to the packet buffer, and each packet that is not identified as the packet to be adjusted is left as it is. A plurality of buffer control units for sending the packet written in the packet buffer to the reception side device and for reading out the packet after the delay time of the path calculated by the delay time calculation unit from the reception time elapses and outputting it to the reception side device (12a-12c) provided with the packet adjustment apparatus characterized by the above-mentioned. Transmission order reading means for reading the transmission order attached to each packet sequentially input from each path;
The delay time calculation unit uses the calculated reception time difference between the packets and the transmission order of the packets read by the transmission order reading unit to delay each packet sequentially output to the reception side device. The packet adjustment apparatus according to claim 1, wherein time is calculated.   3. The packet adjustment apparatus according to claim 1, wherein the specified value is a time obtained by adding a required time of the packet and a gap time between adjacent packets in time. A plurality of packets (8) input from one signal path (2) by the transmission side apparatus (3) are distributed and transmitted to a plurality of paths (4a to 4c), and the plurality of packets are transmitted by the reception side apparatus (5). Is inserted between each path and the receiving side apparatus in the transmission system that receives each packet via the path and outputs it to one signal path (6), and sends each packet to the receiving side apparatus. A packet adjustment device (10a) for adjusting an input time,
A plurality of packet identification units (13a to 13c) for identifying whether or not each packet sequentially input from each path is a packet subject to adjustment of an input time to the receiving side apparatus and a test packet;
Each test packet (23) transmitted from the test packet transmitter (22) inserted between the transmitting device and each path to each path and identified by the packet identification unit is received. A transmission time calculating means (25) for calculating the transmission time of each path from the transmission time included in the test packet and the reception time of the test packet;
A plurality of packet buffers (14a to 14c) that are provided corresponding to the respective paths and store packets input from the paths ;
Using the calculated transmission time of each route, the output time interval of each packet identified as the packet to be adjusted over all the routes sequentially output to the receiving side device becomes a specified value. A delay time calculation unit (19a) for calculating a delay time from the packet reception time;
Each packet that is provided corresponding to each path and that is identified as a packet to be adjusted among packets sequentially input from each path is written to the packet buffer, and each packet that is not identified as a packet to be adjusted is received as it is sends out to the side apparatus, a plurality of buffer control section for outputting read from the packet buffer to the written receive a packet time after the delay time has elapsed for the route calculated by the delay time calculating unit Te to the receiving device ( 12a to 12c).   5. The packet transmission time interval obtained by adding a required time of each packet input to the transmission side apparatus from the one signal path and a gap time between the packets. Packet coordinator.

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