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JP3873294B2 - Manufacturing method of connecting member - Google Patents
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JP3873294B2 - Manufacturing method of connecting member - Google Patents

Manufacturing method of connecting member Download PDF

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Publication number
JP3873294B2
JP3873294B2 JP03817895A JP3817895A JP3873294B2 JP 3873294 B2 JP3873294 B2 JP 3873294B2 JP 03817895 A JP03817895 A JP 03817895A JP 3817895 A JP3817895 A JP 3817895A JP 3873294 B2 JP3873294 B2 JP 3873294B2
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JP
Japan
Prior art keywords
metal
wiring pattern
insulating base
temporary substrate
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP03817895A
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Japanese (ja)
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JPH08236240A (en
Inventor
良明 坪松
聡夫 山崎
洋人 大畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd, Resonac Corp filed Critical Hitachi Chemical Co Ltd
Priority to JP03817895A priority Critical patent/JP3873294B2/en
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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

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  • Manufacturing Of Electrical Connectors (AREA)

Description

【0001】
【産業上の利用分野】
本発明は、微細ピッチに配置された相対する電極間を電気的に導通させる接続部材の製造方法に関する。
【0002】
【従来の技術】
従来、半導体素子やモジュール基板を電気的に検査する接続部材として、ニッケル粒子をゴムシート内に充填させ、加圧することにより電気的接続を確保するものや、片面にピン状のプローブを配置したものがあった。また、耐熱絶縁フィルムを貫通する金属バンプを所定の密度で配置したフィルム材や上記金属バンプと電気的に接続した展開配線パターンを反対面に有するものなどがあった。
【0003】
導電粒子を充填させたゴムシートやプローブを有する検査基板の場合、検査ピッチの微細化には限界があるなどの問題があった。以上のような背景から、金属バンプを所定のピッチで配置したフィルム基材が提案されている。(「高密度実装用マイクロフィルムコネクタ」:電子材料, p28(1992年11月号))、「整列した微細ピッチ」:NIKKEI MICRODEVICES, p15 (1992年3月号))。金属バンプはポリイミド層から上下に突出しており、この上下の突出部が相対する電極間に接触、あるいは、接合して電気的導通を確保する。製造方法は、銅箔上にポリイミド層を形成後、ポリイミド層表面から銅箔に達する凹部を形成し、銅箔の露出部分を所定量だけ等方的に化学エッチングし、電気めっき法で凹部底から金属バンプ(導通用金属柱)を形成するものである。
【0004】
【発明が解決しようとする課題】
この方式で形成する金属バンプの断面形状はリベット形状をしており、その頭頂部はポリイミド層に形成した凹部の直径よりも大きくなる。すなわち、たとえ凹部径を精度良く制御できたとしても、ポリイミド層厚さ以上の領域ではめっきが等方的に成長するため成長方向に対する精度制御が必要になる。実際に電気めっき法で微小領域にバンプ形成する場合、バンプ配置や電流密度及びめっき槽構成など複雑な要因があり、結果としてバンプ形状(直径、ポリイミド層表面からの高さ)を制御することが困難であった。特に、微細バンプを半導体ウエハーのバーイン試験用のプローバーとして適用するような場合、バンプ高さやバンプ径が不揃いだとアルミ電極とZ方向で良好な接触が得られなかったり、更にX、Y方向での位置ずれに対する許容度が減少してしまうという問題があった。
本発明は、電極間を電気的に導通させる金属バンプ(金属柱)の形成を高精度で行う接続部材の製造方法を提供するものである。
【0005】
【課題を解決するための手段】
本発明は、
1A.シ−ト状絶縁基材の所望する箇所に絶縁基材を貫通する金属柱を形成し、
1B.絶縁基材及び金属柱の所定量を研磨して絶縁基材表面及び金属柱頭頂部を平坦化し、
1C.紫外領域に発振波長を有するレーザ光を研磨面から照射し、所望する厚さの絶縁基材を選択的に除去し金属柱の所望する部分を絶縁基材面から突出させる、
工程を含むことを特徴とする接続部材の製造方法である。
【0006】
シ−ト状絶縁基材としては、ポリイミドフィルム等の可とう性のものが好ましい。
本発明で使用される研磨法としては、電解研磨法などの化学エッチング法も適用可能であるが、研磨砥粒や研磨砥粒をベルト上に固着させたものなど物理的に研磨する方法が好ましい。この場合、研磨終点はめっき柱頭頂部径が金属めっき柱形成用の凹部の直径になったときであり、凹部加工精度をがそのまま金属めっき柱頭頂部の形成精度となる。すなわち、凹部加工をレーザ光や公知のフォトリソ法などで高精度で形成することにより、金属柱頭頂部を同程度の精度で加工することが可能になる。
【0007】
絶縁基材表面から照射するレーザ光としてはエキシマレーザ光が適しており、XeF(波長:351nm)、XeCl(波長:308nm)、KrF(波長:248nm)、ArF(波長:193nm)などが使用可能である。例えば、KrFエキシマレーザ光を照射してポリイミド樹脂をアブレーション加工(エッチング加工)する場合、サブミクロンオーダーで加工深さを制御することができる。この場合、加工方式は特に限定されず、コンタクトマスク法、コンフォーマルマスク法及びマスクイメージ法などが適用できる。
【0008】
本発明の接続部材は、半導体素子やモジュ−ル基板等の検査用だけでなく接続用にも使用される。
【0009】
【実施例】
実施例1
本発明の一実施例を図1によって説明する。
外形250mm角の銅張りポリイミドフィルム(日立化成工業(株)製:商品名MCF5000-I)11(a)の銅箔上に第一のレジストパターン12を形成し(b)、公知のサブトラクト法により所定の配線パターン13を形成後、第一のレジストパターンを剥離した(c)。次に、ポリイミド面からマスクイメージ法で波長248nmのKrFエキシマレーザを所定の位置に照射し、配線パターン13に達する凹部(直径30μm)14を形成した(d)。用いたエキシマレーザは、0.2μm/パルスの加工速度であるので、必要な加工深さはパルス数を制御することにより得られる。この場合は、約150パルスで所定の部分の配線パターンを露出させることができた。
次に、配線パターン13面に第二のレジストパターン15を形成後、硫酸銅めっきにより凹部底(レーザ照射により露出した銅箔面)からポリイミド層表面以上のめっき柱16を形成した(e)。次に、めっき柱頭頂部及びポリイミド表面を研磨してめっき柱頭頂部及びポリイミド表面を平坦化した後、全面にエキシマレーザ光17を照射して(f)金属めっき柱をポリイミド表面から10μmだけ突出させた(g)。最後に、第二のレジストパターン15を剥離した後、腐食防止用表面仕上として厚さ0.2μmの無電解パターン金めっき18を施した。この場合、金属めっき柱頭頂部径dは設計値に対して±2μm以内であった。
【0010】
実施例2
本発明の一実施例を図2によって説明する。
外形250mm角、厚さ35μmの電解銅箔21(日本電解(株)製:商品名SLP-12)上に厚さ0.5μmのニッケル薄層22を形成した(a)。次に、ドライフィルムレジスト(日立化成工業(株)製:商品名HS-415ED)をラミネートし、公知の露光・現像により所望する第一のレジストパターン23を形成した。次に、硫酸銅めっきにより電流密3.0A/dm2で配線パターン24を形成した(b)。次に、第一のレジストパターン23を3.0wt%の水酸化カリウム溶液で剥離した後、ポリイミドカバーレイ25(ニッカン工業(株)製:商品名CUSV-2035)の接着剤面を配線パターン面に向かい合わせて170℃、30kgf/cm2で60分間加熱加圧することにより配線パターンと積層した(c)。続いて、カバーレイ側からマスクイメージ法で波長248nmのKrFエキシマレーザを所定の位置に照射し、配線パターン24に達する凹部(直径30μm)26を形成した(d)。用いたエキシマレーザは、0.2μm/パルスの加工速度であるので、必要な加工深さはパルス数を制御することにより得られる。この場合は、約300パルスで所定の部分の配線パターンを露出させることができた。次に、硫酸銅めっきにより露出した配線パターン面からカバーレイ表面以上のめっき柱27を形成した(e)。次に、めっき柱頭頂部及びカバーレイ表面を研磨してめっき柱頭頂部及びカバーレイ表面を平坦化した後、全面にエキシマレーザ光8を照射して金属めっき柱をカバーレイ表面から10μmだけ突出させた(f)。次に、研磨面に第二のレジストパターン29を形成した後、アルカリエッチャント(メルテックス社製:商品名 Aプロセス)で露出している銅箔21を、続いて、ニッケル薄層22をニッケルエッチング液(メルテックス社製:商品名メルストリップ)によりエッチングして配線パターン24を露出させるとともに、接続端子部30を形成した。最後に、第二のレジストパターン29を剥離した後、腐食防止用表面仕上として厚さ0.2μmの無電解パターン金めっき31を施した。
【0012】
【発明の効果】
本発明により、従来問題となっていた微細バンプ(導通用金属柱)頭頂部のXY及びZ方向の加工精度を著しく向上させることができた。
【図面の簡単な説明】
【図1】本発明の一実施例の製造工程を示す断面図である。
【図2】本発明の他の一実施例の製造工程を示す断面図である。
【符号の説明】
11.銅張りポリイミドフィルム
12.第一のレジストパターン
13.配線パターン
14.凹部
15.第二のレジストパターン
16.めっき金属柱
17.レーザ光
18.パターン金めっき
21.銅箔
22.金属薄層
23.第一のレジストパターン
24.配線パターン
25.ポリイミドカバーレイ
26.凹部
27.めっき金属柱
28.レーザ光
29.第二のレジストパターン
30.接続端子部
31.パタ−ン金めっき
[0001]
[Industrial application fields]
The present invention relates to a method for manufacturing a connecting member that electrically connects opposing electrodes arranged at a fine pitch.
[0002]
[Prior art]
Conventionally, as a connecting member for electrically inspecting semiconductor elements and module substrates, a nickel sheet is filled in a rubber sheet and pressed to ensure electrical connection, or a pin-like probe is arranged on one side was there. In addition, there are film materials in which metal bumps penetrating the heat-resistant insulating film are arranged at a predetermined density, and those having a developed wiring pattern electrically connected to the metal bumps on the opposite surface.
[0003]
In the case of an inspection substrate having a rubber sheet or a probe filled with conductive particles, there is a problem that there is a limit to miniaturization of the inspection pitch. From the above background, a film base material in which metal bumps are arranged at a predetermined pitch has been proposed. ("Microfilm connector for high-density mounting": Electronic materials, p28 (November 1992)), "Aligned fine pitch": NIKKEI MICRODEVICES, p15 (March 1992)). The metal bumps protrude upward and downward from the polyimide layer, and the upper and lower protrusions are in contact or bonded between the opposing electrodes to ensure electrical conduction. In the manufacturing method, after forming a polyimide layer on the copper foil, a recess reaching the copper foil from the polyimide layer surface is formed, and an exposed portion of the copper foil is isotropically etched by a predetermined amount, and the bottom of the recess is formed by electroplating. The metal bumps (conducting metal pillars) are formed.
[0004]
[Problems to be solved by the invention]
The cross-sectional shape of the metal bump formed by this method is a rivet shape, and the top of the bump is larger than the diameter of the recess formed in the polyimide layer. That is, even if the recess diameter can be controlled with high accuracy, the plating grows isotropically in a region larger than the polyimide layer thickness, so that it is necessary to control the accuracy in the growth direction. When bumps are actually formed in a small area by electroplating, there are complicated factors such as bump arrangement, current density, and plating tank configuration, and as a result, the bump shape (diameter, height from the polyimide layer surface) can be controlled. It was difficult. In particular, when applying fine bumps as probers for semiconductor wafer burn-in tests, if the bump height and bump diameter are uneven, good contact with the aluminum electrode in the Z direction cannot be obtained, and further in the X and Y directions. There is a problem in that the tolerance for misalignment is reduced.
The present invention provides a method of manufacturing a connection member that performs formation of metal bumps (metal pillars) that electrically connect electrodes with high accuracy.
[0005]
[Means for Solving the Problems]
The present invention
1A. Forming a metal pillar penetrating the insulating base material at a desired position of the sheet-like insulating base material;
1B. Polishing a predetermined amount of the insulating base and the metal pillar to flatten the surface of the insulating base and the top of the metal pillar,
1C. Irradiating a laser beam having an oscillation wavelength in the ultraviolet region from the polishing surface, selectively removing the insulating substrate having a desired thickness, and projecting a desired portion of the metal pillar from the insulating substrate surface,
It is a manufacturing method of the connecting member characterized by including a process.
[0006]
As the sheet-like insulating substrate, a flexible material such as a polyimide film is preferable.
As a polishing method used in the present invention, a chemical etching method such as an electrolytic polishing method can be applied, but a method of physically polishing such as a polishing abrasive or a method in which a polishing abrasive is fixed on a belt is preferable. . In this case, the polishing end point is when the diameter of the top of the plating column becomes the diameter of the recess for forming the metal plating column, and the processing accuracy of the recess is directly the formation accuracy of the top of the metal plating column. That is, by forming the recesses with high accuracy using laser light or a known photolithography method, it is possible to process the tops of the metal pillars with the same degree of accuracy.
[0007]
Excimer laser light is suitable as the laser light irradiated from the insulating substrate surface, and XeF (wavelength: 351 nm), XeCl (wavelength: 308 nm), KrF (wavelength: 248 nm), ArF (wavelength: 193 nm), etc. can be used. It is. For example, when ablation processing (etching processing) is performed on polyimide resin by irradiation with KrF excimer laser light, the processing depth can be controlled on the order of submicrons. In this case, the processing method is not particularly limited, and a contact mask method, a conformal mask method, a mask image method, and the like can be applied.
[0008]
The connection member of the present invention is used not only for inspection of a semiconductor element, a module substrate, etc. but also for connection.
[0009]
【Example】
Example 1
An embodiment of the present invention will be described with reference to FIG.
A first resist pattern 12 is formed on a copper foil of a 250 mm square copper-clad polyimide film (manufactured by Hitachi Chemical Co., Ltd .: trade name MCF5000-I) 11 (a) (b), and a known subtract method is used. After forming the predetermined wiring pattern 13, the first resist pattern was peeled off (c). Next, a KrF excimer laser with a wavelength of 248 nm was irradiated from a polyimide surface to a predetermined position by a mask image method to form a recess (diameter 30 μm) 14 reaching the wiring pattern 13 (d). Since the excimer laser used has a processing speed of 0.2 μm / pulse, the required processing depth can be obtained by controlling the number of pulses. In this case, a predetermined portion of the wiring pattern could be exposed with about 150 pulses.
Next, after forming the second resist pattern 15 on the surface of the wiring pattern 13, a plating column 16 over the polyimide layer surface was formed from the bottom of the recess (copper foil surface exposed by laser irradiation) by copper sulfate plating (e). Next, the top of the plating column and the polyimide surface were polished to flatten the plating column top and the polyimide surface, and then the entire surface was irradiated with excimer laser light (f) to project the metal plating column by 10 μm from the polyimide surface. (G). Finally, after the second resist pattern 15 was peeled off, an electroless pattern gold plating 18 having a thickness of 0.2 μm was applied as a surface finish for corrosion prevention. In this case, the metal plating column top diameter d was within ± 2 μm with respect to the design value.
[0010]
Example 2
An embodiment of the present invention will be described with reference to FIG.
A nickel thin layer 22 having a thickness of 0.5 μm was formed on an electrolytic copper foil 21 having an outer shape of 250 mm square and a thickness of 35 μm (trade name SLP-12, manufactured by Nihon Denki Co., Ltd.) (a). Next, a dry film resist (manufactured by Hitachi Chemical Co., Ltd .: trade name HS-415ED) was laminated to form a desired first resist pattern 23 by known exposure and development. Next, a wiring pattern 24 was formed by copper sulfate plating at a current density of 3.0 A / dm 2 (b). Next, after the first resist pattern 23 is peeled off with a 3.0 wt% potassium hydroxide solution, the adhesive surface of the polyimide coverlay 25 (manufactured by Nikkan Kogyo Co., Ltd .: trade name CUSV-2035) is used as the wiring pattern surface. It was laminated with the wiring pattern by heating and pressing at 170 ° C. and 30 kgf / cm 2 for 60 minutes. Subsequently, a KrF excimer laser having a wavelength of 248 nm was irradiated to a predetermined position from the coverlay side by a mask image method to form a recess (diameter 30 μm) 26 reaching the wiring pattern 24 (d). Since the excimer laser used has a processing speed of 0.2 μm / pulse, the required processing depth can be obtained by controlling the number of pulses. In this case, a predetermined portion of the wiring pattern could be exposed with about 300 pulses. Next, the plating pillar 27 beyond the coverlay surface was formed from the wiring pattern surface exposed by copper sulfate plating (e). Next, the top of the plating column and the coverlay surface are polished to flatten the plating column top and the coverlay surface, and then the entire surface is irradiated with an excimer laser beam 8 so that the metal plating column protrudes from the coverlay surface by 10 μm. (F). Next, after forming a second resist pattern 29 on the polished surface, the copper foil 21 exposed by an alkali etchant (manufactured by Meltex: trade name A process) is exposed, and then the nickel thin layer 22 is nickel etched. The wiring pattern 24 was exposed by etching with a liquid (Meltex, product name: Melstrip), and the connection terminal portion 30 was formed. Finally, after the second resist pattern 29 was peeled off, an electroless pattern gold plating 31 having a thickness of 0.2 μm was applied as a surface finish for corrosion prevention.
[0012]
【The invention's effect】
According to the present invention, the processing accuracy in the XY and Z directions of the tops of the fine bumps (conducting metal columns), which has been a problem in the past, can be remarkably improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a manufacturing process of an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a manufacturing process of another embodiment of the present invention.
[Explanation of symbols]
11. Copper-clad polyimide film 12. First resist pattern 13. Wiring pattern 14. Recess 15. Recess resist pattern 16. Plating metal pillar 17. Laser beam 18. Pattern gold plating 21. Copper foil 22. Metal thin layer 23. First resist pattern 24. Wiring pattern 25. Polyimide coverlay 26. Recess 27. Plating metal column 28. Laser light 29. Second resist pattern 30. Connection terminal portion 31. Pattern gold plating

Claims (1)

2A.導電性を有する仮基板上に仮基板とエッチング条件の異なる金属薄層を形成し、
2B.金属薄層上に、所定のレジストパターンを形成し、
2C.仮基板を電極にして所定の配線パターンを形成後、レジストパターンを剥離し、
2D.配線パターンに面して絶縁基材を積層し、
2E.絶縁基材側から配線パターンに達する凹部を所定の位置に形成し、
2F.仮基板を電極として電気めっき法により凹部底から絶縁基材表面以上に金属めっき柱を析出させ、
2G.絶縁基材及び金属めっき柱の所定量を研磨して絶縁基材表面及び金属めっき柱頭頂部を平坦化し、
2H.紫外領域に発振波長を有するレーザ光を研磨面から照射し、所望する厚さの絶縁基材を選択的に除去し、金属めっき柱の所望する部分を絶縁基材表面から突出させ、
2I.仮基板、続けて金属薄層の所望する部分をエッチング除去する、
工程を含むことを特徴とする接続部材の製造方法。
2A. Form a metal thin layer with different etching conditions from the temporary substrate on the temporary substrate having conductivity,
2B. A predetermined resist pattern is formed on the thin metal layer,
2C. After forming a predetermined wiring pattern using the temporary substrate as an electrode, strip the resist pattern,
2D. Laminate insulating base material facing the wiring pattern,
2E. Form a recess reaching the wiring pattern from the insulating substrate side at a predetermined position,
2F. Deposit a metal plating column from the bottom of the recess to the surface of the insulating base material by electroplating using the temporary substrate as an electrode,
2G. Polishing a predetermined amount of the insulating substrate and metal plating column to flatten the surface of the insulating substrate and the top of the metal plating column,
2H. A laser beam having an oscillation wavelength in the ultraviolet region is irradiated from the polishing surface, the insulating base material having a desired thickness is selectively removed, and a desired portion of the metal plating column is projected from the insulating base surface,
2I. Etching away the desired portion of the temporary substrate, followed by the thin metal layer,
The manufacturing method of the connection member characterized by including a process.
JP03817895A 1995-02-27 1995-02-27 Manufacturing method of connecting member Expired - Fee Related JP3873294B2 (en)

Priority Applications (1)

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JP03817895A JP3873294B2 (en) 1995-02-27 1995-02-27 Manufacturing method of connecting member

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Application Number Priority Date Filing Date Title
JP03817895A JP3873294B2 (en) 1995-02-27 1995-02-27 Manufacturing method of connecting member

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