JP3903643B2 - Epitaxial wafer manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an epitaxial wafer manufacturing method in which an epitaxial layer is formed on a silicon wafer manufactured by the Czochralski method (hereinafter referred to as CZ method).
[0002]
[Prior art]
So far, epitaxial wafers have been applied first to high performance bipolar transistors and then to bipolar ICs. In an epitaxial wafer, an epitaxial layer of single crystal silicon having an arbitrary film thickness and resistivity can be formed on a silicon wafer as a substrate. For example, a high-speed transistor can be formed by forming a high-resistance epitaxial layer on a low-resistance substrate. Can be realized. Further, effective separation between pn junction elements, which is essential in a bipolar IC, is effectively performed by forming an epitaxial layer. In recent years, device integration has progressed, and crystal growth introduction defects (hereinafter referred to as grown-in defects) near the surface of a CZ silicon wafer reduce the yield of the device. Therefore, the epitaxial layer does not contain grown-in defects. Wafers have been widely used as MOS LSI substrates.
[0003]
In the CZ silicon wafer, a ring-shaped oxidation induced stacking fault (hereinafter referred to as OSF) is manifested during the thermal oxidation in the semiconductor device manufacturing process due to the pulling speed when pulling up the silicon single crystal. Or an interstitial-type large dislocation (hereinafter referred to as L / D). This L / D is one of the lattice defects of the crystal, and appears as a boundary between the slipped portion and the non-slip portion inside the crystal, and the portion where the crystal lattice is cut is partially connected in a linear shape. It is an intrusive line defect. If L / D is present on the surface of a silicon wafer serving as a substrate for epitaxial growth, when the epitaxial layer is formed on this wafer, the L / D is transferred and the marks become large, increasing the defect density on the surface of the epitaxial layer. .
In the case where the silicon wafer as the substrate is a wafer in which OSF appears or a wafer in which L / D is present, these are the electrical characteristics of the device, for example, the dielectric breakdown characteristics of the oxide film over time (Time Dependent dielectric breakdown (TDDB), oxide breakdown voltage characteristics (Time Zero Dielectric Breakdown, TZDB), pn junction leakage characteristics, and the like are degraded, and the yield of products is lowered.
[0004]
In addition, as shown by solid lines (a) to (c) in FIG. 4, when the CZ silicon wafer is a p-type wafer doped with B (boron) before the epitaxial layer is formed on the surface thereof, The higher the oxygen concentration, the higher the density of oxygen precipitates (Bulk Micro Defect, hereinafter referred to as BMD) generated by heat treatment in the semiconductor device manufacturing process. This BMD has a so-called intrinsic gettering (hereinafter referred to as IG) effect that captures a trace amount of heavy metal impurities that enter during the device manufacturing process.
Further, as shown by broken lines and chain lines (d) to (f) in FIG. 4, the CZ silicon wafer is a p-type wafer doped with B after an epitaxial layer is formed on the surface thereof, and the B concentration of the wafer is 10 ^When it is less than ¹⁸ atoms / cm ³ , the generation of the BMD is suppressed regardless of the oxygen concentration, and the IG effect cannot be sufficiently obtained. On the other hand, when the B concentration of the wafer is 10 ¹⁸ atoms / cm ³ or more, BMD is generated at a high density as much as the wafer before the epitaxial layer is formed, and has an IG effect.
The BMD density is a value obtained when the silicon wafer was heat-treated at 750 ° C. for 8 hours and subsequently at 1000 ° C. for 16 hours.
[0005]
[Problems to be solved by the invention]
However, when the B concentration of the CZ wafer pulled up under the condition that causes the OSF ring is increased to 10 ¹⁸ atoms / cm ³ or more, after the epitaxial layer is formed, the BMD in the portion corresponding to the ring is more than the other portion. In contrast to the high density generation, BMD generation is remarkably suppressed outside the OSF ring, and the IG effect is not uniform within the wafer surface.
[0006]
An object of the present invention, uniform IG effect within the wafer surface uniformly dense BMD in the wafer surface is generated by the heat treatment after the formation of the epitaxial layer can be obtained, to provide a method for producing an epitaxial wafer It is in.
Another object of the present invention does not cause transfer marks of L / D in the epitaxial layer at the time of forming the epitaxial layer is to provide a method for producing an epitaxial wafer.
[0007]
[Means for Solving the Problems]
The invention according to claim 1 is a ring-shaped oxidation in which D ₁ / D ₀ is 0.9 when a first silicon single crystal ingot manufactured by the Czochralski method without doping a dopant is thermally oxidized. Obtaining V / G causing an induced stacking fault;
Preparing a second silicon single crystal ingot with boron 9 × 10 ¹⁸ atoms / cm ³ or more doped and set the V / G on the determined the V / G of the first silicon single crystal ingot under the same conditions except that A step of slicing the second silicon single crystal ingot to produce a silicon wafer, and a step of forming an epitaxial layer on the surface of the silicon wafer by chemical vapor deposition (hereinafter referred to as CVD). It is the manufacturing method of the epitaxial wafer characterized by including. Here, D ₁ refers to the ring diameter of the oxidation-induced stacking fault, and D ₀ refers to the diameter of the wafer sliced from the ingot.
[0009]
When a p-type impurity such as B is doped to a predetermined concentration or more, BMD is generated at a high density inside the wafer when heat treatment is performed even after the epitaxial layer is formed. Here, since the wafer is made so that the OSF disappears in the center portion, this BMD is generated uniformly in the wafer surface, thereby obtaining a uniform IG effect in the wafer surface. Also, since B is doped at a high concentration, L / D does not appear at all on the wafer before the epitaxial layer is formed, and even if an epitaxial layer is formed on the wafer surface, L / D transfer marks are formed on the epitaxial layer surface. Don't make it happen.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
The silicon wafer for laminating the epitaxial layer of the present invention is produced by pulling up an ingot from a silicon melt in a hot zone furnace under a predetermined condition by the CZ method and then slicing the ingot.
The predetermined condition is that when the ingot pulling rate is V (mm / min) and the temperature gradient in the ingot vertical direction of the contact surface of the ingot-silicon melt is G (° C./mm) in the hot zone structure, V / G (mm ² / min · ° C.) is controlled.
[0011]
As described above, when this CZ silicon wafer is subjected to a thermal oxidation process (for example, at 1000 to 1100 ° C. for 1 to 2 hours), a ring-like OSF may be generated. The OSF ring moves toward the outer periphery of the ingot as V / G increases, and the ring diameter decreases as V / G decreases, and after disappearing into a disk shape at the center of the wafer, it disappears.
The ring diameter changes according to the doping amount of B (boron), which is a p-type impurity, even if V / G is kept constant. As shown in FIG. 2, the ring diameter of OSF is D ₁ and the diameter of the wafer is D ₀ , and the relationship between D ₁ / D ₀ and the concentration of B at this time is shown in FIG. As is apparent from FIG. 3, when the B concentration is 2 × 10 ¹⁸ atoms / cm ³ or less, it forms a ring shape, becomes a disk shape at about 6 × 10 ¹⁸ atoms / cm ³ , and 9 × 10 ¹⁸ atoms / cm ^3. When it is over, it disappears.
[0012]
The front surface of the silicon wafer of the present invention, the epitaxial layer by epitaxial growth of silicon is formed. For this epitaxial growth, a CVD method is employed from the viewpoints of crystallinity of the epitaxial layer, mass productivity, simplicity of the apparatus, and ease of forming various device structures. In the epitaxial growth of silicon by the CVD method, for example, a source gas containing silicon such as SiCl ₄ , SiHCl ₃ , SiH ₂ Cl ₂ , SiH _{4 and the} like is introduced into the reaction furnace together with H ₂ gas, and the source material is formed on the surface of the silicon wafer. This is performed by precipitating silicon produced by thermal decomposition or reduction of gas.
Since the silicon wafer of the present invention is doped with B to 9 × 10 ¹⁸ atoms / cm ³ or more, the resistivity becomes a low resistance of 0.02 Ωcm or less. Here, if the epitaxial layer has a high resistance, it becomes an epitaxial wafer suitable for an epitaxial wafer for a high-performance bipolar transistor or bipolar IC. When forming this high resistance epitaxial layer, a gas such as B ₂ H ₆ is used together with the raw material gas.
[0013]
【Example】
Next, examples of the present invention will be described together with comparative examples.
<Example 1>
V / G is set so that D ₁ / D ₀ shown in FIG. 2 when the dopant is not doped is 0.9, and the dopant B is a concentration of 9 × 10 ¹⁸ atoms / cm ³ with this V / G. The silicon single crystal ingot was pulled up by doping. A silicon wafer sliced from this ingot was lapped, chamfered, and then mirror polished to prepare a p ⁺⁺ type silicon wafer having a resistivity of 0.01 Ωcm and a size of 6 inches. When this wafer was heat-treated in an oxygen atmosphere at 1100 ° C. for 1 hour, OSF was not generated in a ring shape or a disk shape.
By using atmospheric pressure CVD (760 Torr) on the surface of the silicon wafer, SiHCl ₃ is used as a source gas, and B ₂ H ₆ gas is used for adjusting the resistance of the epitaxial layer. The growth temperature is 1135 ° C. and the growth rate is 3 μm / min. Under the conditions, an epitaxial layer having a thickness of 5 μm and a resistivity of 10 Ωcm was formed. Thus, an epitaxial wafer having a high resistance epitaxial layer was obtained with a low resistance substrate.
This epitaxial wafer was heat-treated at 750 ° C. for 8 hours and subsequently at 1000 ° C. for 16 hours in a manner similar to the semiconductor device manufacturing process. After the heat treatment, this wafer is cleaved, and the epitaxial layer and the underlying wafer surface are selectively etched with a Wright etching solution, and the periphery of the wafer from the wafer center at a depth of 300 μm is observed by an optical microscope. The BMD up to the part was measured to determine its density. The result is shown in FIG.
<Comparative Example 1>
The silicon single crystal ingot was pulled up at the same V / G as in Example 1 except that B (boron) was doped at a concentration of 2 × 10 ¹⁷ atoms / cm ³ , and the resistivity was 0.15 Ωcm as in Example 1. Thus, a p ⁺ type silicon wafer having a size of 6 inches was produced. When this wafer was heat-treated under the same conditions as in Example 1, OSF appeared in a ring shape on the peripheral side of the wafer (D ₁ / D ₀ = 0.9).
An epitaxial layer having a thickness of 5 μm and a resistivity of 10 Ωcm was formed on the surface of the silicon wafer under the same conditions as in Example 1 to obtain an epitaxial wafer. This epitaxial wafer was heat-treated in the same manner as in Example 1 to determine the BMD density from the center to the periphery of the wafer. The result is shown in FIG.
[0014]
<Comparative example 2>
At the time of pulling, B (boron) is doped so as to have the same concentration (9 × 10 ¹⁸ atoms / cm ³ ) as in Example 1 so that V / G becomes large (D ₁ / D ₀ = 0.3). The silicon single crystal ingot was pulled up. Other than this, a p ⁺⁺ type silicon wafer having a resistivity of 0.01 Ωcm and a size of 6 inches was obtained in the same manner as in Example 1. When this wafer was heat-treated under the same conditions as in Example 1, OSF appeared in the center of the wafer in a ring shape. An epitaxial layer having a thickness of 5 μm and a resistivity of 10 Ωcm was formed on the surface of the silicon wafer under the same conditions as in Example 1 to obtain an epitaxial wafer. This epitaxial wafer was heat-treated in the same manner as in Example 1 to determine the BMD density from the center to the periphery of the wafer. The result is shown in FIG.
[0015]
<Comparative Example 3>
B (boron) is doped at a concentration of 1.4 × 10 ¹⁵ atoms / cm ³ , V / G is smaller than that in Example 1, and OSF generated in a ring shape when thermally oxidized is formed at the center of the wafer. The silicon single crystal ingot was pulled up with V / G disappearing, and a p ⁻ type silicon wafer having a resistivity of 10 Ωcm was produced in the same manner as in Example 1. An epitaxial layer having a thickness of 5 μm, a resistivity of 10 Ωcm, and a size of 6 inches was formed on the surface of the silicon wafer under the same conditions as in Example 1 to obtain an epitaxial wafer. This epitaxial wafer was heat-treated in the same manner as in Example 1 to determine the BMD density from the center to the periphery of the wafer. The result is shown in FIG.
[0016]
<Comparison evaluation>
As is clear from FIG. 1, in the wafer in which the epitaxial layer of Example 1 is laminated, the BMD density is high and uniform at about 1.3 × 10 ¹⁰ pieces / cm ³ from the wafer center to the periphery. (FIG. 1 (a)). On the other hand, in the wafer in which the epitaxial layer of Comparative Example 1 was laminated, the BMD density at the peripheral portion of the wafer was about 0.5 × 10 ¹⁰ pieces / cm ³ , but almost no BMD occurred in the other portions ( FIG. 1 (b)). Further, in the wafer on which the epitaxial layer of Comparative Example 2 is laminated, the BMD density in the portion corresponding to the OSF ring is about 1.8 × 10 ¹⁰ pieces / cm ³ , but the BMD density in the center of the wafer is about 1. in 0 × 10 ¹⁰ atoms / cm ^3, also the BMD density of the wafers periphery is about 0.6 × 10 ¹⁰ atoms / cm ^3, was heterogeneous in the wafer surface (FIG. 1 (c)). Further, in the wafer on which the epitaxial layer of Comparative Example 3 was laminated, almost no BMD was generated over the entire surface of the wafer (FIG. 1 (d)).
[0017]
As a result, the epitaxial wafers of Comparative Examples 1 and 3 had a low IG effect, and the epitaxial wafer of Comparative Example 2 had a non-uniform IG effect in the wafer plane. In contrast, the epitaxial wafer of Example 1 was found to have a high IG effect.
[0018]
Each epitaxial wafer of Example 1 and Comparative Examples 1 to 3 is immersed in a Secco etching solution for 2 minutes without stirring, and after finding the presence or absence of a specific flow pattern that appears, this becomes the source of this trace. The part was observed with an optical microscope and examined for the presence or absence of L / D transfer marks. As a result, there was no L / D transfer mark over the entire surface of the epitaxial wafers of Example 1 and Comparative Example 2 having a relatively high B concentration. On the other hand, L / D transfer marks were observed on the epitaxial wafer of Comparative Example 3 in which the B concentration was relatively low and the ring-shaped OSF disappeared at the center. In particular, 20 to 30 Comparative Examples 3 having a B concentration of 10 ¹⁵ atoms / cm ³ were observed per wafer.
[0019]
【The invention's effect】
As described above, according to the present invention, a silicon wafer having a resistivity of 0.02 Ωcm or less and in which oxidation-induced stacking faults generated in a ring shape during thermal oxidation treatment disappeared at the center of the wafer is epitaxially formed. When the epitaxial wafer is manufactured by forming an epitaxial layer on the wafer surface as a substrate for layer stacking and then heat-treating the epitaxial wafer , a high-density BMD is uniformly generated in the wafer surface, and the wafer surface A uniform IG effect can be obtained. Further, when an epitaxial layer is formed, L / D transfer marks are not generated in the epitaxial layer. As a result, an epitaxial wafer with improved electrical characteristics and a high yield during manufacture can be obtained.
[Brief description of the drawings]
FIG. 1 is a view showing a BMD density distribution in a wafer surface in wafers of examples and comparative examples of the present invention.
FIG. 2 is a plan view of a silicon wafer in which OSF has occurred.
FIG. 3 is a diagram showing a change in the value of D ₁ / D ₀ when the B concentration is changed with V / G kept constant.
FIG. 4 is a diagram showing a relationship between B concentration and BMD density of a silicon wafer before and after forming an epitaxial layer.

Claims (1)

When a first silicon single crystal ingot manufactured by the Czochralski method without doping a dopant is subjected to a thermal oxidation treatment, a ring-shaped oxidation-induced stacking fault with D ₁ / D ₀ of 0.9 is generated. The process of seeking
Preparing a second silicon single crystal ingot with boron 9 × 10 ¹⁸ atoms / cm ³ or more doped and set the V / G on the determined the V / G of the first silicon single crystal ingot under the same conditions except that And a process of
Slicing the second silicon single crystal ingot to produce a silicon wafer;
A step of forming by a chemical vapor deposition epitaxial layer on the surface of the silicon wafer
A method for producing an epitaxial wafer, comprising:
Here, D ₁ refers to the ring diameter of the oxidation-induced stacking fault, and D ₀ refers to the diameter of the wafer sliced from the ingot.

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