JP3930453B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a capacitor.
[0002]
[Prior art]
In recent years, a ferroelectric memory (FeRAM: Ferroelectric Random Access Memory) using a ferroelectric film as a dielectric film of a capacitor has been developed.
[0003]
A typical ferroelectric film used in the ferroelectric memory is a Pb (Zr _x Ti _1-x ) O ₃ film (PZT film) or a SrBi ₂ Ta ₂ O ₉ film (SBT film). PZT is a perovskite compound, and SBT is a Bi layered compound having a pseudo perovskite structure.
[0004]
When a PZT film is used as the ferroelectric film, a conductive perovskite metal oxide film such as a SrRuO ₃ film (SRO film) is used for the electrode from the viewpoint of improving fatigue characteristics. For example, Patent Literature 1 and Patent Literature 2 describe ferroelectric capacitors using a laminated film of an SRO film and a Pt film as electrodes.
[0005]
On the other hand, recently, a ferroelectric memory having a COP (Capacitor On Plug) structure has been developed. In the COP structure, since a plug connected to the transistor is provided immediately below the capacitor, a higher-density ferroelectric memory can be manufactured. When the COP structure is adopted, the plug may be oxidized during the heat treatment in an oxygen atmosphere indispensable for the production of the ferroelectric capacitor. Therefore, it is necessary to use a noble metal film such as Ir having a high barrier property for the electrode.
[0006]
Here, in the COP structure, it is assumed that a laminated structure of an SRO film and an Ir film is used for the electrode. In this case, Ir and Sr contained in the SRO film react with each other by heat treatment or the like, causing a problem that the crystallinity of the SRO film is remarkably lowered. As a result, the characteristics and reliability of the capacitor are significantly deteriorated. Such a problem is not limited to the combination of an SRO film and an Ir film, but can generally occur in a combination of a conductive perovskite metal oxide film and a noble metal film (or noble metal oxide film).
[0007]
[Patent Document 1]
JP 2000-208725 A
[Patent Document 2]
Japanese Patent Laid-Open No. 2000-260954
[Problems to be solved by the invention]
As described above, when a laminated structure of a conductive perovskite metal oxide film and a noble metal film (or noble metal oxide film) is used for a capacitor electrode, there is a problem that the characteristics and reliability of the capacitor are remarkably deteriorated. .
[0010]
The present invention has been made to solve the above-described conventional problems, and an object thereof is to provide a semiconductor device capable of improving the characteristics and reliability of a capacitor.
[0011]
[Means for Solving the Problems]
A semiconductor device according to the present invention includes a semiconductor substrate, a dielectric film provided above the semiconductor substrate, a lower electrode, an upper electrode, a dielectric film provided between the lower electrode and the upper electrode, and containing Pb And at least one of the lower electrode and the upper electrode is a conductive film selected from an iridium film and an iridium oxide film, and between the dielectric film and the conductive film. A perovskite-type metal oxide film that is provided as ABO ₃ and includes Ru as the first metal element as a B-site element; and between the conductive film and the metal oxide film; and ABO And a metal film composed of a second metal element that can be a B-site element of the perovskite-type metal oxide represented by ₃ , wherein the Gibbs free energy when the second metal element forms an oxide The amount of decrease is greater than the amount of decrease in Gibbs free energy when the first metal element forms an oxide.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0014]
(Embodiment 1)
FIG. 1A to FIG. 1C are cross-sectional views showing a manufacturing process of a semiconductor device according to the first embodiment of the present invention.
[0015]
First, as shown in FIG. 1A, an element isolation region 101 having an STI (Sallow Trench Isolation) structure is formed on a p-type silicon substrate (semiconductor substrate) 100. Subsequently, the MIS transistor is formed as follows.
[0016]
First, a silicon oxide film having a thickness of about 6 nm is formed as the gate insulating film 102 by thermal oxidation. Subsequently, an n ⁺ type polycrystalline silicon film 103 doped with arsenic is formed on the gate insulating film 102. Further, a WSi _x film 104 and a silicon nitride film 105 are formed on the polycrystalline silicon film 103. Thereafter, the polycrystalline silicon film 103, the WSi _x film 104, and the silicon nitride film 105 are processed by a normal photolithography method and an RIE method to form a gate electrode. Subsequently, a silicon nitride film 106 is deposited on the entire surface. Further, RIE is performed to form a sidewall spacer made of the silicon nitride film 106 on the sidewall of the gate electrode. Although not described in detail, in this step, the source / drain region 107 is formed by ion implantation and heat treatment.
[0017]
Next, as shown in FIG. 1B, a silicon oxide film 108 is deposited on the entire surface by a CVD (Chemical Vapor Deposition) method, and a planarization process is further performed by a CMP method. Subsequently, a contact hole reaching one source / drain region 107 is formed in the silicon oxide film 108. Thereafter, a titanium film is deposited by sputtering or CVD. Subsequently, the TiN film 110 is formed by nitriding the titanium film by performing a heat treatment in a forming gas. Further, a tungsten film 111 is deposited by the CVD method. Subsequently, the TiN film 110 and the tungsten film 111 outside the contact hole are removed by CMP, and the TiN film 110 and the tungsten film 111 are left in the contact hole. As a result, a plug connected to one of the source / drain regions 107 is formed. Thereafter, a silicon nitride film 112 is deposited on the entire surface by CVD. Further, a contact hole reaching the other source / drain region 107 is formed. Subsequently, a TiN film 114 and a tungsten film 115 are formed in the contact hole by the same method as described above. As a result, a plug connected to the other source / drain region 107 is formed.
[0018]
Next, as shown in FIG. 1C, a titanium film 116 with a thickness of 10 nm, an iridium film 117 with a thickness of 100 nm as a noble metal film, a titanium film 118 with a thickness of 2.5 nm as a metal film, and a conductive perovskite type A SrRuO ₃ film (SRO film) 119 having a thickness of 10 nm is sequentially deposited as a metal oxide film by a sputtering method. Subsequently, the SRO film 119 is crystallized by RTA (Rapid Thermal Annealing) in an oxygen atmosphere. Thereafter, a _{Pb (Zr x Ti 1-x} ) O 3 film (PZT film) 120 is formed by a sputtering method as a dielectric film of the capacitor. Further, the PZT film 120 is crystallized by RTA in an oxygen atmosphere. Subsequently, an SRO film 121 having a thickness of 10 nm is deposited as a conductive perovskite metal oxide film by a sputtering method. Further, the SRO film 121 is crystallized by RTA in an oxygen atmosphere. For example, by depositing the SRO film 121 at a temperature of 500 ° C., the SRO film 121 having excellent crystallinity can be easily formed. Subsequently, a titanium film 122 having a thickness of 2.5 nm as a metal film and an iridium film 123 having a thickness of 100 nm as a noble metal film are sequentially deposited by a sputtering method.
[0019]
Next, a silicon oxide film (not shown) is deposited on the entire surface by CVD. Further, the silicon oxide film is patterned by photolithography and RIE. Subsequently, the iridium film 123, the titanium film 122, the SRO film 121, and the PZT film 120 are etched by the RIE method using the patterned silicon oxide film as a mask. Further, the SRO film 119, the titanium film 118, the iridium film 117, and the titanium film 116 are patterned by photolithography and RIE.
[0020]
In this way, the lower electrode having the laminated structure of the titanium film 116, the iridium film 117, the titanium film 118, and the SRO film 119, the ferroelectric film (PZT film 120), the SRO film 121, the titanium film 122, and the iridium film. A ferroelectric capacitor having an upper electrode having 123 stacked structures is formed.
[0021]
Thereafter, a silicon oxide film 124 is deposited on the entire surface by CVD. Further, in order to recover the damage generated in the PZT film 120 during etching, a heat treatment at about 650 ° C. is performed in an oxygen atmosphere. During this heat treatment, oxygen reaches below the PZT film 120, but the oxygen barrier action of the iridium film 117 prevents the tungsten plug 115 from being oxidized.
[0022]
Although the subsequent steps are not shown, the contact portion connected to the tungsten film 111, the formation of the drive line and the bit line, the formation of the metal wiring, and the like are performed to complete the ferroelectric memory having the COP structure.
[0023]
In the above-described embodiment, the structure in which the titanium film is provided between the SRO film and the iridium film is used for both the lower electrode and the upper electrode, but such a structure is used for one of the lower electrode and the upper electrode. Also good. For example, such a structure may be used for the lower electrode, and a laminated structure of an SRO film and a platinum film may be used for the upper electrode.
[0024]
Hereinafter, the characteristic improvement effect of the ferroelectric capacitor according to the present embodiment will be described with reference to FIGS.
[0025]
As a comparative example of this embodiment, a sample in which a SiO ₂ film, a titanium film (thickness 10 nm), an iridium film (120 nm), an SRO film (10 nm), a PZT film, and a platinum film (50 nm) are sequentially formed on a silicon substrate. Was made. Regarding the SRO film and the PZT film, after an amorphous film was formed by sputtering, crystallization was performed by annealing in an oxygen atmosphere. FIG. 2 shows the leakage current characteristics of the sample thus obtained. Compared with the sample of this embodiment described later, the leakage current characteristic is remarkably deteriorated.
[0026]
As a comparative example, a sample in which a SiO ₂ film, a titanium film (thickness 10 nm), an iridium film (120 nm), and an SRO film (10 nm) were sequentially formed on a silicon substrate was prepared. The SRO film is an amorphous film formed by sputtering and then crystallized by annealing in an oxygen atmosphere. FIG. 3 shows the result of in-plane diffraction of the sample thus obtained. A diffraction peak of SrRuO ₃ (121) is observed around 2θ / θ = 32 degrees. Further, a RuO ₂ (110) diffraction peak is observed near 2θ / θ = 28 degrees, and a RuO ₂ (101) diffraction peak is observed near 2θ / θ = 32 degrees.
[0027]
The deterioration of the leakage current characteristic in FIG. 2 is considered to be caused by the RuO ₂ . That is, in the sample of FIG. 2, an amorphous PZT film is formed on an SRO film containing RuO _{2 and} having low crystallinity, and further crystallization is performed. Therefore, Pb and RuO ₂ react at the interface between the PZT film and the SRO film and at the grain boundary of PZT, and a conductive compound such as Pb ₂ Ru ₂ O _7-x is formed. It is considered that this conductive compound becomes a leak path and the leak current increases.
[0028]
On the other hand, as a sample of this embodiment, a SiO ₂ film, a titanium film (thickness 10 nm), an iridium film (120 nm), a titanium film (2.5 nm), an SRO film (10 nm), a PZT film, and platinum are formed on a silicon substrate. A film (50 nm) was sequentially formed. Regarding the SRO film and the PZT film, after an amorphous film was formed by sputtering, crystallization was performed by annealing in an oxygen atmosphere. FIG. 4 shows the leakage current characteristics of the sample thus obtained. Compared with the sample of the comparative example, the leakage current characteristics are remarkably improved.
[0029]
Further, as a sample of this embodiment, a sample in which an SiO ₂ film, a titanium film (thickness 10 nm), an iridium film (120 nm), a titanium film (2.5 nm), and an SRO film (10 nm) are sequentially formed on a silicon substrate. Was made. The SRO film is an amorphous film formed by sputtering and then crystallized by annealing in an oxygen atmosphere. FIG. 5 shows the result of in-plane diffraction of the sample thus obtained. As can be seen from FIG. 5, the diffraction peak of RuO ₂ as shown in FIG. 3 is not observed. Therefore, in the present embodiment, an SRO film having extremely excellent crystallinity can be obtained.
[0030]
FIG. 6 shows hysteresis characteristics in the sample of this embodiment. FIG. 7 shows the fatigue characteristics of the sample of this embodiment. As can be seen from FIGS. 6 and 7, extremely good characteristics were obtained for both hysteresis characteristics and fatigue characteristics.
[0031]
Thus, by providing the titanium film between the SRO film and the iridium film, the characteristics of the capacitor can be improved. Hereinafter, this characteristic improvement effect will be further described.
[0032]
From the results of the first principle calculation of the formation free energy of the conductive perovskite-type metal oxide, the thermodynamic stability of the conductive perovskite-type metal oxide (represented by the general formula ABO ₃ ) It has been found that it is proportional to the thermodynamic stability of the oxide (BO _x ). The A-site element is an alkaline earth element or a rare earth element, and forms an extremely stable oxide. Therefore, it can be considered that the stability of the conductive perovskite metal oxide is determined by the stability of the oxide of the B-site element.
[0033]
FIG. 8 shows the formation enthalpy per oxygen molecule of a simple oxide at 25 ° C. for various metal elements. The greater the absolute value of the numerical value shown in FIG. 8, the higher the stability of the oxide. That is, as the absolute value of the numerical value shown in FIG. 8 is larger, the amount of decrease in Gibbs free energy when the metal element generates an oxide is larger.
[0034]
As can be seen from FIG. 8, it is -72.8 (kcal / mol) for Ru, which is the B site element of SRO, and -225.8 (kcal / mol) for Ti. That is, Ti oxide is more stable than Ru oxide. As described above, it is known that the thermodynamic stability of the conductive perovskite metal oxide is proportional to the thermodynamic stability of the oxide of the B site element. Therefore, by replacing at least a part of Ru contained in SRO with Ti, the stability of SRO increases.
[0035]
In this embodiment, a titanium film is provided between the SRO film and the iridium film. Therefore, it is considered that a part of Ru contained in the SRO film is replaced with Ti by heat treatment or the like. Therefore, it is considered that the inclusion of Ti improves the stability of the SRO film, thereby suppressing the generation of a conductive compound such as RuO _{2 and} consequently improving the capacitor characteristics.
[0036]
As described above, in this embodiment, by providing the titanium film between the SRO film and the iridium film, the stability of the SRO film is improved and the characteristics of the capacitor can be improved. Further, when such a structure is used for the lower electrode, the oxidation of the tungsten plug can be suppressed by the barrier action of the iridium film. Therefore, even when the COP structure is adopted, a ferroelectric memory having excellent characteristics and reliability can be obtained.
[0037]
(Embodiment 2)
FIG. 9A to FIG. 9C are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the second embodiment of the present invention.
[0038]
The processes of FIGS. 9A and 9B are substantially the same as the processes of FIGS. 1A and 1B of the first embodiment, and description thereof is omitted.
[0039]
After the step of FIG. 9B, as shown in FIG. 9C, a titanium film 116 having a thickness of 10 nm and an iridium film 117 having a thickness of 100 nm as a noble metal film are sequentially deposited by a sputtering method. Subsequently, an SRO film (Sr (Ru, Ti) O ₃ film) 119a doped with titanium having a thickness of 10 nm is deposited as a conductive perovskite metal oxide film by a sputtering method. Subsequently, the SRO film 119a doped with titanium is crystallized by RTA in an oxygen atmosphere. Thereafter, a _{Pb (Zr x Ti 1-x} ) O 3 film (PZT film) 120 is formed by sputtering as the dielectric film of the capacitor. Further, the PZT film 120 is crystallized by RTA in an oxygen atmosphere. Subsequently, an SRO film (Sr (Ru, Ti) O ₃ film) 121a doped with titanium having a thickness of 10 nm is deposited as a conductive perovskite metal oxide film by a sputtering method. Further, the SRO film 121a doped with titanium is crystallized by RTA in an oxygen atmosphere. Subsequently, an iridium film 123 having a thickness of 100 nm is deposited as a noble metal film by a sputtering method.
[0040]
Next, a silicon oxide film (not shown) is deposited on the entire surface by CVD. Further, the silicon oxide film is patterned by photolithography and RIE. Subsequently, the iridium film 123, the SRO film 121a, and the PZT film 120 are etched by the RIE method using the patterned silicon oxide film as a mask. Further, the SRO film 119a, the iridium film 117, and the titanium film 116 are patterned by photolithography and RIE.
[0041]
Thus, the lower electrode having a laminated structure of the titanium film 116, the iridium film 117, and the SRO film 119a, the ferroelectric film (PZT film 120), and the upper electrode having the laminated structure of the SRO film 121a and the iridium film 123. Is formed.
[0042]
Thereafter, a silicon oxide film 124 is deposited on the entire surface by CVD. Further, in order to recover the damage generated in the PZT film 120 during etching, a heat treatment at about 650 ° C. is performed in an oxygen atmosphere. During this heat treatment, oxygen reaches below the PZT film 120, but the oxygen barrier action of the iridium film 117 prevents the tungsten plug 115 from being oxidized.
[0043]
Although the subsequent steps are not shown, the contact portion connected to the tungsten film 111, the formation of the drive line and the bit line, the formation of the metal wiring, and the like are performed to complete the ferroelectric memory having the COP structure.
[0044]
In the above-described embodiment, the laminated structure of the SRO film doped with titanium and the iridium film is used for both the lower electrode and the upper electrode. However, such a structure may be used for one of the lower electrode and the upper electrode. . For example, such a structure may be used for the lower electrode, and a laminated structure of an SRO film and a platinum film not doped with titanium may be used for the upper electrode.
[0045]
As described above, in this embodiment, a laminated structure of an SRO film doped with titanium and an iridium film is used. Therefore, as described in the first embodiment, the stability of the SRO film is improved, and the characteristics of the capacitor can be improved. Further, when such a laminated structure is used for the lower electrode, the oxidation of the tungsten plug can be suppressed by the barrier action of the iridium film. Therefore, even when the COP structure is adopted, a ferroelectric memory having excellent characteristics and reliability can be obtained.
[0046]
The first and second embodiments described above can be variously modified as follows.
[0047]
In the first and second embodiments, the SRO film (SrRuO ₃ film) is used as the conductive perovskite metal oxide film. However, a (La, Sr) CoO ₃ film, a BaRuO ₃ film, or a LaNiO ₃ film is used. May be. In general, a conductive perovskite metal oxide film containing at least one of Ru, Co, and Ni as the B site element can be used.
[0048]
In the first and second embodiments, the iridium film (Ir film) is used as the noble metal film (conductive film). However, a ruthenium film (Ru film) or a platinum film (Pt film) may be used. Further, a noble metal film oxide film such as an iridium oxide film (IrO ₂ film) or a ruthenium oxide film (RuO ₂ film) may be used instead of the noble metal film.
[0049]
In the first embodiment, a titanium film (Ti film) is used as the metal film, and in the second embodiment, an SRO film doped with titanium (Ti) is used. However, as the second metal element, Ti is used. Other metal elements may be used. When the B site element of a conductive perovskite type metal oxide film such as a SrRuO ₃ film is the first metal element, the amount of Gibbs free energy decrease when the second metal element generates an oxide is: What is necessary is just to be larger than the reduction | decrease amount of the Gibbs free energy when a 1st metallic element produces | generates an oxide. Specifically, V, W, Zr, Cr, Mg, Hf, Mo, Mn, Ta, or Nb can be applied as the second metal element in addition to Ti.
[0050]
In the first and second embodiment uses a dielectric film (ferroelectric film) as PZT film _{(Pb (Zr x Ti 1-} x) O 3 film), SBT film (SrBi ₂ Ta ₂ O ₉ film) may be used. In general, a perovskite compound film or a Bi layered compound film can be used. Further, a high dielectric film may be used as the dielectric film.
[0051]
In the first and second embodiments, the tungsten plug is used as the plug, but a polysilicon plug may be used.
[0052]
In the first embodiment, the noble metal film, the metal oxide film, and the metal film are formed by the sputtering method. However, they may be formed by the CVD method or the sol-gel method. In the second embodiment, the noble metal film and the metal oxide film are formed by the sputtering method. However, they may be formed by the CVD method or the sol-gel method.
[0053]
Furthermore, the methods described in the first and second embodiments can be applied to DRAM as well as FeRAM.
[0054]
Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining the disclosed constituent elements. For example, even if several constituent requirements are deleted from the disclosed constituent requirements, the invention can be extracted as an invention as long as a predetermined effect can be obtained.
[0055]
【The invention's effect】
According to the present invention, the stability of the conductive perovskite metal oxide film used for a part of the electrode can be improved, and the characteristics and reliability of the capacitor can be improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a diagram showing leakage current characteristics according to a comparative example of the first embodiment of the present invention.
FIG. 3 is a diagram showing a result of in-plane diffraction according to a comparative example of the first embodiment of the present invention.
FIG. 4 is a diagram showing leakage current characteristics according to the first embodiment of the present invention.
FIG. 5 is a diagram illustrating a result of in-plane diffraction according to the first embodiment of the present invention.
FIG. 6 is a diagram illustrating hysteresis characteristics according to the first embodiment of the present invention.
FIG. 7 is a diagram showing fatigue characteristics according to the first embodiment of the present invention.
FIG. 8 is a diagram showing the enthalpy of formation of oxides.
FIG. 9 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the second embodiment of the present invention.
[Explanation of symbols]
100 ... Silicon substrate, 101 ... Element isolation region,
102 ... Gate insulating film, 103 ... Polycrystalline silicon film,
104 ... WSi _x film, 105, 106, 112 ... silicon nitride film,
107: Source / drain region 108, 124: Silicon oxide film,
110, 114 ... TiN film, 111, 115 ... tungsten film,
116, 118, 122 ... titanium film, 117, 123 ... iridium film,
119, 121 ... SRO membrane,
119a, 121a ... SRO film doped with titanium,
120 ... PZT film

Claims (6)

A semiconductor substrate;
A capacitor provided above the semiconductor substrate and including a lower electrode, an upper electrode, a dielectric film provided between the lower electrode and the upper electrode and including Pb ;
With
At least one of the lower electrode and the upper electrode is provided between a conductive film selected from an iridium film and an iridium oxide film, the dielectric film and the conductive film, and is represented by ABO ₃ . And a perovskite-type metal oxide film containing Ru as the first metal element as a B-site element, and a perovskite-type metal oxide provided between the conductive film and the metal oxide film and represented by ABO _3. A metal film composed of a second metal element that can be a B-site element of the object,
The amount of Gibbs free energy decrease when the second metal element forms an oxide is greater than the amount of Gibbs free energy decrease when the first metal element forms an oxide. A featured semiconductor device. The semiconductor device according to claim 1 , wherein the second metal element is selected from Ti, V, W, Zr, Cr, Mg, Hf, Mo, Mn, Ta, and Nb. The semiconductor device according to claim 1 , wherein the dielectric film is a ferroelectric film formed of a perovskite compound film . The semiconductor device according to claim 1 , further comprising an intermediate region provided between the semiconductor substrate and the capacitor, wherein the intermediate region includes a plug connected to the lower electrode. The semiconductor device according to claim 4 , further comprising a transistor provided on the semiconductor substrate and connected to the plug. The semiconductor device according to claim 1, wherein at least one of the conductive film, the metal oxide film, and the metal film is formed by a sputtering method or a CVD method .

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