JP3975391B2 - Semiconductor device, image sensor, PIN diode, and electronic device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device including a photoelectric conversion element such as a photodiode that converts light into an electric charge and a transistor, and more particularly to improvement of a semiconductor device that improves the photoelectric conversion efficiency of the photoelectric conversion element.
[0002]
[Prior art]
MOS sensors and CMOS sensors have been proposed as image sensors. In these devices, a photodiode, which is a photoelectric conversion element, and a MOS transistor or a CMOS transistor are used as one cell, and each cell is arranged in a matrix on a semiconductor substrate to form an imaging device. Elements such as transistors formed on the substrate are isolated (element isolation) from each other by a field oxide film, a well structure, or the like.
[0003]
[Problems to be solved by the invention]
However, if the photodiodes, MOS transistors, and the like are highly integrated on the substrate, the leak current is generated between the source or drain of the transistor and the substrate. This becomes a dark current, generates noise, and lowers the S / N ratio and dynamic range.
[0004]
Further, when high-energy incident light enters the light receiving region of the substrate cell, it penetrates deep into the semiconductor substrate, generating electron-hole pairs. When the charges in the substrate enter the photoelectric conversion elements of other cells, there is a possibility that the electric signal output from the cell and the incident light quantity do not correspond accurately.
[0005]
Therefore, in Japanese Patent Application No. 2000-348501, the applicant has proposed a structure in which a semiconductor element is formed on a substrate in which a semiconductor film is stacked on an insulating film such as an SOI (silicon on insulator) substrate instead of a bulk substrate. That is, the junction leakage current is reduced by the structure in which the photoelectric conversion film and the MOS transistor are integrally formed on the semiconductor film (for example, silicon) on the insulating substrate, and the charge generated on the substrate by the incidence of the high energy light is reduced. Suppressed entering the photodiodes of other cells.
[0006]
Here, in order to increase the photoelectric conversion efficiency, it is desirable that the photoelectric conversion film is formed to be thick to some extent so as to absorb all incident light energy as charges. The sensitivity characteristic of the photoelectric conversion film with respect to the wavelength of incident light is related to the film thickness. In order for the photoelectric conversion film to have high sensitivity at a relatively low wavelength in the visible light region, for example, it is desirable to set the film thickness to 1 μm or more.
[0007]
However, in the structure in which the photoelectric conversion film and the source, drain, and channel regions of the MOS transistor are formed of the same semiconductor film (active layer), the thickness of the active layer of the MOS (SOI) transistor is 0.1 μm (1000 Angstroms), and the difference from the required film thickness (for example, 1 μm or more) of the photoelectric conversion film is large. For this reason, it is difficult to freely set only the film thickness of the photoelectric conversion film.
[0008]
Therefore, an object of the present invention is to provide a semiconductor device that can easily form a photoelectric conversion film with a large thickness.
[0009]
Further, according to the present invention, in a semiconductor device including a photoelectric conversion film formed on an insulating substrate and a MOS transistor connected to the photoelectric conversion film, the photoelectric conversion film is formed thicker than the active layer of the MOS transistor. An object of the present invention is to provide a semiconductor device that facilitates the above.
[0010]
Further, the present invention provides a semiconductor device including a photodiode and a MOS transistor formed on an insulating substrate, wherein the photodiode can be easily formed thicker than the active layer of the MOS transistor. With the goal.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor device of the present invention is a semiconductor device in which a photoelectric conversion element that converts light into an electric charge and an active element (for example, a transistor) are arranged on the same substrate. It includes an intermediate film having a groove or a hole formed on a substrate, and a photoelectric conversion film covering at least a part of the intermediate film.
[0012]
According to another aspect of the present invention, there is provided a semiconductor device including a photoelectric conversion element that converts light into electric charge and an active element on the same substrate, and has a groove-like or hole-like groove structure formed on the substrate. An intermediate film, and a photoelectric conversion film of the photoelectric conversion element laminated so as to bury the groove of the intermediate film, and the photoelectric conversion film is made thick using the groove structure of the intermediate film It is characterized by forming.
[0013]
By using such a slot, the photoelectric conversion film includes, in addition to the portion deposited on the intermediate film, a portion in which the groove is embedded, and thus the photoelectric conversion film substantially with respect to the incident light direction. It is possible to increase the film thickness. Increasing the film thickness can increase the efficiency of photoelectric conversion. Further, when the film thickness is thick, it is possible to improve sensitivity to light having a lower wavelength (visible light region).
[0014]
Preferably, the substrate is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, and the film thickness of the photoelectric conversion film is larger than the film thickness of the active layer of the transistor. The insulating substrate may be a glass substrate in addition to the silicon oxide film.
[0015]
By using such an insulating substrate, leakage to the substrate can be reduced. In addition, it becomes easy to form the active layer of the active element (for example, transistor) connected to the photoelectric conversion film of the photoelectric conversion element with a different film thickness, and the photoelectric conversion film is formed in a thick film to increase the photoelectric conversion efficiency. It becomes possible to raise.
[0016]
Preferably, the width of the groove of the intermediate film is formed to be approximately twice the deposition height of the photoelectric conversion film. With this configuration, it is possible to embed the entire hole.
[0017]
Preferably, the intermediate film is formed simultaneously with the interlayer insulating film of the transistor. With this configuration, there is an advantage that it is not necessary to increase the number of processes for forming the intermediate film. In addition, by enclosing the photoelectric change region with an insulating substrate and an interlayer insulating film having a slot, it is possible to suppress incident light energy from entering other cell regions.
[0018]
Preferably, the photoelectric conversion element is a PIN diode, and the photoelectric conversion film is an I layer of the diode. By using a PIN diode for photoelectric conversion, more efficient photoelectric conversion is possible.
[0019]
The image sensor of the present invention is an image sensor in which unit cells that generate charges according to the amount of light are arranged in a matrix on a substrate. The unit cells include a photoelectric conversion element that converts light into charges and the photoelectric conversion element. The photoelectric conversion film of the photoelectric conversion element includes an active element (for example, a transistor) to be connected, and is formed so as to bury an intermediate film having a groove-like or hole-like groove structure formed on the substrate. , Thereby thickening.
[0020]
With this configuration, the photoelectric conversion film of the cell can be formed in a thick film, and the photoelectric conversion efficiency can be further increased.
[0021]
Preferably, the substrate of the image sensor is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, the photoelectric conversion element is a PIN diode, and the photoelectric conversion film is an I of this diode. The intermediate film is an insulating film.
[0022]
Preferably, the shape of the slot is a polygonal cross section formed on the upper surface of the intermediate film, for example, a rectangular, horizontally long columnar groove. Alternatively, it includes a vertically long corner or a cylindrical hole dug in the direction of the insulating substrate from the upper surface of the intermediate film, or a pyramid or conical hole. For example, the plurality of grooves are arranged in parallel to each other, or are formed in a lattice shape like a grid pattern. The holes are arranged in a matrix, for example. The groove may be formed in a concentric circle shape or a spiral shape, and may be formed in the same manner as a concentric circle or a spiral shape by a plurality of concentric polygons (for example, a quadrangle).
[0023]
Further, the PIN diode of the present invention is a PIN diode in which each semiconductor layer is arranged in the lateral direction of the substrate. The PIN diode is connected to the P-type semiconductor layer containing a high concentration of P-type impurities and the P-type semiconductor layer. An I-type semiconductor layer including a low concentration, and an N-type semiconductor layer connected to the I-type semiconductor layer and including an N-type impurity at a high concentration, and the I-type semiconductor layer and the P-type semiconductor layer or The N-type semiconductor layer is formed so as to overlap at least partly.
[0024]
By adopting such a configuration, the PIN diode extending in the lateral direction on the substrate is formed by overlapping a part of the region, so that the proportion of the area occupied by the PIN diode on the substrate can be made relatively small. It becomes.
[0025]
Preferably, the I-type semiconductor layer is formed such that a cross section of the I-type semiconductor layer in the vertical direction of the substrate is comb-shaped.
[0026]
As a result, it is possible to substantially increase the thickness of the I-type semiconductor layer, and when performing photoelectric conversion with a PIN diode, the I-type semiconductor layer can efficiently convert light of a low wavelength in the visible region. It becomes possible.
[0027]
Preferably, an intermediate film provided with a through hole is disposed between the I type semiconductor layer and the P type semiconductor layer or the N type semiconductor layer, and the I type semiconductor layer passes through the through hole. Then, it is electrically connected to the P-type semiconductor layer or the N-type semiconductor layer.
[0028]
Preferably, the substrate is an insulating substrate, and the I-type semiconductor layer has a photoelectric conversion function.
[0029]
With this configuration, the I-type semiconductor layer is made substantially thick, and the photoelectric conversion film (I-type semiconductor layer) is surrounded by the substrate and the intermediate film (preferably an insulating film), and is generated in other regions. It becomes possible to prevent the intrusion of electric charges.
[0030]
The electronic device of the present invention includes any one of the above-described semiconductor device, image sensor, and PIN diode.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of a semiconductor device of the present invention will be described with reference to the drawings.
[0032]
FIG. 1 shows an example in which the present invention is applied to an image sensor 1 which is a semiconductor device. In the image sensor 1, unit cells including photoelectric conversion elements and MOS transistors are arranged in a matrix. In the figure, a cross section of the unit cell is shown. A PIN diode 3 as a photoelectric conversion element formed on the insulating substrate 2 and a MOS transistor 4 for outputting the output of this diode in response to an operation command signal are shown. It is shown. The PIN diode 3 includes a P layer 3a in which a P-type impurity is implanted at a high concentration, an I (intrinsic) layer 3c in which the impurity is a low concentration and high in specific resistance, and an N layer 3c in which an N-type impurity is implanted at a high concentration. Is done. Although not shown, each unit cell may be provided with an amplifier that amplifies the output of the photoelectric conversion element, so that a CMOS structure with high sensitivity and low noise can be obtained. As the insulating substrate 2, a so-called SOI (semiconductor-on-insulator) substrate in which an insulating film 13 a and a semiconductor film 13 are stacked on the surface of the substrate 11 can be used. For example, a silicon substrate is used as the substrate 11, a silicon oxide film is used as the insulating film 13a, and a single crystal silicon film is used as the semiconductor film 13. The MOS transistor 4 as an active element formed on the substrate 2 is also called an SOI transistor.
[0033]
Note that as the semiconductor film 13, not only single crystal silicon but also polycrystalline silicon or amorphous silicon can be used, and the substrate can be glass and the transistor can be a TFT structure.
[0034]
The PIN diode 3 connected to the source of the transistor 4 has an I layer 3b formed thicker than usual. By forming the I layer 3b that performs photoelectric conversion in a thick film, it is possible to improve the efficiency of photoelectric conversion and obtain the required sensitivity characteristics in the visible light region. For this reason, a structure is adopted in which a groove 18 opened in the insulating layer 17 as an intermediate film interposed between the I layer 3b and the N layer 3c is embedded in the I layer 3b. The total thickness of the I layer is equivalently formed by the film thickness of the I layer 3 b itself and the film thickness of the I layer 3 b corresponding to the depth of the slot 18. For example, the thickness of the I layer itself is set to 0.5 μm (5000 Å), and the depth of the slot is set to about 1 μm in consideration of use in the visible light region. Of course, these can be determined according to the required sensitivity characteristics, and is not limited to such a film thickness. If the ratio of the film thickness (deposition height) of the I layer itself to the width of the slot 18 is about 1: 2 or less, the slot 18 is embedded.
[0035]
The periphery of the PIN diode 3 is covered with an insulating film 13a and interlayer insulating films 17 and 20 on the substrate. The periphery of the active layer 13 of the MOS transistor 4 is also covered with an insulating film 13a and an interlayer insulating film 17 on the substrate. Therefore, even when charges are generated by incident light of strong energy, the charges are prevented from leaking to adjacent cells.
[0036]
In the PIN diode 3 configured as described above, the P layer 3a, the I layer 3b, and the N layer 3c extend in the lateral direction with respect to the substrate, and the I layer 3b and the N layer 3c partially overlap each other. Therefore, the area of the unit cell can be reduced compared to the case where the P layer 3a, the I layer 3b, and the N layer 3c are simply arranged in the horizontal direction. In the embodiment, the I layer 3b and the N layer 3c are overlapped, but the P layer 3a and the I layer 3b may be overlapped. Moreover, each area | region may be reverse polarity.
[0037]
Next, a manufacturing process of the semiconductor device described above will be described with reference to FIGS.
[0038]
First, as shown in FIG. 2, the surface of the silicon substrate 11 is oxidized to form a silicon oxide film 12 having a thickness of about 2000 angstroms. A thin silicon film (semiconductor film) 13 to be an active layer is formed on this insulating film to a thickness of about 1000 angstroms, and the SOI substrate 2 is obtained. Note that an SOI substrate may be purchased.
[0039]
The silicon film on the surface of the substrate 2 is thermally oxidized to form a gate oxide film (silicon oxide film) 14 having a thickness of about 100 angstroms. Thereby, a gate insulating film of the MOS transistor is obtained. Boron ions are ion-implanted from above the gate oxide film 14 into the silicon layer 13 at a low concentration (P ⁻ ) to form an activation layer of the SOI transistor. For example, BF ₂ ⁺ is implanted with a dose of 10 ¹² cm ⁻² and an acceleration energy of 20 keV. Further, a silicon nitride film 15 as a mask material is formed on the gate oxide film 14 to a thickness of about 1000 angstrom (see FIG. 3). The silicon nitride film 15 is patterned to leave the transistor region and the like, and the others are exposed (see FIG. 4). The silicon film 13 is oxidized using the silicon nitride film 15 as an oxygen intrusion prevention mask to form an oxide film 13a except for the transistor region. Thereafter, the nitride film 15 is removed. On top of this, a polysilicon film 16 doped with phosphorus at a high concentration (N ⁺ ) is formed to a thickness of about 3500 Å by CVD. The polysilicon film 16 is patterned to form a transistor gate 16a and a PIN diode N layer 16b (see FIG. 6). Further, phosphorus ions are implanted at a high concentration (N ⁺ ) into the source / drain regions using the gate 16a of the transistor as a mask to form source and drain regions. For example, phosphorus ions P ⁺ are implanted at a dose of 2 × 10 ¹⁵ cm ⁻² and an acceleration energy of 30 keV.
[0040]
Next, silicon oxide is deposited on the substrate by a CVD method to form an interlayer insulating film 17 (see FIG. 7). The insulating film 17 is patterned to form a slot 18 on the N layer 16b in the PIN diode region. Further, the insulating films 14 and 16 on the drain region of the transistor are removed, and a connection hole exposing the drain region (active layer) is opened (see FIG. 8).
[0041]
Next, a polysilicon film 19 is formed by CVD, and the trench 18 and the drain region are embedded. Next, a photoresist is applied and patterned to form a mask, and boron ions are implanted at a low concentration (P ⁻ ) into a portion corresponding to the I region of the PIN diode of the polysilicon film 19. The mask is removed, a photoresist is applied, and patterning is performed to form a mask. Boron ions are implanted at a high concentration (P ⁺ ) into a portion corresponding to the P region of the PIN diode of the polysilicon film 19. For example, BF ₂ ⁺ is implanted at a dose of 3 × 10 ¹⁵ cm ⁻² and an acceleration energy of 40 keV. Further, the mask is removed, a photoresist is applied, and patterning is performed to form a mask. Phosphorus ions are implanted at a high concentration (N ⁺ ) into the portion of the polysilicon film 19 where the N region 16b of the PIN diode and the drain region are connected. To do. . For example, phosphorus ions P ⁺ are implanted at a dose of 3 × 10 ¹⁵ cm ⁻² and an acceleration energy of 60 keV. Next, the polysilicon film 19 is patterned to form a PIN diode (see FIG. 9).
[0042]
Further, silicon oxide is deposited on the PIN diode and the transistor by a CVD method to form an interlayer insulating film 20. This interlayer insulating film 20 is patterned, and a contact hole is opened to connect the gate and source of the transistor, the P layer of the PIN diode, and the wiring. Next, for example, aluminum is deposited by sputtering to form the wiring film 21. Patterning is performed so that the wiring film 21 has a required pattern (see FIG. 10).
[0043]
Next, a PSG film 22 is deposited by a CVD method as a protective film and a planarizing film, and reflowed to planarize the surface of the substrate. Further, a silicon nitride film 23 is formed thereon as a protective film by a CVD method, and patterning is performed to open a PIN diode region and form a window (see FIG. 11). Although not particularly mentioned, heat treatment for activation is appropriately performed at the time of impurity implantation. In this way, the image sensor is manufactured.
[0044]
FIG. 12 shows various examples of forming the slot 18 formed in the PIN diode region. A plurality of the slots 18 may be formed in parallel as shown in FIG. Further, the slot 18 may be formed as a large number of isolated holes as shown in FIG. Further, the slot 18 may be formed in a plurality of concentric polygons or spirals (not shown) as shown in FIG.
[0045]
As described above, according to the embodiment of the present invention, a PIN diode in which the photoelectric conversion film is formed in a thick film using the groove 18 can be obtained. Since it is easy to form a thick film using the depth of the groove 18 (film thickness of the oxide film 17), an optical sensor having good sensitivity characteristics in the visible light region having a relatively long wavelength can be obtained. It becomes possible.
[0046]
Further, according to the configuration of the embodiment, since the periphery of the PIN diode and the transistor is surrounded by the insulating film, the leakage of the charge generated by the incident light to the adjacent cell hardly occurs.
[0047]
In addition, according to the configuration of the embodiment, it is easy to form the photoelectric conversion film (I layer) of the photosensor thicker than the active layer of the SOI transistor.
[0048]
The semiconductor film 13 serving as an active layer in which active elements are formed is not only a single crystal film (for example, single crystal silicon), but also a polycrystalline film (for example, polysilicon film), an amorphous film (for example, an amorphous film). It may be a silicon film.
[0049]
The substrate may be a glass substrate as well as a silicon substrate.
[0050]
【The invention's effect】
As described above, according to the semiconductor device and the like of the present invention, it is possible to obtain a semiconductor device in which the photoelectric conversion film can be easily formed thick. In particular, it is preferable for a semiconductor device using an SOI transistor with a thin active layer.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating an embodiment of a semiconductor device according to the present invention.
FIG. 2 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 3 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 4 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 5 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 6 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 7 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 8 is a process diagram illustrating a manufacturing process of a semiconductor device according to the present invention.
FIG. 9 is a process diagram illustrating a manufacturing process of a semiconductor device according to the invention.
FIG. 10 is a process diagram illustrating a manufacturing process of a semiconductor device according to the invention.
FIG. 11 is a process diagram illustrating a manufacturing process of a semiconductor device according to the invention.
FIG. 12 is an explanatory diagram for explaining various patterns of the slot 18;
[Explanation of symbols]
1 Image sensor 2 SOI substrate 3 PIN diode 3a P layer 3b I layer 3c N layer 4 MOS transistor (SOI transistor)
13 Active layer

Claims (10)

A semiconductor device in which a photoelectric conversion element that converts light into an electric charge and an active element are arranged on the same substrate,
The photoelectric conversion element is
An intermediate film having a plurality of grooves or holes formed on the substrate;
A photoelectric conversion film covering the intermediate film;
A semiconductor device comprising:   The substrate is an insulating substrate, and the active element is a transistor connected to the photoelectric conversion element, and the film thickness of the photoelectric conversion film is larger than the film thickness of the active layer of the transistor. The semiconductor device according to claim 1. 3. The semiconductor device according to claim 1, wherein the width of the groove or hole of the intermediate film is formed to be approximately twice the deposition height of the photoelectric conversion film.   4. The semiconductor device according to claim 1, wherein the intermediate film is formed simultaneously with the interlayer insulating film of the transistor.   The semiconductor device according to claim 1, wherein the photoelectric conversion element is a PIN diode, and an I layer of the diode functions as the photoelectric conversion film. The semiconductor device according to claim 1, wherein the photoelectric conversion element and the active element connected to the photoelectric conversion element form a unit cell, and the unit cells are arranged in a matrix to form an image sensor . The substrate is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, the photoelectric conversion element is a PIN diode, and the photoelectric conversion film functions as an I layer of the diode, The semiconductor device according to claim 6, wherein the intermediate film is an insulating film. In the PIN diode, each semiconductor layer is arranged in a lateral direction of the substrate , a P-type semiconductor layer containing a high concentration of P-type impurities, an I-type semiconductor layer connected to the P-type semiconductor layer and containing impurities at a low concentration, An N-type semiconductor layer that is connected to the I-type semiconductor layer and contains an N-type impurity at a high concentration, and at least one of the I-type semiconductor layer, the P-type semiconductor layer, or the N-type semiconductor layer. 6. The semiconductor device according to claim 5 , wherein the semiconductor device is formed so as to overlap with each other. 9. The semiconductor device according to claim 8, wherein the I-type semiconductor layer is formed such that a cross section in the vertical direction of the substrate of the I-type semiconductor layer has a comb shape. Said I-type semiconductor layer, between the P-type semiconductor layer or the N-type semiconductor layer, the intermediate layer is disposed, the I-type semiconductor layer, the via through-holes of the intermediate layer P 10. The semiconductor device according to claim 8, wherein the semiconductor device is electrically connected to the n-type semiconductor layer or the n-type semiconductor layer.

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