JP4060410B2 - Solid-state imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
In the present invention, incident light is supplied to pixels arranged on an imaging surface via an optical system including an optical lens and a color filter, and a signal obtained by performing photoelectric conversion on the pixels is supplied at the timing of a supplied drive signal. In accordance with the timing of the drive signal, the signals read out from the horizontal transfer paths are supplied according to the timing of the drive signals. The solid-state imaging device for output is particularly suitable for use in digital still cameras, movie cameras, image input devices, and the like.
[0002]
[Prior art]
In order to obtain a high-quality image, the solid-state imaging device has, for example, hundreds of thousands to millions of pixels (cells), and signal charges obtained from these pixels are signaled to the horizontal transfer register via the vertical transfer register. Electric charge is being supplied. The solid-state imaging device uses a device or the like in which the horizontal transfer register is increased in speed so that the output signal from the horizontal transfer register conforms to the current television standard, or the horizontal transfer register is composed of two or more lines. Yes. As an example of this, for example, there is a so-called high-vision standard that requires higher-speed processing than the current television standard. This standard has a high horizontal readout speed of 74MHz. In order to easily control the horizontal reading speed, a configuration using a two-line horizontal transfer register has been proposed for the solid-state imaging device of this standard.
[0003]
The solid-state imaging device of this standard reduces the horizontal transfer rate per column to 37 MHz by distributing the signal charges that have passed through the pixel and the vertical transfer register in order to the horizontal transfer registers. According to this proposal, the high-definition standard can be satisfied even if one screen is driven at a low horizontal transfer speed.
[0004]
[Problems to be solved by the invention]
By the way, by using the configuration of the two-line horizontal transfer register, the output signal from the solid-state imaging device is deteriorated. As an example of deterioration, by passing one stage of vertical transfer from the upper stage to the lower horizontal transfer register, the output from the horizontal transfer register on the lower stage is, for example, about 0.01% compared to the output from the upper horizontal transfer register. Deterioration occurs. In addition, read amplifiers are also required in accordance with the two systems of signal readout. At this time, since the gains of the read amplifiers vary considerably, it is known that the gain variations of these read amplifiers have a great influence on the image quality of the screen.
[0005]
Specifically describing this deterioration, when the signal charge is read out, for example, in a monochrome solid-state imaging device that reads out the signal charge from the horizontal transfer registers on the upper side and the lower side corresponding to the even and odd lines in the image, Since there is a slight difference in brightness between the odd / even lines on the screen, the screen has horizontal stripes for each line. Therefore, for the gain variation that greatly affects the image quality degradation of the screen, the signal level is corrected by performing gain adjustment in the subsequent signal processing unit and displaying it on the screen.
[0006]
A color solid-state imaging device that detects colors also employs a method in which a horizontal transfer register is configured with multiple lines. In this case, in order to prevent variations in the same color from occurring in the horizontal transfer register that outputs a signal, a color filter is arranged so that an output signal is read from the same horizontal transfer register for the same color signal. The arrangement of this color filter with respect to the three primary colors R, G, B is, for example, that G is arranged in the odd-numbered columns to form horizontal stripes, R, B is arranged in the even-numbered columns, and the R, G filters form a checkered pattern. The so-called G horizontal stripes R and B are arranged in a checkered manner. The color solid-state imaging device uses such a spatial pixel shifting technique to obtain resolution.
[0007]
Eliminates the disadvantages of the prior art and prevents image quality degradation even in arrangement patterns different from the arrangement pattern in which the horizontal transfer register is composed of multiple lines in the color solid-state imaging device and the color filter is a G horizontal stripe R, B checkered pattern An object of the present invention is to provide a solid-state imaging device that can perform the above-described process.
[0008]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention supplies signals obtained by supplying incident light to pixels arranged on an imaging surface via an optical system including an optical lens and a color filter and performing photoelectric conversion on the pixels. Reads and transfers vertically according to the timing of the supplied drive signal, controls the interlace gates between multiple horizontal transfer paths, supplies signals to the multiple horizontal transfer paths, and reads the signals read from these horizontal transfer paths In the solid-state imaging device that outputs in accordance with the timing of the drive signal, between this first color pixel and the first color pixel in which the first color is assigned to the odd-numbered column or even-numbered column of the imaging surface. The second color pixel assigned the second color to the left and right even columns or odd columns adjacent to the first color pixel array, and the third color pixel assigned the third color are arranged in order. Between the first color pixels to be arranged next An image pickup means formed by repeating an array in which each pixel is arranged in the order of the third color pixel and the second color pixel in several or odd columns, and a pixel among signals vertically transferred from these pixels Interlace gate means for jumping only signals in odd-numbered columns or even-numbered columns to adjacent horizontal transfer paths, and generating and supplying respective drive timing signals to the interlace gate means, vertical transfer paths and horizontal transfer paths Drive timing supply means for performing the above operation.
[0009]
Here, it is preferable that the first color pixel is green (G) of the three primary colors, and the second color pixel and the third color pixel are red (R) of the three primary colors and blue (B) of the three primary colors.
[0010]
Also, when a plurality of horizontal transfer paths are independently wired, the signal position of the horizontal transfer path is the same as the signal position of the horizontal transfer path adjacent to the reference horizontal transfer path signal. It is preferable to provide signal movement adjusting means for moving the position. Preferably, the drive timing supply means generates at least one of signals changing in four phases, six phases, or eight phases and uses it as a vertical drive signal.
[0011]
In this solid-state imaging device, the first color pixels are assigned to odd or even columns on the imaging surface, and the second and third color pixels are assigned to even or odd columns between the first color pixels. By arranging each pixel in the order of the third color pixel and the second color pixel between the first color pixels arranged next, the second color pixel is arranged in the second color pixel sequence. The third color pixels are arranged in a staggered manner to completely form a checkered pattern with the second and third pixels. In this arrangement pattern, the columns of the first color pixels are arranged 180 degrees apart from the columns in which the second and third color pixels are arranged. Signals from even and odd columns of pixels are not transferred simultaneously. Thereby, the solid-state imaging device can distribute the signals from the even and odd columns.
[0012]
In addition, by controlling the jump gate means with the jump gate control means, only the signals in the odd-numbered or even-numbered columns of the pixel array among the signals vertically transferred from these pixels are selectively transferred horizontally adjacent to each other. It is possible to perform even-numbered or odd-numbered column vertical transfer on the horizontal transfer path in which signals are skipped, and signals can be simultaneously output from the plurality of horizontal transfer paths.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the solid-state imaging device of the present invention will be described in detail with reference to the accompanying drawings.
[0014]
In the present embodiment, the configuration of the solid-state imaging device, particularly the pixel arrangement and the operation thereof will be described with reference to FIGS. Here, the solid-state imaging device is generally applied to, for example, a digital still camera, a movie camera, an image input device, or the like that supplies an optical image from a subject to pixels on the imaging surface, performs photoelectric conversion, and captures it as an image signal.
[0015]
FIG. 1 is a schematic diagram showing the configuration of the solid-state imaging device 10. As shown in FIG. 1, the solid-state imaging device 10 includes a plurality of pixels Pi arranged in a pixel area PA on the imaging surface, four vertical transfer registers 11a to 11d, horizontal transfer registers 12a and 12b, and an interlace. The gate 13 and the drive signal generator 14 are configured.
[0016]
First, the above-described vertical transfer registers 11a to 11d are vertical CCDs that transfer signal charges (hereinafter simply referred to as signals) obtained in each pixel Pi toward a horizontal transfer register 12a below the column. The horizontal transfer registers 12a and 12b are horizontal CCDs that transfer signals supplied from the vertical transfer registers 11a to 11d in the row (or horizontal) direction.
[0017]
Next, the pixels Pi arranged in the pixel area PA on the imaging surface will be described. In the pixel area PA, pixels Pi, that is, cells made of photodiodes having a light receiving area are two-dimensionally arranged. Three primary colors G, R, and B are assigned to each pixel Pi for color display. In this embodiment, the pixel arrangement different from the so-called G horizontal stripe RB checkered pattern, which has been performed so far, that is, the so-called G vertical stripe RB complete checkered pattern prevents deterioration of image quality as in the conventional pixel arrangement pattern. We will show you what you can do.
[0018]
A reference is provided to perform this two-dimensional array of new pixels. As this reference, green (G) is selected as the first color. The green pixel PG is assigned to an odd column or an even column of the pixel area PA. In this case, the pixels PG are arranged in even columns (see FIG. 1). Here, if the positional relationship of the pixel array shown in FIG. 1 is defined from the top to the bottom in the figure, the left and right odd numbers adjacent to this even column between the pixels PG arranged in this column direction are defined. In the column, second and third colors, that is, red (R) and blue (B) pixels PR and PB, for example, are arranged in order. When the arrangement of the first color pixels is an odd-numbered column, the adjacent left and right columns are naturally even-numbered columns. Further, as shown in FIG. 1, between the pixels PG arranged next, the third and second colors, that is, for example, blue (B ) And red (R) pixels PB and PR in this order. By arranging the pixels in this way, when paying attention to the pixel PG located in the third row from the bottom in FIG. 1, blue (B) or red (R) is diagonally formed with respect to the reference pixel PG. Pixels of the same color are arranged, and a so-called complete checkered pattern can be formed in the pixel area PA. In other words, it can be said that this pixel array is arranged in a staggered manner while alternately switching the pixels PR and PB in the odd columns adjacent to the even columns of the pixels PG.
[0019]
In this pixel array, the even-numbered columns having the pixels PG are arranged 180 degrees away from the odd-numbered columns having the pixels PR and PB. Therefore, when signals reach the horizontal transfer register 12a via the vertical transfer registers 11a to 11d, signals corresponding to the three colors do not reach at the same time. Therefore, it is possible to distribute and supply the signals supplied from the odd / even columns to the horizontal transfer register 12a as one unit. Further, it goes without saying that the odd-numbered or even-numbered signals of the pixel array are supplied from the pixel area PA to the horizontal transfer register 12a.
[0020]
The interlace gate 13 is arranged between the horizontal transfer registers 12a and 12b. The interlace gate 13 is provided only in either the odd-numbered column or the even-numbered column. In this embodiment, a case where only odd-numbered columns are provided has been described. The interlace gate 13 has a function of supplying a signal supplied to the horizontal transfer register 12a from the horizontal transfer register 12a to the horizontal transfer register 12b by turning on the gate. This function does not work in the off state. In this way, the interlace gate 13 bridges the signal between the adjacent horizontal transfer registers 12a and 12b.
[0021]
The drive signal generator 14 generates drive timing signals to be supplied to the vertical transfer registers 11a to 11d, the horizontal transfer registers 12a and 12b, and the interlace gate 13, respectively. Examples of the drive timing signal include vertical scanning signals V1 to V8 used for vertical transfer, horizontal scanning signals H1 to H4 used for horizontal transfer, and a gate drive signal. The drive signal generation unit 14 generates at least one of signals changing in at least four phases, six phases, or eight phases and uses it as a vertical drive signal (vertical scanning signal). In addition, when the horizontal transfer registers 12a and 12b are wired independently, the drive signal generation unit 14 uses the position of the signal in the horizontal transfer register 12b adjacent to the signal of the reference horizontal transfer register 12a as a reference. It is also a signal movement adjusting means for moving to the same position as the signal position of the horizontal transfer register 12a.
[0022]
When the signal charge is transferred in the pixel array of FIG. 1, the drive signal generation unit 14 applies 8-phase vertical scanning signals V1 to V8 to the electrodes φ1 to φ16. Here, the operation of the vertical transfer register of the solid-state imaging device 10 changes as shown in FIG. By repeating vertical transfer in this way, the signal gradually moves in the direction indicated by arrow A. Therefore, as will be described later, the pixels PR and PB in the odd-numbered column reach the horizontal transfer register 12a first. In this embodiment, the optical system has a color filter corresponding to the color of the pixel, although not shown.
[0023]
Next, the operation of the solid-state imaging device 10 will be described. 3 to 6 show the apparatus configuration shown in FIG. 1 in a simplified manner, and show the operation at each step. The solid-state imaging device 10 is irradiated with light from a subject via an optical system. The solid-state imaging device 10 performs exposure with the electronic shutter opened (see FIG. 3A). A photodiode as a pixel converts incident light into an electric signal by photoelectric conversion. This electrical signal is a signal charge. Since the signal charge is generated in the photodiode according to the amount of incident light, the generated charge is accumulated in the photodiode. Although not shown, the electronic shutter is also opened and closed in accordance with a signal from the drive signal generation unit 14.
[0024]
Next, the electronic shutter of the solid-state imaging device 10 is closed. Then, the drive signal generator 14 applies the vertical scanning signal V5 to the electrodes φ5 and φ13 in the odd columns of the pixels Pi. Further, the drive signal generator 14 applies the vertical scanning signal V1 to the electrodes φ1 and φ9 in the even-numbered columns of the pixels Pi. At this time, as the vertical scanning signals V1 and V5, for example, a voltage of 10V is applied, and the charges accumulated in each pixel Pi are read out to the vertical transfer registers 11a to 11d (see FIG. 3B). In addition to these four electrodes, for example, a voltage of 0 V is applied. As a result, a barrier is formed so that the signal does not leak from the vertical CCD storing the read signal charges (hereinafter referred to as signals) to the adjacent vertical CCD.
[0025]
Thereafter, the signals read by driving the eight-phase vertical scanning signals are sequentially moved below the vertical CCD. Therefore, a vertical scanning signal is supplied to each electrode including the vertical CCD to be moved next. In this case, the odd-numbered columns are supplied to the electrodes φ6 and φ14, and the even-numbered columns are supplied to the electrodes φ2 and φ10. At this time, the voltage of the vertical scanning signal applied to these electrodes is set to 5 V, for example, in order to separate the pixel and vertical transfer register signals. In this manner, the solid-state imaging device 10 drives the vertical transfer registers 11a to 11d to sequentially transfer the signals vertically downward (see FIG. 3C).
[0026]
As described above, the signals are sequentially transferred in the vertical direction, whereby the signals in the odd columns, that is, the signals from the pixels PB and PR are supplied to the horizontal transfer register 12a (see FIG. 4A). Between the horizontal transfer registers 12a and 12b, jump gates 13 are provided only in odd columns. In the state of the solid-state imaging device 10 shown in FIG. 4A, the drive signal generation unit 14 supplies a drive signal for turning on the jump gate 13 to the jump gate 13. As a result, the odd-numbered signals stored in the horizontal transfer register 12a are jumped to the horizontal transfer register 12b as they are. Here, the position of the signal in the horizontal transfer register 12b is an odd-numbered column position (see FIG. 4B).
[0027]
Next, the drive signal generator 14 supplies the horizontal scanning signals H1 and H3 to the horizontal transfer register 12b, for example. The horizontal scanning signals H1 and H3 move the signal currently stored in the horizontal transfer register 12b to the output end side by one column. As a result, the signal in the horizontal transfer register 12b is moved directly below the even-numbered column (see FIG. 4 (c)). At this time, since there is no signal in the horizontal transfer register 12a, the horizontal transfer registers 12a and 12b may be driven together.
[0028]
After performing the horizontal transfer processing of this signal, the signals remaining in the vertical transfer registers 11a to 11d are vertically transferred downward by four stages by further performing vertical transfer four times. By this vertical transfer, a signal from an even-numbered column, that is, a signal from the pixel PG reaches the horizontal transfer register 12a (see FIG. 5 (a)). Further, by performing vertical transfer four times, an odd-numbered column signal is supplied to the horizontal transfer register 12a (see FIG. 5B).
[0029]
Next, the drive signal generator 14 supplies a drive signal to the jump gate 13. The jump gate 13 is turned on in response to the drive signal. As a result, an odd-numbered column signal of the horizontal transfer register 12a is supplied from the horizontal transfer register 12a to the horizontal transfer register 12b (see FIG. 5C). Such interlaced transfer of signals is because the interlace gates 13 are disposed only at odd-numbered column positions as described above.
[0030]
After the interlaced transfer of signals, the drive signal generator 14 supplies the horizontal scanning signals H2 and H4 to the horizontal transfer register 12a. In response to the horizontal scanning signals H2 and H4, the horizontal transfer register 12a moves the signal immediately below the even-numbered column of the horizontal transfer register 12a by one column toward the output end side (see FIG. 6A). Then, the drive signal generator 14 supplies the vertical scanning signal to the vertical transfer registers 11b and 11d four times. The vertical transfer registers 11b and 11d vertically transfer the signals remaining only here to the lower four stages. As a result, signals in even columns are transferred to the horizontal transfer register 12a (see FIG. 6B). By performing such an operation, the signals obtained at each pixel Pi are all transferred to the horizontal transfer registers 12a and 12b. Here, the signals supplied from the even columns are transferred to the horizontal transfer register 12a. In addition, a signal supplied from an odd number column is transferred to the horizontal transfer register 12b.
[0031]
Here, when performing color display on an actual screen, for example, the color of the subject is represented using three colors (R), (G), and (B). Therefore, a combination of pixels PR, PG, and PB is required to display one line that is a component of a color image. The pixel area PA shown in FIG. 1 has a pixel pattern of G vertical stripe RB complete checkerboard, and therefore has signals for two lines as color display. As a result, the captured signals for two lines are stored in the horizontal transfer registers 12a and 12b in FIG. 6B.
[0032]
The drive signal generation unit 14 supplies, for example, horizontal scanning signals H1 to H4 simultaneously to both the horizontal transfer registers 12a and 12b. The horizontal transfer registers 12a and 12b output signals for two lines via amplifiers 15a and 15b, respectively.
[0033]
By the way, as described above, the signals for two lines are read sequentially from the pixel of the line located at the lowest position of the imaging surface, that is, the pixel of the second line, and therefore, the read signal has a pixel shift in the column direction. There is. When correcting this pixel shift, the correction procedure in this case is to store the signals read by dividing each column by two, for example, in a memory, and skip every other signal from the first signal so that the reading order is reversed. The remaining signals skipped next are read in order from the output side. In this reading, if the even number column, the odd number column, the even number column, and so on are alternately read, the read correction signal can be a signal suitable for screen display with no pixel shift. it can.
[0034]
In general, when there are n lines of pixels in this pixel arrangement pattern, for example, correction of pixel shift is performed by dividing, for example, n signals in each column of even columns, and starting from the first signal, n, 2n,. , read only the mnth signal (m = 1,2,3, ...), read the signals of each odd-numbered column in the same way as above, and then start with the first signal in the even-numbered and odd-numbered columns Read n-1,2n-1, ..., mn-1th signal alternately, and finally, ni, 2n-i, ..., mn-ith from the first signal in even and odd columns Are read alternately (i = 0, 1, 2, 3,..., N-1).
[0035]
In addition, each pixel PR, PG, PB is arranged in a pattern in which the pixels PR, PB are spatially shifted with respect to the pixel PG called G vertical stripe RB perfect checkerboard, so the pixel data existing in the screen area is used. Thus, data of spatial positions without pixels can be obtained by subsequent interpolation processing, and as a result, the solid-state imaging device can have a high resolution.
[0036]
With this configuration, all images can be read out in a short time using a plurality of horizontal transfer registers, and signals can be distributed to the horizontal transfer registers in units of odd / even columns. This distribution process can prevent the occurrence of fixed pattern noise that has occurred as horizontal stripes due to variations in the amplifier gain provided with the improvement in signal transfer efficiency. In addition, when pixels are arranged in a spatially shifted pattern and data of spatial positions without pixels is obtained by subsequent interpolation processing, the solid-state imaging device can be made high resolution as a result.
[0037]
In addition, although the present Example demonstrated using eight electrode structures, it is not limited to this Example, What is necessary is just the structure containing the concept of this invention, for example, using six electrode structures etc. It is clear that it is good.
[0038]
【The invention's effect】
As described above, according to the solid-state imaging device of the present invention, the second and third color pixels are arranged in a staggered manner with respect to the first color pixel column on the imaging surface, and the second and third pixels are completely checked. Since the pattern is formed and the first color pixel columns are arranged 180 degrees apart from the columns where the second and third color pixels are arranged, these are arranged in one horizontal transfer path. Prevent all signals from the pixels from being transferred at the same time, and control the jump gate means with the jump gate control means. Among the signals transferred vertically from these pixels, signals in the odd or even columns of the pixel array Are selectively jumped to adjacent horizontal transfer paths, allowing even or odd columns to be vertically transferred to the horizontal transfer paths where signals are skipped, and signals are simultaneously sent from these horizontal transfer paths. By outputting, all images using multiple horizontal transfer paths It reads in a short time, it is possible to distribute the signal in units of odd-numbered columns / even-numbered columns in each horizontal transfer path. This distribution process can prevent the occurrence of fixed pattern noise that has been generated as horizontal stripes due to variations in amplifier gain provided with improvement in signal transfer efficiency.
[0039]
In addition, when pixels are arranged in a spatially shifted pattern and data of spatial positions without pixels is obtained by subsequent interpolation processing, the solid-state imaging device can be made high resolution as a result.
[Brief description of the drawings]
FIG. 1 is a schematic diagram illustrating a configuration of a solid-state imaging device.
FIG. 2 is a potential diagram for explaining a movement state by the potential of signal charges when the solid-state imaging device of FIG. 1 is driven in four phases.
FIG. 1 is a schematic diagram illustrating a signal transfer operation of a solid-state imaging device.
FIG. 1 is a schematic diagram illustrating a signal transfer operation of a solid-state imaging device.
FIG. 1 is a schematic diagram illustrating a signal transfer operation of a solid-state imaging device.
FIG. 1 is a schematic diagram illustrating a signal transfer operation of a solid-state imaging device.
[Explanation of symbols]
10 Solid-state imaging device
11a to 11d Vertical transfer register
12a, 12b Horizontal transfer register
13 Jump gate
14 Drive signal generator

Claims (3)

A light receiving element that photoelectrically converts incident light through an optical system including an optical lens and a color filter is arranged in a two-dimensional manner as a pixel, and pixels adjacent to the pixel are arranged with a pixel shift from each other, The signal charge obtained from the pixel is read out according to the timing of the supplied drive signal, transferred vertically, and the signal is supplied to the adjacent horizontal transfer path by controlling the interlace gate between the plurality of horizontal transfer paths. In a solid-state imaging device that outputs signals read from these horizontal transfer paths according to the timing of the drive signal, the device includes:
The first color pixels assigned the first color to the odd-numbered or even-numbered columns of the two-dimensionally arranged light receiving elements are arranged in a stripe shape, whereby the first row becomes the first color pixel, A second row in which a second color is assigned to a pixel located on the left or right side of the first color pixel in a second row including pixels adjacent to the first color pixel array between the first color pixels. Are arranged, and a third color pixel assigned with the third color is arranged on a pixel located on the right or left side across the first color pixel column, and the first color pixel is arranged in a stripe pattern. As a result, a third row is formed, and a third color pixel is arranged on a pixel located on the left or right side adjacent to the first color pixel arranged in the third row, An arrangement in which the second color pixels are arranged as the fourth row in the pixels located on the right or left side across the column of color pixels is a basic color field. Set data arrangement pattern is repeated a plurality of times, a color filter is formed, comprises an imaging means for reading signal charges from said pixels,
The imaging means is arranged between the plurality of horizontal transfer paths, and a gate for passing the signal charge only to either the even column or the odd column among the signal charges vertically transferred from the pixel is formed. And a jump gate means for jumping only the signal charge for the first color pixel or the signal charge for the second and third color pixels to the adjacent horizontal transfer path,
The apparatus further includes drive timing supply means for generating drive timing signals for the interlace gate means, the vertical transfer path, and the horizontal transfer path and supplying the drive timing signals to the imaging means,
The drive timing supply means is configured such that the plurality of horizontal transfer paths are independently wired, transfer signal charges from the vertical transfer paths to one horizontal transfer path, and transfer the transferred signal charges to the jump gate means. Depending on the position of the formed gate, it is sent to the other horizontal transfer path, the signal charge sent to the other horizontal transfer path is transferred by one column of the vertical transfer path,
Transferring the signal charges of the first, second and third color pixels from each of the vertical transfer paths to the one horizontal transfer path;
Again, the signal charge at the gate connected to the one horizontal transfer path is transferred from the one horizontal transfer path to the other horizontal transfer path,
Transferring the signal charge in the one horizontal transfer path by one column of the vertical transfer path;
Transferring the signal charge from each of the vertical transfer paths formed between the vertical transfer paths corresponding to the positions where the jump gate means is formed in the one horizontal transfer path;
The drive signals used at each timing are arranged in accordance with the color attribute of the signal charge on the one and other horizontal transfer paths, and a predetermined number of signal charges are output from the one and other horizontal transfer paths. Is generated and supplied to the imaging means.   2. The apparatus of claim 1, wherein the apparatus sets the first color pixel to green (G), the second color pixel to red (R), and the third color pixel to blue (B). A solid-state imaging device.   3. The solid-state imaging device according to claim 1, wherein the drive timing supply unit generates at least one of signals changing in four phases, six phases, or eight phases and uses it as a vertical drive signal. apparatus.

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