JP4094286B2 - Alignment method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an alignment method. More specifically, the present invention relates to an alignment method when performing electrical connection and adhesion between layers in the production of a multilayer wiring board.
[0002]
[Prior art]
In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and further high-density mounting of electronic components have progressed. Semiconductor packages used in these electronic devices have been In addition to this, the size and number of pins are becoming increasingly smaller.
[0003]
A conventional circuit board is called a printed wiring board. After patterning a copper foil affixed to a glass epoxy laminate with a glass fiber woven fabric impregnated with epoxy resin, a plurality of layers are laminated and bonded, and a drill In general, the use of a wiring board in which a through hole is made, copper is plated on the wall surface of the hole to form a via, and electrical connection between layers is made has been the mainstream. However, with the progress of miniaturization and high density of mounted components, the above wiring board has insufficient wiring density, and problems have arisen in mounting components.
[0004]
Due to such a background, in recent years, build-up multilayer wiring boards have been adopted. The build-up multilayer wiring board is formed by stacking insulating layers and conductors made of only resin. As a method for forming vias, in place of conventional drilling, various methods such as laser method, plasma method, photo method, etc. are used, and small-diameter via holes are freely arranged to achieve high density. As interlayer connection parts, there are blind vias and burried vias (Buried Via: a structure in which vias are filled with a conductor) and the like, and burried via holes capable of forming stacked vias on vias are particularly noticeable. Has been. The burred via hole is divided into a method of filling the via hole with plating and a case of filling with a conductive paste or the like. On the other hand, as a method of forming a conductor circuit, there are a method of etching a copper foil (subtractive method), a method by electrolytic copper plating (additive method), etc., and an additive method that can cope with a higher wiring density is particularly noted. Being started.
[0005]
Manufacturing methods of build-up multilayer wiring boards are roughly divided into the following two methods.
(1) A method of sequentially laminating buildup layers by repeating the formation of insulating layers, vias, and conductor circuits based on a core substrate (hereinafter referred to as a sequential method).
(2) A method of laminating a buildup layer by forming a buildup layer alone in advance and aligning and stacking the buildup layer on the core substrate (hereinafter referred to as a parallel method).
[0006]
In the sequential method, since build-up layers are sequentially formed on the basis of a core substrate, there is a problem that if a failure occurs in an intermediate process, all of them become defective at that point. There is also a problem that it takes a long time from the start of production until a product is obtained. All the steps need to be performed sequentially (sequentially), and as the number of buildup layers increases, this problem becomes more prominent and is difficult to solve.
[0007]
On the other hand, in the parallel method, since the buildup layer can be formed alone in advance, even if the formed buildup layer has a defect, it can be inspected and selected at that time. Therefore, there is an advantage that only non-defective products of the buildup layer can be selected and stacked (alignment stacking with respect to the core substrate). However, if a failure occurs in the build-up layer, it is inevitable that all products are defective. In addition, since the build-up layer can be formed and the build-up layers can be stacked in parallel, the time from the start of production to obtaining a product is not as long as the sequential method.
[0008]
FIG. 5 is a schematic view showing an alignment method of the core substrate 510 and the buildup layer 512 in the parallel method. The structure of the buildup layer 512 will be briefly described with reference to FIG. The build-up layer 512 has a structure in which a conductor circuit 504 and a first alignment mark 520c formed on the surface of the metal layer 501; an insulating layer 505 formed so as to cover them; and a conductor post penetrating the insulating layer 505. 507, a bonding metal material 508 formed on the surface of the conductor post 507, and an adhesive layer 509 formed so as to cover the insulating layer 505 and the bonding metal material layer 508. After the alignment lamination of the buildup layer 512 is performed on the core substrate 510, the metal layer 501 is finally removed by etching. Note that a resist metal layer 503 is formed on the buildup layer 512 in order to protect the conductor circuit 504 and the first alignment mark 520c from the etching solution.
[0009]
Next, an alignment (positioning) method will be described. As shown in FIG. 5B, first, a core substrate 510 and a build-up layer 512 are adsorbed to a stage 540b and an adsorption tool 540a, and a CCD (charge-coupled device, image sensor) that can simultaneously recognize the upper and lower sides therebetween. ) 530 is arranged. Subsequently, the second and first alignment marks 520 and 520c provided on the core substrate 510 and the buildup layer 512 are recognized by the CCD 530, and the second and first alignment marks 520 and 520c are positioned at predetermined positions. The position of the core substrate 510 is adjusted by moving the stage 540b so that the relationship is satisfied (usually, the positions match). Further, after the CCD 530 is moved and removed from between the core substrate 510 and the buildup layer 512, the suction tool 540a is lowered, the buildup layer 512 is disposed on the core substrate 510, and the suction is stopped. By such a method, the core substrate 510 and the buildup layer 512 can be aligned. The reason for using the CCD 530 that can recognize the upper and lower sides simultaneously is that the first alignment mark 520c is recognized from the back surface (the upper side in the drawing) of the buildup layer 512 because the buildup layer 512 has the metal layer 501. Because you can't.
[0010]
By such a method, the core substrate 510 and the buildup layer 512 can be aligned. The reason why the alignment is necessary will be briefly described in order to connect the conductor post 507 and the land 550 without misalignment. Basically, the diameter DP of the conductor post 507 is made smaller than the diameter DL of the land 550 so that the conductor post 507 is securely connected on the land 550. The alignment tolerance at this time is ± (DL-DP) / 2. However, this alignment tolerance assumes that the conductor post 507 and the land 550 are formed at appropriate positions. Therefore, when the conductor post 507 is formed at a position different from an appropriate position for some reason, that is, when the position of the conductor post 507 is shifted in advance, the alignment tolerance is smaller than the above value. Become. Specifically, when the core substrate 510 and the build-up layer 512 are accurately aligned, the center of the conductor post 507 is closer to the outside than the center of the land 550. In this case, the allowable alignment error is a small value on the near side and a large value on the opposite side. Therefore, the alignment tolerance required for the alignment apparatus is naturally the smaller value.
[0011]
The alignment method shown in FIG. 5 is a method of adjusting the position of the core substrate 510 so that the first alignment mark 520c and the second alignment mark 520 are in a predetermined positional relationship. It is not considered whether or not it is formed at a correct position, and as a result, there is a problem that the alignment tolerance becomes a stricter (small) value.
[0012]
[Problems to be solved by the invention]
An object of the present invention is to provide a highly accurate alignment method in view of such a current problem of the alignment method of a core substrate and a buildup layer in the production of a multilayer wiring board.
[0013]
[Means for Solving the Problems]
That is, the present invention is as follows: (1) A conductor post and an alignment conductor post are disposed on a surface opposite to the exposed surface of a conductor circuit embedded in the insulating layer so that one surface is exposed from the insulating layer. The connecting layer formed through the insulating layer and the connected layer on which the alignment mark is formed are recognized by the CCD with the alignment conductor post and the alignment mark, and the alignment conductor post and the alignment mark are predetermined. Align the connection layer and the connected layer by moving and adjusting the position of the connection layer or the connected layer so that An alignment method comprising: The surface of the insulating layer opposite to the surface where the body circuit is exposed, and the surfaces of the conductor posts and alignment conductor posts are covered with an adhesive layer. It is characterized by Conductor post for alignment,
( 2 ) Item (1) Alignment method using alignment conductor post as described,
( 3 ) Using a metal layer as a lead for electrolytic plating, forming a conductor circuit by electrolytic plating, forming an insulating layer on the conductor circuit, and vias so that a part of the conductor circuit is exposed to the insulating layer And a connection layer obtained through a step of forming a conductor post and an alignment conductor post by electrolytic plating on the conductor circuit, using the metal layer as an electroplating lead, and an alignment mark was formed The conductor post for alignment and the alignment mark are recognized by the CCD with respect to the connected layer, and the position of the connecting layer or the connected layer is moved and adjusted so that the alignment conductor post and the alignment mark are in a predetermined positional relationship. By doing so, the connection layer and the connected layer are aligned. A method for forming an alignment conductor post, comprising: Including a step of forming an adhesive layer on the surface of the insulating layer opposite to the surface where the conductor circuit is exposed, on the surface of the conductor post and the alignment conductor post. It is characterized by A method for forming a conductor post for alignment;
( 4 ) Including the step of removing the metal layer by etching; 3 ) Entry A method for forming the alignment conductor post,
It is.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto. 1 to 2 are diagrams for explaining an example of a method for manufacturing a connection layer used in the embodiment of the present invention. FIGS. 2 (h), (h ′), (i), and (i ′) are obtained. It is sectional drawing which shows the structure of the connection layer obtained.
[0015]
As a method of manufacturing the connection layer 113 used in the present invention, first, a patterned plating resist 102 is formed on a metal layer (metal plate or metal foil) 101 (FIG. 1A). The plating resist 102 can be formed, for example, by laminating an ultraviolet-sensitive dry film resist on the metal layer 101, selectively exposing it using a negative film or the like, and then developing it.
The material of the metal layer 101 may be any material as long as it is suitable for this manufacturing method. In particular, the metal layer 101 is resistant to the chemical used, and can be finally removed by etching. It is necessary. Examples of the material of the metal layer 101 include copper, a copper alloy, a 42 alloy, and nickel.
[0016]
Next, a resist metal layer 103 is formed by electrolytic plating using the metal layer 101 as an electroplating lead (power supply electrode) (FIG. 1B). By this electrolytic plating, a resist metal layer 103 is formed on a portion of the metal layer 101 where the plating resist 102 is not formed. At this time, an alignment is provided opposite to the alignment conductor post used when the connection layers are stacked.
The material of the resist metal layer 103 may be any material as long as it is suitable for this manufacturing method. In particular, the resist metal layer 103 is resistant to a chemical solution used when the metal layer 101 is finally removed by etching. It is necessary. Examples of the material of the resist metal layer 103 include nickel, gold, tin, silver, solder, palladium, and the like. Note that the purpose of forming the resist metal layer 103 is to prevent the conductor circuit 104 shown in FIG. 1C from being eroded and corroded by the chemical used when the metal layer 101 is etched. Therefore, when the conductor circuit 104 shown in FIG. 1C is resistant to the chemical used when the metal layer 101 is etched, the resist metal layer 103 is unnecessary. At this time, alignment relative to the alignment conductor post used when laminating the connection layers is provided in the next conductor circuit forming step.
[0017]
Next, the conductor circuit 104 is formed by electroplating using the metal layer 101 as an electroplating lead (feeding electrode) (FIG. 1C). By this electrolytic plating, a conductor circuit 104 is formed in a portion on the metal layer 101 where the plating resist 102 is not formed.
The material of the conductor circuit 104 may be any material as long as it is suitable for this manufacturing method. In particular, the conductor circuit 104 is resistant to a chemical solution used when the resist metal layer 103 is finally removed by etching. It is necessary to have. In practice, it is advantageous to select the resist metal layer 103 that can etch the conductive circuit 104 with a chemical solution that does not erode or corrode. As the material of the conductor circuit 104, for example, copper, nickel, gold, tin, silver, palladium, or the like can be used. Particularly, when copper is used, the conductor circuit 104 having low resistance and stability can be obtained, which is preferable.
[0018]
Next, the plating resist 102 is removed (FIG. 1D), and then an insulating layer 105 is formed on the formed conductor circuit 104 (FIG. 1E). Any resin can be used as the resin constituting the insulating layer 105 as long as it is suitable for this manufacturing method. The insulating layer 105 may be formed by a method suitable for the resin to be used. The resin varnish may be applied directly by printing, curtain coating, bar coating, or the like, or a dry film type resin may be vacuum laminated or vacuumed. The method of laminating | stacking by methods, such as a press, is mentioned. In particular, a commercially available copper foil with resin is easy to obtain, and if the concave and convex portions of the conductor circuit 104 are embedded by vacuum lamination and finally etched, the surface of the insulating layer 105 becomes the conductor circuit 104 surface. It becomes very flat without being affected by unevenness. Further, since the fine roughened shape of the copper foil surface is transferred to the surface of the insulating layer 105, it is possible to ensure adhesion with the adhesive layer 109 shown in FIG.
[0019]
Next, a via 106 is formed in the formed insulating layer 105 (FIG. 1F). Any method may be used for forming the via 106 as long as it is suitable for this manufacturing method, and examples thereof include dry etching by laser and plasma, chemical etching, and the like. Further, when the insulating layer 105 is made of a photosensitive resin, the via 106 can be formed by selectively exposing and developing the insulating layer 105.
[0020]
Next, using the metal layer 101 as an electroplating lead (feeding electrode), the conductor post 107 and the alignment conductor post 120a are formed by electroplating (FIG. 2G). By this electrolytic plating, the conductor post 107 and the alignment conductor post 120a are formed in the portion of the insulating layer 105 where the via 106 is formed. If the conductor post 107 is formed by electrolytic plating, the shape of the tip of the conductor post 107 can be freely controlled.
The material of the conductor post 107 may be any material as long as it is suitable for this manufacturing method. For example, copper, nickel, gold, tin, silver, palladium, etc. can be used. And a stable conductor post 107 is obtained, which is preferable. The shape, structure, and material of the alignment conductor post 120a are basically the same as those of the conductor post 107, but here, the conductor post used for alignment (alignment conductor post 120a) is used for interlayer connection. (Conductor post 107) is shown separately.
[0021]
Next, the bonding metal material layer 108 is formed on the surface (tip) of the conductor post 107 (FIG. 2H). As a method of forming the bonding metal material layer 108, a method of forming by electroless plating, a method of forming the metal layer 101 by electrolytic plating using an electroplating lead (power supply electrode), and a paste containing a bonding metal material is used. The method of printing is mentioned. In the printing method, it is necessary to accurately align the printing mask with respect to the conductor post 107. However, in the method using electroless plating or electrolytic plating, the bonding metal material layer 108 is formed in addition to the surface of the conductor post 107. Therefore, the conductor posts 107 can be easily miniaturized and densified. In particular, the electrolytic plating method is very suitable because the metal that can be plated is more diverse and the chemical solution can be easily managed than the electroless plating method.
The material of the bonding metal material layer 108 may be any metal as long as it can be metal-bonded to the connected layers 310 and 410 shown in FIGS. 3 and 4, for example, solder. Among solders, it is preferable to use Sn or In, or solder composed of at least two of Sn, Ag, Cu, Zn, Bi, Pd, Sb, Pb, In, and Au. More preferably, it is an environmentally friendly Pb-free solder. As described above, since the alignment conductor post 120a has the same shape, structure, and material as the conductor post 107, the bonding metal material layer 108 is also formed on the surface of the alignment conductor post 120a.
[0022]
Next, an adhesive layer 109 is formed on the surface of the insulating layer 105 (FIG. 2I). The adhesive layer 109 may be formed by a method suitable for the resin to be used, such as direct application of a resin varnish by printing, curtain coating, bar coating or the like, or vacuum lamination or vacuum pressing of a dry film type resin. The method of laminating | stacking by the method of these etc. is mentioned. In FIG. 2I, the example in which the adhesive layer 109 is formed on the surface of the insulating layer 105 is shown, but the adhesive layer 109 may be formed on the surfaces of the connected layers 310 and 410. Needless to say, the insulating layer 105 and the connected layers 310 and 410 may be formed on both surfaces.
[0023]
Next, the metal layer 101 is removed by etching (FIG. 2 (i ′)). As a result, the conductor circuit embedded in the insulating layer 105 is exposed, and the land 114 and the alignment mark 130a can be formed. A resist metal layer 103 is formed between the metal layer 101 and the conductor circuit 104, and the resist metal layer 103 is resistant to a chemical solution used when the metal layer 101 is removed by etching. Therefore, even if the metal layer 101 is etched, the resist metal layer 103 is not etched, and the conductor circuit 104 is not etched. When the material of the metal layer 101 is copper and the material of the resist is nickel, tin, or solder, a commercially available ammonia-based etching solution can be used. When the material of the metal layer 101 is copper and the material of the resist metal layer 103 is gold, most etching solutions including a ferric chloride solution and a cupric chloride solution can be used. Alignment opposite to the alignment conductor post used when the connection layer is laminated may be provided at this time.
[0024]
The connection layers (110, 111, 112, 113) used in the present invention can be obtained by the steps shown in FIGS. 1 (a) to 2 (i ′) described in detail so far. Note that the connection layer 111 shown in FIG. 2 (h ′) is obtained by etching the metal layer 101 of the connection layer 110 shown in FIG. 2 (h).
[0025]
Next, the alignment method according to the present invention will be described in detail with reference to FIG. FIG. 3 shows a connection layer (referred to as a first connection layer 113a and a second connection layer 113b for ease of explanation) obtained by the steps shown in FIGS. It is sectional drawing for demonstrating the alignment method with the connection layer 310. FIG.
[0026]
As described above, the alignment conductor post 120a obtained in the same process as the conductor post 107 is formed on the first connection layer 113a. On the other hand, lands 350 and alignment marks 320 are also formed on the connected layer 310 at positions corresponding to the conductor posts 107 and the alignment conductor posts 120a. Since a general double-sided printed wiring board can be used for the connected layer 310, detailed description is omitted. When a general double-sided printed wiring board is used as the connected layer 310, the land 350 and the alignment mark 320 can be easily formed by selectively etching the copper foil.
[0027]
The alignment method of the first connection layer 113a and the connection target layer 310 is as follows. First, as shown in FIG. 3A, the first connection layer 113a and the layer to be connected 310 are adsorbed to the adsorption tool 340a and the stage 340b, and a CCD (charge coupled device) that can simultaneously recognize the upper and lower sides therebetween. , Image sensor) 330 is arranged. Subsequently, the alignment mark 320 and the alignment conductor post 120a provided on the connected layer 310 and the first connection layer 113a are recognized by the CCD 330, and the alignment mark 320 and the alignment conductor post 120a are in a predetermined positional relationship. The position of the connected layer 310 is adjusted by moving the stage 340b so as to be (usually the positions match). Further, after the CCD 330 is moved and removed from between the connection layer 310 and the first connection layer 113a, the suction tool 340a is lowered to dispose the first connection layer 113a on the connection layer 310. Crimping or temporary crimping. By such a method, the connection layer 310 and the first connection layer 113a can be aligned.
[0028]
Next, the first connection layer 113a and the second connection layer 113b are aligned by the same method as described above (FIG. 3B). The connected layer 311 (configured by the connected layer 310 and the first connecting layer 113a) formed by the above method is adsorbed on the stage 340b, and the second connecting layer 113b is adsorbed on the adsorbing tool 340a. Adsorb. After the CCD 330 is installed, the alignment mark 130a and the alignment conductor post 120b provided on the first connection layer 113a and the second connection layer 113b are in a predetermined positional relationship (usually, the positions match). And) move the stage 340b to adjust the position. Then, after the CCD 330 is moved and removed, the suction tool 320a is lowered to place the second connection layer 113b on the first connection layer 113a, and pressure bonding or temporary pressure bonding is performed. By such a method, the first connection layer 113a and the second connection layer 113b can be aligned, and a multilayer wiring board composed of the connected layer 310 and the first and second connection layers 112a and 113b is completed. be able to. In the case of further stacking, the same alignment as described above may be repeated. Further, FIG. 3 shows an alignment method for only one surface of the connected layer 310, but both surfaces may be used.
[0029]
Heretofore, the alignment method using the connection layer 113 shown in FIG. 2 (i ′) has been described in detail, but the connections shown in FIG. 2 (h), FIG. 2 (h ′), and FIG. The same alignment method can be used for the layers 110, 111, and 112. For example, in order to improve handling properties, in the example of the alignment method, the connection layer 113 may be replaced with the connection layer 112. In that case, the connection layer 112 and the connection target layer 310 are aligned, crimped, or bonded. After the temporary pressure bonding, the metal layer 101 is removed by etching. Further, in the case where the connection layer 110 and the connection layer 111 are used, a method of forming an adhesive layer on the connection layer side, and then performing alignment, pressure bonding, or provisional pressure bonding may be used.
[0030]
Considering the alignment tolerance, assuming that the diameter of the conductor post 107 is DP and the diameter of the land 350 is DL, ± (DL−DP) / 2. Even if the conductor post 107 is formed at a position different from the proper position for some reason, the alignment conductor post 120a is formed in the same process as the formation of the conductor post 107, and therefore the alignment conductor post 120a is also in the same position. Has a gap. In the alignment method of the present invention, alignment is performed using the alignment conductor post 120a and the alignment mark 320. Therefore, the alignment tolerance required for the alignment apparatus is ± (DL regardless of the positional deviation of the conductor post 107. −DP) / 2. This is the greatest feature of the alignment method of the present invention.
[0031]
In FIG. 3, the CCD 330 capable of recognizing up and down simultaneously is used. However, as shown in FIG. 4, several CCDs 430 capable of recognizing only one direction (four in FIG. 4) may be used. After recognizing the alignment conductor post 120c of the connection layer 113c and the alignment mark 420 of the connection layer 410 obtained by the steps shown in FIGS. 1A to 2I ′, the stage 440b is moved as indicated by an arrow. By adjusting the position of the layer to be connected 410, an alignment method may be adopted.
[0032]
【The invention's effect】
As is apparent from the above description, the present invention can increase the alignment tolerance between the connection layer and the connected layer, and therefore, by using the alignment method of the present invention, The alignment yield can be improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of a method for producing a connection layer used in the present invention.
FIG. 2 is a cross-sectional view showing an example of a method for producing a connection layer used in the present invention (continuation of FIG. 1).
FIG. 3 is a cross-sectional view showing an example of the alignment method of the present invention.
FIG. 4 is a cross-sectional view showing another example of the alignment method of the present invention.
FIG. 5 is a cross-sectional view showing an example of a conventional alignment method.
[Explanation of symbols]
101,501 metal layer
102 Plating resist
103,503 resist metal layer
104,504 conductor circuit
105,505 Insulating layer
106 Via
107,507 Conductor post
108,508 Metal material layer for bonding
109,509 Adhesive layer
110, 111, 112, 113, 113c Connection layer
114 rand
112a, 512 Build-up layer
113a First connection layer
113b Second connection layer
120a, 120b, 120c Alignment conductor post
130a, 320, 420, 520c Alignment mark
310, 311, 410 Connected layer
330, 430, 530 CCD
340a, 440a, 540a Adsorption tool
340b, 440b, 540b stages
510 core substrate
520 Second alignment mark

Claims (4)

A conductor post and an alignment conductor post are formed through the insulating layer on a surface opposite to the exposed surface of the conductor circuit embedded in the insulating layer so that one surface is exposed from the insulating layer. The connection layer and the connected layer on which the alignment mark is formed are connected so that the alignment conductor post and the alignment mark are recognized by the CCD, and the alignment conductor post and the alignment mark are in a predetermined positional relationship. An alignment conductor post for aligning the connection layer and the connection layer by moving / adjusting the position of the layer or the connection layer, the surface of the insulating layer opposite to the surface where the conductor circuit is exposed A conductor post for alignment , characterized in that the surfaces of the conductor post and the alignment conductor post are covered with an adhesive layer. An alignment method for performing alignment using the alignment conductor post according to claim 1 . Using the metal layer as a lead for electrolytic plating, forming a conductive circuit by electrolytic plating, forming an insulating layer on the conductive circuit, and forming a via so that a part of the conductive circuit is exposed on the insulating layer A connection layer obtained through a step of forming, a step of forming a conductor post and an alignment conductor post by electrolytic plating on the conductor circuit using the metal layer as an electroplating lead, and a substrate on which an alignment mark is formed. The connection layer and the alignment conductor post and the alignment mark are recognized by the CCD, and the position of the connection layer or the connected layer is moved and adjusted so that the alignment conductor post and the alignment mark are in a predetermined positional relationship. it by a method of forming an alignment conductive post to align the connection layer and the connecting layer, a conductor of the insulating layer Surface opposite to the surface where road is exposed on the surface of the conductive posts and alignment conductor posts, the method of forming the alignment conductive post which comprises a step of forming an adhesive layer. Method of forming alignment conductive post according to claim 3 Symbol mounting comprises the step of removing the metal layer by etching.

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