JP4103202B2 - Wiring board manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board on which a wiring pattern is formed on a substrate, and a gas discharge display device using the wiring board.
[0002]
[Prior art]
A gas discharge display device such as a plasma display performs display by self-emission, and thus has a wide viewing angle and is easy to see. In addition, it has features such as the ability to produce thin products and the realization of large screens, and its application to display devices for information terminal equipment and high-definition television receivers has begun. Plasma displays are roughly classified into a direct current drive type and an alternating current drive type. Among them, the AC drive type plasma display has a high brightness due to the memory action of the dielectric layer covering the electrode, and a lifetime that can be practically used can be obtained by forming a protective layer. As a result, plasma displays have been put into practical use as versatile video monitors.
[0003]
FIG. 9 is a perspective view showing the structure of a plasma display panel put into practical use. In this figure, the front substrate 100 is shown separated from the rear substrate 200 for easy viewing.
[0004]
The front substrate 100 includes a display electrode 600 made of a transparent conductive material such as ITO (Indium Tin Oxide) and tin oxide (SnO 2), a bus electrode 700 made of a low resistance material, and a dielectric made of a transparent insulating material on the front glass substrate 400. The layer 800 and a protective layer 900 made of a material such as magnesium oxide (MgO) are formed.
[0005]
The back substrate 200 has a structure in which address electrodes 1000, barrier ribs 1100, and phosphor layers 1200 are formed on a back glass substrate 500. Although not shown, a dielectric layer 1300 is also formed on the address electrode 1000.
[0006]
The discharge space region 300 is formed between the front substrate 100 and the rear glass substrate 500 by bonding the front substrate 100 and the rear substrate 200 so that the display electrodes 600 and the address electrodes 1000 are substantially orthogonal to each other.
[0007]
In this gas discharge display device, an alternating voltage is applied between a pair of display electrodes 600 provided on the front substrate 100, and a voltage is applied between the address electrodes 1000 and the display electrodes 600 provided on the rear substrate 200. To generate an address discharge and a main discharge in a predetermined discharge cell. The red, green, and blue phosphors 1200 separately applied to the respective discharge cells are caused to emit light by the ultraviolet rays generated by the main discharge, thereby performing display.
[0008]
A conventional example of such a gas discharge display device is described, for example, on pages 208 to 215 of a flat panel display 1996 (edited by Nikkei Microdevice, 1995).
[0009]
Here, a method for forming the bus electrodes 700 included in the front substrate 100 and the address electrodes 1000 included in the rear substrate 200 will be described in more detail. FIG. 8 shows an example in which the address electrode 1000 is formed on the rear glass substrate 500. Note that the bus electrode 700 included in the front substrate 100 is also formed by substantially the same process, and the description thereof is omitted.
[0010]
First, a Cr / Cu / Cr layer (1000a-c) to be the address electrode 1000 on the rear glass substrate 500, and a resist 2500 for forming the pattern of the address electrode 1000 are formed by sputtering, vapor deposition, spin coating, dry fill, etc. Are sequentially stacked using the film forming method (step (a): film forming step). Next, the resist 2500 is exposed and developed so as to have a desired pattern of the address electrode 1000 (steps (b) and (c): photolithography process). Next, the Cr layer 1000a is etched into a desired pattern using an etching solution for Cr (step (d): etching process). Next, the exposed and developed resist 2500 is peeled off, and a resist 2500 is formed again (steps (e) and (f)). By repeating the above process for each of the Cu layer 1000b and the Cr layer 1000c (steps (g) to (o)), the address electrode 1000 is formed on the rear glass substrate 500.
[0011]
In general, a process using such an etchant is called wet etching, but in conventional wet etching, the resist 2500 is formed of an organic material.
[0012]
Conventionally, when an electrode is formed by wet etching, a photolithography process for forming a resist has been essential.
[0013]
[Problems to be solved by the invention]
In order to reduce the number of photolithography processes, for example, a multilayer wiring such as a Cr layer 1000a, a Cu layer 1000b, and a Cr layer 1000c is formed using only the resist 2500 formed in steps (a) to (c). I examined that. This method can be achieved by using an etchant that can selectively etch the Cr layer and the Cu layer, but in practice, an etchant that does not damage the alkali development / peeling type resist is used. As a result of experiments, it has been clarified from experimental results that the Cr layers 1000a and 1000c are very easily side-etched and the processing accuracy of the Cr / Cu / Cr layer becomes very unstable. When the Cr layer is side-etched, the side-etched portion becomes a gap, and a residue such as a void or an etching solution enters, resulting in a disconnection failure due to wiring erosion in the dielectric baking process. When the wiring is disconnected, there is a line that does not contribute to display in the gas discharge display panel, which is a fatal problem for the display panel. The Cr / Cu / Cr layer is a low resistance wiring compared to other electrode materials, so it is very effective for large display devices such as gas discharge display panels. The same problem occurs even when a multilayer wiring such as / Cr is formed by wet etching.
[0014]
In addition, when the resist is formed of an organic material, erosion at the resist interface due to the etching solution caused by the adhesion between the resist and the electrode, and erosion due to resist defects caused by the inclusion of foreign matter and bubbles are caused, and this causes disconnection. It became clear that it would cause defects. In addition, since the conventional resist is formed by a photolithography process, resist defects are likely to occur due to foreign matters and the like. If the electrode was formed by wet etching while there was a resist defect, the region corresponding to the resist defect was also etched, and the electrode was easily disconnected. These problems are not limited to multilayer wiring such as Cr / Cu / Cr and Cr / Al / Cr, and similar problems occur even when wiring such as Al, Ag, Ni, and Au is formed by wet etching.
[0015]
As described above, in a gas discharge display panel or a wiring board in which electrodes are formed using conventional wet etching, disconnection defects are likely to occur due to side etching of electrodes or unexpected erosion. In addition, disconnection failures caused by resist defects are likely to occur.
[0016]
[Means for Solving the Problems]
An object of the present invention is to suppress a disconnection failure of an electrode formed on a wiring board or a gas discharge display panel. In particular, an object is to suppress disconnection failure when the electrode is formed by wet etching.
[0017]
In the present invention, in order to achieve the above object, a resist in wet etching is formed of an inorganic material.
[0018]
That is, a front substrate having a plurality of first electrodes and a rear substrate having a plurality of second electrodes, and at least the first electrode or the second electrode is wet using a resist made of an inorganic material. It was formed by etching.
[0019]
A front substrate having a plurality of first electrodes; a first dielectric layer covering the first electrodes; a plurality of second electrodes; and a second dielectric covering the second electrodes. A back substrate having a layer, and having an inorganic material layer at least between the first electrode and the first dielectric layer or between the second electrode and the second dielectric layer. Then, the first electrode or the second electrode was formed by wet etching using the inorganic material layer.
[0020]
As a result, resists formed by depositing inorganic materials using sputtering or vapor deposition have higher adhesion to electrodes than conventional organic resists, so that etching at the resist interface can be suppressed. It was possible to reduce the disconnection failure.
[0021]
In addition, if an inorganic material is used as a resist, there is no need to consider etching damage as compared with conventional organic materials, and an etching solution that can easily control the etching amount can be used. Disconnection due to etching could be suppressed. As the inorganic material, for example, ITO, SiO2, an alloy layer of Ni and Cr, or the like may be used.
[0022]
In addition, since the inorganic material layer has little reaction with the electrode and the dielectric layer, the inorganic material layer can be interposed between the electrode and the dielectric layer without peeling off. It has also become possible to suppress electrode erosion and disconnection due to reaction.
[0023]
Note that as a method for forming a resist using an inorganic material layer, any method such as photolithography, blaster, or laser may be used.
[0024]
Further, in the present invention, in order to achieve the above object, the resist is formed using a blaster. That is, the present invention includes a front substrate having a plurality of first electrodes and a rear substrate having a plurality of second electrodes, and at least uses the blaster on the first electrode or the second electrode. The first electrode or the second electrode was formed by wet etching using the material layer. In this case, the material layer becomes a resist for the first and second electrodes.
[0025]
In order to form this material layer, a protective layer serving as a resist for the material layer must be formed. However, since the material layer (resist) is formed using a blaster, an etching solution is formed at the interface between the protective layer and the material layer. Does not penetrate, and the possibility of defects in the material layer (resist) is reduced. Accordingly, since wet etching is performed using a material layer (resist) with few defects, disconnection of the electrode can be suppressed. Also, resist processing using a blaster could be realized in a short time and at low cost.
[0026]
In addition, if the material layer is formed using a laser instead of a blaster, even the protective layer used in the blaster is not formed, so the electrode can be formed without a photolitho process, and the electrode is greatly formed. The process could be shortened. Of course, a mask for forming the electrode pattern is also unnecessary. In addition, if the material layer (resist) is formed without using a photolithography process, the material layer is simply removed by a laser so as to form a desired pattern, so that resist defects can be extremely reduced.
[0027]
The material layer (resist) in these cases may be an organic material or an inorganic material.
[0028]
Further, when a blaster is used, the same processing as a laser can be performed by narrowing the blaster nozzle. Furthermore, even if the material layer (resist) is mechanically cut into a desired pattern, processing similar to that of laser is possible.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0030]
FIG. 1 shows a first embodiment in which address electrodes are formed on a back substrate.
[0031]
In the figure, 10 is a rear glass substrate, 11a, 11b, 11c are address electrodes, and a Cr / Cu / Cr layer is laminated in order. Reference numeral 25 denotes an inorganic material layer serving as a resist, and reference numeral 26 denotes a photoresist layer for forming a pattern of the resist 25.
[0032]
First, a Cr layer 11c, a Cu layer 11b, a Cr layer 11a, and an ITO layer to be the inorganic material layer 25 are sequentially sputtered on the glass substrate 10, and then a dry film resist to be the photoresist 26 is laminated (step (a)). .
[0033]
Next, the photoresist 26 (dry film resist) is exposed and developed so as to have a desired electrode pattern, and then baked (step (b)).
[0034]
Next, blasting with calcium carbonate is performed to remove the inorganic material layer 25 (ITO layer) (steps (c) and (d)). Processing of the resist by this blasting process was able to form a pattern having a width almost the same as the width of the resist with high accuracy in a very short time.
[0035]
Next, the photoresist 26 (dry film resist) is peeled off (step (e)). Here, it is preferable to remove the dust of the inorganic material layer 25 (ITO layer) generated by the blasting process by washing.
[0036]
Subsequently, the Cr layer 11a is etched using an aqueous solution composed of potassium permanganate and sodium metasilicate (step (f)). In this case, the aforementioned inorganic material layer 25 (ITO layer) serves as the resist for the Cr layer 11a. The aqueous solution composed of potassium permanganate and sodium metasilicate is an alkaline aqueous solution capable of etching the Cr layer 11a, and hardly etches the inorganic material layer 25 (ITO layer) and the Cu layer 11b. As a result, the inorganic material layer 25 (ITO layer) was not substantially eroded by the alkaline aqueous solution, and the Cr layer 11a could be formed with almost no side etching. Further, the adhesion between the inorganic material layer 25 (ITO layer) and the Cr layer 11a was good, and the interface between the Cr layer 11a and the inorganic material layer 25 (ITO layer) was not eroded.
[0037]
Next, the Cu layer 11b is etched using an aqueous solution composed of ferric sulfate and sulfuric acid (step (g)). In this case, the inorganic material layer 25 (ITO layer) and the Cr layer 11a described above serve as a resist for the Cu layer 11b. The aqueous solution composed of ferric sulfate and sulfuric acid is an acidic aqueous solution that can etch the Cu layer 11b, and hardly etches the inorganic material layer 25 (ITO layer) and the Cr layer 11a. As a result, the Cr layer 11a and the Cu layer 11b could be formed with almost no side etching.
[0038]
Next, Cr is etched again using an aqueous solution of potassium permanganate and sodium metasilicate to form an electrode wiring having a Cr / Cu / Cr / ITO structure (step (h)).
[0039]
Through the above process, it was possible to obtain an electrode wiring of Cr / Cu / Cr / ITO configuration with little disconnection failure due to side etching.
[0040]
When the inorganic material layer 25 (ITO layer) is used as a resist in this manner, sufficient adhesion between the inorganic material layer 25 and the Cr layer 11a can be secured, and electrode erosion and disconnection failure at the resist interface due to the etching solution can be suppressed. I was able to. In addition, resist defects in the inorganic material layer 25 due to entrapment of foreign matters and bubbles were reduced, and erosion and disconnection failure of the electrode due to the etching solution could be suppressed.
[0041]
Further, by using the inorganic material layer 25 as a resist, the selection range of the etching solution is widened, and the side etching of the conventional Cr layers 11a and 11c can be suppressed. In addition, it is no longer necessary to consider etching damage to the resist.
[0042]
Moreover, resist defects of the inorganic material layer 25 could be suppressed by using a blaster such as sandblast instead of the conventional etching solution. That is, since the etching solution does not penetrate from the interface between the photoresist 26 and the inorganic material layer, the possibility that the inorganic material layer 25 (resist) has defects is low, and the inorganic material layer 25 (resist) with few defects is formed. Since the wet etching is used, disconnection of the electrode can be suppressed.
[0043]
In this electrode formation process, the Cr layer is etched with an alkaline aqueous solution. Conventionally, when an alkali-resistant organic resist is formed using a photolithography process, a developer and a stripping solution for the alkali-resistant organic resist have been expensive and cause pollution. Since there is little reaction with the dielectric, etc., there is no need for peeling, and no peeling solution is required. In addition, since an inorganic resist is formed using a blaster instead of the photolithography process, it is no longer necessary to use a developer for an alkali-resistant organic resist. That is, the problem of the developing solution and the stripping solution with respect to the conventional alkali-resistant organic resist is eliminated.
[0044]
FIG. 2 shows a second embodiment in which address electrodes are formed on the back substrate.
[0045]
In FIG. 1, it is understood that in etching of the Cu layer 11b, a trace amount of the etching solution of the Cu layer remains in a defect portion such as a pinhole of the inorganic material layer 25 (ITO layer), and the Cu layer may be eroded in a later process. It was. Therefore, in FIG. 2, the electrode was formed by the following process.
[0046]
First, the Cr layer 11a is etched through the same process as in FIG. 1 (steps (a) to (e)).
[0047]
Next, a photoresist 26 (dry film resist) that is not eroded by the etching solution for Cu is laminated on the inorganic material layer 25 (ITO layer) (step (f)), and then the inorganic material layer 25 (ITO layer) is covered. The pattern is exposed and developed (step (g)). Thereafter, the unexposed portion of the photoresist 26 (dry film resist) is removed (step (h)), and the Cu layer 11b is etched with the same etchant as in FIG. 1 (step (I)). Then, the photoresist 26 (dry film resist) is peeled off (step (j)). Subsequent processes are performed in the same manner as in FIG.
[0048]
As a result, the Cu etchant does not remain in the defects such as pinholes in the inorganic material layer 25 (ITO layer), and the Cu layer can be prevented from being eroded in the subsequent process.
[0049]
FIG. 3 shows a third embodiment in which address electrodes are formed on the back substrate.
[0050]
1 shows that not only the inorganic material layer 25 (ITO layer) but also the Cr layer 11a is blasted with calcium carbonate (step (d)), and the Cu layer 11b is etched (step (e)). 26 (dry film resist) is peeled off (step (f)), and the others are the same. Therefore, a material that is not etched with respect to the etching solution for the Cu layer 11b is selected as the photoresist 26 (dry film resist).
[0051]
As a result, the step of etching the Cr layer 11a is eliminated, and the electrode formation process can be simplified. Further, considering the efficiency of the blasting method and the efficiency of the wet etching method, it is preferable to process up to the Cr layer 11a by the blasting method in view of the material characteristics and film thickness of the Cu layer 11b. Thus, forming an electrode by combining a dry etching method such as a blast method and a wet etching method is effective for simplification of the process and defective disconnection of the electrode.
[0052]
Next, FIG. 4 shows a fourth embodiment in which address electrodes are formed on the back substrate.
[0053]
FIG. 4 shows an example in which electrodes are formed without using a photolithography process.
[0054]
First, a Cr layer 11c, a Cu layer 11b, a Cr layer 11a, and an ITO layer that becomes the inorganic material layer 25 are sequentially formed on the glass substrate 10 by sputtering (step (a)).
[0055]
Next, the inorganic material layer 25 (ITO layer) is removed using a laser so as to obtain a desired electrode pattern (step (b)).
[0056]
Thereafter, similarly to FIG. 1, the Cr layers 11a, Cu11b, and Cr11c are sequentially etched to form electrode wirings (steps (c) to (e)).
[0057]
If a laser is used in this way, a resist can be formed without the photolithography process as shown in FIGS. 1 to 3, and the electrode formation process can be greatly simplified. In addition, a mask for forming electrodes is no longer necessary.
[0058]
By eliminating the photolithography process, resist defects due to unexposed portions caused by adhesion of foreign substances and the like are eliminated, and therefore disconnection failure during wet etching caused by the resist defects can be suppressed. That is, it was possible to realize an electrode formation process that is resistant to foreign matter.
[0059]
Note that as shown in FIG. 3, the layers up to the Cr layer 11a may be processed by laser. This could be realized from the thickness of the Cr layer, and could actually be processed with high accuracy. The process is as shown in FIG.
[0060]
In the process of FIG. 4 and FIG. 5, in the etching of the Cu layer 11b, a trace amount of the Cu layer etching solution remains in the defect portion such as the pinhole of the inorganic material layer 25 (ITO layer), and the Cu layer is eroded in a later step. I found out that Therefore, in FIG. 6, in order to solve this point, the electrode was formed by the following process. In FIG. 6, the process of FIG. 5 will be described.
[0061]
First, a Cr layer 11c, a Cu layer 11b, and a Cr layer 11a are sequentially sputtered on the glass substrate 10, and then an ITO layer that becomes the inorganic material layer 25 and a resist 27 that is not eroded by the etching solution of the Cu layer 11b are formed. (Step (a)).
[0062]
Next, the resist 27 and the inorganic material layer 25Cr layer 11a are removed using a laser so as to obtain a desired electrode pattern (step (b)). Thus, since the resist 27 is formed by laser, it is not necessary to be a photosensitive material used in the conventional photolithography process.
[0063]
Next, the Cu layer 11b is etched using the resist 27 using an aqueous solution of ferric sulfate and sulfuric acid (step (c)). At this time, since the resist 27 exists on the inorganic material layer 25, the inorganic material layer 25 is not easily eroded.
[0064]
Thereafter, the resist 27 is removed, and the Cr layer 11c is etched using an aqueous solution composed of potassium permanganate and sodium metasilicate (step (d)). The resist 27 may be removed after step (e).
[0065]
Through the above process, it was possible to obtain an electrode wiring of Cr / Cu / Cr / ITO configuration with little disconnection failure due to side etching (step (e)).
[0066]
As a result, the Cu etchant does not remain in the inorganic material layer 25 (ITO layer), and the Cu layer can be prevented from being eroded in the subsequent process.
[0067]
Next, a description will be given of a low-cost electrode that has few side etches and has a further reduced number of processes as compared to the previous examples.
[0068]
FIG. 10 shows an example in which an electrode is formed for the purpose of reducing the number of film formation by sputtering or the like and further reducing the cost.
[0069]
First, a Cr layer 11c, a Cu layer 11b, and an alloy layer of Ni and Cr to be the inorganic material layer 25 are sequentially sputtered on the glass substrate 10 (step (a)). If the alloy layer is Ni and Cr, the subsequent selective etching of the Cr layer 11b and the Cu layer 11c is possible. Further, it is a material that can be easily processed by laser.
[0070]
Next, the inorganic material layer 25 (Ni and Cr alloy layer) is removed using a laser so as to obtain a desired electrode pattern (step (b)). Of course, blasting may be used as in the above-described embodiment.
[0071]
Thereafter, similarly to FIG. 3, the Cu layer 11b and the Cr layer 11c are sequentially etched to form electrode wirings (steps (c) to (d)).
[0072]
With this electrode configuration, the Cr layer 11a described in the previous examples is not necessary, so that the film forming step of the Cr layer 11a can be omitted, and the cost can be further reduced. Further, the electrode composed of the Cr layer 11c, the Cu layer 11b, and the alloy layer of Ni and Cr prevents the disconnection due to side etching or the like, adheres to the substrate 10 by the Cr layer 11c, and depends on the Cu layer 11b. Since the resistance can be reduced and the reaction with the dielectric layer (not shown) by the alloy layer of Ni and Cr can be realized, the conditions required for the plasma display panel can be satisfied. In place of the alloy layer of Ni and Cr, SiO2, ITO, Si, Ni or the like may be used.
[0073]
Similarly, FIG. 11 shows an example in which an electrode is formed as the inorganic material layer 25 by reducing the number of times of film formation by sputtering or the like and increasing the thickness of the Cr layer.
[0074]
First, the Cr layer 11c, the Cu layer 11b, and the thick Cr layer that becomes the inorganic material layer 25 are sequentially sputtered on the glass substrate 10 (step (a)). The Cr layer 25 is preferably three times thicker than the Cr layer 11c in order to facilitate the setting of process conditions described later.
[0075]
Next, the inorganic material layer 25 (thick Cr layer) is removed using a laser so as to obtain a desired electrode pattern (step (b)). Of course, it may be blasted as in the previous embodiment.
[0076]
Thereafter, similarly to FIG. 3, the Cu layer 11b and the Cr layer 11c are sequentially etched to form electrode wirings (steps (c) to (d)).
[0077]
In this case, when the Cr layer 11c is etched, the inorganic material layer 25 (thick Cr layer) is also etched to reduce the film thickness. However, since the inorganic material layer 25 is sufficiently thicker than the Cr layer 11c, there is no problem in reliability. Could be formed. Further, by increasing the thickness of the inorganic material layer 25, it becomes difficult for pinholes to be formed in the inorganic material layer 25, so that the residue of the etching solution on the surface of the Cr layer 11b is reduced. It can prevent erosion of the layer.
[0078]
By thickening the Cr layer 25 in this way, dry etching such as laser processing and wet etching are combined as before, even if there is no selectivity to the etching of the underlying Cu layer 11b and Cr layer 11c. Electrode formation is possible.
[0079]
Next, an example of a gas discharge display panel formed using the electrode forming process described so far will be described with reference to FIG.
[0080]
FIG. 7 shows a gas discharge type display panel, FIG. 7 (a) shows a cross-sectional view parallel to the address electrodes, and FIG. 7 (b) shows a cross-sectional view perpendicular to the address electrodes. Is. Further, the above electrode forming process is applied to both the front substrate and the rear substrate.
[0081]
In the figure, 10 is a rear glass substrate, 11 is an address electrode, 12 is a thin film dielectric layer such as SiO2, 13 is a thick dielectric layer, 14 is a front glass substrate, 15 is a transparent electrode such as ITO, and 16 is Cr- Bus electrode such as Cu-Cr, 17 is a thin film dielectric layer such as SiO2, 18 is a thick dielectric layer, 19 is a protective film such as MgO, 20 is a sealing member, 21 is an electrode from an external circuit, and 22 is An anisotropic conductive sheet containing conductive particles, 23 is a partition, 24 is a phosphor layer, and 25 is an inorganic material layer that serves as a resist during electrode formation.
[0082]
The front substrate was formed as follows.
[0083]
First, the transparent electrode 15 is formed on the glass substrate 14. The transparent electrode 15 may be formed using any one of wet etching, blaster, and laser, but it is preferable to use a laser to simplify the process. Next, the bus electrode 14 is formed on the transparent electrode 15 by using the electrode forming process of the present invention described above. At this time, the above-described inorganic material layer 25 exists on the bus electrode 16. Next, a thin film dielectric layer 17 is formed so as to cover at least the transparent electrode 15 and the bus electrode 16. For example, the thin film dielectric layer 17 is formed on the entire panel surface. Next, a thick film dielectric layer 18 is formed on the thin film dielectric layer 17 by a thick film printing method. Next, a protective film 19 such as MgO is formed on the thick dielectric layer 18 by vapor deposition. In the case of the front substrate, the transparent electrode 15 is formed under the bus electrode 16. In general, the transparent electrode 15 is an ITO layer. Therefore, the transparent electrode 15 and the bus electrode 16 including the inorganic material layer 25 may be formed by a series of wet etching processes by applying the above-described electrode forming process of the present invention. In this case, ITO / Cr / Cu / Cr / ITO is sequentially formed, and Cr / Cu / Cr / ITO to be the bus electrode 16 is formed by using any of the electrode forming processes of the present invention described above. Thereafter, a resist is formed so that the ITO layer to be the transparent electrode 15 has a desired pattern, the ITO layer is etched using this resist, and the resist is removed to form the transparent electrode 15 and the bus electrode 16. Can do. The inorganic material layer 25 may be SiO2 or an alloy layer of Ni and Cr.
[0084]
On the other hand, the back substrate was formed as follows.
[0085]
First, the address electrode 11 is formed on the glass substrate 10 using the above-described electrode forming process of the present invention. Next, a thin film dielectric layer 12 is formed so as to cover at least the address electrode 11. For example, the thin film dielectric layer 12 is formed on the entire panel surface. Next, a thick film dielectric layer 13 is formed on the thin film dielectric layer 12 by a thick film printing method. Next, the barrier ribs 23 are formed on the thick film dielectric layer 13, and the phosphor layer 24 is further formed by a printing method. The partition walls may be formed in a stripe shape parallel to the address electrodes, or may be formed in a lattice shape surrounding the display cell.
[0086]
The front substrate and the rear substrate thus formed were aligned and then sealed with the sealing member 21. A rare gas is mixed in the sealed space. Further, the electrode 21 from the external circuit is connected via an anisotropic conductive sheet to an external connection terminal included in each of the front substrate and the rear substrate in order to simplify the connection process.
[0087]
Thus, since the reaction between the address electrode 11 and the dielectric layer 18 and the bus electrode 16 and the dielectric layer 13 does not matter, the inorganic material layer 25 can be left without peeling. As a result, the reaction between the address electrode 11 and the dielectric layer 18 and the bus electrode 16 and the dielectric layer 13 can be suppressed, and the erosion of the address electrode 11 and the bus electrode 16 can be suppressed. Therefore, there is no problem even if the thin film dielectric layer 12 in the figure is not formed.
[0088]
If the bus electrode and the address electrode are formed as a Cr / Cu / Cr / ITO layer, a Cr / Cu / Cr / SiO2 layer, or an alloy layer of Cr / Cu / Cr / Ni and Cr in this way, the result is various causes. The disconnection failure could be reduced.
[0089]
In order to further reduce the disconnection failure, any of the Cr layer 11a, the Cu layer 11b, and the Cr layer 11c may be formed using a different resist. Further, the inorganic material layer may be composed of two layers, and may be a Cr / Cu / Cr / ITO / SiO2 layer.
[0090]
In the embodiments described so far, it goes without saying that the same effect can be obtained by replacing the Cr / Cu / Cr electrode wiring with Cr / Al / Cr, Ag, Ni, Au, Al, or the like. That is, it goes without saying that the same effect can be obtained if the material satisfies the wiring resistance required for the gas discharge display panel. Needless to say, the same effect can be obtained by forming the bus electrodes on the front substrate as shown in FIG. Needless to say, the present invention can be applied not only to a gas discharge display panel, but also to all wiring boards in which electrodes are formed by wet etching.
[0091]
Needless to say, the inorganic material layer 25 (resist) can suppress erosion of the electrode at the resist interface without using a blaster or a laser forming method. Conversely, if the resist is formed using a blaster or a laser, it goes without saying that resist defects can be suppressed even if the resist is not an inorganic material.
[0092]
【The invention's effect】
As described above, according to the present invention, it is possible to suppress disconnection failure of electrodes formed on a wiring board or a gas discharge display device. In particular, it is possible to suppress disconnection failure when the electrode is formed by wet etching.
[Brief description of the drawings]
FIG. 1 is a process diagram showing a first embodiment of the present invention.
FIG. 2 is a process diagram showing a second embodiment of the present invention.
FIG. 3 is a process diagram showing a third embodiment of the present invention.
FIG. 4 is a process diagram showing a fourth embodiment of the present invention.
FIG. 5 is a process diagram showing a fifth embodiment of the present invention.
FIG. 6 is a process diagram showing a sixth embodiment of the present invention.
FIG. 7 is a cross-sectional view showing a gas discharge display device of the present invention.
FIG. 8 is a conventional process diagram.
FIG. 9 is a cross-sectional view showing a conventional gas discharge display device.
FIG. 10 is a process diagram showing a seventh embodiment of the present invention.
FIG. 11 is a process diagram showing an eighth embodiment of the present invention;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Back glass substrate, 11 ... Address electrode, 12 ... Thin film dielectric layer, 13 ... Thick film dielectric layer, 14 ... Front glass substrate, 15 ... Display electrode, 16 ... Bus electrode, 17 ... Thin film dielectric layer, 18 DESCRIPTION OF SYMBOLS ... Thick film dielectric layer, 19 ... Protective film, 20 ... Sealing material, 21 ... External circuit electrode, 22 ... Anisotropic conductive sheet, 23 ... Partition, 24 ... Phosphor layer, 25 ... Inorganic material layer.

Claims (2)

A first step of laminating a first Cr film, a Cu film, and a second Cr film in this order on a glass substrate;
A second step of forming an inorganic material layer on the second Cr film and forming the inorganic material layer into a pattern of electrode wiring;
The second Cr film, the Cu film, and the first Cr film are sequentially wet etched through the pattern of the inorganic material layer, and the electrode wiring is formed into the first Cr film, the Cu film, and the second Cr. A third step of forming a laminated structure consisting of films is performed in this order,
In the second step, the inorganic material layer, the exposure to the photoresist which is laminated thereon, developing, and by blasting through a patterned formed by baking, and molded prior Symbol pattern, and the third In the process, the second Cr film and the first Cr film are formed with an aqueous solution composed of potassium permanganate and sodium metasilicate, and the Cu film is etched with an aqueous solution composed of ferric sulfate and sulfuric acid to form the pattern. A method for manufacturing a wiring board, comprising: _{2. The} method of manufacturing a wiring board according to claim 1, wherein the inorganic material layer is formed of ITO, SiO2, Si, Ni, or an alloy of Ni and Cr.

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