JP4124082B2 - Constant voltage power circuit - Google Patents

Description

  The present invention relates to a constant voltage power supply circuit that supplies a DC constant voltage, and in particular, when a voltage control circuit unit that performs voltage control and an overcurrent protection circuit unit are integrated, a parasitic transistor that is parasitic in the integrated circuit. The present invention relates to a technique for preventing an abnormal operation at the time of start-up that occurs due to the operation of the device.

A large number of logic circuits are used in recent vehicles, and a constant voltage power supply circuit that supplies a constant voltage of about +5 V using a battery as a power supply is often used as a power supply for supplying a constant voltage to these logic circuits. Reference numeral 3 is an example of a conventional circuit of such a constant voltage power supply circuit.
The positive power input terminal Ni of the power supply circuit 1 is supplied with a positive voltage from the battery B1 via the switch SW1. A negative power input terminal (ground terminal) Ng is connected to the negative side of the battery B1 and grounded.

  The positive voltage supplied to the power input terminal Ni is supplied to the emitter of the output stage PNP transistor Tr1 through the output current detection resistor R1. The collector of the transistor Tr1 is connected to the power supply output terminal No of the power supply circuit 1. The base current of the transistor Tr1 is controlled by a Darlington-connected base current control NPN transistor Tr2, and the collector-emitter voltage of the transistor Tr1 changes according to the control amount, and the output voltage Vo appearing at the power output terminal No is a constant value ( For example, it is controlled to + 5V).

  The transistor Tr2 is controlled by the output voltage of the error amplifier OP1. The error amplifier OP1 drives the base of the transistor Tr2 with an output voltage proportional to the error voltage between the feedback voltage Vf obtained by dividing the output voltage Vo by the resistors R2 and R3 and the reference voltage Vs. A resistor R4 is connected between the emitter of the transistor Tr2 and the negative power supply input terminal Ng. The emitter voltage of the transistor Tr2 is a value obtained by subtracting the base-emitter voltage of the transistor Tr2 from the output voltage of the error amplifier OP1. It becomes. Therefore, a current obtained by dividing the voltage by the resistance value of the resistor R4 flows through the resistor R4. Since the base current of the transistor Tr2 is small, the same current flows through the collector current.

  The base current of the transistor Tr1 and the collector current of the transistor 4 flow into the collector of the transistor Tr2. The error amplifier OP1 controls the collector-emitter voltage of the transistor Tr1 and the output voltage Vo to a constant value by controlling the amount of current drawn from the collector of the transistor Tr4 and the base of the transistor Tr2 by the transistor Tr2. .

  The transistor Tr3 (first PNP transistor) and Tr4 (second PNP transistor) constitute a current mirror circuit 21. The common emitter terminal is supplied with power from the power input terminal Ni. The cell area of the transistor Tr4 corresponding to the output side of the current mirror circuit 21 is larger than that of the input side transistor Tr3, for example, 6 times. From the collector of the transistor Tr4, the constant current is 6 times the collector current of the transistor Tr3. Is supplied to the collector of the transistor Tr2. The reason for supplying such a constant current to the transistor Tr2 is to stabilize the operation of the voltage control circuit constituted by the error amplifier OP1 and the transistors Tr2 and Tr1. A constant current having a magnitude obtained by dividing a value obtained by subtracting the base-emitter voltage (about 0.6 V) of the transistor Tr3 from the input voltage Ve by the resistance value of the resistor R5 flows through the collector of the transistor Tr3.

  A series circuit of the forward direction between the emitter and base of the overcurrent protection PNP transistor Tr5 and the resistor R6 is connected in parallel to both ends of the output current detection resistor R1. When the power output terminal No is short-circuited with the negative side power input terminal Ng or the like and the output current Io increases rapidly, the voltage across the resistor R1 rapidly increases, the base current flows through the transistor Tr5, and flows from the collector of the transistor Tr5. Current flows out. The collector current that has flowed out flows into the base of the overcurrent protection NPN transistor Tr6 through the resistor R7, and makes the transistor Tr6 conductive. The conducting transistor Tr6 draws current from the output terminal of the error amplifier OP1, and decreases the base current of the transistor Tr2. When the base current of the transistor Tr2 decreases, the amount of base current drawn from the transistor Tr1 also decreases, and the current flowing through the transistor Tr1 decreases. Thus, the output current Io flowing through the transistor Tr1 is limited. By adjusting the circuit constant so that the value of the output current Io flowing through the transistor Tr1 when this overcurrent protection operation works is kept within a range that the transistor Tr1 is not destroyed by the limited output current or heat generation, The power supply circuit 1 can be prevented from being destroyed by overcurrent.

  The above-described power supply circuit 1 in FIG. 3 is less likely to cause problems when it is configured using discrete circuit components. However, for the purpose of reducing the size of the power supply circuit, for example, when the main circuit portion 2 surrounded by the one-dot chain line in FIG. .

FIG. 4 shows a structural example in the vicinity of the transistor Tr4 (second PNP transistor) in the circuit portion constituted by the integrated circuit. Transistor Tr4, N was formed on the P-type substrate 3 ^- collector region 5 on the surface of the layer 4, the P ⁺ region as the emitter region 6, N functions as a base region 4 ^- keep the contact with the layer 4 N ⁺ This is formed as a lateral PNP transistor in which the base contact region 7 is formed. An N ⁺ buried base region 8 is formed between the N ⁻ layer of the base region 4 and the P-type substrate 3 in order to reduce the potential gradient of the base region 4.

The transistor Tr4 is composed of an emitter region 6 and a collector region 5 formed on the surface layer of the N ⁻ layer 4 and a base region 4 sandwiched between them and a P-type substrate 3 as shown in the figure. A P-type isolation region 10 is formed between the region where the transistor Tr4 is formed and the region where the other transistor, the ground terminal 9 and the like are formed, thereby achieving electrical isolation between the elements. It has been.

However, when the circuit is constituted by an integrated circuit and the elements are separated by the isolation region 10, an undesirable parasitic transistor is formed at the same time as the target transistor. The parasitic transistors Tr4e and Tr4b shown in FIG. 4 are typical ones. The parasitic transistor Tr4e is parasitic as a PNP transistor having the emitter region 6 of the transistor Tr4 as an emitter region, the base region 4 and the buried base region 8 of the transistor Tr4 as a base region, and the P-type substrate 3 as a collector region. The parasitic transistor Tr4b is parasitic as an NPN transistor having the base region 4 of the transistor Tr4 as the collector region, the P-type isolation region 10 as the base region, and the separated N ⁻ layer 4 as the emitter region as the emitter region. . Further, a resistor Rp (low impedance) exists between the base of the parasitic transistor Tr4b (P-type substrate 3 region) and the ground GND.

  If such parasitic transistors Tr4e and Tr4b exist, they operate when they are not expected to cause the power supply circuit 1 to operate abnormally. Hereinafter, an abnormal operation caused by a parasitic transistor that may occur when starting up the power supply circuit 1 will be described.

  5 is a circuit diagram in which the parasitic transistor Tr4b described in FIG. 4 is added to the power supply circuit 1 of FIG. 3, and FIG. 6 is an abnormal case that may occur when the power supply circuit 1 of FIG. An example of a voltage waveform is shown.

  When the switch SW1 is turned on, the input voltage Ve at the power input terminal Ni receives the voltage (14V) from the battery B1, and rises rapidly as shown in the first rising part of FIG. 6 (part A of FIG. 6). ). As a result, a current flows through the collector of the transistor Tr3, and a current determined by the current mirror ratio tends to flow out of the collector of the transistor Tr4. However, the start-up time of the transistors Tr3 and Tr4 is short, but the error amplifier OP1 and the circuit for supplying the reference voltage Vs to the error amplifier OP1 are configured using a large number of transistors, so that start-up takes time. Therefore, when the transistor Tr4 is turned on, the output of the error amplifier OP1 is at the L level, and the transistor Tr2 driven thereby is still in the OFF state.

  Thereafter, the error amplifier OP1 starts operating. Then, the error amplifier OP1 conducts the transistor Tr2 in order to increase the output voltage. The transistor Tr2 attracts the collector current of the transistor 4 simultaneously with the base current of the transistor Tr1. Thus, the collector current of the transistor 4 starts to flow. At this time, since the positive power supply terminal voltage of the error amplifier OP1 is higher than the negative input terminal voltage, the error amplifier OP1 drives the transistor Tr2 and draws a large current from the base of the transistor Tr1, and outputs a large output to the transistor Tr1. Attempt to pass current Io.

  When the output current Io increases, the potential difference between both ends of the resistor R1 increases and the base current starts to flow through the transistor Tr5. When the collector current of the transistor Tr5 flows, current is supplied to the base of the transistor Tr6, the transistor Tr6 is turned on, and the base current of the transistor Tr2 is attracted. For this reason, the collector current of the transistor Tr2 decreases, and the base current of the transistor Tr1 also decreases. Then, the output current Io is limited, the potential difference for driving the transistor Tr5 cannot be obtained at both ends of the resistor R1, and the transistor Tr5 is turned off.

  Thus, when the power supply circuit 1 rises, the transistor Tr5 operates while being repeatedly turned on and off, and accordingly, the transistors Tr6 and Tr2 are also turned on and off repeatedly, thereby suppressing an increase in the output current Io of the transistor Tr1 and its value is It is limited to a predetermined value determined by a circuit constant (B portion in FIG. 6). At this time, a parasitic current Ip flows from the transistor Tr5 to the P-type substrate 3, but it is not at a level that causes the error amplifier OP1 to malfunction.

  In this state, when the voltage of the power input terminal Ni is broken and the voltage drops due to chattering of the switching SW1 (C portion in FIG. 6), the electric charge accumulated in the capacitor C1 between the power output terminal No and the ground GND is transferred to the transistor Tr1. At the same time as it flows into the collector of the transistor 4 via the collector-base, a part of it also flows into the P-type substrate 3 which is the base region of the parasitic transistor Tr4b through the base region 4. When the power supply circuit 1 rises, simultaneously with the above-described operation, the current that flows from the emitter to the base region 4 when the transistor Tr4 is turned on also flows into the P-type substrate 3. Furthermore, the current that flows from the emitter into the base region 4 when the transistor Tr5 is turned on also flows into the P-type substrate 3. For this reason, the base current of the transistor Tr5 is reduced by the amount of current flowing into the parasitic transistor, and the collector current of the transistor Tr5 is also reduced. Therefore, the transistor Tr6 works in a direction in which it is difficult to conduct.

  Although the parasitic current flowing into the P-type substrate 3 is considered to flow from the above three paths, in addition to the path from the emitter of the transistor Tr4 when the switch SW1 is ON, the parasitic current flows from the collector of the transistor Tr4 by the chattering of the switch SW1. Further, when the current flowing from the emitter is added when the overcurrent protection transistor Tr5 is turned on, the parasitic transistor Tr4b finally becomes conductive.

  Due to the parasitic transistor Tr4b that has reached the conductive state, the ground GND is short-circuited from the power supply input terminal Ni via the transistor Tr4 or the transistor Tr5, and a large current flows. The collector of the parasitic transistor Tr4b is also connected to the transistor inside the error amplifier OP1 through a parasitic path. When the transistor Tr4b is in a conductive state, current is drawn from a certain transistor inside the error amplifier OP1. When the transistor makes the OP1 output H level, since the parasitic transistor Tr4b is conductive, the output of OP1 continues to be at the H level, and as described above, the transistor Tr6 does not easily conduct. The next-stage transistor Tr2 continues to conduct.

  Therefore, the base current of the transistor Tr1 is continuously attracted, and the output voltage Vo continues to rise beyond the rating (5V). When the output voltage Vo further increases, but close to the input voltage Ve, the overcurrent protection transistor Tr5 is completely turned off from the state in which the overcurrent protection transistor Tr5 was repeatedly turned on and off, and the current path to the parasitic transistor Tr4b via the transistor Tr5 Will disappear. In this state, the path from the base region of the transistor Tr4 to the parasitic transistor Tr4b remains, but the parasitic transistor Tr4b does not sufficiently conduct and does not draw current from the internal transistor of the error amplifier OP1. Therefore, the original control action as described in “Background Art” works, and the load current flows out from the power output terminal No. Therefore, the output voltage Vo gradually decreases and eventually returns to the rated voltage (5 V).

Thus, after the input voltage Ve at the power input terminal Ni and the output voltage Vo at the power output terminal No have reached the respective rated values, the original control action is performed and the output voltage Vo is maintained at the rated (5V). Is done.
With this operation, in the conventional circuit shown in FIGS. 3 and 5, the output voltage Vo is finally controlled to the rated voltage (5 V). However, during the start-up, the transistor Tr4b parasitic in the integrated circuit portion 2 due to chattering of the switch SW1 temporarily operates, and the output voltage Vo overshoots.

  The present invention has been made to solve such a problem that may occur in the conventional circuit, and prevents the parasitic transistor Tr4b from operating when the power supply circuit 1 is started up. It is an object to prevent Vo overshoot.

  To achieve the above object, the constant voltage power supply circuit of the present invention includes an output current detection resistor having one end connected to a power input terminal, an emitter connected to the other end of the output current detection resistor, and a collector connected to a power source. An output stage PNP transistor connected to the output terminal, and a collector connected to the base of the output stage PNP transistor, and a base current control that draws a current proportional to the voltage applied to its own base from the collector and flows it to the ground terminal The NPN transistor for power supply is supplied with power from the power supply input terminal, and a voltage proportional to the difference voltage between the feedback voltage obtained by dividing the voltage at the power supply output terminal and the reference voltage is applied to the base of the NPN transistor for base current control An error amplifier for controlling a base current of the output stage PNP transistor to control a voltage at a power supply output terminal to a predetermined value; A current mirror circuit having one end connected to the power input terminal and a first and second PNP transistor connected to a common base and a common emitter. Connected to the other end of the current limiting resistor, the collector of the first PNP transistor is connected to the ground through the resistor, and the collector of the second PNP transistor is connected to the collector of the NPN transistor for base current control A circuit, an overcurrent protection PNP transistor having an emitter connected to the other end of the current limiting resistor and a base connected to the emitter of the output stage PNP transistor via a resistor, and a collector of the overcurrent protection PNP transistor Overcurrent that draws current proportional to the current from the output terminal of the error amplifier and flows it to the ground terminal And Mamoruyo NPN transistor, a constant voltage power supply circuit which includes a.

  According to the constant voltage power supply circuit having such a configuration, even if the circuit portion excluding the output current detection resistor and the output stage PNP transistor is configured by an integrated circuit, the first and second components constituting the current mirror circuit are configured. It is possible to prevent the parasitic transistor parasitic around the PNP transistor and the parasitic transistor around the PNP transistor for overcurrent protection from conducting. Therefore, when starting by applying an unstable DC voltage to the power input terminal, abnormal operation such as short circuit phenomenon between the power input terminal and the ground due to conduction of the parasitic transistor and overshoot of the output voltage does not occur, and the power circuit smoothly Can be launched.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a power supply circuit showing an embodiment of the present invention. The power supply circuit 1a in FIG. 1 is mostly the same as the power supply circuit 1 in FIG. 3 which is a conventional circuit, and therefore, the same parts are denoted by the same reference numerals and description thereof is not repeated.

  The power supply circuit 1a of FIG. 1 is different from the power supply circuit 1 of FIG. 3 which is a conventional circuit in that a current limiting resistor R9 is added between the power supply input terminal Ni and the common emitter terminal of the transistors Tr3, Tr4, Tr5. It is only a point.

  The added current limiting resistor R9 mainly functions to limit the current flowing from the emitter of the transistor Tr4 to the base. By adding the resistor R9, the emitter potential of the transistor Tr3 is reduced by the voltage drop in the resistor R9, so that the reference current flowing through the resistor R5 that determines the output current of the current mirror circuit 21 constituted by the transistors Tr3 and Tr4 is increased. Less.

  When the collector current of the transistor Tr3, which is the input reference current of the current mirror circuit 21, decreases, the emitter current and collector current of the transistor Tr4 determined by the current mirror ratio also decrease at the same ratio. Thus, when the emitter current of the transistor Tr4 decreases, the parasitic current Ip flowing out from the collector of the parasitic transistor Tr4e in FIGS. 4 and 5 also decreases, so that the current flowing through the base of the parasitic transistor Tr4b decreases and the parasitic transistor Tr4b becomes conductive. It becomes difficult to do.

Similarly, since the emitter current of the transistor Tr5 also decreases, the parasitic current Ip also decreases. Furthermore, even if a parasitic current Ip flows from the output capacitor C1 through the transistors Tr1 and Tr4 due to chattering by the switch SW1, the parasitic current from the transistors Tr4 and Tr5 is reduced, so that the parasitic transistor Tr4b Difficult to conduct.
Even if the parasitic transistor Tr4b is turned on and a current flows, the current flows through the added resistor R9. Therefore, the current value is greatly limited as compared with the conventional circuit, and damage to the integrated circuit is caused. Will be greatly reduced.

  Thus, the added resistor R9 exhibits an effect of preventing the parasitic transistor Tr4b from conducting. FIG. 2 shows an example of voltage waveforms at the time of starting the power supply circuit 1a of FIG. 1 of the present embodiment. As can be seen from the figure, even if chattering due to the switch SW1 occurs at the power input terminal Ni due to the addition of the resistor R9, the parasitic transistor Tr4b does not conduct, so the output voltage Vo does not overshoot and the rated output voltage Converges smoothly at (5V).

  As described above, according to this embodiment, the addition of the resistor R9 can prevent the parasitic transistor Tr4b from conducting, and the power supply circuit can be started up smoothly.

It is a circuit diagram of a power supply circuit according to the present invention. It is an example of the voltage waveform at the time of starting of the power supply circuit of FIG. It is a power supply circuit by a prior art. It is a figure explaining presence and operation of a parasitic transistor in a conventional circuit. It is the circuit diagram which added the parasitic transistor to the conventional circuit. It is an example of the voltage waveform at the time of starting of a conventional circuit.

Explanation of symbols

In the drawings, 1, 1a is a constant voltage power supply circuit, 2 is an integrated circuit portion, 3 is a P-type substrate, 4 is a base region, 5 is a collector region, 6 is an emitter region, 7 is a base region, 8 is a buried base region, 10 is an isolation region, 21 is a current mirror circuit, B1 is a battery, Ng is a negative power supply input terminal, Ni is a positive power supply input terminal, No is a power supply output terminal, OP1 is an error amplifier, and R1 is an output current detection resistor. , R9 is a current limiting resistor, Rp is a resistor between the P-type substrate and the ground GND, SW1 is a switch, Tr1 is an output stage PNP transistor, Tr2 base current control NPN transistor, Tr3 is a first PNP transistor, and Tr4 is a second resistor PNP transistors, Tr4b and Tr4e are parasitic transistors, Tr5 is an overcurrent protection PNP transistor, Tr6 is an overcurrent protection NPN transistor, Ve is an input voltage, Vf is a feedback voltage, Vo is an output voltage, and Vs is a reference voltage.

Claims (1)

An output current detection resistor having one end connected to the power input terminal;
An output stage PNP transistor having an emitter connected to the other end of the output current detection resistor and a collector connected to a power supply output terminal;
A base current controlling NPN transistor having a collector connected to the base of the output stage PNP transistor, and sucking a current proportional to a voltage applied to the base of the output stage PNP transistor from the collector to flow to a ground terminal;
By receiving a power supply from the power input terminal and applying a voltage proportional to a difference voltage between a feedback voltage obtained by dividing the voltage of the power output terminal and a reference voltage to the base of the NPN transistor for base current control, An error amplifier that controls the base current of the output stage PNP transistor to control the voltage of the power supply output terminal to a predetermined value;
A current limiting resistor having one end connected to the power input terminal;
A current mirror circuit composed of first and second PNP transistors connected to a common base and a common emitter, wherein the commonly connected emitter is connected to the other end of the current limiting resistor, and the first PNP transistor And a collector of the second PNP transistor is connected to the ground, and a collector of the second PNP transistor is connected to a collector of the NPN transistor for base current control, and
An overcurrent protection PNP transistor having an emitter connected to the other end of the current limiting resistor and a base connected to the emitter of the output stage PNP transistor via a resistor;
An overcurrent protection NPN transistor that draws a current proportional to the collector current of the overcurrent protection PNP transistor from the output terminal of the error amplifier and flows it to the ground terminal;
Constant voltage power supply circuit with

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