JP4377544B2 - Tone generation circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a tone generation circuit that is used in, for example, a main device of a key telephone system and generates tone data supplied to, for example, an extension terminal.
[0002]
[Prior art]
The main part of the key telephone system having an exchange function has been digitized in order to meet the recent demand for higher functionality and smaller size.
[0003]
By the way, in this type of apparatus, a function for generating tone data is required as a ringing sound to be transmitted to an extension or a station line, and a tone generation circuit for generating the tone data is provided.
[0004]
This tone generation circuit outputs various tone data for notification of service status and line status. In other words, when a telephone connected as a terminal goes off-hook, a dial tone indicating that the telephone can be dialed, and if the telephone cannot be dialed because the line is blocked, etc. A busy tone indicating is sent to the off-hook telephone.
[0005]
However, this tone generation circuit has been conventionally realized by an analog circuit, and various kinds of sampling data are stored in a ROM, and tone data is transmitted by reading the sampling data from this ROM. However, there is a problem that integration is difficult. In addition, when a ringing sound is transmitted, the two frequencies are alternately switched and transmitted at a constant cycle, and therefore, if the waveform is not smoothly connected at the time of switching, there is a problem that the sound is heard as noise.
[0006]
Although it is possible to change the oscillation frequency by digital processing using a DSP (Digital Signal Processor), it takes a lot of time and effort to create a program, and the circuit scale is still large, resulting in cost and power consumption. There is a problem that it is large.
[0007]
[Problems to be solved by the invention]
As described above, conventionally, tone data is generated by an analog circuit, and thus there are problems such as an increase in circuit size and cost, and an increase in power consumption.
[0008]
In addition, there is a problem that a countermeasure for smoothly switching between the two frequencies has not yet been established in order to send a ringing sound.
[0009]
An object of the present invention is to realize downsizing, cost reduction, and power consumption by integration with a simple digital circuit, and smoothly switch the frequency of a sine wave signal without causing noise in tone data. It is an object of the present invention to provide a tone generation circuit that can be performed in a simple manner.
[0010]
[Means for Solving the Problems]
The tone generation circuit according to the present invention generates tone data by outputting a digital value indicating a level of a sine wave signal having a frequency component within a predetermined band as an output digital value at a predetermined sampling period. In the tone generation circuit that alternately switches the first frequency of the sine wave signal set in the first frequency and the second frequency different from the first frequency at a constant interval, a predetermined first reference value relating to the frequency of the sine wave signal, Adding means for adding a predetermined second reference value relating to the frequency of the sine wave signal to generate a digital output value at the present time, and delaying the output value of the adding means by n (n is an arbitrary natural number) sampling period A first delay means; a second delay means for delaying the output value of the first delay means by n sampling periods; and a sine wave signal as an output value of the first delay means. Multiplication means for multiplying parameter data determined according to frequency to calculate a first reference value, inversion means for generating a second reference value obtained by inverting the output value of the second delay means, and first delay means The reset value for resetting the output value of the second delay means to an initial value determined in accordance with the frequency of the sine wave signal, and a predetermined value after the reset by the reset means is performed. A time measuring means for measuring the elapsed time, and an elapsed time measured by the time measuring means to be a least common multiple of a time corresponding to the sampling period and a time corresponding to the period of each of the first frequency and the second frequency, Parameter data corresponding to the set first frequency and parameter data corresponding to the second frequency are stored, and these parameter data are selectively output to the multiplication means. At the time when the elapsed time is measured by the parameter data output means and the time measurement means, the parameter data output means outputs the parameter data corresponding to the first frequency and causes the reset means to reset. Control means for outputting parameter data corresponding to the second frequency from the parameter data output means.
[0011]
The control means causes the reset means to reset in a state in which the parameter data corresponding to the first frequency is being output from the parameter data output means when the elapsed time is measured by the time measuring means. The parameter data corresponding to the second frequency is output from the parameter data output means after a time corresponding to one sampling period has elapsed since the reset.
[0012]
That is, in the present invention, the first reference value obtained by multiplying the output digital value before the n sampling period by the parameter data corresponding to the first frequency of the sine wave signal or the parameter data corresponding to the second frequency, and the 2n sampling period before Tone data is generated by adding the second reference value obtained by inverting the output digital value. Note that the first frequency and the second frequency of the sine wave signal are the least common multiples of a time corresponding to a predetermined elapsed time corresponding to the sampling period and a time corresponding to the period of each of the first frequency and the second frequency. Is set. Then, at the time when the elapsed time since the previous reset is measured, the first reference value and the second reference value are “0” and the sine wave signal in the output state of the parameter data corresponding to the first frequency. The initial value determined according to the second frequency is reset, and the output digital value one sampling period after the reset point is multiplied by parameter data corresponding to the second frequency of the sine wave signal one sampling period later.
[0013]
Therefore, according to the present invention, tone data can be generated by digital processing using a simple digital circuit, and the first frequency and the second frequency of the sine wave signal are equal to the time corresponding to the sampling period and the first frequency. And at the time of switching from the first frequency to the second frequency, the parameter data corresponding to the first frequency is being output at the time of switching from the first frequency to the second frequency. Since the first reference value and the second reference value are reset and the parameter data corresponding to the second frequency is output after one sampling period, the sine wave signal before switching and the sine wave signal after switching are clearly connected, As a result, distortion of the sine wave due to switching is reduced, and tone data is transmitted after noise is reduced.
[0014]
The tone generation circuit according to the present invention adds the predetermined first reference value related to the frequency of the sine wave signal and the predetermined second reference value related to the frequency of the sine wave signal in the above object to output at the present time. An adding means for generating a digital value, a first delay means for delaying an output value of the adding means by n (n is an arbitrary natural number) sampling period, and an output value of the first delay means for n sampling periods A second delay means for delaying, a multiplying means for calculating a first reference value by multiplying an output value of the first delay means by parameter data determined in accordance with the frequency of the sine wave signal, and a second delay means The inversion means for generating the second reference value obtained by inverting the output value, the output value of the first delay means are set to “0”, and the output value of the second delay means is determined according to the frequency of the sine wave signal. Reset each to the initial value. Reset means for storing data, parameter data corresponding to the first frequency, parameter data corresponding to the second frequency, parameter data output means for selectively outputting these parameter data to the multiplier means, and corresponding to the sampling period Elapsed time is set so as to be the least common multiple of the time to perform and the time corresponding to the period of each of the first frequency and the second frequency, and time measuring means for measuring the elapsed time since the reset by the reset means When the elapsed time is counted by the time measuring means, the reset means is reset while the parameter data corresponding to the first frequency is output from the parameter data output means, and then the parameter data is output. Means for outputting parameter data corresponding to the second frequency from the means. It is obtained by such and means.
[0015]
That is, according to the present invention, since the elapsed time can be variably set according to the first frequency and the second frequency to be switched, various tone data can be easily generated with a simple configuration as required.
[0016]
The parameter data corresponding to the first frequency and the parameter data corresponding to the second frequency can be arbitrarily updated by external control. In this way, it is possible to change the automatically generated tone data as necessary.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0018]
FIG. 1 is a block diagram showing a main configuration of a button telephone system including a tone generation circuit according to the present invention.
[0019]
As shown in the figure, this key telephone system is configured by arbitrarily connecting a plurality (maximum i) of extension terminals 2 (2-1 to 2-i) to a key telephone main apparatus 1.
[0020]
The key telephone main device 1 further includes a time switch 11, a plurality (j) of office line interface circuits 12 (12-1 to 12-j), and a plurality (i) of extension interface circuits 13 (13-1 to 13). I) CPU 14, ROM 15, RAM 16, data highway interface unit 17 and tone generation circuit 18; time switch 11, office line interface circuit 12, extension interface circuit 13, data highway interface unit 17 and tone generation circuit 18 Are connected to each other via the PCM highway 19.
[0021]
The time switch 11, the office line interface circuit 12, the extension interface circuit 13, and the data highway interface unit 17 are connected to each other via the data highway 20. Further, the CPU 14, the ROM 15, the RAM 16, and the data highway interface unit 17 are connected to each other via the CPU bus 21.
[0022]
The time switch 11 exchanges and connects the office line interface circuit 12 and the extension interface circuit 13 arbitrarily by exchanging the time slots on the PCM highway 19 based on the control of the CPU 14. Further, the office line interface circuit 12 and the extension interface circuit 13 and the tone generation circuit 18 are arbitrarily switched and connected.
[0023]
A station line L (L-1 to Lj) such as a public line or a dedicated line is connected to the station line interface circuit 12 as necessary. The office line interface circuit 12 performs an office line interface operation for the connected office line L. The office line interface operation refers to conversion of an audio signal (analog) given via the office line L into a PCM signal, conversion of a PCM signal given via the time switch 11 into an audio signal (analog), and the office line L State monitoring, and transmission of various signals to the network connected via the office line L. Further, the office line interface circuit 12 exchanges various control information related to the office line interface operation with the CPU 14 via the data highway 20, the data highway interface unit 17, and the CPU bus 21.
[0024]
The extension terminal 2 is connected to the extension interface circuit 13 as necessary. The extension interface circuit 13 performs an extension interface operation related to the connected extension terminal 2. The extension interface operation includes extraction of a PCM signal output from the extension terminal 2 from the PCM highway 19, monitoring of the state of the extension terminal 2, transmission of various signals to the extension terminal 2, and the like. The extension interface circuit 13 exchanges various control information related to the extension interface operation with the CPU 14 via the data highway 20, the data highway interface unit 17, and the CPU bus 21.
[0025]
The CPU 14 performs processing based on the operation program stored in the ROM 15 to control the time switch 11, the office line interface circuit 12, and the extension interface circuit 13. Realize.
[0026]
The ROM 15 stores an operation program for the CPU 14 and other various data used permanently.
[0027]
The RAM 16 stores various information necessary for the CPU 14 to perform various processes.
[0028]
The data highway interface unit 17 exchanges data between the data highway 20 and the CPU bus 21.
[0029]
FIG. 2 is a block diagram showing a specific configuration of the tone generation circuit 18 in this embodiment.
[0030]
As shown in this figure, the tone generation circuit 18 in this embodiment includes an adder 181, latch circuits 182 and 183, a multiplier 184, an inversion circuit (-1) 185, a parameter generation unit 186, an initialization unit 187, and a latch circuit. 188, a control unit 189, and a timer 1810.
[0031]
The adder 181 adds the output value of the multiplier 184 and the output value of the inverting circuit 185, and outputs the added value as the current value of the tone data. The output value of the adder 181 is composed of a data portion indicating a signal level and a code indicating polarity.
[0032]
The output value of the adder 181 is input to the latch circuit 182. The latch circuit 182 synchronizes with a sampling period (hereinafter referred to as a frame period (125 μs)) on the PCM highway 19 and outputs an output value of the adder 181 at a timing corresponding to a clock signal having the same frequency fs (for example, 8 kHz). Capture and hold. The latch circuit 182 always outputs the held value.
[0033]
The output value of the latch circuit 182 is input to the latch circuit 183. The latch circuit 183 captures and holds the output value of the latch circuit 182 at a timing according to the clock signal having the frequency fs. The latch circuit 183 always outputs the held value.
[0034]
Thus, the latch circuit 182 and the latch circuit 183 delay the output from the adder 181 by one frame period and output the output values one frame before and two frames before, respectively.
[0035]
The multiplier 184 multiplies the output value of the latch circuit 182 by parameter data 2 cos (w) determined according to the desired sine wave frequency and the frequency fs of the signal applied to the latch circuits 182 and 183, and a value obtained as a result thereof. Is supplied to the adder 181.
[0036]
The inversion circuit 185 multiplies the output value of the latch circuit 183 by “−1”, inverts the data, and gives the resultant value to the adder 181.
[0037]
The output value of the adder 181 is output to a time slot assigned on the PCM highway 19 as a current value in tone data indicating a sine wave signal having a predetermined frequency.
[0038]
The parameter generation unit 186 includes a parameter memory circuit 1861 and a selection circuit (SEL) 1862. The parameter memory circuit 1861 stores parameter data corresponding to two different sine wave frequencies (f1, f2) to be alternately output. The parameter memory circuit 1861 constantly outputs the stored parameter data. Each parameter data stored in the parameter memory circuit 1861 can be rewritten by an external device.
[0039]
The selection circuit 1862 alternately selects and outputs parameter data corresponding to each of the two sine wave frequencies in accordance with a given control signal, and supplies the parameter data to the multiplier 184.
[0040]
The initialization unit 187 initializes the holding values of the latch circuit 182 and the latch circuit 183 to a predetermined initial value in accordance with the given control signal.
[0041]
The control unit 189 controls the selection output processing in the selection circuit 1862 of the parameter generation unit 186 and the initialization processing of the initialization unit 187 according to the elapsed time counted by the timer 1810. The timer 1810 counts a predetermined elapsed time from when the initialization unit 187 performs the initialization process. The timer 1810 is cleared every time a predetermined elapsed time is counted. Then, the control unit 189 gives a control signal to the parameter generation unit 186 and the initialization unit 187 when the timer 1810 finishes counting a predetermined elapsed time.
[0042]
A control signal generated from the control unit 189 is input to the latch circuit 188. The latch circuit 188 captures and holds the control signal from the control unit 189 at a timing according to the clock signal having the frequency fs. Then, the latch circuit 188 outputs the held control signal to the selection circuit 1862 of the parameter generation unit 186.
[0043]
Thus, the control signal from the control unit 189 is given to the selection circuit 1862 with a delay of one frame period from the initialization processing by the initialization unit 187.
[0044]
Next, the operation of the tone generation circuit 18 configured as described above will be described.
[0045]
First, the holding value of the latch circuit 182 is set to “0”, and the holding value of the latch circuit 183 is set to a parameter initial value Asin (w) determined according to a desired sine wave frequency and amplitude. Then, the output of the adder 181 becomes −Asin (w).
[0046]
Thereafter, the output value of the adder 181 is also changed by updating the holding values of the latch circuits 182 and 183 at the timing of the clock signal.
[0047]
At this time, if the output value Y (h) of the adder 181 indicates the output values of the adder 181 one cycle before and two cycles before the clock signal as Y (h-1) and Y (h-2), respectively. If
Y (h) = Y (h−1) × 2 cos (w) −Y (h−2)
Initial condition Y (h-1) = 0, Y (h-2) = Asin (w)
Thus, a level value when a sine wave signal having a desired sine wave frequency is sampled at a sampling frequency of fs appears as an output value Y (h).
[0048]
That is, the output of the adder 181 has a frequency determined by the parameter data 2 cos (w) and the parameter initial value Asin (w) with −Asin (w) as an initial value, and an amplitude determined by the parameter initial value Asin (w). The tone data shown in FIG. 3 is obtained by sampling a sine wave signal as shown in FIG. 3 at a sampling frequency of fs. This tone data is sent to the PCM highway 19.
[0049]
By the way, although the output value Y (h) is a digital value, the number of bits is finite. For this reason, the output of the multiplier 184 is a rounded result, and an error from the normal value occurs. Such errors are accumulated by repeated calculations. If the sine wave frequency is switched for alternating output in a state where such a calculation error occurs, the output value Y (h) is not always switched when the sign changes from positive to negative. From the positive level to -Asin (w), a steep change that cannot normally occur is generated.
[0050]
Therefore, in this embodiment, the two sinusoidal frequencies f1 and f2 stored in the parameter memory circuit 1861 of the parameter generator 186 are compared with the time (50 ms) counted by the timer 1810 corresponding to one frame period ( 125 μs) and the least common multiple of the times corresponding to the periods of the two frequencies f1 and f2. Note that the sine wave frequencies f1 and f2 are set within a predetermined band, that is, in a range of 304 Hz to 640 Hz as a busy tone.
[0051]
Then, in the control unit 189, as shown in FIG. 4, when the timer 1810 finishes counting a predetermined elapsed time (50 ms) from the time when the initialization process is performed by the initialization unit 187, the initialization unit 187 Is given a control signal including an instruction to switch from frequency f1 to frequency f2. Then, the initialization unit 187 resets the holding value of the latch circuit 182 to “0”, and resets the holding value of the latch circuit 183 to an initial parameter value determined according to the frequency f2.
[0052]
On the other hand, the control signal from the control unit 189 supplied to the parameter generation unit 186 is delayed by one frame period by the latch circuit 188 and is supplied to the selection circuit 1862 of the parameter generation unit 186. For this reason, the output value “0” of the latch circuit 182 is given to the multiplier 184, and parameter data corresponding to the sine wave frequency f 2 selected and derived by the selection circuit 1862 is given at the same time.
[0053]
In this way, the output value Y (h) of the adder 181 is reset to -Asin (w) corresponding to the sine wave frequency f2 when switching from the sine wave frequency f1 to the sine wave frequency f2. The error is kept within a certain range.
[0054]
As described above, in the above embodiment, the output value of the latch circuit 182 is obtained by multiplying the multiplier 184 by the parameter data corresponding to the sine wave frequency f1 of the sine wave signal or the parameter data corresponding to the sine wave frequency f2. The tone value indicating the current output digital value is generated by adding the obtained value and the value obtained by inverting the output value of the latch circuit 183 by the inverting circuit 185. Further, the sine wave frequencies f1 and f2 of the sine wave signal are the least common multiples of the time corresponding to the predetermined elapsed time counted by the timer 1810 and the time corresponding to the period of each of the sine wave frequencies f1 and f2. Is set to be Then, at a time when a predetermined elapsed time since the previous reset is performed by the timer 1810, the initialization unit 187 holds the value held in the latch circuit 182 in the output state of the parameter data corresponding to the sine wave frequency f1. Is reset to “0” and the held value of the latch circuit 183 is reset to an initial parameter value determined according to the sine wave frequency f2 to be switched, and is input to the multiplier 184 after one frame period from the reset point The output value “0” of 182 is multiplied by the parameter data corresponding to the sine wave frequency f2.
[0055]
Accordingly, tone data can be generated by digital processing by a simple digital circuit, and the sine wave frequencies f1 and f2 of the sine wave signal are a time corresponding to a predetermined elapsed time of one frame period and sine wave frequencies f1 and f2. Each of the latch circuits 182 and 183 is set in such a way that the parameter data corresponding to the sine wave frequency f1 is output at the time of switching from the sine wave frequency f1 to f2. Is held, and the parameter data corresponding to the sine wave frequency f2 is multiplied by the output value of the latch circuit 182 after one sampling period, so that the sine wave signal before switching and the sine wave signal after switching are beautiful. As a result, distortion of the sine wave due to switching can be reduced, and solid noise generated in the tone can be reduced.
[0056]
Further, according to the above embodiment, the parameter data stored in the parameter memory circuit 1861 in the parameter generation unit 186 can be rewritten using an external control CPU. Even when new tone data is required, the contents stored in the parameter memory circuit 1861 in the parameter generator 186 can be rewritten so as to generate new tone data.
[0057]
The present invention is not limited to the above embodiment. For example, in the above-described embodiment, the tone generation circuit of the present invention is illustrated and described as being used in a button telephone system. However, it is realized as being applied to other devices such as a telephone terminal device. Is also possible.
[0058]
In the above embodiment, the sine wave frequency f1, so that the elapsed time (50 ms) counted by the timer 1810 is the least common multiple of one frame period and the time corresponding to the period of each sine wave frequency f1, f2. Although an example of setting f2 has been described, according to the sine wave frequencies f1 and f2 to be switched, the least common multiple of one frame period and the time corresponding to the period of each of the sine wave frequencies f1 and f2 is set. The elapsed time set in the timer 1810 may be set variably. In this case, since the elapsed time can be variably set according to the sine wave frequencies f1 and f2 to be switched, various tone data can be easily generated with a simple configuration as required, thereby diversifying services. Can respond flexibly.
[0059]
In the above embodiment, only tone data of one frequency is generated. However, tone data of a plurality of frequencies may be generated in a time division manner. That is, the latch circuit 182 and the latch circuit 183 have a multi-stage configuration, and parameter data to be multiplied by the multiplier 184 may be generated by the parameter generation unit 186 in a time division manner. In this case, the parameter generator 186 selects and outputs an arbitrary frequency from a plurality of frequencies at the time point when the timer 1810 counts the elapsed time. Then, the initialization unit 187 sets the initial parameter value Asin (w) set in each of the plurality of stages of latch circuits 183 to different values according to each sine wave frequency and amplitude.
[0060]
In addition, the tone generation circuit configuration, tone data type, parameter data type, reset method, and the like can be variously modified without departing from the spirit of the present invention.
[0061]
【The invention's effect】
As described above in detail, in the present invention, the first reference value obtained by multiplying the output digital value before the n sampling period by the parameter data corresponding to the first frequency of the sine wave signal or the parameter data corresponding to the second frequency, Tone data is generated by adding the second reference value obtained by inverting the output digital value before the 2n sampling period. Note that the first frequency and the second frequency of the sine wave signal are the least common multiples of a time corresponding to a predetermined elapsed time corresponding to the sampling period and a time corresponding to the period of each of the first frequency and the second frequency. Is set. Then, at the time when the elapsed time since the previous reset is measured, the first reference value and the second reference value are “0” and the sine wave signal in the output state of the parameter data corresponding to the first frequency. The initial amplitude value determined according to the second frequency is reset, and the output digital value before the n sampling period is multiplied by the parameter data corresponding to the second frequency of the sine wave signal one sampling period after the reset time.
[0062]
Therefore, a simple digital circuit capable of generating tone data by digital processing can realize downsizing, cost reduction, and power consumption by integration, and the first frequency and the second frequency of the sine wave signal are The predetermined elapsed time is set to be the least common multiple of the time corresponding to the sampling period and the time corresponding to the period of each of the first frequency and the second frequency, and at the time of switching from the first frequency to the second frequency, Since the first reference value and the second reference value are reset in a state where the parameter data corresponding to one frequency is output, and the parameter data corresponding to the second frequency is output after one sampling period, the sine wave signal Tone generation circuit capable of smoothly switching frequencies of tone data without causing noise in tone data It can be.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a main configuration of a button telephone system including a tone generation circuit according to the present invention.
FIG. 2 is a circuit block diagram showing a tone generation circuit according to an embodiment of the present invention.
FIG. 3 is a view showing a waveform of a sine wave signal handled in the embodiment.
FIG. 4 is a view for explaining the operation in the embodiment.
[Explanation of symbols]
1 ... button telephone main unit,
2 (2-1 to 2-i) ... extension terminals,
11 ... Time switch,
12 (12-1 to 12-j) ... Station line interface circuit,
13 (13-1 to 13-i) ... extension interface circuit,
14 ... CPU,
15 ... ROM,
16 ... RAM,
17 ... Data highway interface part,
18: tone generation circuit,
19 ... PCM highway,
20 ... Data Highway,
21 ... CPU bus,
181 ... adder,
182, 183 ... latch circuit,
184 ... multiplier,
185: Inversion circuit,
186 ... parameter generator,
187 ... initialization section,
189 ... control unit,
1810: timer,
1861 ... parameter memory circuit,
1862: Selection circuit (SEL).

Claims (4)

Tone data is generated by outputting a digital value indicating a level of a sine wave signal having a frequency component within a predetermined band as an output digital value at every predetermined sampling period, and the sine wave set within the band In a tone generation circuit that alternately switches a first frequency of a signal and a second frequency different from the first frequency at a constant interval,
Adding means for adding a predetermined first reference value relating to the frequency of the sine wave signal and a predetermined second reference value relating to the frequency of the sine wave signal to generate an output digital value at the present time;
First delay means for delaying the output value of the adding means by n (n is an arbitrary natural number) sampling period;
Second delay means for delaying the output value of the first delay means by n sampling periods;
Multiplication means for calculating the first reference value by multiplying the output value of the first delay means by parameter data determined according to the frequency of the sine wave signal;
Inverting means for generating the second reference value obtained by inverting the output value of the second delay means;
Reset means for resetting the output value of the first delay means to "0" and the output value of the second delay means to an initial value determined in accordance with the frequency of the sine wave signal;
Clocking means for clocking a predetermined elapsed time since the reset by the resetting means;
The first frequency set so that the elapsed time measured by the time measuring means is the least common multiple of the time corresponding to the sampling period and the time corresponding to the period of each of the first frequency and the second frequency. Parameter data corresponding to the second frequency, parameter data corresponding to the second frequency, and parameter data output means for selectively outputting the parameter data to the multiplication means,
At the time when the elapsed time is measured by the time measuring means, the parameter data corresponding to the first frequency is being output from the parameter data output means, and the reset means is reset. And a control means for outputting parameter data corresponding to the second frequency from the parameter data output means. Tone data is generated by outputting a digital value indicating a level of a sine wave signal having a frequency component within a predetermined band as an output digital value at every predetermined sampling period, and the sine wave set within the band In a tone generation circuit that alternately switches a first frequency of a signal and a second frequency different from the first frequency at a constant interval,
Adding means for adding a predetermined first reference value relating to the frequency of the sine wave signal and a predetermined second reference value relating to the frequency of the sine wave signal to generate an output digital value at the present time;
First delay means for delaying the output value of the adding means by n (n is an arbitrary natural number) sampling period;
Second delay means for delaying the output value of the first delay means by n sampling periods;
Multiplication means for calculating the first reference value by multiplying the output value of the first delay means by parameter data determined according to the frequency of the sine wave signal;
Inverting means for generating the second reference value obtained by inverting the output value of the second delay means;
Reset means for resetting the output value of the first delay means to "0" and the output value of the second delay means to an initial value determined in accordance with the frequency of the sine wave signal;
Parameter data output means for storing parameter data corresponding to the first frequency and parameter data corresponding to the second frequency, and selectively outputting the parameter data to the multiplier means;
The elapsed time is set so as to be the least common multiple of the time corresponding to the sampling period and the time corresponding to the period of each of the first frequency and the second frequency, and after the reset by the reset means Time counting means for measuring the elapsed time of
At the time when the elapsed time is measured by the time measuring means, the parameter data output means outputs parameter data corresponding to the first frequency, and the reset means is reset, and then And a control means for outputting parameter data corresponding to the second frequency from the parameter data output means. The control means causes the reset means to perform a reset in a state in which the parameter data corresponding to the first frequency is output from the parameter data output means when the elapsed time is measured by the time measuring means. 3. The tone generation according to claim 1, wherein parameter data corresponding to the second frequency is output from the parameter data output means after a time corresponding to one sampling period has elapsed since the reset. circuit. 3. The tone generation circuit according to claim 1, wherein the parameter data corresponding to the first frequency and the parameter data corresponding to the second frequency can be arbitrarily updated by control from the outside.

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