JP4430169B2 - Inverter power factor correction device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power factor correction device for an inverter, and more specifically, a conventional analog form used to improve a power factor generated by using a large-capacity smoothing capacitor in home appliances and the like. The present invention relates to an inverter power factor correction apparatus that can solve problems such as circuit complexity and cost increase due to the use of a power factor correction IC.
[0002]
[Prior art]
In recent years, inverter devices are used in many parts of home appliances in terms of energy saving and ease of output control. For example, washing machines and refrigerators to which inverter drive motors are applied are being developed and put on the market.
In the conventional inverter device, as shown in FIG. 4, a commercial AC power supply 100, a bridge diode 111 that rectifies the commercial AC power supply 100, a smoothing capacitor 120 that smoothes the rectified DC voltage, and a choke. A coil 112; an inverter 130 that converts the smoothed DC voltage into a variable frequency and a variable voltage by pulse width modulation; and a motor 140 that is driven by the control of the inverter 130. It had been.
[0003]
In this case, due to the characteristics of the inverter device, first, the commercial power source (220V / 60Hz in Korea) should be converted to direct current and then converted to a desired voltage and frequency using a switching element. In order to smooth the DC voltage rectified via the diode in the process of conversion to DC, a large capacity capacitor is required.
[0004]
However, if a large-capacity capacitor is used, the power factor of the system decreases. Therefore, as an example of a method for preventing this, an inverter device to which a power factor correction device is applied has been used.
That is, as shown in FIG. 5 showing the waveform of the input voltage and current of the conventional inverter device, in the current waveform of the commercial AC power supply 100, the time t is determined by the time constants of the choke coil 112 and the smoothing capacitor 120. Usually, it is 1/5 or less of the commercial power cycle, but when the power factor control is ideal (that is, when the power factor is 1), the current waveform has the same phase as the voltage, and the maximum of the commercial power source Since the peak current is smaller than the current amplitude, the noise and reactive power are reduced.
[0005]
In order to perform ideal power factor control as described above, in an inverter device to which a conventional power factor correction device is applied, as shown in FIGS. 6 and 7, the commercial AC power source 100 and the commercial AC power source 100 are used. A bridge diode 111 for rectifying the voltage, a smoothing capacitor 120 and a choke coil 220 for smoothing the rectified DC voltage, and converting the smoothed DC voltage into a variable frequency and a variable voltage by pulse width modulation (PWM). And an inverter device having a motor 140 driven by control of the inverter 130; a plurality of resistors R1 to R13, a plurality of diodes D1 and D2, a plurality of capacitors C1 to C3, an analog force And a power factor correction unit 200 having a factor correction IC 210 and a switching element Q1.
[0006]
Hereinafter, the operation of the inverter apparatus to which the conventional power factor correction apparatus configured as described above is applied will be described.
First, the applied commercial AC power supply 100 is rectified to a DC voltage by the bridge diode 111, then divided by the resistors R1 and R2, and input to the third terminal of the analog power factor correction IC 210.
[0007]
The voltage across the choke coil 220 is input to the fifth terminal (Idet) of the analog power factor correction IC 210 and is compared with a predetermined voltage level by the comparator 211.
On the other hand, the voltage across the inverter 130 is divided by the resistors R11 to R13, and the divided voltage is input to the first terminal of the analog power factor correction IC 210 and is determined in advance by the comparator 219. The voltage level is compared with 2.5V.
[0008]
Further, the voltage determined by the capacitor C3 is input to the fourth terminal of the analog power factor correction IC 210 and is compared with the output of the multiplexer 217 by the comparator 216.
The analog power factor correction IC 210 receives the input voltage via the eighth terminal, and matches the phase of the input voltage and the input current when performing power factor control.
[0009]
As described above, the analog power factor correction IC 210 receives each signal through each input terminal, and then, as shown in FIG. 7, the self-starter (SELF-STARTER) 212, the NOR gate 215, and the NAND gates 213 and 214. A control signal for controlling the switch Q1 is output via the seventh terminal via the etc., and the control signal is applied to the gate of the switch Q1 to perform a switching operation so that the phases of the input voltage and the input current are matched. Let
[0010]
FIG. 8 is a waveform diagram showing the operation of the conventional power factor correction apparatus operating in this way. As shown in FIG. 8A, the output voltage of the bridge diode 111 has a sine wave form. The switch control signal is as shown in FIG. 8B by the input signals Vmo and Vcs of the comparator 216. That is, the switch Q1 performs a switching operation in accordance with a control signal in which the duty increases at a low portion of the sine wave and decreases at a high portion of the sine wave, so that the phase of the input current and the input voltage is entirely changed. It had a function to match.
[0011]
[Problems to be solved by the invention]
However, in the inverter device to which such a conventional power factor correction device is applied, as shown in FIG. 7, the number of parts becomes large and the circuit becomes complicated, and the choke coil needs an auxiliary winding. As a result, the manufacturing cost increases.
[0012]
The present invention has been made in view of such a conventional problem, and a circuit for performing a power factor correction function is added to the inside of the microprocessor in place of the conventional analog power factor correction IC to simplify the power factor correction. It is an object of the present invention to provide an inverter power factor correction device that can be performed in the same manner.
[0013]
[Means for Solving the Problems]
In order to achieve such an object, in the power factor correction device for an inverter according to the present invention, a rectifier that rectifies the commercial AC power supply, an inverter that receives an input of the rectified commercial AC power supply, and drives a load; In the inverter device having the above, after receiving the output of the rectifier unit and detecting the zero point of the commercial AC power supply, the upper value obtained by digitizing the magnitude of the analog waveform output from the rectifier unit according to the frequency of the commercial AC power supply and A microprocessor that outputs a switch control signal having a predetermined pulse width in synchronization with the zero point of data consisting of a lower value , connected in series with the microprocessor, connected in parallel with the inverter, and the switch control is configured to include a switch which is turned on / off by a signal, the microprocessor detects the zero point A comparator for storing the data, an interrupt timer for outputting an interrupt signal at predetermined intervals in synchronization with a reference clock of the microprocessor, an output of the comparator and an output of the interrupt timer for the ROM A stack pointer for designating an address of the data, a high-order register that receives an input of an upper value of data output from the ROM and determines an off time of the switch control signal, and an input of a lower value of data output from the ROM Receiving a lower register for determining an on-time of the switch control signal, an off timer for outputting an off-time value of the switch control signal determined by the upper register in synchronization with the reference clock, and the reference clock The switch determined by the lower register is synchronized with And on a timer for outputting the on-time value of the switch control signal is configured by and a RS flip-flop that outputs the switch control signal in accordance with the value outputted from the on timer or off timer.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In the power factor correction apparatus for an inverter according to the present invention, as shown in FIG. 1, a commercial AC power supply 100, a rectifier configured to rectify the commercial AC power supply, which includes a bridge diode 111 and a choke coil 112, A smoothing capacitor 120 for smoothing the output voltage of the rectifying unit, and a microprocessor for detecting the zero point of the commercial AC power supply by inputting the output of the rectifying unit and outputting a switch control signal having a predetermined pulse width corresponding thereto 300, a switching element Q2 that is turned on / off by a switch control signal output from the microprocessor 300, and a DC output voltage of the smoothing capacitor 120 is converted into a variable frequency and a variable voltage by pulse width modulation (PWM). An inverter 130, and a motor 140 driven by the control of the inverter 130; It is configured to include a.
[0015]
In the microprocessor 300, as shown in FIG. 3, the comparator 310 that detects the zero point of the voltage input via the bridge diode 111 and the frequency of the commercial AC power supply (usually 50 Hz or 60 Hz). ), A ROM 340 that stores a digitized value of an analog sine wave, an interrupt timer 320 that outputs an interrupt signal at predetermined intervals in synchronization with a reference clock inside the microprocessor 300, and the comparator 310 A stack pointer 330 for designating the address of the ROM 340 by the output and the output of the interrupt timer 320; and an upper register 350 for receiving an input of an upper value in the data output from the ROM 340 and determining an off time of the switch control signal; , ROM 40, the lower register 360 that receives the lower value input to determine the on-time of the switch control signal and the off-time value of the switch control signal determined from the upper register 350 in synchronization with the reference clock. , An on-timer 380 for outputting an on-time value of a switch control signal determined from the lower register 360 in synchronization with the reference clock, and a value output from the on-timer 380 or the off-timer 370 And an RS flip-flop 390 that outputs a switch control signal according to.
[0016]
FIG. 2 is a waveform diagram showing the basic operation of the inverter power factor correction device according to the present invention, and FIG. 2A is a waveform diagram showing the output of the bridge diode 111 rectified from a commercial AC power supply. 2 (B) is a waveform diagram in which a zero voltage is detected from the sine waveform of FIG. 2 (A), FIG. 2 (C) is synchronized with the zero point, the pulse width increases near the zero point, and the input voltage is The figure shows a switch control signal in which the pulse width becomes smaller when it becomes larger. The switch control signal is the same as the switch control signal of the conventional power factor correction device.
[0017]
Hereinafter, the operation of the power factor correction apparatus for an inverter according to the present invention configured as described above will be described with reference to the drawings.
First, as shown in FIG. 2A, when the output voltage of the bridge diode 111 is input to the comparator 310 in the microprocessor 300, the comparator 310 detects a zero voltage, and the microprocessor 300 The zero point detection interval is counted by the internal reference clock. Since the frequency of commercial AC power supply used worldwide is usually 50 Hz to 60 Hz, if the counted result is 55 Hz or higher, the frequency of the commercial power supply is recognized as 60 Hz, and commercial frequency is 55 Hz or lower. Recognize the frequency of the power supply as 50 Hz.
[0018]
Note that the switch control signal in FIG. 2C is calculated in advance according to the frequency of the commercial power supply and stored in the ROM 340. Here, the stored data is obtained by digitizing the magnitude of the analog sine wave.
Next, the interrupt timer 320 outputs an interrupt signal to the stack pointer 330 at predetermined intervals in synchronization with the reference clock. The stack pointer 330 uses the output of the comparator 310 as a clear signal CLR, and outputs the output of the interrupt timer 320. Each of the clock signals CLK is input and a signal for designating the address of the ROM 340 is output.
[0019]
Next, the ROM 340 receives an address designation signal and outputs a switch control signal of the corresponding address. The switch control signal is divided into an upper value and a lower value and input to the upper register 350 and the lower register 360, respectively.
Next, the upper register 350 receives the upper value of the switch control signal and outputs it to the off timer 370, and the lower register 360 receives the lower value of the switch control signal and outputs it to the on timer 380.
[0020]
Next, the off-timer 370 and the on-timer 380 determine the off-time of the switch control signal and the on-time of the switch control signal according to the input upper value and lower value, respectively, and then synchronize with the reference clock to the RS flip-flop 390. The RS flip-flop 390 outputs the switch control signal to the gate terminal of the switching element Q2 to drive the switching element Q2.
[0021]
【The invention's effect】
As described above, in the power factor correction apparatus for an inverter according to the present invention, the analog power factor correction IC is integrated into the microprocessor using a single-chip digital element that can be easily integrated into a single circuit. Is simple, the number of parts is reduced, and the auxiliary winding is not added to the choke coil, so that the cost can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an inverter power factor correction apparatus according to the present invention.
FIG. 2 is a waveform diagram showing waveforms at the time of input / output of the microprocessor of FIG. 1;
FIG. 3 is a circuit diagram showing the microprocessor of FIG. 1;
FIG. 4 is a circuit diagram showing a conventional inverter device.
5 is a waveform diagram showing waveforms of an input voltage and an input current in FIG.
FIG. 6 is a circuit diagram showing an inverter device to which a conventional power factor correction device is applied.
7 is a circuit diagram showing the analog power factor correction IC of FIG. 6. FIG.
8 is a waveform diagram showing the operation of the analog power factor correction IC of FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 ... Commercial AC power supply 111 ... Bridge diode 112 ... Choke coil 120 ... Smoothing capacitor 130 ... Inverter 140 ... Motor 210 ... Analog power factor correction IC
217 ... Multiplexer 218 ... OP amplifiers 211, 216, 219, 310 ... Comparator 300 ... Microprocessor 320 ... Interrupt timer 330 ... Stack pointer 340 ... ROM
350, 360 ... Upper, lower register 370 ... Off timer 380 ... On timer 390 ... RS flip-flop R20-R23 ... Resistor

Claims (1)

In an inverter device having a rectifying unit for rectifying a commercial AC power source and an inverter that receives an input of the rectified commercial AC power source and drives a load,
After receiving the output of the rectifying unit and detecting the zero point of the commercial AC power supply, the data consisting of the upper value and the lower value obtained by digitizing the analog waveform output from the rectifying unit according to the frequency of the commercial AC power supply A microprocessor that outputs a switch control signal having a predetermined pulse width in synchronization with the zero point ;
A switch connected in series with the microprocessor, connected in parallel with the inverter, and turned on / off by the switch control signal .
The microprocessor is
A comparator for detecting the zero point;
ROM for storing the data;
An interrupt timer that outputs an interrupt signal at predetermined intervals in synchronization with a reference clock of the microprocessor;
A stack pointer for designating an address of the ROM by the output of the comparator and the output of the interrupt timer;
An upper register that receives an upper value of data output from the ROM and determines an off time of the switch control signal;
A lower register that receives an input of a lower value of data output from the ROM and determines an on-time of the switch control signal;
An off timer that outputs an off time value of the switch control signal determined by the upper register in synchronization with the reference clock;
An on-timer that outputs an on-time value of the switch control signal determined by the lower register in synchronization with the reference clock;
An inverter power factor correction apparatus comprising: an RS flip-flop that outputs the switch control signal according to a value output from the on-timer or off-timer .

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