JP4437678B2 - Polyphase filter - Google Patents

Description

  The present invention relates to a polyphase filter applied to, for example, an analog phase shifter.

  Conventionally, an analog phase shifter using a polyphase filter is known (see, for example, Non-Patent Document 1). The polyphase filter distributes the high-frequency differential signals input from the two differential input terminals into high-frequency signals having a phase difference of 90 ° and an equal amplitude, and outputs them from the four output terminals. The four distributed high-frequency signals output from the polyphase filter are further divided into two in-phase, and four orthogonal high-frequency differential signals are generated and input to the respective differential variable gain amplifiers. The four differential signals orthogonal to each other are independently and arbitrarily controlled in amplitude in the four differential variable gain amplifiers, and then subjected to in-phase synthesis, so that the differential outputs arbitrarily controlled in phase from the two output terminals. Extracted as a signal.

  Here, the polyphase filter sequentially connects four sets of series circuits in which a resistor and a capacitor are connected in series, and the first input terminal and the adjacent first input terminal are connected using the connection point of the resistor and the capacitor in the series circuit as an input terminal. The two input terminals are connected in common and the adjacent third input terminal and fourth input terminal are connected in common to form two input terminals, and the connection points of four series circuits are set to four output terminals. A bridge circuit is configured to distribute and output signals input from one input end to signals of equal amplitude having a phase difference of 90 ° from each other from the four output ends. The resistance values of the four resistors constituting the four series circuits are all equal, and the capacitance values of the four capacitors are all equal.

  The high-frequency differential signal input from the two input terminals is

Here, R is the resistance value of the resistor, C is the capacitance value of the capacitor,
Four signals having a phase difference of 90 ° and an equal amplitude are output from the four output terminals at a frequency satisfying the above condition.

  When this polyphase filter is formed on a semiconductor integrated circuit, the capacitance formed on the semiconductor substrate is formed as a parallel plate capacitor with an insulator sandwiched between an upper electrode and a lower electrode. The first to fourth capacitors and the first to fourth resistors are alternately arranged in a vertical column, and the capacitors adjacent to the resistors are connected by wiring.

  However, when the resistors and capacitors are alternately arranged in a vertical row on the semiconductor substrate, the length of the wiring connecting the first first capacitor and the last fourth resistor is the other first. From the wiring connecting the first to third resistors and the second to fourth capacitors, and an inductor is inserted between the first capacitor and the fourth resistor. Sex is lost.

  When the frequency characteristics of the phase difference and the amplitude error of the four output signals of such a polyphase filter are simulated with the standardized frequency, if the inductor is not inserted between the first capacitor and the fourth resistor, the first The phase difference A between the output terminal and the second output terminal and the phase difference C between the third output terminal and the fourth output terminal overlap, while the phase difference B between the second output terminal and the third output terminal The phase difference D between the four output terminals and the first output terminal overlaps, and there is no variation in the phase difference between the four output signals at the normalized frequency 1.0 satisfying the expression (1), and the phase difference is 90 °.

  Further, when simulating the frequency characteristic of the amplitude error when the amplitude of the first output terminal is used as a reference, the amplitude errors A to D of the first to fourth output terminals all overlap with an amplitude error of 0 dB, and four output signals It is obtained that there is no variation in amplitude.

  However, as described above, when the frequency characteristics of the phase difference and amplitude error of the four output signals of the polyphase filter in which the inductor is inserted between the first capacitor and the fourth resistor are simulated (0. 0 as the inductor). 1nH simulation result), the phase difference of the four output signals varies at a normalized frequency of 1.0 satisfying the expression (1), and the phase difference deviates from 90 °.

  Further, from the frequency characteristic of the amplitude error when the amplitude of the first output terminal is used as a reference, there are amplitude errors in the four output signals at the normalized frequency 1.0 satisfying Equation (1), and the four output signals The amplitude will vary.

“L-band SiGe -MMIC Vector Synthesis Type Analog Phase Shifter using Polyphase Filter”, Proceedings of APMC2002, pp. 853-856

  When the conventional polyphase filter is formed on the semiconductor substrate as described above, only the wiring connecting the first capacitor and the fourth resistor becomes long, and the first to fourth output ends. There has been a problem that the phase difference between the four output signals taken out varies.

  In addition, since the conventional polyphase filter is formed on the semiconductor substrate as described above, only the wiring connecting the first capacitor and the fourth resistor becomes long, and the first to fourth outputs. There has been a problem that the amplitudes of the four output signals taken out from the ends vary.

  Furthermore, when the conventional polyphase filter is formed on the semiconductor substrate as described above, only the wiring connecting the first capacitor and the fourth resistor is long. There is a problem that the influence of the length of the wiring on the output increases, and the phase difference and the amplitude variation between the four output signals taken out from the first to fourth output terminals become remarkable.

  The present invention has been made to solve the above-described problems, and there is little variation in phase difference and amplitude between the four output signals obtained from the output end due to the difference in the length of the wiring connecting the resistor and the capacitor. The object is to obtain a polyphase filter.

  In the polyphase filter according to the present invention, a series of 4 × n (n is an integer of 2 or more) series in which a resistor and a capacitor are connected in series is sequentially connected, and signals input from the input terminal are mutually connected from the output terminal. The bridge circuit is configured to distribute and output signals of equal amplitude having a 90 ° phase difference.

  According to the present invention, it is possible to reduce the variation in phase difference and amplitude between the four output signals obtained from the output terminal due to the difference in the length of the wiring connecting the resistor and the capacitor.

Embodiment 1 FIG.
1 is a circuit diagram showing a configuration of a polyphase filter according to Embodiment 1 of the present invention. The polyphase filter according to Embodiment 1 shown in FIG. 1 is configured by sequentially connecting eight sets of series circuits in which a resistor and a capacitor are connected in series, so that a signal input from the input terminal is phase-shifted by 90 ° from the output terminal. And a bridge circuit for distributing and outputting signals of equal amplitude.

  This polyphase filter includes a connection point between the resistor 101a and the capacitor 201a, a connection point between the resistor 101b and the capacitor 201b, a connection point between the resistor 101c and the capacitor 201c, a connection point between the resistor 101d and the capacitor 201d, and a resistor 101e and the capacitor. The first to eighth input terminals 30a, 30b, and 30c are connected to the connection point 201e, the connection point between the resistor 101f and the capacitor 201f, the connection point between the resistor 101g and the capacitor 201g, and the connection point between the resistor 101h and the capacitor 201h, respectively. , 30d, 30e, 30f, 30g, and 30h, and the connection points of the eight series circuits are the first to eighth output terminals 40a, 40b, 40c, 40d, 40e, 40f, 40g, and 40h.

  Then, the first and second input terminals 30a and 30b adjacent to each other at the input terminals of the series circuit sequentially connected and the fifth and sixth input terminals 30e and 30f adjacent to each other are connected in common. The first and third input terminals 31a and 31c are supplied with a positive-phase high-frequency differential signal as a first input signal, and are adjacent to each other at the input ends of series circuits that are sequentially connected. The third and fourth input terminals 30c and 30d and the adjacent seventh and eighth input terminals 30g and 30h are connected in common to form second and fourth input terminals 31b and 31d. A high-frequency differential signal having a reverse phase is supplied as a second input signal to the input terminals 31b and 31d of the first and eighth output terminals 40a, 40b, 40c, 40d, 40e, 40f, 40g, and 40h. Not to take out To have.

  Hereinafter, the operation of the polyphase filter shown in FIG. 1 will be described. When the positive phase of the high frequency differential signal is input from the input terminals 31a and 31c and the reverse phase of the high frequency differential signal is input from the input terminals 31b and 31d, the output terminals 40a and 40e, the output terminals 40b and 40f, and the output terminals 40c and 40g. The signals output from the output terminals 40d and 40h are in phase, that is, the phase difference is 0 °, the output terminals 40a and 40e and the output terminals 40b and 40f, the output terminals 40b and 40f, the output terminals 40c and 40g, and the output terminal The phase difference between signals output from 40c and 40g and output terminals 40d and 40h, output terminals 40d and 40h and output terminals 40a and 40e is 90 °, and the amplitudes of signals output from all output terminals 40a to 40h Are all equal. Note that a high-frequency differential output signal can be obtained in the same manner even when a reverse phase of the high-frequency differential signal is input from the input terminals 31a and 31c and a positive phase of the high-frequency differential signal is input from the input terminals 31b and 31d.

  FIG. 2 shows that when the polyphase filter of FIG. 1 is formed on a semiconductor substrate and the length of the wiring connecting the eighth resistor 101h and the first capacitor 201a becomes long, the wiring is connected by the inductor 301. It is the figure expressed and inserted. That is, when the resistors and capacitors of the polyphase filter shown in FIG. 1 are alternately arranged in a vertical row on the semiconductor substrate, the first first capacitor 201a and the last eighth resistor 101h are connected. The length of the wiring becomes longer than the length of the wiring connecting other resistors and capacitors, and the inductor 301 is inserted, so that the symmetry of the circuit is lost.

  3A to 3D are diagrams showing simulation results of frequency characteristics of phase differences and amplitude errors of eight output signals when the inductor 301 is 0.1 nH in the polyphase filter of FIG. is there. The vertical axis represents the phase difference and amplitude error, and the horizontal axis represents the normalized frequency.

  3A, C is the phase difference between the third output terminal 40c and the fourth output terminal 40d, D is the phase difference between the fourth output terminal 40d and the fifth output terminal 40e, and E is the fifth difference. The phase difference between the output terminal 40e and the sixth output terminal 40f, and F, the phase difference between the sixth output terminal 40f and the third output terminal 40c.

  In FIG. 3B, A is the phase difference between the first output terminal 40a and the second output terminal 40b, B is the phase difference between the second output terminal 40b and the seventh output terminal 40g, and G is the seventh difference. The phase difference between the output terminal 40g and the eighth output terminal 40h, and H, the phase difference between the eighth output terminal 40h and the first output terminal 40a.

  FIG. 3C shows the frequency characteristic of the amplitude error when the amplitude of the third output terminal 40c is used as a reference, C is the amplitude error of the third output terminal 40c, and D is the fourth output terminal. An amplitude error of 40d, E indicates an amplitude error of the fifth output terminal 40e, and F indicates an amplitude error of the sixth output terminal 40f.

  FIG. 3D shows the frequency characteristic of the amplitude error when the amplitude of the first output terminal 40a is used as a reference, A is the amplitude error of the first output terminal 40a, and B is the second output terminal. 40b, G represents the amplitude error of the seventh output terminal 40g, and H represents the amplitude error of the eighth output terminal 40h.

  When an inductance is inserted between the eighth resistor 101h and the first capacitor 201a as shown in FIG. 2, the third to sixth outputs having a small phase difference and amplitude error are understood from FIG. By extracting four signals from the terminals 40c to 40f, it is possible to suppress variation in phase difference and amplitude error between the four signals, compared to extracting four signals from the first, second, seventh, and eighth output terminals.

  In FIG. 2, it is assumed that only the wiring connecting the eighth resistor 101h and the first capacitor 201a is long. However, the portion where the wiring is long is limited to between the eighth resistor 101h and the first capacitor 201a. Absent.

  In the above description, four signals are extracted from the output terminals 40c, 40d, 40e, and 40f. And 40h may be combined in phase with each other to extract a signal.

  Moreover, although Embodiment 1 showed the case where 8 sets of series circuits which connected resistance and capacity | capacitance in series were provided as a polyphase filter, 4 * n (n is an integer greater than or equal to 2) sets of series circuits are sequentially provided. Can be connected and configured. In this case, when n increases, the passage loss increases, but the phase difference and amplitude variation between the output signals are reduced, and the accuracy is improved.

  As described above, according to the first embodiment, even if the wiring length connecting the resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter is increased by one place, the phase difference between the four output signals is reduced. The effect that the variation can be reduced is obtained.

  Further, according to the first embodiment, even when the wiring length connecting the resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter is increased by one point, the variation in amplitude between the four output signals is reduced. The effect that it can be obtained.

  Furthermore, according to the first embodiment, it is possible to reduce the phase difference and amplitude variation between output signals due to variations in the wiring length connecting the resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter. The effect becomes noticeable. Furthermore, the effect which can be applied to a high frequency is acquired.

Embodiment 2. FIG.
FIG. 4 is a circuit diagram showing a configuration of a polyphase filter according to Embodiment 2 of the present invention. The polyphase filter according to Embodiment 2 shown in FIG. 4 includes a plurality (two) of polyphase filters shown in FIG. 1, and faces the output end of the preceding polyphase filter, and the input end of the succeeding polyphase filter. Are sequentially connected, and a plurality (two) of them are connected in cascade.

  That is, the first-stage polyphase filter is the same as the polyphase filter shown in FIG. 1, and the second-stage polyphase filter is connected in series with resistors 102a-102h and capacitors 202a-202h similar to FIG. The eight series circuits are connected in sequence to form a bridge circuit, and the input terminals of the second-stage polyphase filter are connected in series so as to face the output terminal of the first-stage polyphase filter, and are connected in cascade. The signals input from the input terminals 31a to 31d are distributed from the output terminals 40a to 40h to signals of equal amplitude having a phase difference of 90 ° from each other.

  Therefore, according to the second embodiment, since the first-stage polyphase filter is a two-stage polyphase filter, the same effect as in the first embodiment can be obtained. Further, by making the polyphase filter multistage, a wide band characteristic can be obtained, and an effect of widening the band can be obtained.

Embodiment 3 FIG.
FIG. 5 shows a layout on a semiconductor substrate of a polyphase filter according to Embodiment 3 of the present invention. The layout shown in FIG. 5 corresponds to the one-stage polyphase filter shown in FIG. 1, and the same parts as those in FIG. In the layout shown in FIG. 5, the first, second, fifth, and sixth capacitors 201a, 201b, 201e, and 201f are arranged so as to form a square vertex, and the second and fifth capacitors 201b and 201e are arranged. The third and fourth capacitors 201c and 201d are arranged between the sixth and first capacitors 201f and 201a, and the seventh and eighth capacitors 201g and 201h are arranged between the first and eighth capacitors 201f and 201a. The resistors 101a to 101h are arranged between the first to eighth capacitors 201a to 201h, and the resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter are all connected by wires having the same length.

  Therefore, according to the third embodiment, since the circuit configuration is the same as that of the first embodiment, the same effects as those of the first embodiment can be obtained, and the resistors 101a to 101h and the capacitors 201a to 201a constituting the polyphase filter can be obtained. Since 201h are all connected by wires having the same length, it is possible to eliminate variations in phase difference and amplitude of the eight output terminals 40a to 40h.

  In the layout shown in FIG. 5, only the eight resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter are arranged. However, dummy resistors are arranged around the resistors 101a to 101h and the capacitors 201a to 201h. Resistors and capacitors can be arranged to improve the finishing accuracy of the resistors and capacitors in the semiconductor process.

  The layout shown in FIG. 5 corresponds to the one-stage polyphase filter shown in FIG. 1, but may be a polyphase filter having two or more stages.

Embodiment 4 FIG.
FIG. 6 shows a layout on a semiconductor substrate of a polyphase filter according to Embodiment 4 of the present invention. The layout shown in FIG. 6 corresponds to the one-stage polyphase filter shown in FIG. 1, and the same parts as those in FIG. In the layout shown in FIG. 6, the first, third, fifth, and seventh capacitors 201a, 201c, 201e, and 201g are arranged so as to form a square vertex, and the first and third capacitors 201a, The second capacitor 201b is disposed between 201c, the fourth capacitor 201d is disposed between the third and fifth capacitors 201c and 201e, and the fifth and seventh capacitors 201e and 201g The sixth capacitor 201f is disposed between them, the eighth capacitor 201h is disposed between the seventh and first capacitors 201g and 201a, and the first to eighth resistors 101a to 101h are disposed from the first to the first capacitors 201g and 201a. The resistors 101a to 101h and the capacitors 201a to 201h that are arranged between the eighth capacitors 201a to 201h and constitute the polyphase filter are all connected by wirings having the same length.

  Therefore, according to the fourth embodiment, since the circuit configuration is the same as that of the first embodiment, the same effects as those of the first embodiment can be obtained, and the resistors 101a to 101h and the capacitors 201a to 201a constituting the polyphase filter can be obtained. Since 201h are all connected by wires having the same length, it is possible to eliminate variations in phase difference and amplitude of the eight output terminals 40a to 40h.

  In the layout shown in FIG. 6, only the eight resistors 101a to 101h and the capacitors 201a to 201h constituting the polyphase filter are arranged, but a dummy is formed around each of the resistors 101a to 101h and the capacitors 201a to 201h. Resistors and capacitors can be arranged to improve the finishing accuracy of the resistors and capacitors in the semiconductor process.

  The layout shown in FIG. 6 corresponds to the one-stage polyphase filter shown in FIG. 1, but may be a polyphase filter having two or more stages.

Embodiment 5 FIG.
FIG. 7 shows a layout on a semiconductor substrate of a polyphase filter according to Embodiment 5 of the present invention. The polyphase filter shown in FIG. 7 includes the layout on the semiconductor substrate of the polyphase filter including four series circuits, including the series circuit of the resistor 101e and the capacitor 201e in FIG. Show.

  That is, a bridge that sequentially connects four sets of series circuits in which resistors and capacitors are connected in series, and distributes and outputs signals input from the input end to signals of equal amplitude having a 90 ° phase difference from the output end. In the polyphase filter constituting the circuit, the capacitors 201a to 201d of the four sets of series circuits are arranged so as to form a square vertex, and the resistors 101a to 101d of the four sets of series circuits are formed to form a square side. They are placed between the capacitors, and the resistors and capacitors are all connected by wires of equal length.

  A connection point between the resistor and the capacitor in the series circuit is an input terminal, and a connection point between the four sets of series circuits is an output terminal 40a to 40d, and the first and third inputs at the input terminals of the serial circuit connected in sequence. The first input signal is supplied to the first input terminal 31a that is commonly connected to the end, and the second input terminal that is commonly connected to the second and fourth input ends of the serial circuit connected sequentially. The second input signal is supplied to 31b, and the output signal is taken out from the first to fourth output terminals 40a to 40d.

  Therefore, according to the fifth embodiment, since the resistors 101a to 101d and the capacitors 201a to 201d constituting the polyphase filter are all connected by wires having the same length, the phase difference between the four output terminals 40a to 40d and Variations in amplitude can be eliminated.

  In FIG. 7, only four resistors 101a to 101d and capacitors 201a to 201d constituting the polyphase filter are arranged, but dummy resistors and capacitors around the resistors 101a to 101d and capacitors 201a to 201d are arranged. It is also possible to increase the finishing accuracy of resistance and capacitance in the semiconductor process.

Embodiment 6 FIG.
FIG. 8 shows a layout on a semiconductor substrate of a polyphase filter according to Embodiment 6 of the present invention. The polyphase filter according to the sixth embodiment shown in FIG. 8 includes a plurality (two) of polyphase filters shown in FIG. 7, and faces the output end of the preceding polyphase filter, and the input end of the succeeding polyphase filter. Are connected in series, and a plurality of them are connected in cascade.

  That is, the first-stage polyphase filter is the same as the polyphase filter shown in FIG. 7, and the second-stage polyphase filter is connected in series with resistors 102a to 102d and capacitors 202a to 202d similar to FIG. The four series circuits are connected in series to form a bridge circuit, and the input terminals of the second-stage polyphase filter are connected in series so as to face the output terminal of the first-stage polyphase filter, and are connected in cascade. The signals input from the input terminals 31a and 31b are distributed from the output terminals 40a to 40d to signals of equal amplitude having a phase difference of 90 ° from each other.

  Therefore, according to the sixth embodiment, since the first-stage polyphase filter is a two-stage polyphase filter, the same effect as in the fifth embodiment can be obtained.

  In FIG. 8, only four resistors 101a to 101d and 102a to 102d and capacitors 201a to 201d and 202a to 202d constituting the polyphase filter of each stage are arranged, but the resistors 101a to 101d and 102a are arranged. It is also possible to dispose dummy resistors and capacitors around 102 to 102d and capacitors 201a to 201d and 202a to 202d, thereby increasing the finishing accuracy of the resistors and capacitors in the semiconductor process.

  Further, although the two-stage polyphase filter is shown in FIG. 8, it may be a two-stage or more polyphase filter. Further, by making the polyphase filter multistage, a wide band characteristic can be obtained, and an effect of widening the band can be obtained.

It is a circuit diagram which shows the structure of the polyphase filter which concerns on Embodiment 1 of this invention. FIG. 8 is a diagram illustrating an example in which an inductor is inserted due to an increase in the length of a wiring connecting an eighth resistor 101h and a first capacitor 201a when the polyphase filter of FIG. 1 is formed on a semiconductor substrate. In the polyphase filter of FIG. 2, it is the figure which showed the simulation result of the frequency characteristic of the phase difference and amplitude error of eight output signals when the inductor 301 is 0.1 nH. It is a circuit diagram which shows the structure of the polyphase filter which concerns on Embodiment 2 of this invention. It is the figure which showed the layout on the semiconductor substrate of the polyphase filter which concerns on Embodiment 3 of this invention. It is the figure which showed the layout on the semiconductor substrate of the polyphase filter which concerns on Embodiment 4 of this invention. It is the figure which showed the layout on the semiconductor substrate of the polyphase filter which concerns on Embodiment 5 of this invention. It is the figure which showed the layout on the semiconductor substrate of the polyphase filter which concerns on Embodiment 6 of this invention.

Explanation of symbols

  101a to 101h, 102a to 102h First to eighth resistors, 201a to 201h, 202a to 202h First to eighth capacitors, 30a to 30h First to eighth input terminals, 31a to 31d First to fourth Input terminals, 40a to 40h, first to eighth output terminals, 301 inductors.

Claims (7)

  4 × n (n is an integer greater than or equal to 2) series circuits in which resistors and capacitors are connected in series are sequentially connected, and signals input from the input terminal have a 90 ° phase difference from the output terminal and have equal amplitude. A polyphase filter that composes a bridge circuit that distributes and outputs the signal. The polyphase filter according to claim 1,
The bridge circuit is composed of eight sets of series circuits in which a resistor and a capacitor are connected in series. The polyphase filter according to claim 2, wherein
A connection point between the resistor and the capacitor in the series circuit is an input end, and a connection point between the eight series circuits is an output end.
The first input signal is supplied to the adjacent first and second input terminals and the adjacent fifth and sixth input terminals at the input terminals of the serial circuit connected in sequence,
The second input signal is supplied to the adjacent third and fourth input terminals and the adjacent seventh and eighth input terminals at the input terminals of the serial circuit connected in sequence,
An output signal is taken out from the first to eighth output terminals. The polyphase filter according to claim 3, wherein
A polyphase filter characterized by selecting and outputting a set of output terminals having a small phase difference and amplitude error among the output terminals. A plurality of polyphase filters according to claim 3 are provided, wherein a plurality of polyphase filters are cascade-connected by sequentially connecting the input terminals of the subsequent polyphase filter so as to face the output terminals of the preceding polyphase filter. Phase filter. The polyphase filter according to claim 3, wherein
The first, second, fifth, and sixth capacitors of the series circuit that are sequentially connected are arranged so as to form a square apex, and the third and fourth capacitors are placed between the second and fifth capacitors. The seventh and eighth capacitors are disposed between the sixth and first capacitors, and the first to eighth resistors of the serial circuit connected in sequence are disposed between the first to eighth capacitors. The polyphase filter is characterized in that the resistor and the capacitor are all connected by wires of equal length. The polyphase filter according to claim 3, wherein
The first, third, fifth, and seventh capacitors of the series circuit that are sequentially connected are arranged so as to form a quadrangular vertex, and the second capacitor is arranged between the first and third capacitors, A fourth capacitor is disposed between the third and fifth capacitors, a sixth capacitor is disposed between the fifth and seventh capacitors, and an eighth capacitor is disposed between the seventh and first capacitors. The first to eighth resistors of the series circuit connected in sequence are arranged between the first to eighth capacitors, and the resistors and the capacitors are all connected by wires of equal length. Polyphase filter.

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