JP4445484B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to improvement in performance of an insulating film such as a gate insulating film.

With the miniaturization of MISFETs, there is a demand for further lowering the resistance of the gate electrode. Further, in the case of a gate electrode made of polysilicon, the problem of depletion cannot be ignored. Therefore, a metal single layer gate electrode structure is desired. Further, as a gate insulating film, it has been proposed to use a metal oxide-based high dielectric film (for example, a TiO ₂ film) instead of SiO _{2 because} of a demand for further thinning. However, when the TiO ₂ film is formed by normal CVD or the like, the following problems occur.

  FIG. 9 is a process cross-sectional view for explaining the prior art.

First, as shown in FIG. 9A, a TiO ₂ film 101 of about 10 nm that becomes a gate insulating film is formed on a silicon substrate 100 by LP-CVD. As the CVD gas, for example, Ti (C ₁₁ H ₁₉ O ₂ ) ₂ Cl ₂ may be used.

Next, as shown in FIG. 9B, in order to prevent diffusion of the metal electrode material into the gate insulating film or to control the work function, for example, a TiN film having a thickness of 10 to 20 nm as a barrier metal. 102 is formed by CVD in a mixed gas atmosphere of TiCl ₄ and NH ₃ .

  Next, as shown in FIG. 9C, a metal electrode film 103 made of W, Al, Cu or the like to be a gate electrode is formed by a CVD method or the like. After the barrier metal film 102 and the metal electrode film 103 are formed, a gate electrode pattern is formed by reactive ion etching or the like.

However, conventionally, there are the following problems with respect to the film structure of the TiO ₂ film 101 which becomes a gate insulating film. Figure 10 is for the film structure of the TiO ₂ film 101 shown schematically, FIG. 10 (a) is a cross-sectional view of the TiO ₂ film 101, FIG. 10 (b) is a top view of the TiO ₂ film 101 .

When the TiO ₂ film 101 is formed in the process of FIG. 9A, a clear crystal grain boundary 112 is formed between the TiO ₂ crystal grains 111 as shown in FIGS. 10A and 10B. The For this reason, the insulating property is deteriorated at the crystal grain boundary 112, and the electrical insulating property of the TiO ₂ film 101 which is a gate insulating film is extremely deteriorated. Therefore, it becomes extremely difficult to manufacture a MIS transistor having excellent characteristics and reliability.

As described above, when a metal oxide such as TiO ₂ is used as the gate insulating film, conventionally, a clear crystal grain boundary is formed between crystal grains such as TiO _2. There was a problem that it deteriorated remarkably.

  The present invention has been made to solve the above-described conventional problems, and can improve the insulating properties of an insulating film such as a gate insulating film, and can improve characteristics and reliability, and its manufacture. It aims to provide a method.

A semiconductor device according to the present invention has an insulating film formed on the main surface side of a semiconductor substrate, and the insulating film is formed between a plurality of granular insulating regions made of metal oxide and spaced apart from each other and adjacent granular insulating regions. An intergranular insulating region made of an amorphous insulator formed in the insulating layer, wherein the granular insulating region includes at least the crystal of the metal oxide, and the intergranular insulating region is made of silicon, oxygen And an amorphous insulator containing at least a metal element constituting the metal oxide, and the crystal grains of the metal oxide constituting the granular insulating region are a single single crystal or single crystals. It is characterized by being composed of a set of a plurality of single crystals with an angle formed within 10 degrees .

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a metal compound film on a main surface side of a semiconductor substrate, and a metal oxide of a metal element constituting the metal compound film by oxidizing the metal compound film. Forming an insulating film composed of a plurality of granular insulating regions spaced apart from each other, and an intergranular insulating region made of an amorphous insulator formed between adjacent granular insulating regions, The metal compound film includes at least a metal element constituting the metal oxide and silicon, the granular insulating region includes at least a crystal of the metal oxide, and the intergranular insulating region includes: It is composed of an amorphous insulator including at least silicon, oxygen, and a metal element constituting the metal oxide, and the crystal grain of the metal oxide constituting the granular insulating region is a single single crystal or a single crystal. Result What angle between and it is characterized in that it consists of a set of a plurality of single crystal within 10 degrees.

  According to the present invention, it is possible to prevent the crystal grains contained in the granular insulating region from coming into direct contact by configuring the insulating film with the granular insulating region and the intergranular insulating region. Therefore, a clear crystal grain boundary between crystal grains can be eliminated, and insulation deterioration can be suppressed. Therefore, by using this insulating film as the gate insulating film of the MIS transistor, a MIS transistor having excellent characteristics and reliability can be manufactured.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a diagram according to the first embodiment of the present invention, and shows the structure of an insulating film for electrical insulation, such as a gate insulating film of a MIS transistor. FIG. 1A is a sectional view thereof, and FIG. 1B is a top view thereof.

  The basic structure of the insulating film 10 is as follows. The insulating film 10 includes a plurality of granular insulating regions 11 and an intergranular insulating region 12 formed between adjacent granular insulating regions 11. The granular insulating region 11 is composed of particles made of a metal oxide, and the granular insulating regions 11 are separated from each other. The intergranular insulating region 12 is formed of an amorphous insulator (structure A).

  The manufacturing method corresponding to the structure A is as follows. First, a predetermined metal compound film is formed on the main surface side of the semiconductor substrate. Subsequently, the metal compound film is oxidized to form a granular insulating region 11 made of a metal oxide (metal oxide of a metal element constituting the metal compound film), and intergranular insulation made of an amorphous insulator. Region 12 is formed (referred to as manufacturing method A).

  Thus, since the insulating film 10 is composed of the granular insulating regions 11 and the intergranular insulating regions 12, the crystal grains contained in the granular insulating regions 11 are not in direct contact with each other. Clear crystal grain boundaries disappear. Therefore, the leakage current of the insulating film can be reduced, and the deterioration of the insulating property can be suppressed. Therefore, the characteristics and reliability can be improved by using the insulating film 10 as a gate insulating film of the MIS transistor.

  Preferred embodiments of the structure A and production method A include the following three embodiments.

  The metal compound film includes at least a metal element constituting the metal oxide of the granular insulating region 11 and silicon. The granular insulating region 11 includes at least a metal oxide crystal. The intergranular insulating region 12 is made of an amorphous insulator containing at least a metal element constituting silicon, oxygen, and the metal oxide of the granular insulating region 11 (referred to as structure B and manufacturing method B).

  The metal compound film is configured to include at least a first metal element constituting the metal oxide of the granular insulating region 11 and a second metal element different from the first metal element. The granular insulating region 11 includes at least a metal oxide crystal. The intergranular insulating region 12 is made of an amorphous insulator containing at least oxygen and a second metal element (referred to as structure C and manufacturing method C).

  The metal compound film is configured to include at least a metal element constituting the metal oxide of the granular insulating region 11. The granular insulating region 11 is composed of metal oxide crystal grains. The intergranular insulating region 12 is made of an amorphous metal oxide of the same type as the metal oxide of the granular insulating region 11 (referred to as structure D and manufacturing method D).

  The following aspects are mentioned as a more preferable aspect of said structure AD and manufacturing method AD.

  (1) In the structure and manufacturing method B, the granular insulating region 11 is composed only of metal oxide crystal grains, or includes metal oxide crystal grains and amorphous metal oxide. ing.

  (2) In the structure and manufacturing method D, the granular insulating region 11 is composed only of single crystal grains of metal oxide.

  (3) In the structure and manufacturing method A, the crystal grains constituting the granular insulating region 11 are a plurality of single crystals (single metal oxides) whose angle formed by the same crystal plane orientation is 10 degrees or less, preferably 5 degrees or less. Crystal). If the angle formed between the single crystals is within 10 degrees, even if the single crystals are in contact with each other and a crystal grain boundary is formed, the crystal grain boundary energy is small, and the electrical insulating property is reduced. This is because it hardly deteriorates.

  (4) In the structure and the manufacturing method B, the amorphous insulator constituting the intergranular insulating region 12 includes at least a metal oxide and a silicon oxide of the same type as the metal oxide constituting the granular insulating region 11. In some cases, at least one of silicon nitride oxide and silicon nitride is included. Since silicon oxide, silicon nitride oxide, and silicon nitride easily become amorphous, it can be said that they are suitable as a constituent material of the intergranular insulating region 12.

  (5) In the structure and manufacturing method C, the crystallization temperature of the second metal oxide containing the second metal element constituting the intergranular insulating region 12 is the first metal oxide constituting the granular insulating region 11 Higher than the crystallization temperature of the second metal oxide containing. Since the crystallization temperature of the second metal oxide is higher than the crystallization temperature of the first metal oxide, an amorphous state of the second metal oxide is easily formed.

  (6) In the structure and manufacturing method A, the metal oxide has a dielectric constant higher than that of silicon oxide such as titanium oxide, zirconium oxide, hafnium oxide, tantalum oxide, niobium oxide, or aluminum oxide. There is at least one of high metal oxides.

  (7) In the structure and manufacturing method A, examples of the metal element contained in the metal oxide and metal compound film include at least one of titanium, zirconium, hafnium, tantalum, niobium, and aluminum.

  (8) In the structure and manufacturing method B, as the metal compound film, a metal nitride film containing silicon, a metal oxynitride film containing silicon, a metal oxynitride film containing silicon, a metal carbide film containing silicon, and a metal containing silicon Examples thereof include at least one of an oxide film and a metal carbonized oxide film containing silicon.

  (9) In the structure and manufacturing method D, examples of the metal compound film include at least one of a metal nitride film, a metal nitrided oxide film, a metal nitrided carbonized film, a metal carbide film, a metal oxide film, and a metal carbonized oxide film.

  (10) In the structure and manufacturing method D, the thickness of the insulating film 10 is about 10 nm or less, preferably about 5 nm or less. Thus, when the thickness of the insulating film 10 is reduced, the intergranular insulating region 12 made of an amorphous metal oxide is easily formed.

  (11) In the structure and manufacturing method A, when the insulating film 10 is used as a gate insulating film of a MIS transistor, the base of the insulating film 10 is a silicon substrate, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. . In particular, when a silicon oxide film, silicon nitride film, or silicon oxynitride film of several atomic layers is formed between the silicon substrate and the insulating film 10, the interface state can be easily controlled. The mobility of can be increased.

(Embodiment 2)
FIG. 1 is a diagram according to a second embodiment of the present invention, and shows a structure of an insulating film for performing electrical insulation, such as a gate insulating film of a MIS transistor. FIG. 2A is a sectional view thereof, and FIG. 2B is a top view thereof.

  In the present embodiment, the one surface is placed on at least one surface of the main insulating region 10a (corresponding to the region of the insulating film 10 shown in FIG. 1) composed of the granular insulating regions 11 and the intergranular insulating regions 12. A covering insulating region 13 is formed so as to cover, and the insulating film 10 is constituted by the granular insulating region 11, the intergranular insulating region 12, and the covering insulating region 13. The covering insulating region 13 is made of an amorphous insulator of the same type as the amorphous insulator that forms the intergranular insulating region 12. The granular insulating region 11 and the intergranular insulating region 12 are the same as in the first embodiment.

  The surface of the main insulating region 10a composed of the granular insulating region 11 and the intergranular insulating region 12 may have irregularities formed by crystal grains contained in the granular insulating region 11, which may cause deterioration in morphology. . In the present embodiment, by forming the covering insulating region 13, it is possible to suppress such deterioration of morphology.

(Embodiment 3)
FIG. 3 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

First, as shown in FIG. 3A, a TiN film containing silicon having a thickness of about 2 nm is formed on the silicon substrate 30 as the metal compound film 31. As a method for forming the TiN film 31 containing silicon, there is a CVD method in a mixed gas atmosphere of TiCl ₄ , NH ₃ and SiH ₄ .

In addition, when the TiN film 31 containing silicon is formed, the following mixed gas can be used as the mixed gas in addition to the above-described TiCl ₄ / NH ₃ / SiH ₄ .

(C ₅ H ₅ ) (C ₈ H ₈ ) Ti / NH ₃ / SiH ₄ system,
(C ₅ H ₅ ) ₂ Ti [N (CH ₃ ) ₂ ] ₂ / NH ₃ / SiH ₄ system,
(C ₅ H ₅ ) ₂ TiCl ₂ / NH ₃ / SiH ₄ system,
[(CH ₃ ) ₃ SiCH ₂ ] ₄ Ti / NH ₃ system,
Ti [N (CH ₃ ) ₂ ] ₄ / SiH ₄ system,
Ti [N (C ₂ H ₅ ) ₂ ] ₄ / SiH ₄ system,
(C ₅ H ₅ ) ₂ Ti (N ₃ ) ₂ / SiH ₄ system.

The latter three types of mixed gas can form a film of TiN without a nitriding agent such as NH ₃ or N radicals, but may be formed by adding a nitriding agent.

In addition, a Ti target containing Si or a Ti target containing N and Si is used as a target, and a sputtering method (vacuum deposition) using a mixed gas plasma containing Ar (Kr or Xe) and N (N ₂ etc.) is used. It is also possible to form a TiN film containing silicon. When the sputtering method is used, the energy of ions sputtered from the target such as Ar or Xe and the particles separated from the target are set to 100 eV or less, desirably 50 eV or less, and more desirably 20 eV or less. In this way, damage to the film surface can be reduced, so that a more reliable gate insulating film can be formed.

Next, as shown in FIG. 3B, the TiN film 31 containing silicon is oxidized by heat treatment in an O ₂ atmosphere, an O ₃ atmosphere, an oxygen radical atmosphere, or a water vapor atmosphere. By this oxidation treatment, an insulating film 32 (gate insulating film) corresponding to the structure B of the first embodiment is formed. That is, a granular insulating region 33 made of TiO ₂ crystal grains is formed, and an intergranular insulating region 34 made of an amorphous insulator is formed between adjacent granular insulating regions 33. The intergranular insulating region 34 includes at least Ti oxide and silicon oxide, and also includes silicon nitride or silicon nitride oxide depending on the case.

  Note that a silicon oxide film may be formed at the interface between the silicon substrate 30 and the insulating film 32 by excessively performing the oxidation treatment.

  Further, as the TiN film 31 containing silicon becomes thinner, impurities such as chlorine and carbon mixed during the formation of the nitrogen or silicon TiN film 31 generated during the oxidation process diffuse outward during the oxidation process. Therefore, it is easy to obtain a high-quality insulating film with few impurities. Therefore, the thickness of the TiN film 31 containing silicon is preferably 5 nm or less, and preferably about 2 nm. In the case of forming the thick insulating film 32, the film forming process and the oxidizing process of the TiN film 31 containing thin silicon having the above film thickness are repeated. Thereby, it is also possible to form a thick insulating film 32.

  Next, as shown in FIG. 3C, for example, a TiN film is formed as a barrier metal 35 by a CVD method, and a desired metal film is formed as a gate electrode film 36 on the barrier metal 35.

  Through the above steps, a structure in which the insulating film 32 corresponding to the structure B of the first embodiment is applied to the gate insulating film is formed.

The TiO ₂ crystal grain 33 may be a single single crystal grain, or may be a set of a plurality of single crystal grains whose angle formed by the same crystal plane orientation is 10 degrees or less, preferably 5 degrees or less. Good. This is because, when the angle formed between the single crystal grains is 10 degrees or less, the crystal grain boundary energy is small, so that there is almost no deterioration in insulation.

Further, when the TiN film 31 containing silicon is oxidized, a silicon oxide film is formed at the interface between the silicon substrate 30 and the insulating film 32 due to excessive oxidation, and the film thickness may be too thick. In such a case, before forming the TiN film 31 containing silicon, an extremely thin silicon oxynitride film of about 1 nm is formed in advance on the silicon substrate 30 in an atmosphere containing a gas such as NO or N ₂ O. In addition, it is only necessary to prevent the silicon substrate 30 from being oxidized by the silicon oxynitride film. Further, a silicon oxide film may be formed in advance instead of the silicon oxynitride film.

  In the present embodiment, the insulating film 32 is formed by oxidizing the TiN film 31 containing silicon, but various modifications are possible.

  In addition to Ti, Zr, Hf, Ta, Nb, and Al can be used as the metal element constituting the metal oxide contained in the insulating film 32. Examples using these metal elements are listed below.

TaN film containing Si by a CVD method using a TaCl ₅ / NH ₃ / SiH ₄ mixed gas, a TaBr ₅ / NH ₃ / SiH ₄ mixed gas, or a TaI ₅ / NH ₃ / SiH ₄ mixed gas And the TaN film is oxidized. As a result, a granular insulating region 33 including at least Ta ₂ O ₅ crystal grains and an intergranular insulating region including Ta oxide and silicon oxide are formed.

A Ta ₂ O ₅ film containing Si containing 1% or more of C is formed by CVD using a mixed gas of Ta (OC ₂ H ₅ ) / SiH ₄ , and this Ta ₂ O ₅ film is made of ozone. C is replaced with O by oxidation. As a result, a granular insulating region 33 including at least Ta ₂ O ₅ crystal grains and an intergranular insulating region including Ta oxide and silicon oxide are formed.

NbN film containing Si by a CVD method using a mixed gas of NbCl ₅ / NH ₃ / SiH ₄ system, a mixed gas of NbBr ₅ / NH ₃ / SiH ₄ system, or a mixed gas of NbI ₅ / NH ₃ / SiH ₄ system And the NbN film is oxidized. Thereby, the granular insulating region 33 including at least the crystal grains of Nb ₂ O ₅ is formed, and the intergranular insulating region 34 including Nb oxide and silicon oxide is formed.

The TiN film containing Si was formed by TiBr ₄ / NH ₃ / SiH ₄ gas mixture of, or TiI ₄ / NH ₃ / SiH ₄ based CVD method using a mixed gas to oxidize the TiN film. Thereby, the granular insulating region 33 including at least crystal grains of TiO ₂ is formed, and the intergranular insulating region 34 including Ti oxide and silicon oxide is formed.

ZrCl ₄ / NH ₃ / SiH ₄ mixed gas, ZrBr ₄ / NH ₃ / SiH ₄ mixed gas, ZrI ₄ / NH ₃ / SiH ₄ mixed gas, Zr [N (C ₂ H ₅ ) ₂ ] ₄ / NH ₃ / SiH ₄ gas mixture of, or _{Zr [N (CH 3) 2} ] to form a ZrN film containing Si by CVD method using ₄ / NH ₃ / SiH ₄ gas mixture of, the ZrN Oxidize the membrane. As a result, a granular insulating region 33 including at least ZrO ₂ crystal grains is formed, and an intergranular insulating region including Zr oxide and silicon oxide is formed.

HfCl ₄ / NH ₃ / SiH ₄ gas mixture _{of, HfBr 4 / NH 3 / SiH} 4 gas mixture of, or HfI ₄ / NH ₃ / SiH ₄ based HfN film containing Si by CVD method using a mixed gas And the HfN film is oxidized. As a result, a granular insulating region 33 including at least HfO ₂ crystal grains and an intergranular insulating region including Hf oxide and silicon oxide are formed.

  Thus, by oxidizing the metal compound film containing Si and a metal element, an amorphous intergranular insulating region 34 containing a metal oxide, a silicon oxide, or the like is easily formed.

  Further, in the above-described example, by oxidizing a metal compound film containing Si and a metal element, a granular insulating region 33 containing a metal oxide crystal and an amorphous grain containing a metal oxide, silicon oxide, etc. The inter-insulating region 34 is formed, but the following examples are also conceivable.

  First, a metal compound film including at least a first metal element and a second metal element different from the first metal element is formed on the silicon substrate 30. By oxidizing this metal compound film, a granular insulating region 33 composed of a metal oxide of a first metal element (first metal oxide) and a metal oxide of a second metal element are formed. An insulating film 32 composed of the intergranular insulating region 34 is formed (second metal oxide).

  At this time, the first metal element and the second metal element are selected so that the crystallization temperature of the second metal oxide is higher than the crystallization temperature of the first metal oxide. By making the oxidation temperature higher than the crystallization temperature of the first metal oxide and lower than the crystallization temperature of the second metal oxide, the first metal oxide in the crystalline state and the amorphous state The second metal oxide can be formed, and a structure similar to the structure shown in FIG. 3 can be obtained.

(Embodiment 4)
FIG. 4 is a process sectional view showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.

First, as shown in FIG. 4A, a TiN film having a thickness of 5 nm or less, preferably about 2 nm is formed on the silicon substrate 40 as the metal compound film 41. As a method of forming the TiN film 41, a CVD method in a mixed gas atmosphere of TiCl ₄ and NH ₃ can be cited.

When forming the TiN film 41, the following mixed gas can be used as the mixed gas in addition to the above-described TiCl ₄ / NH ₃ .

(C ₅ H ₅ ) (C ₈ H ₈ ) Ti / NH ₃ system,
(C ₅ H ₅ ) ₂ Ti [N (CH ₃ ) ₂ ] ₂ / NH ₃ system,
(C ₅ H ₅ ) ₂ TiCl ₂ / NH ₃ system,
[(CH ₃ ) ₃ SiCH ₂ ] ₄ Ti / NH ₃ system,
Ti [N (CH ₃ ) ₂ ] ₄ system,
Ti [N (C ₂ H ₅ ) ₂ ] ₄ system,
(C ₅ H ₅ ) ₂ Ti (N ₃ ) ₂ system.

The latter three types of mixed gas can form a film of TiN without a nitriding agent such as NH ₃ or N radicals, but may be formed by adding a nitriding agent.

Further, a Ti target or a Ti target containing N is used as a target, and a sputtering method using a mixed gas plasma containing Ar (may be Kr or Xe) and N (N ₂ or the like) (may be a vacuum deposition method). A TiN film can also be formed. When the sputtering method is used, the energy of ions sputtered from the target such as Ar or Xe and the particles separated from the target are set to 100 eV or less, desirably 50 eV or less, and more desirably 20 eV or less. In this way, damage to the film formation surface can be reduced, so that a more reliable gate insulating film can be formed.

Next, as shown in FIG. 4B, the TiN film 41 is oxidized by heat treatment (desirably 500 ° C. or less) in an O ₂ atmosphere, an O ₃ atmosphere, an oxygen radical atmosphere, or a water vapor atmosphere. By this oxidation treatment, an insulating film 42 (gate insulating film) corresponding to the structure D of the first embodiment is formed. That is, a granular insulating region 43 made of TiO ₂ crystal grains is formed, and an intergranular insulating region 44 made of an amorphous insulator of TiO ₂ is formed between adjacent granular insulating regions 43.

Since the film thickness of the TiN film 41 is as thin as 2 nm, the crystallization energy becomes very high compared with the case where the film thickness is large. For this reason, the crystal grains do not grow large and the crystal grains do not collide with each other as when thick TiN having a thickness of 10 nm or more is oxidized. Therefore, a clear grain boundary is not formed, and an intergranular insulating region 44 made of amorphous TiO ₂ is formed between adjacent TiO ₂ crystal grains (granular insulating region 43).

FIG. 5 shows the TiO ₂ crystal grain size with respect to the oxidation temperature of the TiN film when the TiO ₂ film thickness is changed. FIG. 6 shows the film structure of the TiO ₂ film at points A, B and C in FIG.

If the oxidation temperature is low, TiO ₂ big grain size even thick TiO ₂ film thickness is unlikely to grow (e.g., corresponding to point A in FIG. 5). Therefore, the TiO ₂ film has a structure as shown in FIG. When the TiO ₂ film thickness is thin, TiO ₂ having a large crystal grain size does not grow even if the oxidation temperature is high (for example, corresponding to point B in FIG. 5). Therefore, the TiO ₂ film has a structure as shown in FIG. When the oxidation temperature is high and the TiO ₂ film thickness is thick, TiO ₂ with large crystal grains grows (for example, corresponding to the point C in FIG. 5), and a clear crystal between adjacent TiO ₂ crystal grains. Grain boundaries are formed, and the TiO ₂ film has a structure as shown in FIG. Therefore, by appropriately selecting the TiO ₂ film thickness and the oxidation temperature, it is possible to obtain a TiO ₂ film with a small leakage current in which an amorphous region is formed between crystal grains.

  Next, as shown in FIG. 4C, for example, a TiN film is formed as a barrier metal 45 by a CVD method, and a desired metal film is formed as a gate electrode film 46 on the barrier metal 45.

  Through the above steps, a structure in which the insulating film 42 corresponding to the structure D of the first embodiment is applied to the gate insulating film is formed.

The TiO ₂ crystal grain 43 may be a single single crystal grain, or may be a set of a plurality of single crystal grains whose angle formed by the same crystal plane orientation is 10 degrees or less, preferably 5 degrees or less. Good. This is because when the angle formed between the single crystal grains is 10 degrees or less, the crystal grain boundary energy is small, so that there is almost no deterioration in insulation.

  In the present embodiment, the TiN film 41 is oxidized to form the insulating film 42, but various modifications are possible.

  In addition to Ti, Zr, Hf, Ta, Nb, and Al can be used as the metal element constituting the metal oxide contained in the insulating film 42. Examples using these metal elements are listed below.

TaN film by CVD using TaCl ₅ / NH ₃ mixed gas, TaBr ₅ / NH ₃ mixed gas, TaI ₅ / NH ₃ mixed gas, or [(CH ₃ ) ₂ N] ₅ Ta gas And the TaN film is oxidized. Thereby, the granular insulating region 43 made of Ta ₂ O ₅ crystal grains and the intergranular insulating region 44 made of amorphous Ta ₂ O ₅ are formed.

A tantalum oxynitride film is formed by CVD using a mixed gas of Ta (OC ₂ H ₅ ) / SiH ₄ , and this film is oxidized to replace N with O. Alternatively, in this mixed gas system, a tantalum oxynitride film containing 1% or more of C is formed, or a Ta ₂ O ₅ film containing 1% or more of C is formed using only Ta (OC ₂ H ₅ ). These films are oxidized using ozone to replace C and N with O. By these methods, the granular insulating region 43 made of Ta ₂ O ₅ crystal grains and the intergranular insulating region 44 made of amorphous Ta ₂ O ₅ are formed.

NbCl ₅ / NH ₃ -based mixed gas, a NbN film formed by NbBr ₅ / NH ₃ -based mixed gas, or NBI ₅ / NH ₃ based CVD method using a mixed gas oxidizes the NbN film. As a result, a granular insulating region 43 made of Nb ₂ O ₅ crystal grains and an intergranular insulating region 44 made of amorphous Nb ₂ O ₅ are formed.

The TiN film is formed by TiBr ₄ / NH ₃ gas mixture of, or TiI ₄ / NH ₃ based CVD method using a mixed gas to oxidize the TiN film. As a result, a granular insulating region 43 made of TiO ₂ crystal grains and an intergranular insulating region 44 made of amorphous TiO ₂ are formed.

ZrCl ₄ / NH ₃ mixed gas, ZrBr ₄ / NH ₃ mixed gas, ZrI ₄ / NH ₃ mixed gas, Zr [N (C ₂ H ₅ ) ₂ ] ₄ / NH ₃ mixed gas, Alternatively, a ZrN film is formed by a CVD method using a mixed gas of Zr [N (CH ₃ ) ₂ ] ₄ / NH ₃ , and this ZrN film is oxidized. As a result, a granular insulating region 43 made of ZrO ₂ crystal grains and an intergranular insulating region 44 made of amorphous ZrO ₂ are formed.

HfCl ₄ / NH ₃ gas mixture of, HfBr ₄ / NH ₃ gas mixture of, or by CVD using HFI ₄ / NH ₃ -based mixed gas to form an HfN film, oxidizing the HfN layer. As a result, a granular insulating region 43 made of HfO ₂ crystal grains and an intergranular insulating region 44 made of amorphous HfO ₂ are formed.

  Thus, by oxidizing a thin metal compound film containing a metal element, a granular insulating region 43 made of metal oxide crystal grains is formed, and an amorphous region made of the metal oxide is made. Intergranular insulating regions 44 are easily formed.

(Embodiment 5)
FIG. 7A to FIG. 8F are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to the fifth embodiment of the present invention.

  In the first to fourth embodiments described above, the structure and film forming method of the insulating film used for the gate insulating film of the MIS transistor have been described. However, in the present embodiment, such a structure and film forming method are applied to the damascene gate. This is an example applied to a MIS transistor having a structure.

  First, as shown in FIG. 7A, an element isolation region 51 is formed on a silicon substrate 50 using an STI technique or the like. Subsequently, for example, a dummy gate structure composed of a laminated structure of a dummy gate oxide film 52 having a thickness of about 6 nm, a dummy polysilicon film 53 having a thickness of about 300 nm, and a silicon nitride film 54 having a thickness of about 50 nm is formed by an oxidation technique, a CVD technique, a lithography technique, and the like. It is formed using RIE technology or the like. Thereafter, an extension region 55 of the source / drain diffusion layer is formed by using an ion implantation technique. Further, a gate sidewall film having a width of about 40 nm made of the silicon nitride film 56 is formed by using the CVD technique and the RIE technique.

Next, as shown in FIG. 7B, a high concentration source / drain diffusion layer 57 is formed by an ion implantation technique. Subsequently, a salicide process technique is used to form a metal silicide film 58 of about 40 nm of CoSi ₂ or TiSi ₂ only on the source / drain regions using the dummy gate as a mask.

Next, as shown in FIG. 7C, as the interlayer insulating film 59, for example, a SiO ₂ film is deposited on the entire surface by the CVD method. Thereafter, a planarization process is performed by a CMP technique to expose the surfaces of the silicon nitride films 54 and 56.

  Next, as shown in FIG. 8D, the silicon nitride film 54 above the dummy gate is selectively removed from the interlayer insulating film 59 using, for example, phosphoric acid. At this time, the silicon nitride film 56 on the gate side wall is also etched to the height of the polysilicon film 53. Subsequently, the polysilicon film 53 is selectively removed from the interlayer insulating film 59 and the silicon nitride film 56 by using, for example, a radical atom etching technique.

  Next, as shown in FIG. 8E, the dummy gate oxide film 52 is removed by a wet etching process such as hydrofluoric acid. Thereafter, the gate insulating film 60 is formed. As the gate insulating film 60, the insulating film formed by the structure and film forming method shown in the first to fourth embodiments is used. Subsequently, an electrode film to be the gate electrode 61 is formed on the gate insulating film 60.

  Next, as shown in FIG. 8F, the planarization process of the gate insulating film 60 and the gate electrode 61 is performed using the CMP technique until the interlayer insulating film 59 is exposed.

  Through the above steps, the gate insulating film 60 is formed of a high dielectric film, the gate electrode 61 is formed of a metal electrode, and a MIS transistor using metal silicide in the source / drain regions is completed.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

The figure which showed typically the structure of the insulating film in the 1st Embodiment of this invention. The figure which showed typically the structure of the insulating film in the 2nd Embodiment of this invention. Process sectional drawing which mainly showed the formation method of the insulating film in the 3rd Embodiment of this invention. Process sectional drawing which mainly showed the formation method of the insulating film in the 4th Embodiment of this invention. When changing the TiO ₂ film thickness, it shows a TiO ₂ crystal grain diameter to the oxidation temperature of the TiN film. Figure a film structure of the TiO ₂ film shown schematically in A, B and point C in FIG. Process sectional drawing which showed a part of manufacturing process of the semiconductor device which concerns on the 5th Embodiment of this invention. Process sectional drawing which showed a part of manufacturing process of the semiconductor device which concerns on the 5th Embodiment of this invention. Sectional drawing for demonstrating a prior art. The figure which showed typically the film | membrane structure of the insulating film which concerns on a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 32, 42 ... Insulating film 11, 33, 43 ... Granular insulating region 12, 34, 44 ... Intergranular insulating region 13 ... Covering insulating region 30, 40 ... Silicon substrate 31, 41 ... Metal compound film 35, 45 ... Barrier Metal 36, 46 ... Gate electrode film 50 ... Silicon substrate 51 ... Element isolation region 52 ... Dummy gate oxide film 53 ... Dummy polysilicon film 54, 56 ... Silicon nitride film 55, 57 ... Source / drain diffusion layer 58 ... Metal silicide film 59 ... Interlayer insulating film 60 ... Gate insulating film 61 ... Gate electrode

Claims (5)

An insulating film formed on a main surface side of a semiconductor substrate, the insulating film being formed between a plurality of granular insulating regions made of metal oxide and spaced apart from each other and adjacent granular insulating regions An intergranular insulating region made of a material, and
The granular insulating region includes at least a crystal of the metal oxide, and the intergranular insulating region includes an amorphous insulator including at least silicon, oxygen, and a metal element constituting the metal oxide. It is,
The metal oxide crystal grains constituting the granular insulating region are composed of a single single crystal or a set of a plurality of single crystals having an angle of 10 degrees or less between the single crystals. Semiconductor device.   The insulating film covers at least one surface of the main insulating region composed of the granular insulating region and the intergranular insulating region, and is an amorphous insulator of the same type as the amorphous insulator constituting the intergranular insulating region The semiconductor device according to claim 1, further comprising a covering insulating region made of   The semiconductor device according to claim 1, wherein the metal element constituting the metal oxide includes titanium, zirconium, hafnium, tantalum, niobium, or aluminum. A step of forming a metal compound film on a main surface side of a semiconductor substrate; and a plurality of spaced apart granular insulating regions made of a metal oxide of a metal element constituting the metal compound film by oxidizing the metal compound film; Forming an insulating film composed of an intergranular insulating region made of an amorphous insulator formed between adjacent granular insulating regions, and
The metal compound film includes at least a metal element constituting the metal oxide and silicon, the granular insulating region includes at least a crystal of the metal oxide, and the intergranular insulating region includes: It is composed of an amorphous insulator containing at least a metal element constituting silicon, oxygen and the metal oxide ,
The metal oxide crystal grains constituting the granular insulating region are composed of a single single crystal or a set of a plurality of single crystals having an angle of 10 degrees or less between the single crystals. A method for manufacturing a semiconductor device.   The method for manufacturing a semiconductor device according to claim 4, wherein the metal element constituting the metal oxide includes titanium, zirconium, hafnium, tantalum, niobium, or aluminum.

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