JP4527105B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a plurality of semiconductor chips are stacked and mounted in a single package.

  In recent years, by mounting a plurality of semiconductor chips (semiconductor elements) in a single package, semiconductor devices have been reduced in size and performance. For example, there is a package in which a plurality of semiconductor chips are stacked and mounted in order to add value to a memory mounted on a portable device or the like or increase a memory capacity.

  A semiconductor device is configured to include a semiconductor chip and a substrate. As a method for electrically connecting the semiconductor chip and the substrate, a wire bonding method in which a connection is made using a bonding wire is widely used.

  When using the wire bonding method for connecting the semiconductor chip and the substrate, it is necessary to avoid damaging the wire bonded portion of the semiconductor chip already mounted on the substrate when the semiconductor chips are stacked. . If the chip size of the semiconductor chips to be stacked is smaller than the chip size of the semiconductor chip mounted on the substrate, the wire-bonded portion will not be damaged, but both chip sizes are the same. In such a case, there is a problem that the wire-bonded portion overlaps with the semiconductor chip to be laminated, and is particularly easily damaged.

In order to solve the above problem, a semiconductor device (see US Pat. No. 5,291,061) in which a spacer of about 200 μm (0.008 inch) is enclosed between stacked semiconductor chips, the peripheral portion is at the center On the other hand, a thin semiconductor device having a step structure (see Japanese Patent Application Laid-Open No. 6-244360) and a semiconductor device in which an adhesive layer is interposed between semiconductor chips (Japanese Patent Application Laid-Open No. 10-27880). Etc.) have been proposed.
US Pat. No. 5,291,061 (registered on March 1, 1994) JP-A-6-244360 (published September 2, 1994) JP-A-10-27880 (published January 27, 1998)

  However, the conventional semiconductor devices have the following problems.

  The semiconductor device having a structure in which a spacer is enclosed between the stacked semiconductor chips prevents contact between the bonding wire connected to the semiconductor chip mounted on the substrate and the semiconductor chip stacked thereon. Therefore, it is necessary to use a spacer having a sufficient thickness. For this reason, there exists a problem that it is unsuitable for thickness reduction of a package.

  That is, as shown in FIG. 13, in order to prevent the contact between the second bonding wire 4 connecting the second semiconductor chip 2 and the substrate 7 and the first semiconductor chip 1, the spacer 14 needs to have a sufficient thickness. There is. When the thickness of the spacer 14 is substantially the same as the height from the second semiconductor chip 2 to the highest portion of the second bonding wire 4, as shown in FIG. 14, the second bonding wire 4 and the first semiconductor The contact with the chip 1 causes a problem that the insulation between the two becomes insufficient.

  Further, the first semiconductor chip 1 is overhanged as shown in FIG. 13, that is, the first semiconductor chip 1 protrudes from the spacer 14. For this reason, vibration is likely to occur in the first semiconductor chip 1. Here, in the wire bonding method in which the semiconductor chip and the substrate are electrically connected, the connection is performed twice in order to connect both ends of the bonding wire, but the subsequent connection is performed by ultrasonic vibration. As described above, since the first semiconductor chip 1 is likely to vibrate, it is difficult to connect the first bonding wire 3 to the first semiconductor chip 1 side by ultrasonic vibration. Therefore, in the wire bonding method, it is necessary to connect the substrate 7 side after connecting the first semiconductor chip 1 side of the first bonding wire 3.

  That is, only the forward wire bonding method can be adopted as the wire bonding method to the first semiconductor chip 1 mounted on the spacer 14. Therefore, it is necessary to dispose the wire bonding terminal on the substrate 7 side more outward than in the case where the reverse wire bonding method is adopted. For this reason, the problem that it is difficult to make a package small is invited. The forward wire bonding method refers to a method of connecting a bonding wire and a substrate after connecting the semiconductor chip and the bonding wire, and a method of connecting in the reverse order is referred to as a reverse wire bonding method.

  In the case of a semiconductor device having a step structure in which the peripheral portion of the semiconductor chip shown in FIG. 15 is formed thinner than the central portion, in addition to the step of cutting the semiconductor chip as compared with the conventional step, the above In order to form the step, a cutting process for cutting the semiconductor wafer is necessary. In the cutting step, it is also necessary to protect the side opposite to the side where the cutting is performed, that is, the side where the semiconductor chip elements are formed. For this reason, the problem that a manufacturing cost increases is caused.

  In the semiconductor device, the portion having the step of the ninth semiconductor chip 51 is not subjected to insulation processing. For this reason, when the package is thinned, as shown in FIG. 16, the second bonding wire 4 and the ninth semiconductor chip 51 come into contact with each other, causing a problem that the insulation between them is insufficient. In addition, when the ninth semiconductor chip 51 is thinned, the stepped portion is also thinned and the strength is lowered, which causes a problem that chip cracks and the like are likely to occur.

  As a wire bonding method for connecting a semiconductor chip having a structure having a step and a substrate, only a forward wire bonding method can be employed, as in a structure in which a spacer is enclosed between stacked semiconductor chips. When the forward wire bonding method is used, the height of the bonding wire from the semiconductor chip to which the bonding wire is connected cannot be reduced. For this reason, when a semiconductor chip is mounted in multiple layers, there is a problem that it is difficult to reduce the thickness of the semiconductor device.

  Further, as described above, since only the forward wire bonding method can be employed, it is necessary to dispose the wire bonding terminal on the substrate 7 side on the outer side as compared with the case where the reverse wire bonding method is employed. For this reason, the problem that it is difficult to make a package small is also caused.

  In the case of a structure in which an adhesive layer is interposed between semiconductor chips shown in FIG. 17, the thickness and region of the adhesive layer 6 that bonds the first semiconductor chip 1 and the second semiconductor chip 2 are controlled. Is difficult. For this reason, problems such as contamination of the substrate 7 due to bleeding (bleeding) of the adhesive constituting the adhesive layer 6 and tilting of the stacked first semiconductor chips 1 are caused.

  In particular, when the semiconductor chip is multi-layered, the variation in the height of the semiconductor device, the variation in the height from the substrate to the surface of the uppermost semiconductor chip, the inclination of the uppermost semiconductor chip, etc. are increased. This causes a problem that stable production becomes difficult. That is, in the case where the number of stacked layers is two, the variation and inclination of the height are increased as the number of stacked semiconductor chips is increased to three and four even though the variation and inclination are not a big problem. As a result, the problem that stable production of semiconductor devices becomes difficult is caused.

  Further, in the case where the package of the semiconductor device is thinned, there is a problem that the insulation between the second bonding wire 4 and the first semiconductor chip 1 becomes insufficient due to the contact between the second bonding wire 4 and the first semiconductor chip 1 as shown in FIG. Invite you.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device that can be stacked regardless of the chip size of the semiconductor chip and that can ensure insulation, and a method for manufacturing the same. There is.

  As a problem-solving means for solving the above-described problems, the present invention provides a semiconductor chip divided (cut out) by dicing in a state where two resin layers including an insulating layer and an adhesive layer are attached to a semiconductor wafer. A method of stacking is used. As a result, a semiconductor device having a small outer dimension and ensuring insulation can be manufactured with high productivity. The semiconductor device does not need to avoid the bonding wire portion when stacking semiconductor chips. Therefore, it is possible to stack semiconductor chips regardless of the chip size.

  In order to solve the above problems, a semiconductor device of the present invention has a plurality of semiconductor chips stacked on a substrate, and electrode terminals provided on each of the semiconductor chips are electrically connected to the substrate by bonding wires. A bonding layer is formed between the plurality of semiconductor chips so as to surround the electrode terminals, and the bonding wire and the bonding wire are connected to each other. An insulating layer is formed between the semiconductor chip stacked on the bonding wire side of the semiconductor chip.

  With the above configuration, the bonding wire and the semiconductor chip can be prevented from contacting each other. For this reason, the insulation of the semiconductor device formed by laminating a plurality of semiconductor chips can be ensured.

  In a semiconductor device in which a plurality of semiconductor chips are stacked, the semiconductor chips stacked on the substrate are electrically connected to the substrate by bonding wires via electrode terminals provided on the respective semiconductor chips. Here, in order to ensure insulation of the semiconductor device, it is necessary to prevent contact between the bonding wire and the semiconductor chip. In particular, in order to reduce the thickness of the semiconductor device, it is necessary to reduce the distance between the semiconductor chips. In this case, since the distance between the bonding wire and the semiconductor chip is reduced, the two are easily in contact with each other. Therefore, there is a risk that the insulating property will be insufficient.

  Therefore, by forming an insulating layer between the bonding wire and the semiconductor chip stacked on the bonding wire side of the semiconductor chip to which the bonding wire is connected, it is possible to prevent the two from contacting each other. it can. That is, the bonding wire and the bonding wire are connected by forming an insulating layer between the electrode terminal to which the bonding wire on the semiconductor chip is connected and the semiconductor chip adjacent to the semiconductor chip. Contact with a semiconductor chip adjacent to the semiconductor chip can be prevented.

  Thereby, the insulation of the semiconductor device formed by laminating a plurality of semiconductor chips can be ensured. For example, even when the semiconductor device is thinned by reducing the distance between the semiconductor chips, the insulating layer can prevent the contact between the semiconductor chip and the bonding wire, thereby ensuring the insulation of the semiconductor device. Can do.

  As described above, in a semiconductor device in which a plurality of semiconductor chips are stacked on a substrate, it is possible to prevent insufficient insulation between the bonding wires and the semiconductor chips. That is, since the contact between the bonding wire and the semiconductor chip is prevented by the insulating layer formed between the bonding wire and the semiconductor chip, the insulation of the semiconductor device can be ensured.

  Therefore, since the insulation of a semiconductor device in which a plurality of semiconductor chips are stacked on a substrate can be ensured, even when the thickness is reduced and the outer dimensions are reduced, the insulation is ensured and the reliability is high. A semiconductor device can be provided.

In the semiconductor device of the present invention, the insulating layer is preferably a polyimide resin.
As the polyimide resin, it is preferable to select and use a material having excellent heat resistance and little plastic deformation at high temperature. By using a polyimide resin having excellent heat resistance, an insulating layer with little plastic deformation at high temperatures can be formed. Therefore, the insulating property of the semiconductor device under high temperature conditions can be further ensured by forming the insulating layer with a polyimide resin.

The thickness of the insulating layer of the semiconductor device of the present invention is preferably in the range of 15 μm to 30 μm.
By setting the thickness of the insulating layer within the above range, it is possible to reduce the thickness of a semiconductor device in which semiconductor chips are stacked while ensuring insulation.

  Bumps are formed on the electrode terminals of the semiconductor device of the present invention, and the bonding wires are preferably connected using a reverse wire bonding method.

  With the above configuration, the distance between stacked semiconductor chips can be reduced. That is, by forming bumps on the electrode terminals, a reverse wire bonding method can be used as a method of connecting the electrode terminals and the substrate with bonding wires. For this reason, the distance between the semiconductor chips can be reduced.

  That is, the height of the bump is the height from the surface of the semiconductor chip to which the bonding wire is connected via the electrode terminal when the forward wire bonding method is used as a method for performing the connection. It can be made smaller than this. And a bonding wire can be more reliably connected by using a reverse wire bonding method.

Therefore, since the distance between the stacked semiconductor chips can be reduced, a semiconductor device formed by stacking a plurality of semiconductor chips can be easily reduced in thickness. In addition, since the bonding wire can be connected more reliably, a more reliable semiconductor device can be provided.
The reverse wire bonding method refers to a method of connecting a semiconductor chip and a bonding wire after connecting the bonding wire and the substrate, and a method of connecting in the reverse order is referred to as a forward wire bonding method.

In the semiconductor device of the present invention, the plurality of semiconductor chips and the bonding wires stacked on the substrate are sealed with a sealing resin, and the surface of the substrate on which the plurality of semiconductor chips are stacked It is preferable that an external terminal is formed on the opposite surface.
As a result, the semiconductor chip and the bonding wire can be protected by the sealing resin. Further, the semiconductor device and the outside can be easily electrically connected by the external terminal.

In the semiconductor device of the present invention, an adhesive layer is formed between the plurality of semiconductor chips.
By bonding the plurality of semiconductor chips using the adhesive layer, the semiconductor chips can be easily stacked.

  Further, the chip size of the semiconductor chip and the sizes of the insulating layer and the adhesive layer may be the same.

The adhesive layer of the semiconductor device of the present invention is preferably formed between the insulating layer and the semiconductor chip on the substrate side.
With the above configuration, the bonding wire between the insulating layer and the semiconductor chip on the substrate side can be protected by the adhesive layer.

The adhesive layer of the semiconductor device of the present invention is preferably an epoxy resin.
Since the epoxy resin is a thermosetting resin that melts from a solid to a liquid by heating and is then cured, it can be cured after bonding the semiconductor chip to protect the bonding wire.

The thickness of the adhesive layer of the semiconductor device of the present invention is preferably larger than the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected via the electrode terminal.
Thereby, it can prevent that the semiconductor chip adjacent to the said bonding wire and the semiconductor chip to which this bonding wire was connected contacts. Therefore, it is possible to reliably prevent the bonding wire from being damaged by contact with the adjacent semiconductor chip.

  It is preferable that an insulating resin layer is formed in a region excluding the electrode terminal of the surface of the semiconductor device of the present invention where the electrode terminal is provided.

  Thereby, the contact between the bonding wire and the semiconductor chip to which the bonding wire is connected via the electrode terminal can be prevented. That is, since the surface of the semiconductor chip on which the electrode terminals are provided is covered with the insulating resin layer except for the electrode terminals, the bonding wire and the semiconductor chip can be prevented from contacting each other. .

  In the present invention, the “chip size” refers to a vertical and horizontal external size of a surface of a semiconductor chip substrate or another semiconductor chip.

  In the semiconductor device of the present invention, as described above, an insulating layer is formed between the bonding wire and the semiconductor chip laminated on the bonding wire side of the semiconductor chip to which the bonding wire is connected. It is.

  Therefore, for example, even when the semiconductor device in which a plurality of semiconductor chips are stacked is thinned and the external dimensions thereof are reduced, it is possible to prevent the bonding wire and the semiconductor chip from contacting each other. Thereby, there is an effect that it is possible to provide a semiconductor device in which a plurality of highly reliable semiconductor chips in which insulation is ensured are stacked.

  As described above, in the semiconductor device of the present invention, the insulating layer is preferably a polyimide resin.

  By selecting and using a polyimide-based resin that is less plastically deformed at a high temperature, there is an effect that the insulating property of the semiconductor device under a high temperature condition can be further ensured.

  As described above, in the semiconductor device of the present invention, the thickness of the insulating layer is preferably in the range of 15 μm to 30 μm.

  As a result, it is possible to reduce the thickness of a semiconductor device in which semiconductor chips are stacked on a substrate while ensuring insulation.

  As described above, the semiconductor device of the present invention preferably has bumps formed on the electrode terminals, and the bonding wires are connected using a reverse wire bonding method.

  Bumps are formed on the electrode terminals, and the electrode terminals and the substrate are connected using a reverse wire bonding method, so that the distance between the semiconductor chips is reduced, and the connection is more reliably performed. can do. As a result, it is possible to easily reduce the thickness of a semiconductor device formed by stacking a plurality of semiconductor chips and to improve the reliability thereof.

  In the semiconductor device of the present invention, as described above, the plurality of semiconductor chips and the bonding wires stacked on the substrate are sealed with a sealing resin, and the plurality of semiconductor chips on the substrate are It is preferable that an external terminal is formed on the surface opposite to the stacked surface.

  Thereby, the semiconductor device protected by the sealing resin that can electrically connect the semiconductor device and the outside can be provided.

  As described above, the semiconductor device of the present invention preferably has an adhesive layer formed between the plurality of semiconductor chips.

  Thereby, there exists an effect that a semiconductor chip can be easily laminated | stacked by adhere | attaching said several semiconductor chip using said contact bonding layer.

  In the semiconductor device of the present invention, as described above, the adhesive layer is preferably formed between the insulating layer and the semiconductor chip on the substrate side.

  Thereby, there exists an effect that the said bonding wire can be protected by the said contact bonding layer.

  In the semiconductor device of the present invention, as described above, the adhesive layer is preferably formed of an epoxy resin.

  Since the epoxy resin is a thermosetting resin that is melted from a solid to a liquid by heating and then cured, it has an effect that it can be cured after the semiconductor chip is bonded to protect the bonding wire.

  In the semiconductor device of the present invention, as described above, the thickness of the adhesive layer is greater than the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected via the electrode terminal. Is preferred.

  Thereby, it can prevent that the said bonding wire and the said insulating layer contact. Therefore, it is possible to reliably prevent damage to the bonding wire due to contact with the semiconductor chip.

  As described above, in the semiconductor device of the present invention, it is preferable that an insulating resin layer is formed in a region excluding the electrode terminal on the surface where the electrode terminal of the semiconductor chip is provided.

  Thereby, there exists an effect that the contact with the said bonding wire and the said semiconductor chip can be prevented.

  As described above, the method for manufacturing a semiconductor device of the present invention attaches a sheet made of an insulating layer and an adhesive layer to a wafer before the semiconductor chip is divided so that the insulating layer side of the sheet is in contact with the wafer. A sheet attaching step for attaching, a dividing step for dicing the wafer on which the sheet is attached to a semiconductor chip by dicing, and the semiconductor chip to which the adhesive layer is attached by the adhesive layer being electrically connected to the substrate by a bonding wire. And a bonding step of bonding to the semiconductor chips connected to each other.

  As described above, the method for manufacturing a semiconductor device of the present invention attaches a sheet made of an insulating layer and an adhesive layer to a wafer before the semiconductor chip is divided so that the insulating layer side of the sheet is in contact with the wafer. A sheet attaching step for attaching, a dividing step for dicing the wafer on which the sheet is attached to a semiconductor chip by dicing, and the semiconductor chip to which the adhesive layer is attached by the adhesive layer being electrically connected to the substrate by a bonding wire. And a bonding step of bonding to the semiconductor chips connected to each other.

  Therefore, the insulating layer and the adhesive layer having the same size as the chip size of the semiconductor chip can be formed by cutting the insulating layer and the adhesive layer and the semiconductor chip at a time in the dividing step of dividing the semiconductor chip. For this reason, it becomes possible to control the adhesion region, adhesion amount, and adhesion layer thickness of the adhesion layer very easily, and the semiconductor device of the present invention can be manufactured easily and reliably.

  An embodiment of the present invention will be described below with reference to FIGS. In addition, this invention is not limited at all by this.

  1 to 4 are explanatory diagrams showing the configuration of the semiconductor device according to the present embodiment.

  A semiconductor device formed by stacking two semiconductor chips is shown in FIG. As shown in the figure, the semiconductor device of the present embodiment includes a first semiconductor chip 1, a second semiconductor chip 2, a first bonding wire 3, a second bonding wire 4, an insulating layer 5, an adhesive layer 6, and a substrate 7. The adhesive layer 8 and the electrode terminal 21 are provided. In the present embodiment, when the semiconductor chips stacked on the substrate 7 are not distinguished, they are simply expressed as semiconductor chips.

  On the substrate 7 constituting the semiconductor device of the present embodiment, the second semiconductor chip 2 is bonded via an adhesive layer 8, and on the surface of the second semiconductor chip 2 opposite to the substrate 7, The first semiconductor chip 1 is bonded to the bonding layer 6 through the insulating layer 5. The first bonding wire 3 electrically connects the electrode terminal 21 of the first semiconductor chip 1 and the substrate 7, and the second bonding wire 4 connects the electrode terminal 21 of the second semiconductor chip 2 and the substrate 7. It is an electrical connection. The electrode terminal 21 is provided on the surface of the first semiconductor chip 1 and the second semiconductor chip 2 opposite to the substrate 7.

  The type of the semiconductor chip that constitutes the semiconductor device of the present embodiment is not particularly limited, and any semiconductor chip can be used. As the plurality of semiconductor chips, for example, a combination of the same outer shape, or a combination of the electrode terminals provided on the semiconductor chip overlapping with other semiconductor chips stacked on the semiconductor chip when stacked. It can be used suitably. 1 to 4 show a semiconductor device configured by stacking semiconductor chips having the same outer shape.

  A semiconductor device in which the thickness of the adhesive layer 6 is smaller than the height B of the second bonding wire 4 from the surface on which the electrode terminals 21 of the second semiconductor chip 2 are provided is shown in FIG. As shown in the figure, the semiconductor device of the present embodiment can prevent contact between the first semiconductor chip 1 and the second bonding wire 4 due to the insulating layer 5 interposed between them. That is, the insulating layer 5 can ensure the insulation of the semiconductor device.

  A semiconductor device in which four semiconductor chips are stacked and mounted is shown in FIG. As shown in the figure, in the semiconductor device, a second semiconductor chip 2, a first semiconductor chip 1, a third semiconductor chip 18, and a fourth semiconductor chip 20 are laminated in order from the substrate 7 side. An insulating layer 5 and an adhesive layer 6 are interposed between the chips. As described above, even when a large number of semiconductor chips are stacked, the insulating layer 5 and the adhesive layer 6 are interposed between the semiconductor chips, whereby the semiconductor chips are bonded by the adhesive layer 6 and bonded by the insulating layer 5. It can prevent that a wire and a semiconductor chip contact.

  In order to reduce the thickness of a semiconductor device formed by stacking semiconductor chips, it is effective to reduce the thickness of the adhesive layer 6 to which the semiconductor chips are bonded, but the insulating layer 5 is formed between the semiconductor chips. If not, the bonding wire and the semiconductor chip come into contact with each other as the thickness of the adhesive layer 6 is reduced, and there is a possibility that the insulation of the semiconductor device cannot be ensured.

  However, in the semiconductor device of this embodiment, since the insulating layer 5 interposed between the semiconductor chips can prevent the bonding wire and the semiconductor chip from coming into contact with each other, the thickness of the adhesive layer 6 is reduced. Even in the case, insulation can be ensured.

  That is, it is possible to reduce the thickness of the semiconductor device in which a large number of semiconductor chips are stacked while ensuring the insulation. In the semiconductor device shown in FIG. 3, the number of stacked semiconductor chips is four. However, the number of semiconductor chips is not limited to this and can be any number.

  FIG. 4 shows a semiconductor device (Chip Size Package, hereinafter abbreviated as CSP) sealed with a sealing resin. As shown in the figure, the semiconductor device of the present embodiment is sealed with a sealing resin 15, and the substrate 7 has a surface opposite to the surface on which the semiconductor chip is mounted. An external connection terminal (external terminal) 16 for electrically connecting to the outside is provided. As the sealing resin 15, a thermosetting resin can be used, and specifically, an epoxy resin, a silicone resin, or the like can be suitably used.

  A method for manufacturing the semiconductor device of the present invention will be described with reference to FIGS.

  First, a method for forming an insulating layer and an adhesive layer on the back surface of a semiconductor chip will be described. In the present embodiment, the surface on which the electrode terminals of the semiconductor chip are formed is referred to as the front surface, and the surface on which the electrode terminals are not formed is referred to as the back surface.

  The insulating layer and the adhesive layer are formed in the state of the wafer before various elements are formed to form a semiconductor chip. Note that the back surface of the wafer may be polished. Accordingly, since the thickness of the wafer can be reduced before forming the insulating layer and the adhesive layer, the semiconductor chip can be further downsized.

  As a method of forming the insulating layer and the adhesive layer on the back surface of the wafer, as shown in FIG. 5, a sheet 22 having a two-layer structure composed of the insulating layer 5 and the adhesive layer 6 is applied to the back surface of the wafer 9 with a roller 10 for applying. The method of pasting using is mentioned. Note that the sheet 22 is attached so that the insulating layer 5 is in contact with the back surface of the wafer 9.

  In the figure, the sheet 22 composed of the insulating layer 5 and the adhesive layer 6 is used, but each of the sheet-like insulating layer 5 and adhesive layer 6 may be attached in the same manner. That is, after the sheet-like insulating layer 5 is attached to the back surface of the wafer, the insulating layer 5 and the adhesive layer 6 may be formed on the back surface of the wafer by further attaching a sheet-like adhesive layer 6 thereon.

  The insulating layer 5 and the adhesive layer 6 are preferably formed using a sheet-like material having a uniform thickness. Thereby, the insulating layer 5 and the adhesive layer 6 having a uniform thickness can be easily formed on the back surface of the wafer 9.

  As the insulating layer 5, a resin having excellent heat resistance and less plastic deformation at 100 ° C to 200 ° C is preferably used. Specifically, the insulating layer 5 is preferably a polyimide resin.

  When a resin having a large plastic deformation at a high temperature is used, there is a possibility that the insulating layer 5 is plastically deformed under a high temperature condition, and the insulation of the semiconductor device cannot be secured. On the other hand, by using a resin having excellent heat resistance, the insulating layer 5 can be prevented from being deformed under a high temperature condition, so that the insulating property of the semiconductor device under a high temperature condition can be ensured.

  The thickness of the insulating layer 5 is not particularly limited as long as the insulating property is ensured and can be attached to the back surface of the wafer. However, the thickness of the semiconductor device (package) formed by stacking a plurality of semiconductor chips is not particularly limited. In consideration of thinning and the like, it is preferably in the range of 15 μm or more and 30 μm or less. By setting the thickness of the insulating layer 5 within the above range, the semiconductor device can be thinned while ensuring the insulation of the semiconductor device.

  The adhesive layer 6 is preferably a thermosetting resin that melts from a solid to a liquid by heating and then cures, and among them, an epoxy resin is particularly preferable. The adhesive layer 6 has the purpose of sealing and protecting the second bonding wire 4 connected to the electrode terminal 21 of the second semiconductor chip 2 in addition to bonding the semiconductor chips together. Therefore, the thickness A (see FIG. 7) of the adhesive layer 6 is preferably equal to or higher than the height B (see FIG. 7) of the second bonding wire 4 from the second semiconductor chip 2.

  A method of cutting the semiconductor chip into individual pieces using the dicing blade 11 after forming the insulating layer 5 and the adhesive layer 6 on the back surface of the wafer 9 will be described with reference to FIG. As shown in the drawing, a wafer 9 on which an insulating layer 5 and an adhesive layer 6 are formed is placed on a cutting fixing sheet 12 and cut using a dicing blade 11 to be cut into semiconductor chips. Thereby, the insulating layer 5, the adhesive layer 6, and the wafer 9 can be cut at a time and separated into semiconductor chips. That is, when the wafer 9 is cut using the dicing blade 11, the insulating layer 5 and the adhesive layer 6 having the same size as the chip size of the semiconductor chip are formed by simultaneously cutting the insulating layer 5 and the adhesive layer 6. It can be set as the manufactured semiconductor chip.

  By manufacturing a semiconductor chip using the above-described method, compared to a method of forming an adhesive layer by applying an adhesive, control of the adhesive region, the amount of adhesive, and the thickness of the adhesive layer of the semiconductor chip Can be performed very easily.

  A method for stacking the semiconductor chips obtained as described above on a substrate, that is, a method for manufacturing a package will be described below with reference to FIGS. As shown in the figure, first, the second semiconductor chip 2 is mounted on the substrate 7 using an adhesive. That is, the second semiconductor chip 2 is mounted on the substrate 7 through the adhesive layer 8 formed of the adhesive.

  As the substrate 7, for example, a lead frame having a wire bond terminal, an organic substrate made of polyimide, bismaleimide / triazine resin, or the like can be used. Can be used. As the adhesive forming the adhesive layer 8, for example, a liquid adhesive, a sheet-like adhesive, or the like can be used. The adhesive is not particularly limited as long as it can uniformly bond the entire region of the first semiconductor chip 1 and the substrate 7.

  After mounting the second semiconductor chip 2 on the substrate 7, the wire bonding terminal portion of the substrate 7 and the electrode terminal 21 of the second semiconductor chip 2 are electrically connected by the second bonding wire 4.

  Thereafter, the first semiconductor chip 1 is bonded to the second semiconductor chip 2 mounted on the substrate 7. The adhesion is performed such that the adhesive layer 6 covers the portion where the second bonding wire 4 on the electrode terminal 21 provided on the second semiconductor chip 2 is connected.

  When the bonding is performed, the substrate 7, the second semiconductor chip 2, and the second bonding wire 4 are heated to soften and melt the epoxy resin that forms the adhesive layer 6 formed on the back surface of the first semiconductor chip 1. It is preferable to keep the temperature at which temperature begins. For example, when the temperature at which softening and melting of the epoxy resin constituting the adhesive layer 6 starts is 100 ° C., the substrate 7, the second semiconductor chip 2 and the second bonding wire 4 are heated to 100 ° C. As a result, when the first semiconductor chip 1 and the second semiconductor chip 2 are bonded, the adhesive layer 6 formed on the back surface of the first semiconductor chip 1 is softened, so that both the second bonding wires 4 are not damaged. Can be bonded.

  Thereafter, after the thermosetting resin constituting the adhesive layer 6 is completely cured, the wire bonding terminal portion of the substrate 7 and the electrode terminal 21 on the first semiconductor chip 1 are connected to the first bonding wire 3 (see FIG. 1). Electrically connect using

  As shown in FIG. 8, the first bonding wire 3 and the second bonding wire 4 may be in contact with the peripheral portions of the first semiconductor chip 1 and the second semiconductor chip 2, respectively. Therefore, as shown in FIG. 9, a coating resin (insulating resin layer) 13 is formed on the surface of the first semiconductor chip 1 and the second semiconductor chip 2 on which the electrode terminals 21 are provided. preferable. The coating resin 13 is for preventing the semiconductor chip and the bonding wire from coming into contact with each other. For example, an insulating resin such as polyimide is used.

  After the semiconductor chips are laminated on the substrate as described above, the CSP can be obtained by forming the sealing resin 15 and the external connection terminals 16 made of solder balls shown in FIG.

  When a semiconductor chip is stacked on the substrate, the bonding wire and the semiconductor chip may be sealed (resin) by potting using a liquid resin.

  As a method of connecting the electrode terminal 21 provided on the second semiconductor chip 2 and the second bonding wire 4 (wire bonding method), the reverse wire bonding method is performed after the bump is formed on the electrode terminal 21. Effective for thinning. As a result, the thickness A (see FIG. 7) of the adhesive layer 6 can be reduced, which is particularly effective for thinning a semiconductor device in which a large number of semiconductor chips are stacked.

  As described above, the thickness A of the adhesive layer 6 is preferably smaller than the height B of the second bonding wire 4 from the second semiconductor chip 2 (see FIG. 7). The height of the bump necessary for performing the connection by the reverse wire bonding method is a height from the surface of the second semiconductor chip 2 provided with the electrode terminal 21 of the second bonding wire 4 connected by the forward wire bonding method. It can be made smaller than B (see FIG. 7). Therefore, the thickness of the adhesive layer 6 can be reduced by forming bumps 23 (see FIG. 7) on the electrode terminals 21 and performing the reverse wire bonding method.

  For example, when the bump is formed to have a height of 40 μm, the thickness of the insulating layer 5 of the first semiconductor chip 1 is 25 μm, and the thickness of the adhesive layer 6 is 50 μm, the insulating layer 5 and the adhesive layer 6 has a thickness of 75 μm. On the other hand, when the forward wire bonding method is adopted, it is difficult to reduce the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected. The length is about 130 to 160 μm.

  That is, by using the reverse wire bonding method as a method of connecting the electrode terminal 21 and the second bonding wire 4, the chip stacking portion can be thinned, which is advantageous for multi-stacking of semiconductor chips and thinning of the semiconductor device. is there. Therefore, it is possible to realize a highly reliable stack of semiconductor chips that are thinner than conventional ones and ensure insulation and the like.

  The reverse wire bonding method refers to a method of connecting a semiconductor chip and a bonding wire after connecting the substrate and the bonding wire, and a method of connecting in the reverse order is referred to as a forward wire bonding method. When the reverse wire bonding method is performed, a gold bump is formed on the electrode terminal provided on the semiconductor chip, the bonding wire and the substrate are connected first, and then the bonding wire and the gold bump are connected. Do.

  In the semiconductor device of this embodiment, since the insulating layer sufficiently secures the insulation between the semiconductor chip and the bonding wire, the chip size of the stacked semiconductor chips is not limited. Therefore, as shown in FIG. 10, the fifth semiconductor chip 31 having a chip size larger than that of the sixth semiconductor chip 32 can be stacked on the surface of the sixth semiconductor chip 32 opposite to the substrate 7.

  Since the semiconductor device of this embodiment can stack a semiconductor chip at a portion where bonding wires of electrode terminals provided on the semiconductor chip are connected, for example, a plurality of stacked semiconductor chips are provided. These can be combined so as to have the arrangement (layout) shown in FIG. 11 or FIG. Rather than stacking the sixth semiconductor chip 32 on the fifth semiconductor chip 31, the second bonding for connecting the sixth semiconductor chip 32 and the substrate 7 (see FIG. 10) is performed by using the arrangement shown in FIG. There is an advantage that the wire length of the wire 4 is shortened.

  In particular, as shown in FIG. 11, the fifth semiconductor chip 31 larger than the sixth semiconductor chip 32 is replaced with the fifth semiconductor chip 31 and the substrate on the sixth semiconductor chip 32 mounted on the substrate 7 (see FIG. 10). By adhering so that the second bonding wire 4 is positioned between the first semiconductor chip 7 and the second semiconductor chip 7, the space between the fifth semiconductor chip 31 and the substrate 7 can be used effectively. For this reason, the semiconductor device can be further reduced in size.

  As shown in FIG. 12, a seventh semiconductor chip 41 having a chip size different from that of the eighth semiconductor chip 42 is replaced with an eighth semiconductor chip 42 mounted on the substrate 7 (see FIG. 10). The space between the seventh semiconductor chip 41 and the substrate 7 can be used effectively by adhering so that a part of the second bonding wire 4 is positioned between the substrate 41 and the substrate 7. Thereby, a semiconductor device can be reduced in size.

  As described above, the semiconductor device of this embodiment can stack, for example, a plurality of semiconductor chips having the same chip size without limiting the chip size of the stacked semiconductor chips. Therefore, it is possible to provide a semiconductor device having a stacked structure that is thinner and more reliable.

  The semiconductor device of the present invention is a semiconductor device in which a plurality of semiconductor chips having a plurality of electrode terminals on each main surface are stacked on a substrate, and the electrode terminals and the substrate are electrically connected by bonding wires. The gap between the lower semiconductor chip and the upper semiconductor chip at the upper and lower semiconductor chips at any position is at least that of the lower semiconductor chip in the order of the lower chip, the adhesive layer resin, the insulating layer resin layer, and the upper semiconductor chip. You may comprise as a 1st semiconductor device which has the structure by which the semiconductor chip of the upper layer is adhere | attached on a part of electrode terminal connected with the bonding wire.

  In the first semiconductor device, bumps are formed on the electrode terminals of the lower semiconductor chip, and the bonding wire connecting the lower semiconductor chip and the substrate is a wire connected by a reverse wire bonding method. It may be configured.

  The first semiconductor device may be configured such that a semiconductor chip and a bonding wire connected to one surface of the substrate are sealed with resin, and an external connection terminal is formed on the opposite surface side of the substrate. .

  The first semiconductor device may be configured such that the insulating layer is a polyimide resin and the adhesive layer is an epoxy resin.

  The first semiconductor device may be configured such that the thickness of the insulating layer is in the range of 15 μm to 30 μm.

  The first semiconductor device may be configured such that the main surface of the semiconductor chip located in the lower layer, in particular, the chip terminal from the electrode terminal portion is covered with an insulating resin.

  The first semiconductor device may be configured such that an electrode terminal portion of a semiconductor chip disposed in a lower layer is covered with an insulating resin that is opened.

  In the method of manufacturing a semiconductor device according to the present invention, in a wafer state before the semiconductor chip is divided, an insulating resin is formed on the back surface of the wafer with a sheet composed of two layers of an insulating resin layer and an adhesive resin layer. It is configured to have a step of dividing the layer side by bonding and dicing into semiconductor chips, and a step of bonding the divided semiconductor chip onto the semiconductor chip electrically connected to the substrate by bonding wires May be.

  In the method of manufacturing a semiconductor device according to the present invention, in a wafer state before the semiconductor chip is divided, a sheet-like insulating resin layer is attached to the back surface of the wafer, and then a sheet-like adhesive resin layer is attached. There may be included a step of dividing the semiconductor chip by dicing, and a step of bonding the divided semiconductor chip onto the semiconductor chip electrically connected to the substrate by a bonding wire.

  The semiconductor device of the present invention includes a sheet pasting step for pasting a sheet comprising an insulating layer and an adhesive layer to a wafer before the semiconductor chip is divided so that the insulating layer side of the sheet is in contact with the wafer. The semiconductor chip to which the adhesive layer is bonded is electrically connected to the substrate by a bonding wire by the dividing step of dividing the wafer to which the sheet is bonded into semiconductor chips by dicing, and the adhesive layer. It can be manufactured by a method including a bonding step of bonding to a semiconductor chip.

  Further, the semiconductor device of the present invention includes an insulating layer attaching step of attaching an insulating layer sheet made of an insulating layer to a wafer before the semiconductor chip is divided, and an adhesive layer consisting of an adhesive layer after the insulating layer attaching step. An adhesive layer attaching step of attaching the layer sheet to the surface of the wafer on which the insulating layer sheet is attached, and a dividing step of dividing the wafer on which the insulating layer sheet and the adhesive layer sheet are attached into semiconductor chips by dicing. And a bonding step of bonding the semiconductor chip to which the bonding layer is attached to the semiconductor chip electrically connected to the substrate by a bonding wire by the bonding layer.

  By the above method, the semiconductor device of the present invention can be easily and reliably manufactured. That is, the insulating layer and the adhesive layer can be cut out simultaneously with the semiconductor chip in the dividing step of dividing the semiconductor chip. That is, these can be cut out at a time. For this reason, it is possible to form an insulating layer and an adhesive layer having the same size as the chip size of the semiconductor chip.

  Therefore, it is possible to control the adhesion region, adhesion amount, and thickness of the adhesion layer very easily, and the semiconductor device of the present invention can be manufactured easily and reliably.

It is sectional drawing of the semiconductor device which shows one embodiment of this invention. It is sectional drawing of the semiconductor device to which the bonding wire which shows other embodiment of this invention is connected using the forward wire bonding method. It is sectional drawing of the semiconductor device formed by laminating | stacking four semiconductor chips which shows other embodiment of this invention. It is sectional drawing of the semiconductor device formed by sealing with sealing resin which shows other embodiment of this invention. It is a perspective view explaining the sheet sticking process in the manufacturing method of the semiconductor device of this invention. It is sectional drawing explaining the division | segmentation process in the manufacturing method of the semiconductor device of this invention. It is sectional drawing explaining the adhesion process in the manufacturing method of the semiconductor device of this invention. It is sectional drawing of the semiconductor device which shows other embodiment of this invention. It is sectional drawing of the semiconductor device by which the insulating resin layer is formed in the area | region except the electrode terminal of the surface in which the electrode terminal of the semiconductor chip which shows other embodiment of this invention is provided. It is sectional drawing explaining the example of the combination of the semiconductor chip which comprises the semiconductor device of this invention. It is a top view explaining the example of the combination of the semiconductor chip which comprises the semiconductor device of this invention. It is a top view explaining the other example of the combination of the semiconductor chip which comprises the semiconductor device of this invention. It is sectional drawing explaining the conventional semiconductor device of the structure where the spacer was enclosed between the semiconductor chips laminated | stacked. It is sectional drawing explaining the case where the conventional semiconductor device of the structure where the spacer was enclosed between the semiconductor chips laminated | stacked was thinned. It is sectional drawing explaining the conventional semiconductor device of the structure which has the level | step difference in which the peripheral part of the semiconductor chip was thinly formed with respect to the center part. It is sectional drawing explaining the case where the semiconductor device of the structure where the peripheral part of the conventional semiconductor chip was formed thinly with respect to the center part, and has a level | step difference is thinned. It is sectional drawing explaining the conventional semiconductor device of the structure formed by laminating | stacking an adhesive layer between semiconductor chips. It is sectional drawing explaining the case where the conventional semiconductor device of the structure formed by laminating | stacking an adhesive layer between semiconductor chips is thinned.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st semiconductor chip 2 2nd semiconductor chip 3 1st bonding wire 4 2nd bonding wire 5 Insulating layer 6 Adhesive layer 7 Substrate 13 Coating resin (insulating resin layer)
15 Sealing resin 16 External connection terminal (external terminal)
18 Third semiconductor chip 20 Fourth semiconductor chip 21 Electrode terminal 22 Sheet 23 Bump 31 Fifth semiconductor chip 32 Sixth semiconductor chip 41 Seventh semiconductor chip 42 Eighth semiconductor chip 51 Ninth semiconductor chip

Claims (11)

A semiconductor device in which a plurality of semiconductor chips are stacked on a substrate and the electrode terminals provided on the surface of each semiconductor chip opposite to the substrate are electrically connected to the substrate by bonding wires. Te,
Insulating layer between the semiconductor chip Bonn loading wire and the bonding wire are stacked on the bonding wire of the semiconductor chip are connected is formed, the semiconductor chips insulating layer and the bonding wire is connected A bonding layer is formed between the insulating layer and the semiconductor chip to which the bonding wire is connected, and the bonding layer seals the bonding wire . The semiconductor device according to claim 1, wherein the insulating layer is a heat-resistant resin that hardly undergoes plastic deformation at a temperature at which the adhesive layer softens . 3. The semiconductor device according to claim 1, wherein the insulating layer is a polyimide resin . 4. The semiconductor device according to claim 1, wherein a thickness of the insulating layer is in a range of 15 [mu] m to 30 [mu] m . The semiconductor device according to claim 1, wherein bumps are formed on the electrode terminals, and the bonding wires are connected using a reverse wire bonding method . The plurality of semiconductor chips and the bonding wires stacked on the substrate are sealed with a sealing resin, and an external terminal is provided on the surface of the substrate opposite to the surface on which the plurality of semiconductor chips are stacked. the semiconductor device according to any one of claims 1 to 5, characterized in that There are formed. The semiconductor device according to claim 1, wherein a chip size of the semiconductor chip and a size of the insulating layer and the adhesive layer are the same . The semiconductor device according to claim 1, wherein the adhesive layer is formed between the insulating layer and the semiconductor chip on the substrate side . The semiconductor device according to claim 1, wherein the adhesive layer is an epoxy resin . The thickness of the said adhesion layer is larger than the height from the surface of the said semiconductor chip to which this bonding wire of the said bonding wire is connected via the said electrode terminal, The any one of Claims 1-9 characterized by the above-mentioned. The semiconductor device according to item. An insulating resin layer is formed in a region excluding the electrode terminal on the surface of the semiconductor chip where the electrode terminal is provided between the adhesive layer and the semiconductor chip to which a bonding wire is connected. The semiconductor device according to claim 1, wherein:

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