JP4597653B2 - Semiconductor device, semiconductor module including the same, and method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device including a GaN-based semiconductor substrate, a semiconductor module including the semiconductor device, and a method for manufacturing the semiconductor device including the GaN-based semiconductor substrate.

  In a semiconductor device, electrical contact with a semiconductor element is smoothly performed by an ohmic electrode. A semiconductor device using a GaAs-based semiconductor, a GaN-based semiconductor, or the like is connected to an external circuit by an Al-based ohmic electrode (see, for example, Patent Document 1). Au wiring is mainly used as connection wiring to the external circuit.

JP 2001-93905 A

  However, when an Al-based ohmic electrode and an electrode provided thereon are connected, Au, Cu, etc. used for the electrode react with Al in the Al-based ohmic electrode, and an ohmic contact failure occurs.

  An object of the present invention is to provide a semiconductor device in which ohmic contact failure does not occur and a method for manufacturing the same.

A semiconductor device according to the present invention is provided so as to cover a GaN-based semiconductor substrate, an Al-containing ohmic electrode provided on the GaN-based semiconductor substrate, and an upper surface and a side surface of the Al-containing ohmic electrode, TiWN, TiN, It comprises a barrier metal made of either WN, WSiN or TaN, and an electrode provided on the barrier metal .

  In the semiconductor device according to the present invention, since a barrier metal made of TiWN, TiN, WN, WSiN or TaN is formed between the Al-containing ohmic electrode and the electrode, the Al in the Al-containing ohmic electrode Can be prevented from reacting with the electrode. Thereby, characteristic degradation of the semiconductor device according to the present invention can be prevented. Further, since TiWN, TiN, WN, WSiN and TaN are excellent in barrier properties even in a high temperature region, even if the semiconductor device according to the present invention is subjected to a high temperature annealing treatment, Al and the electrode in the Al-containing ohmic electrode Reaction can be prevented. Furthermore, since TiWN, TiN, WN, WSiN, and TaN do not have a gap for N to enter, nitrogen escape from the GaN-based semiconductor substrate can be prevented.

  A protective film covering the exposed side surface of the barrier metal may be provided. In this case, moisture is prevented from entering the barrier metal and the Al-containing ohmic electrode. As a result, the moisture resistance of the barrier metal is improved. Further, alteration of the Al-containing ohmic electrode is prevented.

  A protective film that covers the top and side surfaces of the barrier metal may be further provided. In this case, moisture can be reliably prevented from entering the barrier metal and the Al-containing ohmic electrode. As a result, the moisture resistance of the barrier metal is improved. Further, alteration of the Al-containing ohmic electrode is prevented.

A semiconductor module according to the present invention is provided so as to cover a GaN-based semiconductor substrate, an Al-containing ohmic electrode provided on the GaN-based semiconductor substrate, and an upper surface and a side surface of the Al-containing ohmic electrode, TiWN, TiN, A semiconductor device including a barrier metal made of any of WN, WSiN, or TaN, a protective film that covers the exposed side surface of the barrier metal , and an electrode provided on the barrier metal ; It is characterized by being sealed. Another semiconductor module according to the present invention is provided to cover a GaN-based semiconductor substrate, an Al-containing ohmic electrode provided on the GaN-based semiconductor substrate, an upper surface and a side surface of the Al-containing ohmic electrode, and TiWN, A semiconductor device comprising a barrier metal made of any one of TiN, WN, WSiN, or TaN, a protective film covering the upper surface and side surfaces of the barrier metal , and an electrode provided on the barrier metal ; It is characterized by being resin-sealed.

  In the semiconductor module according to the present invention, reaction between Al in the Al-containing ohmic electrode and the electrode can be prevented. Further, moisture is prevented from entering the barrier metal and the Al-containing ohmic. This prevents the barrier property of the barrier metal from being lowered. Further, alteration of the Al-containing ohmic electrode is prevented. Therefore, it is not necessary to pack the semiconductor device with a highly airtight package. As a result, the production cost of the semiconductor module according to the present invention is reduced.

  The resin sealing may be potting or molding.

  The resin sealing may be performed with an epoxy resin or a Teflon (registered trademark) resin.

  A Ti layer may be further provided between at least one of the Al-containing ohmic electrode and the barrier metal or between the barrier metal and the electrode. In this case, the adhesion between the Al-containing ohmic electrode and the electrode is improved.

The method for manufacturing a semiconductor device according to the present invention includes a step of forming an Al-containing ohmic electrode on a GaN-based semiconductor substrate and any one of TiWN, TiN, WN, WSiN, or TaN so as to cover the upper surface and side surfaces of the Al-containing ohmic electrode. The method includes a step of forming a barrier metal composed of the above and a step of forming an electrode on the barrier metal .

  In the method of manufacturing a semiconductor device according to the present invention, a barrier metal made of TiWN, TiN, WN, WSiN, or TaN is formed between the Al-containing ohmic electrode and the electrode. Thereby, reaction with Al in an Al content ohmic electrode and an electrode can be prevented. As a result, characteristic deterioration of the semiconductor device manufactured by the manufacturing method according to the present invention can be prevented. In addition, since TiWN, TiN, WN, WSiN and TaN have excellent barrier properties even in a high temperature range, even if high temperature annealing is performed on the semiconductor device after the barrier metal is formed, Al and the electrode in the Al-containing ohmic electrode Reaction can be prevented.

A step of forming a protective film covering the exposed side surface of the barrier metal may be further included before the step of forming the electrode . In this case, moisture is prevented from entering the barrier metal and the Al-containing ohmic electrode. As a result, the moisture resistance of the barrier metal is improved. Further, alteration of the Al-containing ohmic electrode is prevented.

Before the step of forming the electrode, it may further include a step of forming a protective film covering a part and the side of the upper surface of the barrier metal. In this case, swelling of the Al-containing ohmic electrode due to heat treatment can be prevented.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming an Al-containing ohmic electrode on a GaN-based semiconductor substrate, and a barrier metal made of Ti / Pt / Au metal covering the top and side surfaces of the Al-containing ohmic electrode. A step of forming, and a step of forming an electrode on the barrier metal .

  In another method for manufacturing a semiconductor device according to the present invention, a barrier metal made of a Ti / Pt / Au-based metal is formed so as to cover the Al-containing ohmic electrode. Thereby, swelling of the Al-containing ohmic electrode due to heat treatment can be prevented.

  According to the present invention, the reaction between Al in the Al-containing ohmic electrode and the electrode can be prevented. Thereby, characteristic degradation of the semiconductor device according to the present invention can be prevented. Further, even when the semiconductor device according to the present invention is subjected to a high temperature annealing treatment, the reaction between Al in the Al-containing ohmic electrode and the electrode can be prevented.

  Hereinafter, the best mode for carrying out the present invention will be described.

  FIG. 1 is a schematic cross-sectional view of a semiconductor device 100 according to the first embodiment. As shown in FIG. 1, the semiconductor device 100 includes a GaN-based semiconductor substrate 1, an Al-containing ohmic electrode 2, an insulating layer 4, a barrier metal layer 5, and an Au wiring electrode 7.

  The GaN-based semiconductor substrate 1 is made of a GaN-based semiconductor such as GaN or AlGaN. The Al-containing ohmic electrode 2 is made of Al / Pd / Ti metal or Al / Ta metal, and is formed on the upper surface of the GaN-based semiconductor substrate 1.

  The insulating layer 4 is made of an insulator such as SiN. The insulating layer 4 is formed on the GaN-based semiconductor substrate 1. The thickness of the insulating layer 4 is not particularly limited, but is about 400 nm in this embodiment. The barrier metal layer 5 is formed from the Al-containing ohmic electrode 2 to the insulating layer 4. The barrier metal layer 5 is made of any one of TiWN, WN, WSiN, or TaN. The film thickness of the barrier metal layer 5 is about 100 nm to 200 nm. The Au wiring electrode 7 is formed on the barrier metal layer 5. Since Au used for the Au wiring electrode 7 is a low-resistance metal, it is suitable for wiring, bonding pads, and the like.

  For example, Au / Mo or the like is used as a general ohmic electrode. However, when an ohmic electrode made of Au / Mo is used, the heat treatment temperature for obtaining an ohmic contact is as high as about 800 ° C. In this case, nitrogen loss or the like occurs in the GaN-based semiconductor substrate 1 used in this embodiment. If nitrogen loss occurs in the GaN-based semiconductor substrate 1, the composition in the vicinity of the top surface of the GaN-based semiconductor substrate 1 becomes a Ga-rich composition. Therefore, in the semiconductor device 100, characteristic degradation such as current collapse occurs. Therefore, in this embodiment, the Al-containing ohmic electrode 2 capable of heat treatment at a low temperature of about 500 ° C. to 600 ° C. is used.

  In the barrier metal layer 5, since N exists in the gaps between the metals constituting the barrier metal layer 5, Al intrusion into the barrier metal layer 5 is prevented. Therefore, in the semiconductor device 100 according to the present embodiment, the reaction between Al in the Al-containing ohmic electrode 2 and Au in the Au wiring electrode 7 can be prevented. Thereby, ohmic contact failure can be prevented. As a result, deterioration of the characteristics of the semiconductor device 100 can be prevented.

  When the semiconductor device 100 according to this example was allowed to stand for 1000 hours under a predetermined temperature condition (for example, 250 ° C.), no ohmic contact failure occurred. On the other hand, when Ti / Pt / Au metal was used as the barrier metal layer 5, an ohmic contact defect occurred only by leaving it in a high temperature atmosphere at 250 ° C. for 100 hours. From the above, the high reliability of the semiconductor device 100 according to the present example can be confirmed.

  Further, since TiWN is excellent in barrier properties even in a high temperature region, even if the semiconductor device 100 according to this example is subjected to high temperature annealing, Al in the Al-containing ohmic electrode 2 and Au in the Au wiring electrode 7 are used. Reaction with can be prevented. Further, since TiWN has no gaps for N to enter, the nitrogen removal of the GaN-based semiconductor substrate 1 can be prevented by high-temperature annealing. Note that when Ti is used as the barrier metal layer 5, nitrogen escape of the GaN-based semiconductor substrate 1 cannot be prevented. From the above, when the GaN-based semiconductor substrate 1 and the Al-containing ohmic electrode 2 are used, the barrier metal layer 5 made of TiWN or the like is necessary.

  Further, although the Au wiring electrode 7 is used as the wiring electrode in this embodiment, a Cu wiring electrode containing Cu as a main component can also be used. In this case, reaction between Al in the Al-containing ohmic electrode 2 and Cu in the Cu wiring electrode is prevented.

  FIG. 2 is a schematic cross-sectional view of a semiconductor device 100 a that is another example of the semiconductor device 100. As shown in FIG. 2, the semiconductor device 100 includes a GaN-based semiconductor substrate 1, an Al-containing ohmic electrode 2, adhesion layers 3 and 6, an insulating layer 4, a barrier metal layer 5, and an Au wiring electrode 7. The semiconductor device 100a is different from the semiconductor device 100 in that adhesion layers 3 and 6 are formed.

  The adhesion layers 3 and 6 are made of a Ti thin film. The adhesion layer 3 is formed so as to cover the Al-containing ohmic electrode 2. The adhesion layer 6 is formed on the barrier metal layer 5. The film thickness of the adhesion layers 3 and 6 is about 5 nm to 10 nm. The barrier metal 5 is formed on the adhesion layer 3, and the Au wiring electrode 7 is formed on the adhesion layer 6.

  In the semiconductor device 100a, since the adhesion layer 3 is formed between the Al-containing ohmic electrode 2 and the barrier metal layer 5, the adhesion between the Al-containing ohmic electrode 2 and the barrier metal layer 5 is improved. Furthermore, since the adhesion layer 6 is formed between the barrier metal layer 5 and the Au wiring electrode 7, the adhesion between the barrier metal layer 5 and the Au wiring electrode 7 is improved. Thereby, the adhesion between the Al-containing ohmic electrode 2 and the Au wiring electrode 7 is improved.

  FIG. 3 is a flowchart illustrating a method for manufacturing the semiconductor device 100a. First, as shown in FIG. 3A, the adhesion layer 3 is formed by sputtering so as to cover the Al-containing ohmic electrode 2 formed on the GaN-based semiconductor substrate 1. Next, as shown in FIG. 3B, the insulating layer 4 is formed on the GaN-based semiconductor substrate 1 and the adhesion layer 3 by plasma CVD. Next, as shown in FIG. 3C, a resist pattern 11 is formed on the insulating layer 4 except for the upper part of the Al-containing ohmic electrode 2. In this case, a resist is applied on the insulating layer 4, and the resist pattern 11 is formed by removing the resist above the Al-containing ohmic electrode 2 by a patterning process.

  Next, as shown in FIG. 3D, the insulating layer 4 is dry-etched to form the contact hole 12. The resist pattern 11 remaining on the insulating layer 4 is then peeled off. Next, as shown in FIG. 3E, the barrier metal layer 5, the adhesion layer 6 and the Au thin film 13 are formed from the adhesion layer 3 to the insulating layer 4 by sputtering.

  Next, as shown in FIG. 3 (f), a resist pattern 14 is formed on the Au thin film 13 excluding the upper part of the Al-containing ohmic electrode 2. In this case, a resist is applied on the Au thin film 13, and the resist pattern 14 is formed by removing the resist above the Al-containing ohmic electrode 2 by a patterning process. Next, as shown in FIG. 3G, the Au wiring electrode 7 is formed by performing Au plating on the Au thin film 13. Next, as shown in FIG. 3H, the remaining resist 14 is peeled off, the Au thin film 13 is milled, and the adhesion layer 6 and the barrier metal layer 5 are dry-etched. Thus, the semiconductor device 100a is completed.

  In this embodiment, since the barrier metal layer 5 is formed by sputtering, the thickness of the barrier metal layer 5 becomes uniform. Thereby, the reaction between Al in the Al-containing ohmic electrode 2 and Au in the Au wiring electrode 7 can be reliably prevented.

  The semiconductor device 100 can be manufactured by omitting the step of forming the adhesion layers 3 and 6.

  In this embodiment, the insulating layer 4 corresponds to a protective film, and the Au wiring electrode 7 corresponds to an electrode.

  FIG. 4 is a schematic cross-sectional view of the semiconductor device 101 according to the second embodiment. As shown in FIG. 4, the semiconductor device 101 includes a GaN-based semiconductor substrate 21, an Al-containing ohmic electrode 22, a barrier metal layer 24, an insulating layer 26, a moisture resistant layer 27, and an Au wiring electrode 29.

  The GaN-based semiconductor substrate 21 is made of a semiconductor such as GaN or AlGaN. The Al-containing ohmic electrode 22 is made of Al / Pd / Ti metal or Al / Ta metal, and is formed on the upper surface of the GaN-based semiconductor substrate 21.

  The barrier metal layer 24 is formed on the Al-containing ohmic electrode 22. The barrier metal layer 24 is made of any one of TiWN, WN, WSiN, or TaN. The film thickness of the barrier metal layer 24 is about 100 nm to 200 nm. The insulating layer 26 is made of an insulator such as SiN. The insulating layer 26 is formed on the GaN-based semiconductor substrate 21. The thickness of the insulating layer 26 is not particularly limited, but is about 400 nm in this embodiment.

  The moisture resistant layer 27 is formed from the barrier metal layer 24 to the insulating layer 26. The moisture resistant layer 27 is made of TiW. TiW has good moisture resistance and excellent adhesion to an insulator. This prevents moisture from entering the barrier metal layer 24 and the Al-containing ohmic electrode 22. As a result, the moisture resistance of the barrier metal layer 24 is improved. Further, alteration of the Al-containing ohmic electrode 22 is prevented. The film thickness of the moisture resistant layer 27 is about 50 nm to 100 nm. The Au wiring electrode 29 is formed on the moisture resistant layer 27.

  In the semiconductor device 101 according to the present embodiment, since the barrier metal layer 24 is formed between the Al-containing ohmic electrode 22 and the Au wiring electrode 29, the Al and Au wiring electrode 29 in the Al-containing ohmic electrode 22 is formed. Reaction with Au inside can be prevented. Thereby, ohmic contact failure can be prevented. As a result, deterioration of the characteristics of the semiconductor device 101 can be prevented. Further, since TiWN is excellent in barrier properties even in a high temperature region, even if the semiconductor device 101 according to the present embodiment is subjected to a high temperature annealing treatment, Al in the Al-containing ohmic electrode 22 and Au in the Au wiring electrode 29 Reaction with can be prevented.

  In addition, since the insulating layer 26 and the moisture resistant layer 27 are formed between the barrier metal layer 24 and the Au wiring electrode 29, moisture can be prevented from entering the barrier metal layer 24. This prevents the barrier property of the barrier metal layer 24 from being lowered. As a result, deterioration of the characteristics of the semiconductor device 101 can be prevented.

  Further, since the Al-containing ohmic electrode 22 is covered with the barrier metal layer 24, the swelling of the Al-containing ohmic electrode 22 due to heat treatment can be prevented.

  Furthermore, in this embodiment, the Au wiring electrode 29 is used as the wiring electrode, but a Cu wiring electrode containing Cu as a main component can also be used. In this case, reaction between Al in the Al-containing ohmic electrode 22 and Cu in the Cu wiring electrode is prevented.

  FIG. 5 is a schematic cross-sectional view of a semiconductor device 101 a which is another example of the semiconductor device 101. As shown in FIG. 5, the semiconductor device 101 a includes a GaN-based semiconductor substrate 21, an Al-containing ohmic electrode 22, adhesion layers 23, 25, 28, a barrier metal layer 24, an insulating layer 26, a moisture resistant layer 27, and an Au wiring electrode 29. Including. The semiconductor device 101a is different from the semiconductor device 101 in that adhesion layers 23, 25, and 28 are formed.

  The adhesion layers 23, 25, 28 are made of a Ti thin film. The adhesion layer 23 is formed so as to cover the Al-containing ohmic electrode 22. The adhesion layer 25 is formed on the barrier metal layer 24. The adhesion layer 28 is formed on the moisture resistant layer 27. The barrier metal layer 24 is formed on the adhesion layer 23. The moisture resistant layer 27 is formed from the adhesion layer 25 to the insulating layer 26. The Au wiring electrode 29 is formed on the adhesion layer 28.

  In the semiconductor device 101a, since the adhesion layer 23 is formed between the Al-containing ohmic electrode 22 and the barrier metal layer 24, the adhesion between the Al-containing ohmic electrode 22 and the barrier metal layer 24 is improved. Furthermore, since the adhesion layer 25 is formed between the barrier metal layer 24 and the moisture resistant layer 27, the adhesion between the barrier metal layer 24 and the moisture resistant layer 27 is improved. Further, since the adhesion layer 28 is formed between the moisture resistant layer 27 and the Au wiring electrode 29, the adhesion between the moisture resistant layer 27 and the Au wiring electrode 29 is improved. Thereby, the adhesion between the Al-containing ohmic electrode 22 and the Au wiring electrode 29 is improved.

  FIG. 6 is a flowchart illustrating a method for manufacturing the semiconductor device 101a. First, as shown in FIG. 6A, an adhesion layer 23, a barrier metal layer 24, and an adhesion layer 25 are formed by sputtering so as to cover the Al-containing ohmic electrode 22 formed on the upper surface of the GaN-based semiconductor substrate 21. . Next, as shown in FIG. 6B, a resist pattern 31 is formed on the adhesion layer 25 above the Al-containing ohmic electrode 22. In this case, a resist is applied on the adhesion layer 25, and the resist pattern 31 is formed by removing the resist other than above the Al-containing ohmic electrode 22 by a patterning process.

  Next, as shown in FIG. 6C, the adhesion layer 23, the barrier metal layer 24, and the adhesion layer 25 where the resist pattern 31 is not formed are removed by a dry etching process. The remaining resist pattern 31 is then peeled off. Next, as shown in FIG. 6D, an insulating layer 26 is formed so as to cover the GaN-based semiconductor substrate 21 and the adhesion layer 25 by plasma CVD. Next, as shown in FIG. 6E, a resist pattern 32 is formed on the insulating layer 26 except for the upper part of the Al-containing ohmic electrode 22. In this case, a resist is applied to the insulating layer 26, and the resist pattern 32 is formed by removing the resist above the Al-containing ohmic electrode 22 by a patterning process.

Next, as shown in FIG. 6F, the portion of the insulating layer 26 where the resist pattern 32 is not formed is dry-etched using CF ₄ gas + CHF ₃ gas to form the contact hole 33. . In this case, CF ₄ and CHF ₃ have a small etching selection ratio with respect to Ti and TiWN, so that the adhesion layer 25 and the barrier metal layer 24 are prevented from being etched. Note that SF ₆ gas + N ₂ gas or SF ₆ gas + CF ₄ gas may be used as the etching gas, and the etching gas may be switched to CF ₄ gas + CHF ₃ gas before the etching of the insulating layer 26 is completed. Thereby, the adhesion layer 25 and the barrier metal layer 24 can be prevented from being etched.

  Next, as shown in FIG. 6G, the moisture-resistant layer 27, the adhesion layer 28, and the Au thin film 34 are formed on the adhesion layer 25 and the insulating layer 26 by sputtering. Next, as shown in FIG. 6H, a resist pattern 35 is formed on the Au thin film 34 other than above the barrier metal layer 24. In this case, a resist is applied on the Au thin film 34, and the resist pattern 35 is formed by removing the resist above the barrier metal layer 24 by patterning.

  Next, as shown in FIG. 6 (i), an Au plating process is performed on the Au thin film 34 on which the resist 35 is not formed, and an Au wiring electrode 29 is formed. Next, as shown in FIG. 6 (j), the remaining resist pattern 35 is removed, the Au thin film 34 is milled, and the adhesion layer 28 and the moisture resistant layer 27 are dry etched. Thus, the semiconductor device 101a is completed.

  In this embodiment, since the barrier metal layer 24 and the moisture resistant layer 27 are formed by sputtering, the film thickness of the barrier metal layer 24 and the moisture resistant layer 27 becomes uniform. Accordingly, the reaction between Al in the Al-containing ohmic electrode 22 and Au in the Au wiring electrode 29 can be reliably prevented, and moisture can be reliably prevented from entering the barrier metal layer 24.

  Note that the Al-containing ohmic electrode 22 is prevented from being swollen by covering the Al-containing ohmic electrode 22 with the barrier metal layer 24 regardless of the type of barrier metal constituting the barrier metal layer 24. According to what the present inventors have confirmed, even when Ti / Pt / Au metal is used as the barrier metal layer 24, it is confirmed that the Al-containing ohmic electrode 22 does not swell. Further, the semiconductor device 101 can be manufactured by omitting the step of forming the adhesion layers 23, 25, and 28.

  In this embodiment, the insulating layer 26 corresponds to a protective film, and the Au wiring electrode 29 corresponds to an electrode.

  FIG. 7 is a schematic cross-sectional view of a semiconductor device 102 according to the third embodiment. As shown in FIG. 7, the semiconductor device 102 includes a GaN-based semiconductor substrate 41, an Al-containing ohmic electrode 42, an insulating layer 44, a barrier metal layer 45, a moisture resistant layer 46, and an Au wiring electrode 48.

  The Al-containing ohmic electrode 42 is made of Al / Pd / Ti metal or Al / Ta metal, and is formed on the upper surface of the GaN-based semiconductor substrate 41.

  The insulating layer 44 is made of an insulator such as SiN. The insulating layer 44 is formed on the GaN-based semiconductor substrate 41. The thickness of the insulating layer 44 is not particularly limited, but is about 400 nm in this embodiment. The barrier metal layer 45 is formed from the Al-containing ohmic electrode 42 to the insulating layer 44. The barrier metal layer 45 is made of TiWN, WN, WSiN, or TaN. The film thickness of 45 is about 100 nm to 200 nm.

  The moisture resistant layer 46 is formed so as to cover the barrier metal layer 45. The moisture resistant layer 46 is made of TiW. In this case, moisture is prevented from entering the barrier metal layer 45 and the Al-containing ohmic electrode 42. Thereby, the moisture resistance of the barrier metal layer 45 is improved. Further, alteration of the Al-containing ohmic electrode 42 is prevented. The film thickness of the moisture resistant layer 46 is about 50 nm to 100 nm. The Au wiring electrode 48 is formed on the moisture resistant layer 46.

  In the semiconductor device 102 according to this example, since the barrier metal layer 45 made of TiWN is formed between the Al-containing ohmic electrode 42 and the Au wiring electrode 48, Al and Au in the Al-containing ohmic electrode 42 are formed. Reaction with Au in the wiring electrode 48 can be prevented. Thereby, the occurrence of ohmic contact failure can be prevented. As a result, deterioration of the characteristics of the semiconductor device 102 can be prevented. Further, since TiWN is excellent in barrier properties even in a high temperature region, even if the semiconductor device 102 according to the present embodiment is subjected to a high temperature annealing treatment, Al in the Al-containing ohmic electrode 42 and Au in the Au wiring electrode 48 are used. Reaction with can be prevented.

  Further, since the barrier metal layer 45 is covered with the moisture-resistant layer 46 and the insulating layer 44, moisture can be prevented from entering the barrier metal layer 45. This prevents the barrier property of the barrier metal layer 45 from being lowered. As a result, deterioration of the characteristics of the semiconductor device 102 can be prevented.

  Furthermore, in this embodiment, the Au wiring electrode 48 is used as the wiring electrode, but a Cu wiring electrode containing Cu as a main component can also be used. In this case, reaction between Al in the Al-containing ohmic electrode 42 and Cu in the Cu wiring electrode is prevented.

  FIG. 8 is a schematic cross-sectional view of a semiconductor device 102 a which is another example of the semiconductor device 102. As shown in FIG. 8, the semiconductor device 102 a includes a GaN-based semiconductor substrate 41, an Al-containing ohmic electrode 42, adhesion layers 43 and 47, an insulating layer 44, a barrier metal layer 45, a moisture resistant layer 46, and an Au wiring electrode 48. The semiconductor device 102a is different from the semiconductor device 102 in that adhesion layers 43 and 47 are formed.

  The adhesion layers 43 and 47 are made of a Ti thin film. The adhesion layer 43 is formed so as to cover the Al-containing ohmic electrode 42. The adhesion layer 47 is formed so as to cover the moisture-resistant layer 46. The film thickness of the adhesion layers 43 and 47 is about 5 nm to 10 nm. The barrier metal layer 45 is formed from the adhesion layer 43 to the insulating layer 44. The Au wiring electrode 48 is formed on the adhesion layer 47.

  In the semiconductor device 102a, since the adhesion layer 43 is formed between the Al-containing ohmic electrode 42 and the barrier metal layer 45, the adhesion between the Al-containing ohmic electrode 42 and the barrier metal layer 45 is improved. Further, since the adhesion layer 47 is formed between the moisture resistant layer 46 and the Au wiring electrode 48, the adhesion between the moisture resistant layer 46 and the Au wiring electrode 48 is improved. Thereby, the adhesion between the Al-containing ohmic electrode 42 and the Au wiring electrode 48 is improved.

  FIG. 9 is a flowchart illustrating a method for manufacturing the semiconductor device 102a. First, as shown in FIG. 9A, an adhesion layer 43 is formed by sputtering so as to cover the Al-containing ohmic electrode 42 formed on the upper surface of the GaN-based semiconductor substrate 41. Next, as shown in FIG. 9B, an insulating layer 44 is formed so as to cover the GaN-based semiconductor substrate 41 and the adhesion layer 43 by plasma CVD. Next, as shown in FIG. 9C, a resist pattern 51 is formed on the insulating layer 44 except for the upper part of the Al-containing ohmic electrode 42. In this case, a resist is applied on the insulating layer 44, and the resist pattern 51 is formed by removing the resist above the Al-containing ohmic electrode 42 by a patterning process.

  Next, as shown in FIG. 9D, the contact hole 52 is formed by performing a dry etching process on the insulating layer 44. The resist pattern 51 remaining on the insulating layer 44 is then peeled off. Next, as shown in FIG. 9E, a barrier metal layer 45 is formed on the adhesion layer 43 and the insulating layer 44 by sputtering.

  Next, as shown in FIG. 9 (f), a resist pattern 53 is formed on the barrier metal layer 45 above the Al-containing ohmic electrode 42. In this case, a resist is applied on the barrier metal layer, and a resist pattern 53 is formed by removing the resist other than above the Al-containing ohmic electrode 42 by a patterning process.

  Next, as shown in FIG. 9G, dry etching is performed on the barrier metal layer 45 where the resist pattern 53 is not formed. The resist pattern 53 remaining on the barrier metal layer 45 is then peeled off. Next, as shown in FIG. 9H, a moisture-resistant layer 46, an adhesion layer 47, and an Au thin film 54 are formed so as to cover the barrier metal layer 45 by sputtering. Next, as shown in FIG. 9 (i), a resist pattern 55 is formed on the Au thin film 54 except for the upper part of the Al-containing ohmic electrode 42. In this case, a resist is applied onto the Au thin film 54, and the resist pattern 55 is formed by removing the resist above the Al-containing ohmic electrode 42 by a patterning process.

  Next, as shown in FIG. 9J, the Au wiring electrode 48 is formed by performing Au plating on the Au thin film 54. Next, as shown in FIG. 9 (k), the remaining resist 55 is peeled off, the Au thin film 54 is milled, and the adhesion layer 47 and the moisture resistant layer 45 are dry etched. Thus, the semiconductor device 102a is completed.

  In this embodiment, since the barrier metal layer 45 and the moisture resistant layer 46 are formed by sputtering, the film thickness of the barrier metal layer 45 and the moisture resistant layer 46 becomes uniform. Thereby, the reaction between Al in the Al-containing ohmic electrode 42 and Au in the Au wiring electrode 48 can be reliably prevented, and moisture can be reliably prevented from entering the barrier metal layer 45.

  Note that the semiconductor device 102 can be manufactured by omitting the step of forming the adhesion layers 43 and 46.

  In this embodiment, the insulating layer 44 corresponds to a protective film, and the Au wiring electrode 48 corresponds to an electrode.

  FIG. 10 is a schematic cross-sectional view of a semiconductor device 103 according to the fourth embodiment. As shown in FIG. 10, the semiconductor device 103 includes a GaN-based semiconductor substrate 61, an Al-containing ohmic electrode 62, an insulating layer 64, a barrier metal layer 65, an Au wiring electrode 67, and a moisture resistant layer 68. The fourth embodiment is a variation of the third embodiment, for example.

  The Al-containing ohmic electrode 62 is made of Al / Pd / Ti metal or Al / Ta metal, and is formed on the upper surface of the GaN-based semiconductor substrate 61.

  The insulating layer 64 is made of an insulator such as SiN. The insulating layer 64 is formed on the GaN-based semiconductor substrate 61. The thickness of the insulating layer 64 is not particularly limited, but is about 400 nm in this embodiment. The barrier metal layer 65 is formed from the Al-containing ohmic electrode 62 to the insulating layer 64. The barrier metal layer 65 is made of any one of TiWN, WN, WSiN, or TaN. The film thickness of the barrier metal layer 65 is about 100 nm to 200 nm.

  The moisture resistant layer 68 is made of TiW. In this case, moisture is prevented from entering the barrier metal layer 65 and the Al-containing ohmic electrode 62. Thereby, the moisture resistance of the barrier metal layer 65 is improved. Further, alteration of the Al-containing ohmic electrode 62 is prevented. The film thickness of the moisture resistant layer 68 is about 50 nm to 100 nm. The moisture resistant layer 68 is formed on the insulating layer 64 so as to surround the end portion of the barrier metal layer 65. The Au wiring electrode 67 is formed on the barrier metal layer 65 and the moisture resistant layer 68.

  In the semiconductor device 103 according to the present example, since the barrier metal layer 65 made of TiWN is formed between the Al-containing ohmic electrode 62 and the Au wiring electrode 67, the Al and Au in the Al-containing ohmic electrode 62 are formed. Reaction with Au in the wiring electrode 67 can be prevented. Thereby, the occurrence of ohmic contact failure can be prevented. As a result, characteristic deterioration of the semiconductor device 103 can be prevented. Further, since TiWN is excellent in barrier properties even in a high temperature region, even if the semiconductor device 103 according to the present embodiment is subjected to a high temperature annealing treatment, Al in the Al-containing ohmic electrode 62 and Au in the Au wiring electrode 67 Reaction with can be prevented.

  Further, since the barrier metal layer 65 is covered with the moisture-resistant layer 68, the insulating layer 64, and the Au wiring electrode 67, moisture can be prevented from entering the barrier metal layer 65. This prevents the barrier property of the barrier metal layer 65 from being lowered. As a result, characteristic deterioration of the semiconductor device 103 can be prevented.

  Furthermore, in this embodiment, the Au wiring electrode 67 is used as the wiring electrode, but a Cu wiring electrode containing Cu as a main component can also be used. In this case, reaction between Al in the Al-containing ohmic electrode 62 and Cu in the Cu wiring electrode is prevented.

  FIG. 11 is a schematic cross-sectional view of a semiconductor device 103 a which is another example of the semiconductor device 103. As shown in FIG. 11, the semiconductor device 103 a includes a GaN-based semiconductor substrate 61, an Al-containing ohmic electrode 62, adhesion layers 63 and 66, an insulating layer 64, a barrier metal layer 65, an Au wiring electrode 67, and a moisture resistant layer 68. The semiconductor device 103a is different from the semiconductor device 103 in that adhesion layers 63 and 66 are formed.

  The adhesion layers 63 and 66 are made of a Ti thin film. The adhesion layer 63 is formed so as to cover the Al-containing ohmic electrode 62. The adhesion layer 66 is formed on the barrier metal layer 65. The film thickness of the adhesion layers 63 and 66 is about 5 nm to 10 nm. The barrier metal layer 65 is formed from the adhesion layer 63 to the insulating layer 64. The Au wiring electrode 67 is formed on the adhesion layer 66 and the moisture resistant layer 68.

  In the semiconductor device 103a, since the adhesion layer 63 is formed between the Al-containing ohmic electrode 62 and the barrier metal layer 65, the adhesion between the Al-containing ohmic electrode 62 and the barrier metal layer 65 is improved. Furthermore, since the adhesion layer 66 is formed between the barrier metal layer 65 and the Au wiring electrode 67, the adhesion between the barrier metal layer 65 and the Au wiring electrode 67 is improved. Thereby, the adhesion between the Al-containing ohmic electrode 62 and the Au wiring electrode 67 is improved.

  FIG. 12 is a flowchart illustrating a method for manufacturing the semiconductor device 103a. First, as shown in FIG. 12A, an adhesion layer 63 is formed by sputtering so as to cover the Al-containing ohmic electrode 62 formed on the upper surface of the GaN-based semiconductor substrate 61. Next, as shown in FIG. 12B, an insulating layer 64 is formed so as to cover the GaN-based semiconductor substrate 61 and the adhesion layer 63 by plasma CVD. Next, as shown in FIG. 12C, a resist pattern 71 is formed on the insulating layer 64 excluding the upper part of the Al-containing ohmic electrode 62. In this case, a resist is applied on the insulating layer 64, and the resist pattern 71 is formed by removing the resist above the Al-containing ohmic electrode 62 by patterning.

  Next, as shown in FIG. 12D, a contact hole 72 is formed by subjecting the insulating layer 64 to dry etching. The resist pattern 71 remaining on the insulating layer 64 is then peeled off. Next, as shown in FIG. 12E, the barrier metal layer 65, the adhesion layer 66, and the Au thin film 73 are formed on the adhesion layer 63 and the insulating layer 64 by sputtering. Next, as shown in FIG. 12 (f), a resist pattern 74 is formed on the Au thin film 73 excluding the upper part of the Al-containing ohmic electrode 62. In this case, a resist is applied on the Au thin film 73, and the resist pattern 74 is formed by removing the resist above the Al-containing ohmic electrode 62 by a patterning process.

Next, as shown in FIG. 12G, an Au wiring electrode 67 is formed by performing Au plating on the Au thin film 73. Next, as shown in FIG. 12H, the remaining resist pattern 74 is peeled off, and the Au thin film 73 is subjected to a milling process. Next, as shown in FIG. 12H, an isotropic etching process is performed on the adhesion layer 66 and the barrier metal layer 65. In this case, an etching process using SF ₆ gas is performed under conditions of a low bias and a high pressure (for example, a pressure of 1 Pa to 3 Pa and a voltage of 1 V to 50 V). Thereby, the barrier metal layer 65 under the end of the Au wiring electrode 67 can be etched without damaging the insulating layer 64. Note that an etching process may be performed on the barrier metal layer 65 below the end of the Au wiring electrode 67 using hydrogen peroxide water.

Next, as shown in FIG. 12I, a moisture-resistant layer 68 is formed on the insulating layer 64 and the Au wiring electrode 67 by sputtering. Next, as shown in FIG. 12J, the moisture resistant layer 68 is subjected to anisotropic etching. In this case, the flow rate ratio of CHF ₃ gas + SF ₆ gas (for example, CHF ₃ gas and SF ₆ gas is 3: under conditions of low pressure and high bias (for example, pressure of 0.5 Pa and voltage of 100 V to 500 V): Etching is performed by about 1). This prevents the moisture resistant layer 68 below the end of the Au wiring electrode 67 from being etched. Through the above process, the semiconductor device 103a is completed.

  In this embodiment, since the barrier metal layer 65 and the moisture resistant layer 67 are formed by sputtering, the film thickness of the barrier metal layer 65 and the moisture resistant layer 67 becomes uniform. Accordingly, the reaction between Al in the Al-containing ohmic electrode 62 and Au in the Au wiring electrode 67 can be reliably prevented, and moisture can be reliably prevented from entering the barrier metal layer 65.

  Note that the semiconductor device 103 can be manufactured by omitting the step of forming the adhesion layers 63 and 66.

  In this embodiment, the insulating layer 64 corresponds to a protective film, and the Au wiring electrode 67 corresponds to an electrode.

  FIG. 13 is a schematic cross-sectional view of a semiconductor device 104 according to the fifth embodiment. As shown in FIG. 13, the semiconductor device 104 includes a GaN-based semiconductor substrate 81, an Al-containing ohmic electrode 82, an insulating layer 84, a barrier metal layer 85, Au wiring electrodes 87 and 89, and a moisture resistant layer 88.

  The Al-containing ohmic electrode 82 is made of Al / Pd / Ti metal or Al / Ta metal, and is formed on the upper surface of the GaN-based semiconductor substrate 81.

  The insulating layer 84 is made of an insulator such as SiN. The insulating layer 84 is formed on the GaN-based semiconductor substrate 81. The thickness of the insulating layer 84 is not particularly limited, but is about 400 nm in this embodiment. The barrier metal layer 85 is formed from the Al-containing ohmic electrode 82 to the insulating layer 84. The barrier metal layer 85 is made of any one of TiWN, WN, WSiN, or TaN. The film thickness of the barrier metal layer 85 is about 100 nm to 200 nm. The Au wiring electrode 87 is formed on the barrier metal layer 85.

  The moisture resistant layer 88 is formed from the Au wiring electrode 87 to the insulating layer 84. The moisture resistant layer 88 is made of TiW. In this case, moisture is prevented from entering the barrier metal layer 85 and the Al-containing ohmic electrode 82. Thereby, the moisture resistance of the barrier metal layer 85 is improved. Further, alteration of the Al-containing ohmic electrode 82 is prevented. The film thickness of the moisture resistant layer 88 is about 50 nm to 100 nm. The Au wiring electrode 89 is formed on the moisture resistant layer 88.

  In the semiconductor device 104 according to this example, since the barrier metal layer 85 made of TiWN is formed between the Al-containing ohmic electrode 82 and the Au wiring electrode 87, the Al and Au in the Al-containing ohmic electrode 82 are formed. Reaction with Au in the wiring electrode 87 can be prevented. Thereby, the occurrence of ohmic contact failure can be prevented. As a result, deterioration of the characteristics of the semiconductor device 104 can be prevented. Further, since TiWN is excellent in barrier properties even in a high temperature region, even if the semiconductor device 104 according to this example is subjected to high temperature annealing, Al in the Al-containing ohmic electrode 82 and Au in the Au wiring electrode 87 are used. Reaction with can be prevented.

  Further, since the barrier metal layer 85 is covered with the moisture-resistant layer 88, the insulating layer 84, and the Au wiring electrode 87, it is possible to prevent moisture from entering the barrier metal layer 85. This prevents the barrier property of the barrier metal layer 85 from being lowered. As a result, deterioration of the characteristics of the semiconductor device 104 can be prevented.

  Furthermore, although the Au wiring electrode 87 is used as the wiring electrode in this embodiment, a Cu wiring electrode containing Cu as a main component can also be used. In this case, reaction between Al in the Al-containing ohmic electrode 82 and Cu in the Cu wiring electrode is prevented.

  FIG. 14 is a schematic cross-sectional view of a semiconductor device 104 a which is another example of the semiconductor device 104. As shown in FIG. 14, the semiconductor device 104a includes a GaN-based semiconductor substrate 81, an Al-containing ohmic electrode 82, adhesion layers 83 and 86, an insulating layer 84, a barrier metal layer 85, Au wiring electrodes 87 and 89, and a moisture resistant layer 88. Including. The semiconductor device 104a is different from the semiconductor device 104 in that adhesion layers 83 and 86 are formed.

  The adhesion layers 83 and 86 are made of a Ti thin film. The adhesion layer 83 is formed so as to cover the Al-containing ohmic electrode 82. The adhesion layer 86 is formed on the barrier metal layer 85. The film thickness of the adhesion layers 83 and 86 is about 5 nm to 10 nm. The barrier metal layer 85 is formed from the adhesion layer 83 to the insulating layer 84. The Au wiring electrode 87 is formed on the adhesion layer 86.

  In the semiconductor device 104a, since the adhesion layer 83 is formed between the Al-containing ohmic electrode 82 and the barrier metal layer 85, the adhesion between the Al-containing ohmic electrode 82 and the barrier metal layer 85 is improved. Further, since the adhesion layer 86 is formed between the barrier metal layer 85 and the Au wiring electrode 87, the adhesion between the barrier metal layer 85 and the Au wiring electrode 87 is improved. Thereby, the adhesion between the Al-containing ohmic electrode 82 and the Au wiring electrode 87 is improved.

  FIG. 15 is a flowchart illustrating a method for manufacturing the semiconductor device 104a. First, as shown in FIG. 15A, an adhesion layer 83 is formed by sputtering so as to cover the Al-containing ohmic electrode 82. Next, as shown in FIG. 15B, an insulating layer 84 is formed so as to cover the GaN-based semiconductor substrate 81 and the adhesion layer 83 by plasma CVD. Next, as shown in FIG. 15C, a resist pattern 91 is formed on the insulating layer 84 except for the upper part of the Al-containing ohmic electrode 82. In this case, a resist is applied on the insulating layer 84, and the resist above the Al-containing ohmic electrode 82 is removed by patterning, whereby a resist pattern 91 is formed.

  Next, as shown in FIG. 15D, a contact hole 92 is formed by subjecting the insulating layer 84 to dry etching. The resist pattern 91 remaining on the insulating layer 84 is then peeled off. Next, as shown in FIG. 15E, the barrier metal layer 85, the adhesion layer 86, and the Au thin film 93 are formed on the adhesion layer 83 and the insulating layer 84 by sputtering.

  Next, as shown in FIG. 15 (f), a resist pattern 94 is formed on the Au thin film 93 excluding the upper part of the Al-containing ohmic electrode 82. In this case, a resist is applied on the Au thin film 93, and the resist above the Al-containing ohmic electrode 82 is removed by patterning, whereby a resist pattern 94 is formed. Next, as shown in FIG. 15G, an Au wiring electrode 87 is formed by performing Au plating on the Au thin film 93. Next, as shown in FIG. 15H, the remaining resist 94 is peeled off, the Au thin film 93 is milled, and the adhesion layer 86 and the barrier metal layer 85 are dry-etched. The

  Next, as shown in FIG. 15I, a moisture-resistant layer 88 and an Au thin film 95 are formed from the insulating layer 84 to the Au wiring electrode 87 by sputtering. Next, as shown in FIG. 15 (j), a resist pattern 96 is formed on the Au thin film 95 other than above the Al-containing ohmic electrode 82. In this case, a resist is applied on the Au thin film 95, and the resist above the Al-containing ohmic electrode 82 is removed by patterning, whereby a resist pattern 96 is formed. Thereafter, an Au plating process is performed on the Au thin film 95. Next, as shown in FIG. 15K, the resist pattern 96 is peeled off, the Au thin film 95 is milled, and the moisture-resistant layer 88 is dry-etched, whereby the semiconductor device 104a. Is completed.

  In this embodiment, since the barrier metal layer 85 and the moisture resistant layer 88 are formed by sputtering, the film thickness of the barrier metal layer 85 and the moisture resistant layer 88 becomes uniform. Thereby, the reaction between Al in the Al-containing ohmic electrode 82 and Au in the Au wiring electrode 87 can be reliably prevented, and moisture can be reliably prevented from entering the barrier metal layer 85.

  Note that the semiconductor device 104 can be manufactured by omitting the step of forming the adhesion layers 83 and 86.

  In this embodiment, the insulating layer 84 corresponds to a protective film, and the Au wiring electrode 87 corresponds to an electrode.

  FIG. 16 is a schematic cross-sectional view of a semiconductor module 200 according to the present invention. As shown in FIG. 16, the semiconductor module 200 includes a package 201, a semiconductor package substrate 202, a semiconductor device 101, and terminals 203. The semiconductor device 101 is surrounded by the semiconductor package substrate 202 and the package 201 and is disposed on the semiconductor package substrate 202. Input / output of the semiconductor device 101 is performed by a terminal 203.

  As described above, since the semiconductor device 101 is excellent in moisture resistance, the package 201 does not require airtightness. Thereby, the production cost of the high-speed module 200 is reduced. Further, for example, the semiconductor device 101 can be used by being mounted on the semiconductor package substrate 202 and then covered with a resin. Resin sealing is, for example, potting or molding. The resin used for resin sealing is, for example, epoxy, Teflon (registered trademark), or the like. Note that the semiconductor devices 102, 103, and 104 can be used instead of the semiconductor device 101.

1 is a schematic cross-sectional view of a semiconductor device according to a first embodiment. It is a typical sectional view of other examples of a semiconductor device. It is a flowchart explaining the manufacturing method of a semiconductor device. It is typical sectional drawing of the semiconductor device which concerns on 2nd Example. It is a typical sectional view of other examples of a semiconductor device. It is a flowchart explaining the manufacturing method of a semiconductor device. It is typical sectional drawing of the semiconductor device which concerns on 3rd Example. It is a typical sectional view of other examples of a semiconductor device. It is a flowchart explaining the manufacturing method of a semiconductor device. It is typical sectional drawing of the semiconductor device which concerns on 4th Example. It is a typical sectional view of other examples of a semiconductor device. It is a flowchart explaining the manufacturing method of a semiconductor device. It is typical sectional drawing of the semiconductor device which concerns on 5th Example. It is a typical sectional view of other examples of a semiconductor device. It is a flowchart explaining the manufacturing method of a semiconductor device. It is a typical sectional view of a semiconductor module concerning the present invention.

Explanation of symbols

1, 21, 41, 61, 81 GaN-based semiconductor substrate 2, 22, 42, 62, 82 Al-containing ohmic electrode 3, 6, 23, 28, 43, 47, 63, 66, 83, 86 Adhesion layer 4, 26 , 44, 64, 84 Insulating layer 5, 24, 45, 65, 85 Barrier metal layer 7, 29, 48, 67, 87, 89 Au wiring electrode 27, 46, 68, 88 Moisture resistant layer 100-104, 100a-104a Semiconductor device 200 Semiconductor module

Claims (12)

A GaN-based semiconductor substrate;
An Al-containing ohmic electrode provided on the GaN-based semiconductor substrate;
A barrier metal provided to cover the upper and side surfaces of the Al-containing ohmic electrode and made of any one of TiWN, TiN, WN, WSiN, and TaN;
And an electrode provided on the barrier metal.   The semiconductor device according to claim 1, wherein a protective film is provided to cover the exposed side surface of the barrier metal.   The semiconductor device according to claim 1, further comprising a protective film that covers an upper surface and a side surface of the barrier metal. A GaN-based semiconductor substrate, an Al-containing ohmic electrode provided on the GaN-based semiconductor substrate, and provided to cover an upper surface and side surfaces of the Al-containing ohmic electrode, and any one of TiWN, TiN, WN, WSiN, or TaN A semiconductor device comprising: a barrier metal comprising: a protective film covering the exposed side surface of the barrier metal ; and an electrode provided on the barrier metal ,
A semiconductor module, wherein the semiconductor device is resin-sealed. A GaN-based semiconductor substrate, an Al-containing ohmic electrode provided on the GaN-based semiconductor substrate, and provided to cover an upper surface and side surfaces of the Al-containing ohmic electrode, and any one of TiWN, TiN, WN, WSiN, or TaN A semiconductor device comprising: a barrier metal comprising: a protective film covering an upper surface and a side surface of the barrier metal ; and an electrode provided on the barrier metal ,
A semiconductor module, wherein the semiconductor device is resin-sealed.   6. The semiconductor module according to claim 4, wherein the resin sealing is potting or molding.   6. The semiconductor module according to claim 4, wherein the resin sealing is made of epoxy resin or Teflon (registered trademark) resin.   The semiconductor module according to claim 4, wherein a Ti layer is further provided between at least one of the Al-containing ohmic electrode and the barrier metal or between the barrier metal and the electrode. . Forming an Al-containing ohmic electrode on a GaN-based semiconductor substrate;
Forming a barrier metal made of any one of TiWN, TiN, WN, WSiN, or TaN so as to cover the upper surface and side surfaces of the Al-containing ohmic electrode;
And a step of forming an electrode on the barrier metal. The method for manufacturing a semiconductor device according to claim 9, further comprising a step of forming a protective film covering the exposed side surface of the barrier metal before the step of forming the electrode . The method for manufacturing a semiconductor device according to claim 9, further comprising a step of forming a protective film covering a part and a side surface of the upper surface of the barrier metal before the step of forming the electrode . Forming an Al-containing ohmic electrode on a GaN-based semiconductor substrate;
Forming a barrier metal made of Ti / Pt / Au metal that covers the upper and side surfaces of the Al-containing ohmic electrode;
And a step of forming an electrode on the barrier metal.

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