JP4597767B2 - Diversity receiver sampling clock control method and diversity receiver - Google Patents

Description

  The present invention relates to a sampling clock control method for a diversity receiver that receives and combines or selects signals from a plurality of antennas, and a diversity receiver.

  In recent years, in the field of wireless devices, the OFDM method has attracted attention as a modulation method that is strong against multipath fading and mobile transmission, and many applied studies are being promoted in countries such as Europe and Japan. Among them, the development trend and method of terrestrial digital broadcasting in the UHF band are described in 1998, Vol. 52, no. 11 (Non-Patent Document 1).

  When an OFDM modulated signal is received by a moving body such as an automobile, an OFDM signal scattered by a building or a building may reach the receiving antenna from various directions. In such an environment, fading occurs in which the level of the received signal varies depending on conditions such as the direction, amplitude, and phase of the incoming wave. When the received electric field becomes small due to fading, C / N degradation occurs, which may cause a transmission error.

  For this reason, space diversity that reduces transmission errors by arranging a plurality of antennas at spatially separated positions and combining or selecting received signals is used.

  FIG. 2 is a block diagram showing a configuration of a diversity receiver according to the prior art. Signals received by the plurality of antennas 21 to 24 are sampled by A / D (analog / digital converters) 25 to 28, respectively, and reception sample sequences are generated.

  The sampling clocks of A / D 25 to 28 are supplied from a VCO (voltage controlled oscillator) 29 as a common sampling clock.

  When sampling is performed at the A / D 25 to 28, a clock regeneration process for automatically controlling the sampling clock of the A / D 25 to 28 to synchronize with the clock on the transmission side is necessary in order to perform accurate demodulation processing.

  For this reason, the clock recovery unit 2a variably controls the frequency or phase of the sampling clock of the VCO 29 based on the reception sample result of a fixed branch set in advance, for example, the output signal of the A / D 25, and synchronizes with the clock frequency on the transmission side. I am letting.

Various methods are conceivable as the clock recovery processing. For example, the autocorrelation operation between the received sample value signal and the signal obtained by delaying the received sample value signal by the effective symbol length is performed, and the peak position of the obtained correlation result is calculated. By using a so-called guard correlation method that calculates the phase error with respect to the symbol or frame position of the receiver and controls the sampling clock of the VCO 29 so that the phase error becomes zero, it is possible to follow the clock of the transmitter. it can. (Patent Document 1)
As another method, there is a so-called cross-correlation method for performing a cross-correlation operation between a synchronization symbol signal and a received signal when a synchronization symbol is inserted.

  The reception signals of the respective branches sampled by the clock described above are input to the FFTs 2b to 2e, and are converted from time axis signals to frequency axis signals. The output signals of FFTs 2b to 2e are input to diversity combining section 2f and combined based on the received signal quality of each branch.

  In particular, with respect to the OFDM system space diversity system, the Technical Report of the Institute of Image Information and Television Engineers 1999 Vol. 23, no. 35 (Non-Patent Document 2).

  The result of the diversity combining is demodulated by the demodulator 2g, and after error correction is performed by the error corrector 2h, an information code is output.

JP-A-7-99486 Journal of the Institute of Image Information and Television Engineers 1998 Vol. 52, no. 11 ITE Technical Report 1999 Vol. 23, no. 35

  Conventionally, in a diversity receiver, a method of performing clock recovery processing based on a preset fixed branch among a plurality of received branch signals has been used as the clock recovery processing.

  In mobile reception, the received signal quality for each branch is often different due to fading and C / N degradation. However, when the branch for clock recovery is fixed, if the received signal quality of the set branch decreases, the received signal quality of the correlation calculation result described above decreases and C / N deteriorates. An error may be included in the phase difference.

  This error may cause deterioration of the recovered clock result such as jitter and phase error. In such a case, even if a branch with good received signal quality arrives, inter-symbol interference and inter-carrier interference occur due to the deterioration of the clock quality, and the bit error rate in the diversity receiver as a whole also increases. End up. Furthermore, in some cases, the received signal quality of the set branch is extremely deteriorated, and even synchronization may not be established.

  An object of the present invention is to provide a sampling clock control method for a diversity receiver and a diversity receiver capable of performing stable clock recovery with little jitter and phase error even if the received signal quality is deteriorated.

  According to the sampling clock control method of the diversity receiver of the present invention, in the diversity receiver that combines or selects the reception signals received by the plurality of antennas, the reception signals received by the plurality of antennas are converted into the reception signal quality of each branch. The sampling is performed at a ratio based on the result, and the sampling clock of the diversity receiver is controlled based on the result of the combination.

  Also, the sampling clock control method of the diversity receiver according to the present invention provides a diversity receiver that combines or selects received signals received from a plurality of antennas, and receives the received signals received by the plurality of antennas and the received signals as effective symbols. Based on the received signal quality of each branch, either the signal of the autocorrelation calculation result with the long-delayed signal or the signal of the cross correlation calculation result of the received signal and the predetermined synchronization symbol signal The combining is performed at a ratio, and the sampling clock of the diversity receiver is controlled based on the combination result.

  Further, the sampling clock control method of the diversity receiver of the present invention is a diversity receiver for combining or selecting received signals received from a plurality of antenna signals, and a reference timing generated by a reproduction clock of the diversity receiver, Combining the phase difference with the specific timing calculated from the received sample sequence of the branch at a ratio based on the received signal quality of each branch, and controlling the sampling clock of the diversity receiver based on the combined result Features.

  Also, the diversity receiver sampling clock control method of the present invention is a diversity receiver that combines or selects received signals from a plurality of antenna signals, performs independent sampling clock recovery processing in each branch, and performs each sampling. The clocks are combined at a ratio based on the reception signal quality of each branch, and the sampling clock of the diversity receiver is controlled based on the combination result.

  The diversity receiver sampling clock control method according to the present invention also performs independent sampling clock recovery processing in each branch in a diversity receiver that combines or selects received signals received from a plurality of antennas. The phase difference between the timing generated from each sampling clock and the reference timing generated by the reproduction clock of the diversity receiver that is different from the sampling clock of each branch is expressed as a ratio based on the received signal quality of each branch. And combining and controlling a sampling clock of the diversity receiver based on the result of the combination.

  The received signal quality in the sampling clock control method of the diversity receiver according to the present invention is based on any one of a carrier level, a noise level, a square of the noise level, or C / N.

  Also, the diversity receiver of the present invention is a diversity receiver that combines or selects received signals received by a plurality of antennas, and receives the received signals received by the plurality of antennas at a ratio based on the received signal quality of each branch. And a clock recovery unit that controls a sampling clock of the diversity receiver based on a result of the synthesis.

  Also, the diversity receiver of the present invention is a diversity receiver that combines or selects received signals received from a plurality of antenna signals, and a signal obtained by delaying an effective symbol length of the received signals received by the plurality of antennas. Or a signal of an autocorrelation calculation result signal or a signal of a cross-correlation calculation result signal of the received signal and a predetermined synchronization symbol signal at a ratio based on the reception signal quality of each branch, A clock recovery unit for controlling a sampling clock of the diversity receiver based on the synthesis result is provided.

  Also, the diversity receiver of the present invention is a diversity receiver that combines or selects received signals received from a plurality of antenna signals, a reference timing generated by a reproduction clock of the diversity receiver, and a received sample sequence of each branch A clock regeneration unit that synthesizes the phase difference from the specific timing calculated from the ratio at a ratio based on the received signal quality of each branch and controls the sampling clock of the diversity receiver based on the synthesis result. It is characterized by.

  Also, the diversity receiver of the present invention is a diversity receiver that combines or selects received signals received from a plurality of antenna signals, performs independent sampling clock regeneration processing in each branch, and converts each sampling clock to each A clock recovery unit is provided that combines at a ratio based on the received signal quality of the branch and controls the sampling clock of the diversity receiver based on the result of the combining.

  Also, the diversity receiver of the present invention is a diversity receiver that combines or selects received signals received from a plurality of antenna signals, performs independent sampling clock reproduction processing in each branch, and uses the sampling clock for each branch. The phase difference between the generated timing and the reference timing generated by the reproduction clock of the diversity receiver different from the sampling clock of each branch is synthesized at a ratio based on the received signal quality of each branch, and the synthesis A clock recovery unit for controlling a sampling clock of the diversity receiver based on the result is provided.

  The received signal quality in the diversity receiver according to the present invention is based on any one of a carrier level, a noise level, a square of the noise level, or C / N.

  According to the present invention, it is possible to obtain a diversity receiver sampling clock control method and diversity receiver capable of performing stable clock recovery with little jitter and phase error even if the received signal quality is degraded.

  FIG. 1 is a block diagram showing the configuration of a first embodiment of a diversity receiver having a sampling clock control method according to the present invention, which will be described below. The configuration of FIG. 1 is a configuration in which the clock recovery unit 2a is replaced with a diversity clock recovery unit 11 in the configuration according to the prior art shown in FIG. 2, and other configurations and functions are the same as those of the prior art. Since it has, description is abbreviate | omitted.

  Received sample value signals from A / D 25 to 28 are input to diversity clock reproducing unit 11. Diversity clock recovery unit 11 outputs a control signal for variably controlling VCO 29 based on the received sample value signal of each branch.

  FIG. 3 is a block diagram showing the configuration of the diversity clock reproducing unit 11 of the first embodiment of the present invention, which will be described in detail below. The received sample value signals of A / D 25 to 28 are input to the multipliers 32 to 35 of the respective branches and also input to the synthesis ratio calculation unit 31. The synthesis ratio calculation unit 31 calculates a synthesis ratio to be supplied to each of the multipliers 32 to 35, and the multipliers 32 to 35 of the respective branches multiply the received sample value signal and the synthesis ratio to perform multiplication. The result is input to the synthesis unit 36.

  The combination ratio calculation unit 31 calculates a combination ratio based on the reception signal quality of each branch, and supplies it to the multipliers 32 to 35 of each branch.

  Here, the reception quality refers to, for example, the C / N of the received signal, the carrier level, the noise level, the jamming wave level, the amount of fluctuation of the received signal, the amount of distortion, or the degradation components thereof into equivalent C / N. Based on the values obtained.

  FIG. 11 is a diagram illustrating a configuration example of the combination ratio calculation unit 31 according to the present invention. Hereinafter, an example in which the combination ratio is calculated based on the reception signal quality described above will be described.

  In the synthesis ratio calculation unit 31, the received sample value signals of the respective branches from the A / Ds 25 to 28 are input to the noise level calculation units 111 to 114, respectively, and are also input to the carrier level calculation units 115 to 118, respectively. . Further, the output signals of the noise level calculation units 111 to 114 are also input to the carrier level calculation units 115 to 118, respectively.

  First, the noise level calculation units 111 to 114 calculate the noise level (N) mixed in the received sample value signal.

  12 and 13 show specific examples of the noise level calculation method.

  FIG. 12 is a diagram illustrating an example of noise detection using a guard interval of an OFDM signal. To calculate the noise level, the difference between the received sample value signal and the signal obtained by delaying the received sample value signal by the effective symbol length is converted into an absolute value, and the residual component amount existing within the guard interval period is calculated as the noise level (N). To do. However, when multipath is mixed, a component due to multipath is generated in the first half of the guard interval period. Therefore, the period indicated by the noise level detection effective period in the figure is effective for the period of noise detection. .

  FIG. 13 is a diagram illustrating an example of noise detection using a special symbol such as a synchronization symbol. There is a case where a non-signal called a null symbol is transmitted as one of the synchronization symbols. In such a case, the noise level (N) can be detected by measuring the reception level in the null symbol.

  Next, in the carrier level calculation unit noises 115 to 118, first, the received power is measured by calculating the mean value of the mean square of the received sample value signal. Since the received power is composed of a superposition of the carrier power and the noise power, the carrier power is calculated by subtracting the square of the noise level calculated by the noise level calculation units 111 to 114 from the measured received power. The square root is the carrier level (C).

  The noise level (N) calculated by the noise level calculation units 111 to 114 and the carrier level (C) calculated by the carrier level calculation unit noises 115 to 118 are input to the calculation unit 119. The calculation unit 119 calculates, for example, C / N (carrier level to noise level ratio), a combination level (w) based on the carrier level (C), and the noise level (N).

  As a specific calculation method of the combination ratio (w), as a combination ratio based on the carrier level (C), a combination ratio proportional to the carrier level as shown in Expression (1), or as shown in Expression (2) A composition ratio that normalizes them can be considered.

  Further, as a synthesis ratio based on the noise level (N), a synthesis ratio that is inversely proportional to the noise level or the square of the noise level (N2) as shown in the expressions (3) and (3 ′), the expressions (4), and (4) As shown in (4 ′), a composition ratio for normalizing them can also be considered.

  Further, as the synthesis ratio based on C / N of each branch, the synthesis ratio that maximizes the C / N after synthesis is proportional to the carrier level (C) as shown in Equation (5), and the noise level A method of calculating a composite ratio inversely proportional to the square (N2) is also conceivable.

  Moreover, Formula (6) etc. can also be considered as a synthetic | combination ratio which normalized Formula (5).

  The multiplication result of the combination ratio described above and the received sample value signal is added and combined by the combining unit 36.

  FIG. 4 is a diagram for explaining the processing operation of the diversity clock recovery unit 11 according to the first embodiment of the present invention, which will be described below. Waveforms 41 to 44 shown in FIG. 4 indicate reception sample value waveforms of the respective branches. The OFDM reception signal is actually a waveform similar to Gaussian noise, but in FIG. 4, the waveform is schematically represented by a sine wave. These signals are respectively multiplied by multipliers 32 to 35 based on the synthesis ratio (w1 to w4) from the synthesis ratio calculation unit 31, and synthesized by the synthesis unit 35 at the synthesis ratio of, for example, equation (6). A waveform 45 is shown in FIG.

  In this way, by performing the synthesis at the synthesis ratio of the above formula (6) based on the received sample value signal quality of each branch, even if the reception quality of a certain branch is extremely deteriorated (for example, the waveform in FIG. 4). 44) Since the synthesis ratio of the branch is lowered and the synthesis ratio of the branch (for example, the waveform 43 in FIG. 4) with little deterioration in reception quality is increased, the stable signal is always obtained as shown in the waveform 45. Quality can be.

  A signal whose signal quality is improved by these processes is output from the synthesizing unit 36 and input to the clock reproducing unit 2a. The clock recovery unit 2a has the clock recovery function described above, and outputs a control signal for variably controlling the sampling clock of the VCO 29.

  As described above, in the first embodiment of the present invention, the received sample value signal from each branch is synthesized at a synthesis ratio based on the received sample value signal quality of each branch, thereby improving the signal quality after synthesis. By controlling the sampling clock of the VCO based on the synthesized signal, a clock with less jitter and phase error can be reproduced.

  FIG. 5 is a block diagram showing the configuration of the diversity clock recovery unit 11 of the second embodiment of the present invention, which will be described below. FIG. 5 shows the configuration of the diversity clock recovery unit 11 according to the first embodiment. Correlation calculation units 51 to 54 are respectively provided between the input sides of the respective branches, that is, between the A / Ds 25 to 28 and the multipliers 32 to 35 in FIG. This is an added configuration.

  In the correlation calculation units 51 to 54, the autocorrelation calculation between the reception sample value signal and the signal obtained by delaying the reception sample value signal by the effective symbol length as described in the background section above, and a synchronization symbol are inserted. If so, correlation calculation between the synchronization symbol signal and the received signal is performed.

  FIG. 6 is a diagram for explaining the processing of the diversity clock recovery unit 11 according to the second embodiment of the present invention, which will be described below. Waveforms 61 to 64 are shown when the correlation calculation unit 51-54 of each branch performs correlation calculation of the guard interval of the OFDM signal on signals having different C / N. Similar to the first embodiment, these correlation results are multiplied by multipliers 32 to 35 based on the synthesis ratio (w1 to w4) from the synthesis ratio calculation unit 31, and synthesized by the synthesis unit 35. Similarly to the case shown in FIG. 4, a waveform obtained as a result of synthesis at the synthesis ratio of Expression (6) is shown at 65.

  Thus, even if the signal to be combined is a correlation calculation result, it is possible to improve the received signal quality as in the first embodiment.

  The output signal from the synthesizer 36 is input to the clock regenerator 2a. Since the correlation calculation has already been completed, the clock recovery unit 2a has a function in which the correlation calculation function is omitted from the clock recovery function described above, and outputs a control signal for variably controlling the VCO 29.

  FIG. 7 is a block diagram showing the configuration of the diversity clock reproducing unit 11 of the third embodiment of the present invention and the VCO 29 of FIG. 1, which will be described below. FIG. 7 shows the configuration of the diversity clock recovery unit 11 according to the second embodiment, in which phase difference detection units 71 to 74 are added between the correlation calculation units 51 to 54 and the multipliers 32 to 35 of the respective branches. In this configuration, a reference timing generation unit 75 is added between the output of the VCO 29 of FIG. 1 and each of the phase difference detection units 71 to 74.

  FIG. 8 is a diagram for explaining the processing operation of the diversity clock recovery unit 11 and the VCO 29 according to the third embodiment of the present invention, which will be described below.

  7 receives a clock signal from the VCO 29 and generates a reference timing signal 80 (FIG. 8) indicating a symbol period based on the clock signal.

  The phase difference detection units 71 to 74 receive the reference timing signal 80 (FIG. 8) generated by the reference timing generation unit 75 and the correlation calculation results from the correlation calculation units 51 to 54 of the respective branches in FIG. Timing signals 81 to 84 (FIG. 8) indicating a specific position of the signal (for example, symbol timing calculated from the peak position of the guard correlation) are input, and the phase differences θ1 to θ4 are used as the phase differences of the respective branches. It calculates in the detection parts 71-74.

  The synthesizer 36 performs the synthesis shown in Expression (7).

  In equation (7), since the received signal quality of the branch in which the received signal quality is deteriorated, the received signal quality of the correlation calculation result is also deteriorated, so that the timing signal calculated from the correlation calculation result also varies.

  When the VCO 29 is controlled based on such a phase difference signal having a large variation, jitter is generated in the clock to be reproduced due to the variation in the phase difference. Conversely, branches with good received signal quality are less likely to vary in timing signals.

  Therefore, in order to suppress the variation in the phase difference θ after the synthesis according to the equation (7), the synthesis ratio w of the branch with deteriorated reception signal quality is set to a small value, and the synthesis ratio w of the branch with good reception signal quality is set. A large value may be set.

  This synthesis ratio may be the synthesis ratio shown in the above-mentioned formulas (1) to (6), but the reciprocal of the dispersion value of the phase difference shown in formula (8) or the standard of the phase difference shown in formula (9). It may be the reciprocal of the deviation value.

  FIG. 9 is a block diagram showing the configuration of the diversity clock reproducing unit 11 according to the fourth embodiment of the present invention, which will be described below. FIG. 9 shows the configuration of the diversity clock recovery unit 11 according to the first embodiment. The clock recovery units 91 to 94 are connected to the input side of each branch, that is, between the A / Ds 25 to 28 and the multipliers 32 to 35 in FIG. This is a configuration in which a series connection of VCOs 95 to 98 is added.

  The clock recovery units 91 to 94 and the VCOs 95 to 98 have the same functions as those of the clock recovery unit 2a and the VCO 29 described above (details are described in the description of the configuration of FIG. 2). Therefore, the code is reallocated. Other configurations and functions are the same as those shown in FIG.

  As described in the third embodiment, when clock recovery is performed based on a received sample value signal whose reception signal quality has deteriorated, jitter due to deterioration of the reception signal quality may occur.

  In the fourth embodiment, independent sampling clock recovery processing is performed in each branch by the clock recovery units 91 to 94 and the VCOs 95 to 98, and each sampling clock is calculated by the synthesis ratio calculation unit 31. The synthesis unit 36 synthesizes with the synthesis ratio (w1 to w4) based on the received sample value signal quality in the branch, thereby reducing the jitter of the regenerated clock after synthesis. The synthesizing unit 36 synthesizes the clocks of the VCOs 95 to 98 in analog form.

  FIG. 10 is a block diagram showing the configuration of the diversity clock recovery unit 11 and the VCO 29 of FIG. 1 according to the fifth embodiment of the present invention, which will be described below. FIG. 10 shows the configuration of the diversity clock recovery unit 11 according to the fourth embodiment, in which phase difference detection units 71 to 74 are added between the VCOs 95 to 98 and the multipliers 32 to 35, and the output of the VCO 29 in FIG. The reference timing generator 75 is added between the phase difference detectors 71 to 74. The phase difference detectors 71 to 74 and the reference timing generator 75 also have functions equivalent to the functions described above. Other configurations and functions are the same as those shown in FIG.

  In the fifth embodiment, similar to the fourth embodiment, the clock recovery units 91 to 94 and the VCOs 95 to 98 perform independent sampling clock recovery processing in each branch, and the blank timing signal generated from each sampling clock and The phase difference with the reference timing signal generated by the reference timing generation unit 75 from the reproduction clock of the VCO 29 different from each branch is calculated by the phase difference detection units 71 to 74 of the respective branches.

  The calculated phase difference is converted into a combining ratio (formula (7)) based on the received sample value signal quality in each branch as described in the second embodiment by the multipliers 32 to 35 and the combining unit 36 in the subsequent stage. ) To formula (9)). The phase difference synthesized by the synthesizing unit 36 is reproduced again by the clock reproducing unit 2a and the VCO 101. The reference timing generation unit 75 generates a reference timing signal based on the reproduction clock and supplies the reference timing signal to each of the phase difference detection units 71 to 74.

  In the fifth embodiment, by calculating the phase difference based on the clocks of the clock recovery units 91 to 94, the amount of jitter generated in each clock is converted into the degree of variation in phase difference. With the above processing, even if there is a clock with a lot of jitter due to signal quality deterioration, the synthesized clock jitter can be reduced.

  Further, in the fourth and fifth embodiments, the sampling clock of each branch may be the clock of VCO 95 to 98, but a stable clock after synthesis may be used as the sampling clock.

  As described above, according to the first to fifth embodiments of the present invention, even if there is a branch in which the received signal quality is deteriorated, the combination ratio based on the received signal quality of each branch is present. And by controlling the sampling clock of the received signal based on the result of synthesis, stable clock reproduction with little jitter and phase error can be performed.

  The reception signals of the respective branches sampled by the clock described above are input to the FFTs 2b to 2e in FIG. 1 and converted from time axis signals to frequency axis signals. The output signals of FFTs 2b to 2e are input to diversity combining section 2f, and are combined or selected at a ratio based on the received signal quality of each branch independently for each carrier to improve the received signal quality. Furthermore, a constellation with equal amplitude and phase can be obtained by using a complex conjugate signal at the carrier signal level as the synthesis ratio and performing normalization with the square sum of the synthesis ratio of each branch after synthesis.

  The result of diversity combining by the diversity combining unit 2f is input to the demodulating unit 2g, and is identified by a threshold value for identifying the combined constellation, and demodulated. The demodulated result is corrected by the error correction unit 2h, and then an information code is output.

  As a result, it is possible to obtain a sampling clock control method and diversity receiver for a diversity receiver that can perform stable clock reproduction with little jitter and phase error even if the received signal quality is reduced.

It is a block diagram which shows the structure of the 1st Example of the diversity receiver which has the sampling clock control method by this invention. It is a block diagram which shows the structure of the diversity receiver by a prior art. It is a block diagram which shows the structure of the diversity clock reproducing part of 1st Example of this invention. It is a figure explaining the processing operation of the diversity clock reproducing part of 1st Example of this invention. It is a block diagram which shows the structure of the diversity clock reproducing part of 2nd Example of this invention. It is a figure explaining the processing operation of the diversity clock reproducing part of 2nd Example of this invention. It is a block diagram which shows the structure of the diversity clock reproduction | regeneration part of 3rd Example of this invention, and VCO of FIG. It is a figure explaining the diversity clock reproduction | regeneration part of 3rd Example of this invention, and processing operation of VCO. It is a block diagram which shows the structure of the diversity clock reproduction | regeneration part of 4th Example of this invention. It is a block diagram which shows the structure of the diversity clock reproduction | regeneration part of 5th Example of this invention, and VCO of FIG. It is a figure which shows the structural example of the synthetic | combination ratio calculation part of this invention. It is a figure which shows an example of the noise detection using the guard interval of an OFDM signal. It is a figure which shows an example of the noise detection using special symbols, such as a synchronization symbol.

Explanation of symbols

11: Diversity clock reproducing unit, 21-24: Antenna, 25-28: A / D, 29: VCO, 2a: Clock reproducing unit, 2b-2e: FFT, 2f: Diversity combining unit, 2g: Demodulating unit, 2h: Error correction unit, 31: synthesis ratio calculation unit, 32-35: multiplier, 36: synthesis unit, 51-54: correlation calculation unit, 71-74: phase difference detection unit, 75: reference timing generation unit, 91-94 : Clock reproduction unit, 95 to 98: VCO, 111 to 114: noise level calculation unit, 115 to 118: carrier level calculation unit, 119: calculation unit.

Claims (12)

In diversity receiver for combining or selecting the reception signal of the OFDM scheme received by the plurality of antennas, a reception signal received by the plurality of antennas, synthesized in a ratio based on the received signal quality of each branch, and the combined Based on the result, a sampling clock commonly used for the A / D converters of the respective branches is controlled ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included in the sampling clock control method for a diversity receiver, In a diversity receiver that synthesizes or selects received signals of an OFDM system that has received signals of a plurality of antennas, an autocorrelation calculation result between the received signals received by the plurality of antennas and a signal obtained by delaying the received signals by an effective symbol length Or a signal obtained as a result of cross-correlation between the received signal and a predetermined synchronization symbol signal at a ratio based on the received signal quality of each branch, and based on the synthesized result Controlling a sampling clock commonly used for the A / D converters of the respective branches ;
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included in the sampling clock control method for a diversity receiver, In a diversity receiver that synthesizes or selects received signals of an OFDM system that has received signals from a plurality of antennas, a specific timing calculated from a reference timing generated by a reproduction clock of the diversity receiver and a received sample sequence of each branch And a sampling clock commonly used for the A / D converters of the respective branches based on the synthesis result ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included in the sampling clock control method for a diversity receiver, Diversity receivers that combine or select received OFDM signals that have received signals from multiple antennas perform independent sampling clock recovery processing in each branch, and convert each sampling clock to the received signal quality of each branch. Combining based on the ratio, and controlling the sampling clock of the diversity receiver based on the combination result ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included in the sampling clock control method for a diversity receiver, In a diversity receiver that combines or selects received signals of the OFDM system that received signals from multiple antennas, independent sampling clock recovery processing is performed in each branch, and the timing generated from the sampling clock for each branch, and The phase difference from the reference timing generated by the reproduction clock of the diversity receiver different from the sampling clock of the branch is synthesized at a ratio based on the received signal quality of each branch, and the diversity is based on the synthesis result. Control the sampling clock of the receiver ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included in the sampling clock control method for a diversity receiver, The ratio based on the received signal quality is proportional to the carrier level of the received signal in each branch, and uses either a ratio inversely proportional to the square of the noise level or a ratio obtained by normalizing it. The sampling clock control method of the diversity receiver according to claim 1, 2, or 4 . In a diversity receiver that combines or selects received signals of the OFDM method received by a plurality of antennas, the received signals received by the plurality of antennas are combined at a ratio based on the received signal quality of each branch and combined. A clock recovery unit for controlling a sampling clock commonly used for the A / D converters of the respective branches based on the results ;
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included is used as a diversity receiver. In a diversity receiver that synthesizes or selects received signals of an OFDM system that has received signals from a plurality of antennas, an autocorrelation operation between the received signals received by the plurality of antennas and a signal obtained by delaying the received signals by an effective symbol length Either a result signal or a signal of a cross-correlation calculation result signal between the received signal and a predetermined synchronization symbol signal is synthesized at a ratio based on the received signal quality of each branch, and based on the synthesized result A clock regenerator for controlling a sampling clock commonly used for the A / D converters of the respective branches ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included is used as a diversity receiver. In a diversity receiver that synthesizes or selects received signals of an OFDM system that has received signals from a plurality of antennas, a specific timing calculated from a reference timing generated by a reproduction clock of the diversity receiver and a received sample sequence of each branch And the phase difference between each of the branches at a ratio based on the received signal quality of each branch, and based on the result of the synthesis, a clock recovery unit that controls a sampling clock commonly used for the A / D converters of the respective branches With
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included is used as a diversity receiver. In diversity receiver for combining or selecting the reception signal of the OFDM scheme which has received the signal from the plurality of antennas, performs independent sampling clock recovery process at each branch, each of the sampling clock, the received signal quality of each branch And a clock recovery unit that controls the sampling clock of the diversity receiver based on the result of the synthesis ,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included is used as a diversity receiver. In a diversity receiver that combines or selects received signals of the OFDM system that received signals from multiple antennas, independent sampling clock recovery processing is performed in each branch, and the timing generated from the sampling clock for each branch, and The phase difference from the reference timing generated by the reproduction clock of the diversity receiver different from the sampling clock of the branch is synthesized at a ratio based on the received signal quality of each branch, and the diversity is based on the synthesis result. It has a clock recovery unit that controls the sampling clock of the receiver,
The ratio based on the received signal quality of each branch is a ratio based on the C / N of the received signal calculated from the carrier level and noise level of the received signal in each branch, and the noise level is A noise level detected by measuring a reception level of a null symbol or an absolute value of a difference between the reception signal and a signal obtained by delaying the reception signal by an effective symbol length within a guard interval period and multipath One of the noise levels calculated from the absolute value during a period in which no residual component is included is used as a diversity receiver. 6. The diversity receiver according to claim 3 , wherein the ratio based on the received signal quality uses either the reciprocal of the dispersion value of the phase difference or the reciprocal of the standard deviation value of the phase difference. Sampling clock control method .

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