JP4786263B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine, a coin gaming machine, or a slot machine, and in particular, includes a variable display means that can display a plurality of types of identification information that can be distinguished from each other. After the execution condition is satisfied, the variation display of the identification information is started based on the satisfaction of the variation display start condition, and it is advantageous for the player when the display result of the variation display of the identification information becomes a specific display result. The present invention relates to a gaming machine that shifts to a specific gaming state.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, there is provided a variable display unit capable of changing the display state, and configured to give a predetermined game value to the player when the display result of the variable display unit is in a predetermined specific display mode. is there.

  The game value is the right that the state of the variable winning ball apparatus provided in the gaming area of the gaming machine becomes advantageous for a player who is easy to win, and the right for becoming advantageous for a player. In other words, or a condition for winning a prize ball is easily established.

  In the gaming machine, when a predetermined transition condition is established, the gaming state is shifted to a specific gaming state that is advantageous to the player. For example, in a pachinko gaming machine, a combination of a predetermined display mode with a display result of a variable display unit that displays a special symbol is usually referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win.

  Game progress in the gaming machine is controlled by game control means such as a microcomputer. The game control means includes means for generating a pseudo-random number, and whether or not a predetermined transition condition is satisfied based on the value of the random number (for example, whether or not the display result of the variable display is a combination of the specific display mode) Or). For example, the game control means determines whether or not a predetermined transition condition is satisfied by determining whether or not a random number value matches a predetermined determination value. When it is determined that a predetermined transition condition is satisfied, the game control means shifts the gaming state to the specific gaming state.

There is a gaming machine in which the mounting area for mounting the random number generation means and the game control means on a board is reduced by using a microcomputer equipped with a random number circuit as the game control means (see, for example, Patent Document 1). In addition, in the gaming machine described in Patent Document 1, the control burden on the microcomputer is reduced by using a random number generated by a random number circuit mounted on the microcomputer. Further, in Patent Document 1, the random number circuit is initialized from the start of power-on to the gaming machine until the timer interrupt is set, and the game control process for controlling the progress of the game is executed. It is described that it comprises.
Japanese Patent Laying-Open No. 2005-103166 (paragraphs 0039, 0041, 0095-0100, FIGS. 3-4 and 20-21)

  In the gaming machine described in Patent Document 1, the initial value of the random number circuit from the start of power-on to the gaming machine until the timer interrupt setting is performed, and the random number maximum value to be generated, the random number updating method, and Set the cycle for updating the random number. However, the initial value of the random number to be generated cannot be set in advance. Therefore, when using a plurality of gaming machines, each gaming machine starts generating random numbers from a common initial value. Then, when using a plurality of gaming machines described in Patent Document 1, when the power of each gaming machine is turned on at the same time, each gaming machine starts generating random numbers at the same timing from the same initial value. There is a risk of the timing being recognized by a player or a game store. Therefore, there is a possibility that a condition for shifting to a specific gaming state such as a big hit may be illegally established by generating a capture signal using a wireless signal or the like at a predetermined cycle.

  Therefore, the present invention is to determine the display result of the variation display of the identification information in the gaming machine that shifts to the specific game state advantageous to the player when the display result of the variation display of the identification information becomes the specific display result. An object of the present invention is to improve the randomness of a generated random number when generating a random number to be used, and to prevent an illegal generation of a condition for shifting to a specific gaming state.

Specific examples of means for solving the problems and their effects

(1) Fluctuation display means (variable display device 9) capable of variably displaying a plurality of types of identification information (decorative symbols) that can identify each (decoratively displaying decorative symbols in the left, middle, and right symbol display areas) Based on the establishment of the variable display start conditions (the final stop of the special symbol and the end of the jackpot game) after the predetermined variable display execution condition (winning of the game ball to the start winning opening 14) is established. A gaming machine (pachinko gaming machine) that starts a variation display of identification information and shifts to a specific gaming state advantageous to the player when the display result of the variation display of the identification information becomes a specific display result (a jackpot display result) 1)
A game control microcomputer (game control microcomputer 560) that incorporates a random number circuit (random number circuit 503) for generating random numbers and executes a game control process for controlling the progress of the game;
A first controller that controls at least one of sound output means (speaker 27) or light emitting means (prize ball lamp 51, out-of-ball lamp 52, decoration lamp 25, top frame lamp 28a, left frame lamp 28b, right frame lamp 28c, etc.) Production control microcomputer (sound / lamp control microcomputer 700);
A second effect control microcomputer (display control microcomputer 800) that performs display control of the variable display means,
The random number circuit includes:
Clock signal generation means (clock signal output circuit 537) for generating and outputting a clock signal of a predetermined period;
Numerical value updating means (counter 521) for updating numerical data in a predetermined order from a predetermined initial value to a predetermined final value within a predetermined range in which numerical data can be updated based on the input of the clock signal;
Random number storage means (random value storage circuit 531) for storing numerical data updated by the numerical value update means as a random number value,
The game control microcomputer is:
As the random number circuit, a plurality of random number circuits having different predetermined ranges of numerical data that can be updated by the numerical value updating means are incorporated (12-bit random number circuit 503a, 16-bit random number circuit 503b),
Random number circuit initial setting means (a portion for executing S15 in the game control microcomputer 560) for initial setting of the random number circuit when power supply to the gaming machine is started;
After the random number circuit initial setting means performs the initial setting of the random number circuit, the interrupt setting means for setting to generate a timer interrupt every predetermined time (part for executing S16 in the game control microcomputer 560) )When,
Interrupt processing execution means (game control) for executing timer interrupt processing including the game control processing (processing of S21 to S32 (excluding S28 and S31) in the timer interrupt processing) when the timer interrupt occurs Part for executing S20 to S33 in the microcomputer 560 for use)
In the timer interruption processing by the interruption processing execution means, random number reading means for reading the random number value stored in the random number storage means (execution of S324 in the game control microcomputer 560 is executed when a variable display execution condition is satisfied. Part)
A display for determining whether or not the display result of the variation display of the identification information is a specific display result by determining whether or not the random number value read by the random number reading means matches a predetermined determination value. A result determining means (a portion for executing S386, S390, and S391 in the game control microcomputer 560);
Control signal output means (game control microcomputer 560) for outputting to the first effect control microcomputer a first control signal (effect control command) used to execute an effect based on the determination result of the display result determination means. Part of executing S393, S395, S397, S405, and S27)
The random number circuit initial setting means includes:
Prior Symbol initialization, the numeric said predetermined initial value of the numerical data updating means for updating, the microcomputer identification information (game for identifying the gaming control microcomputer assigned to each of the game control microcomputer Set based on the ID number unique to the control microcomputer 560) (the portion for executing S154b in the game control microcomputer 560),
In the initial setting, a usable random number circuit is set from a plurality of random number circuits built in the game control microcomputer,
The game control microcomputer stops random number circuit functions other than the random number circuit set to be usable by the random number circuit initial setting means (the random number circuit used by the game control microcomputer 560 in S151). A portion that controls the counter 521 of the random number circuit that has been set not to be used to update the count value C),
The first effect control microcomputer is:
Based on the first control signal output from the control signal output means (for example, S521, S522, and S523 are performed as predetermined arithmetic processing), a specifying means (sound for specifying a second control signal (display control command)) A part for executing S504 and S505 in the lamp control microcomputer 700);
Output means for outputting the second control signal to the second effect control microcomputer (the portion executing S506 in the sound / lamp control microcomputer 700);
The second effect control microcomputer performs display control of the variation display means based on the second control signal (a portion for executing S605 and S606 in the display control microcomputer 800).

According to such a configuration, the first effect control microcomputer is based on the first control signal from the game control microcomputer (for example, by performing predetermined arithmetic processing based on the first control signal). By specifying the control signal and outputting it to the second effect control microcomputer, it is possible to cause the second effect control microcomputer to display control the fluctuation display means based on the second control signal. Then, the gaming control microcomputer performs initial setting of the random number circuit from the start of power-on to the gaming machine until the timer interrupt setting is performed, and the initial value of the random number is set based on the microcomputer identification information in the initial setting. Since it is configured to set as a value, the randomness of the random number generated by the random number circuit can be improved. In addition, since randomness of random numbers can be improved, the timing of random number generation can be made difficult to be recognized by a player or a game store, and by generating a capture signal using a radio signal to a gaming machine It is possible to prevent the condition for shifting to the specific gaming state from being illegally established.
In addition, since it is configured to set whether or not each of a plurality of random number circuits with different predetermined ranges of numerical data that can be updated can be used, it can be generated by setting only the random number circuit to be used. The range of random number values to be set can be set appropriately. Therefore, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer can be reduced.

(2) The random number circuit
Clock signal inverting means (inverting circuit 532) for inverting the polarity of the clock signal output by the clock signal generating means;
When the execution condition of the variation display of the identification information is satisfied, a latch signal for storing numerical data updated by the numerical value updating means is output in synchronization with the clock signal inverted by the clock signal inversion means. Latch signal output means (latch signal generation circuit 533),
The numerical value updating means updates the numerical data based on the input of the clock signal (FIG. 6),
The random number storage means stores the numerical data as a random value based on the output of the latch signal by the latch signal output means (FIG. 6).

  According to such a configuration, the latch signal for instructing the storage of the random number is output in synchronization with the clock signal whose polarity is inverted, so the timing for updating the random number and the random number storage means The timing for storing random numbers can be shifted, and the generated random numbers can be stored stably and reliably.

(3) The random number circuit, instead of the configuration of (2) above,
Clock signal delay means (delay circuit 532A) for delaying the clock signal output by the clock signal generation means;
A latch that outputs a latch signal for storing numerical data updated by the numerical value updating means in synchronization with the clock delayed by the clock signal delay means when the execution condition of the variation display of the identification information is satisfied Signal output means (latch signal generation circuit 533),
The numerical value updating means updates the numerical data based on the input of the clock signal (FIG. 54),
The random number storage means may be configured to store the numerical data as a random value based on the output of the latch signal by the latch signal output means (FIG. 54).

  According to such a configuration, since the latch signal for instructing the storage of the random number is output in synchronization with the delayed clock signal, the random number is updated to the random number storage means and the timing for updating the random number. The timing to store can be shifted, and the generated random number can be stored stably and reliably.

(4) The game control microcomputer is:
Stop timing monitoring means (S304) for monitoring a stop timing for stopping the variation display and deriving and displaying the display result of the variation display based on the variation display time set for each variation display;
Stop timing determination means (S304) for determining whether the stop timing is based on the monitoring result of the stop timing monitoring means;
The control signal output means, when the stop timing determination means determines that it is the stop timing, as the first control signal, a stop command (design determination command) used to stop the variation display A stop command output means (S304) for outputting to the first effect control microcomputer;
The specifying means specifies a stop command (stop command) for stopping the change display in the change display means from the stop command (S518),
The output means outputs the stop command specified by the specifying means to the second effect control microcomputer as the second control signal (S506).

  According to such a configuration, when it is specified that the variable display is stopped by the stop command from the game control microcomputer, the first effect control microcomputer issues a stop command to the second effect control microcomputer. It outputs to a computer and makes the 2nd production control microcomputer stop control of variable display, and perform control which derives and displays the display result of variable display. Thereby, even when there is an error in the recognition of the variation time between the game control microcomputer and the first effect control microcomputer, the first effect control microcomputer adjusts the stop timing of the variation display. can do.

(5) The first effect control microcomputer, based on the first control signal, has a plurality of effects determined in advance (no notice, notice 1, notice 2, notice 3, secondary re-lottery display, temporary stop There is an effect determining means (S521 to S523) for determining an effect to be executed from among the symbols and symbols (stop symbols),
The specifying means specifies the second control signal (decoration variation pattern command) corresponding to the effect determined by the effect determining means (S552).

  According to such a configuration, since the effect is determined by the first effect control microcomputer, it is possible to perform a consistent effect by the fluctuation display means, the sound output means, and the light emitting means.

( 6 ) In the initial setting, the random number circuit initial setting means stores the numerical value in a numerical maximum value register (random number maximum value setting register 535) in which a value as a maximum value in a predetermined range in which numerical data is updated is set. A predetermined maximum value (maximum random number) is set within the range of numerical data that can be updated by the updating means (the part in which the game control microcomputer 560 executes S152),
The numerical value updating means includes
Setting value determination means for determining whether or not the predetermined maximum value set by the random number circuit initial setting means is equal to or less than a predetermined lower limit value (a portion for executing S153b in the game control microcomputer 560);
The numerical value maximum value register can be updated by the numerical value updating means when it is determined that the predetermined maximum value set in the numerical value maximum value register is not more than the predetermined lower limit value by the set value determining means. Maximum value resetting means for resetting a predetermined value within the range of numerical data (“4095” when the 12-bit random number circuit 503a is set) (a portion for executing S153c in the game control microcomputer 560) .

  According to such a configuration, since the value as the maximum value of the predetermined range in which the numerical data is updated is set in advance, a value larger than the range of random numbers used during the execution of the timer interrupt process Can be prevented from being generated, and the processing load on the random number circuit and the game control microcomputer can be reduced. In addition, when the set maximum value is less than or equal to the predetermined lower limit value, the predetermined maximum value is reset, so that malfunction of the game control microcomputer or radio signal is used. It is possible to prevent an excessively small value from being set as the maximum value of the random number by an action such as generating a captured signal to the gaming machine.

( 7 ) The numerical value updating means updates the numerical data on condition that the clock signal has been input a predetermined number of times (the clock signal output circuit 524 generates a random number generating clock signal SI obtained by dividing the reference clock signal CLK by 16). When input, the part where the counter 521 updates the count value C),
In the initial setting, the random number circuit initial setting means sets the number of input clock signals, which is a condition for the numerical value updating means to update the numerical data (the game control microcomputer 560 executes S156).

  According to such a configuration, the numerical value updating means is configured to preset the number of times of input of the clock signal, which is a condition for updating the numerical data, thereby further improving the randomness of the random number generated by the random number circuit. be able to.

( 8 ) The gaming control microcomputer is configured to calculate a predetermined initial value of the numerical data set by the random number circuit initial setting means by using the microcomputer identification information (in S154b of the gaming microcomputer). When executing the process, the game control microcomputer 560 further calculates an ID number and a predetermined value (adds a predetermined value to the ID number to obtain a calculated value),
The random number circuit initial setting means sets an initial value based on the value calculated by the calculation by the numerical value calculation means (the game control microcomputer 560 executes S156).

  According to such a configuration, since the initial value is set based on the value calculated by the calculation using the microcomputer identification information, the randomness of the random number generated by the random number circuit is further improved. Can do. For this reason, it is possible to make it difficult to recognize the initial value of the random number simply by looking at the microcomputer identification information, and the security can be improved.

( 9 ) The random number circuit initial setting means changes the predetermined initial value set by the random number circuit initial setting means when the numerical data is updated to a predetermined final value by the numerical value updating means in the initial setting. Whether or not to perform (game control microcomputer 560 executes S157),
The random number circuit includes:
When the numerical data is updated to the predetermined final value by the numerical value updating means, a notification signal output means (output terminal of the counter 521) outputs a notification signal indicating that the numerical data has been updated to the predetermined final value. )When,
Based on the output of the notification signal, when the initial value is set to be changed by the random number circuit initial setting means, the initial value changing means (for game control) for changing the value of the predetermined initial value And a portion for executing S220 to S226 in the microcomputer 560).

  According to such a configuration, since the predetermined initial value is updated when the numerical data is updated to the predetermined final value, the randomness of the random number generated by the random number circuit can be further improved. Can do.

( 10 ) A winning detection means (a winning detection signal SS) for detecting that a game medium has won a winning area (start winning port 14) in the gaming area, and that the execution condition of the variable display has been established, A starter switch 14a),
The latch signal output means is provided on condition that the winning detection signal is continuously input from the winning detection means for a predetermined period (when the timer circuit 534 measures the predetermined period (3 ms), the random value read signal output circuit 526 The latch signal is output (the latch signal generation circuit 533 receives the random value read signal output from the random value read signal output circuit 526 from the inverting circuit 532). A portion that is output to the random value storage circuit 531 as a latch signal SL in synchronization with the rising edge of the output inverted clock signal SI2.

  According to such a configuration, when the random number storage means stores the random number based on the output of the latch signal, the latch signal is generated on condition that the winning detection signal is input continuously for a predetermined period. Since it is configured to output, it is possible to prevent the occurrence of noise from being erroneously recognized as the input of the winning detection signal, outputting the latch signal, and storing the generated random number. In addition, it is possible to reduce a possibility that a random number generated by an illegal latch signal is stored due to an output of a latch signal by an action such as generating a capture signal using a radio signal to the gaming machine. .

( 11 ) It further includes a winning detection means (start opening switch 14a) for detecting that the game medium has won in the winning area in the gaming area, and that the execution condition of the variable display is satisfied, and outputting a winning detection signal,
The latch signal output means outputs the latch signal on condition that the winning detection signal is continuously input from the winning detection means for a predetermined period (the latch signal generation circuit 533 generates the random value read signal output circuit 526). A portion that outputs the random number read signal output from the output of the random number value storage circuit 531 as a latch signal SL in synchronization with the rising edge of the inverted clock signal SI2 output from the inversion circuit 532),
The random number reading means continues on the condition that the timer interrupt processing is executed a predetermined number of times by the interrupt processing execution means, and the random number storage means is provided on condition that a winning detection signal is input from the winning detection means. Read the random value to be stored (the CPU 56 reads the random R value stored as the random number value from the random value storage circuit 531 of the random number circuit 503),
The predetermined period (3 ms) is shorter than the period during which the predetermined number of timer interruption processes are executed (6 ms).

  According to such a configuration, when the random number is read from the random number storage unit, the random number is read from the random number storage unit on condition that the winning detection signal is continuously input while the timer interruption process is executed a predetermined number of times. Therefore, it is possible to prevent the random number from being read again after the random number is read and before the value of the random number stored in the random number storage means is updated. Therefore, it is possible to prevent the random number having the same value as the random number read from the previous random number storage unit from being read again.

( 12 ) In the initial setting, the random number circuit initial setting means sets the order of values from a predetermined initial value to a predetermined final value of the numerical data updated by the numerical value updating means (count value C updated by the counter 521). Numerical value order setting means for setting whether or not to change the permutation of (a part for executing S158 in the game control microcomputer 560),
The random number circuit includes:
Notification signal output means (output terminal of the counter 521) for outputting a notification signal indicating that the numerical data has been updated to the predetermined final value when the numerical data is updated to the predetermined final value by the numerical value updating means. When,
Based on the output of the notification signal, when the random number circuit initial setting means is set to change the arrangement order of the numerical data from the predetermined initial value to the predetermined final value, It further includes a numerical order changing means for changing the order of numerical data updated by the numerical value updating means from the predetermined initial value to the predetermined final value (a part for executing S24 in the game control microcomputer 560).

  According to such a configuration, when the numerical data is updated to the predetermined final value, the arrangement order from the predetermined initial value to the predetermined final value is updated, so the random number circuit generates The randomness of random numbers can be further improved.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. A pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be other gaming machines such as a coin gaming machine and a slot machine. Fluctuation display means capable of variably displaying the identification information is provided, and after a predetermined variation display execution condition is established, variation display of the identification information is started based on the establishment of the variation display start condition. Any gaming machine may be used as long as the gaming machine shifts to a specific gaming state advantageous to the player when the display result of the variable display becomes the specific display result.

[First Embodiment]
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as seen from the front, and FIG. 2 is a front view showing the front of the game board. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding game boards described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, there are provided an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing the game balls. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (decorative symbol display device) 9 including a plurality of variable display units each displaying a decorative symbol for effect. The fluctuation display device 9 has, for example, three fluctuation display portions (symbol display areas) of “left”, “middle”, and “right”. The variation display device 9 performs a variation display of a decorative symbol as a symbol for decoration (production) during the variation display period of the special symbol by the special symbol indicator 8. The variable display device 9 for performing variable display of decorative symbols is controlled by a display control microcomputer 800 (see FIG. 4) mounted on a display control board 80 described later. In addition, a special symbol display device (special symbol display device) 8 that variably displays special symbols as a plurality of types of identification information that can be distinguished from each other is provided at the top of the variable display device 9.

  Below the variable display device 9 are provided four special symbol hold memory indicators 18 for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the number of hold memories (also referred to as start memory or start prize memory). ing. The special symbol reservation storage display 18 displays up to four reservation storage numbers in the order of winning. The special symbol hold storage display 18 increases the number of LEDs in the lit state by 1 each time there is a start winning in the start winning opening 14. Then, each time the special symbol display 8 starts the variable display, the special symbol hold storage indicator 18 decreases the number of LEDs in the lit state (that is, turns off one LED). Specifically, the special symbol hold storage display 18 shifts the lighting state every time the special symbol display 8 starts the variable display. In this example, the upper limit number (up to 4) is provided for the number of starting memories by winning to the start winning opening 14, but the upper limit number may be four or more.

  The special symbol display 8 is realized by a simple and small display (for example, 7-segment LED) capable of variably displaying numbers 0 to 9, for example. The special symbol display 8 may be configured to display various numbers such as 0 to 99 in a variable manner in order to make it difficult for the player to grasp a specific stop symbol. In addition, the variable display device 9 displays a variable display of decorative symbols as decorative (designated) symbols as a plurality of types of identification information that can be identified during the variable symbol display period of the special symbols by the special symbol indicator 8. To do.

  Below the variable display device 9, a variable winning ball device 15 that forms a start winning opening 14 is provided. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. The variable winning ball device 15 is opened by a solenoid 16.

  Below the variable winning ball apparatus 15, a special variable winning ball apparatus 20 using an opening / closing plate that is controlled to be opened by the solenoid 21 in the big hit gaming state as the specific gaming state is provided. The special variable winning ball apparatus 20 is a means for opening and closing the big winning opening. Of the winning balls that have won the special variable winning ball apparatus 20 and are led to the back of the game board 6, the winning ball that has entered one (V winning area: special area) is detected by the V winning switch 22 and then counted by the count switch 23. The game ball that has been detected and entered the other region is detected by the count switch 23 as it is. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, the display change display of the normal symbol display 10 that changes the normal symbol as a plurality of types of identification information is started. In this embodiment, the left and right lamps (the symbols can be visually recognized at the time of lighting) are alternately turned on to perform the variable display. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have passed through the gate 32 is provided. Each time there is a game ball passing through the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Then, each time the variable display of the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning holes 29, 30, 33, 39, and winning of game balls to the winning holes 29, 30, 33, 39 is performed by winning hole switches 29a, 30a, 33a, 39a, respectively. Detected. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. A top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided on the outer periphery of the game area 7. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decorative LED are examples of a decorative light emitter provided in the pachinko gaming machine 1.

  In this example, a prize ball lamp 51 that is turned on during the payout of the prize ball is provided in the vicinity of the left frame lamp 28b. Is provided. Further, a prepaid card unit (hereinafter referred to as “card unit”) 50 that enables lending a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1. Lighting control (lamp control) of light emitting means such as various decorative LEDs, decorative lamp 25, ceiling lamp 28a, left frame lamp 28b, and right frame lamp 28c, and sound generation control (sound control) from the sound output means of speaker 27 Is controlled by a sound / lamp control microcomputer 700 (see FIG. 4) which is mounted on a sound / lamp control board 70 which will be described later.

  The card unit 50 includes, for example, a usable indicator lamp that indicates whether or not the card unit 50 is in a usable state, a connecting table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, and a card unit. When checking the card insertion indicator lamp indicating that a card is inserted in the card, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock for releasing the card unit is provided.

  A game ball launched from the ball striking device by the player's operation enters the game area 7 through the hit ball rail, and then descends the game area 7. When the game ball enters the start winning port 14 and is detected by the start port switch 14a, the special symbol on the special symbol display 8 starts to be displayed in a variable state (variation) if the variation display of the symbol can be started. If the symbol display cannot be started, the number of reserved memories is increased by one.

  The special symbol change display on the special symbol display 8 stops when a certain time has elapsed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball apparatus 20 is released until a predetermined time elapses or a predetermined number (for example, 10) of gaming balls wins. Then, when the game ball is won in the V winning area and is detected by the V winning switch 22 while the special variable winning ball device 20 is opened, the continuation right is generated and the special variable winning ball device 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds). In addition, without providing the V winning area, the special variable winning ball apparatus 20 may always be allowed to be released up to the final round (for example, up to 15 rounds).

  When the special symbol on the special symbol display 8 at the time of stoppage is a jackpot symbol with a probability variation, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in the probability variation state (hereinafter referred to as the probability variation state). In the present embodiment, a jackpot symbol with a probability variation is referred to as a probable variation jackpot symbol or a probability variation symbol, and a jackpot symbol without a probability variation is referred to as a non-probable variation jackpot symbol, a non-probable variation symbol, or a normal jackpot symbol.

  The decorative symbol displayed on the variable display device 9 is a decorative symbol that is variably displayed with a predetermined relationship with the special symbol variable display in order to enhance the decorative effect of the special symbol variable display on the special symbol display 8. There are implications. The predetermined relationship with respect to such a symbol includes, for example, a relationship in which the variation display of the decorative symbol is started when the variation display of the special symbol is started, the variation display of the special symbol is finished, and the display result is displayed. In some cases, the display of the display result is displayed after the decorative symbol variation display ends. When the special symbol display unit 8 derives and displays a big hit symbol (for example, an odd number of symbols) as a display result, a combination of big hit symbols in which the left, middle and right symbols are flat on the variable display device 9 (hereinafter referred to as a big hit display result) Is also derived and displayed as a display result. Then, when the special symbol display unit 8 derives and displays a probable big hit symbol (for example, “3” or “7”) among the big hit symbols, the variable display unit 9 displays the probability variable big hit symbol of the combination of the big hit symbols. One of the odd-numbered flat eyes determined in advance as a combination is derived and displayed as a display result.

  Next, the reach display mode (reach) will be described. The reach display mode (reach) in the present embodiment means that the symbols that have not been stopped when the stopped symbols constitute a part of the jackpot symbol, and that all or This is a state where some symbols are synchronously displayed while constituting all or part of the jackpot symbol.

  For example, in the variable display device 9, an effective line (one horizontal effective line in the case of the present embodiment) that is a hit when the symbol is stopped is determined in advance, and a part of the display area on the effective line is displayed. A state in which the variable display is performed in the display area on the active line that has not been stopped when the predetermined symbol is stopped (for example, among the left, middle, and right display areas in the variable display device 9) In the left and right display areas, the same symbol is stopped and the middle display area is still in variable display), and all or part of the display area on the active line Are displayed in a synchronized manner while constituting all or part of the jackpot symbol (for example, the variation display device 9 displays the variation in all of the left, middle, and right display areas and always displays them. The state) variable display in a state in which one of the symbols are aligned is made that reach the display mode or reach.

  In addition, during the reach, an unusual performance may be performed with a lamp or sound. This production is called reach production. Further, in the case of reach, a character (an effect display imitating a person or the like, which is different from a design (decorative design etc.)) or a background display mode (for example, color) of the variable display device 9 is displayed. May be changed. This change in character display and background display mode is called reach effect display. In addition, some reach is set such that when it appears, a big hit is more likely to occur than normal reach (normal reach). Such special (specific) reach is called super reach.

  Also, during the decorative symbol variation display, when the display result is a jackpot symbol combination, the ornament symbol is temporarily stopped (for example, a normal jackpot symbol combination) temporarily (for example, a combination of jackpot symbols) (for example, , In a state of swinging in a state where the symbol has not been updated, etc., hereinafter referred to as a temporary stop), then the decorative symbol is displayed in a variably displayed state, and then the probability change big hit finally determined as the display result There may be a re-lottery display as a re-variable display for displaying a combination of symbols or a combination of normal jackpot symbols. In this re-lottery display, when the display result of the variation display is a combination of jackpot symbols, it is possible to give the player an enjoyment of whether the combination of probability variation jackpot symbols or the combination of normal jackpot symbols. The re-lottery display in the present embodiment may be performed before the big hit game is started or during the big hit game. Thus, the re-lottery display performed before the big hit game is started is referred to as a primary re-lottery display, and the re-lottery display performed during the big hit game is referred to as a secondary re-lottery display.

  In addition, for the variable display device 9, a notice may be executed by the appearance of a character, background screen switching, or the like. The advance notice refers to an effect that informs that there is a higher probability of being a big hit when it is executed than when it is not executed.

  When the game ball passes through the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. In other words, the opening time and the number of times of opening of the variable winning ball apparatus 15 are increased when the stop symbol of the normal symbol is a winning symbol, the stop symbol of the special symbol is a probable big hit symbol, etc., which is disadvantageous for the player. Changes to an advantageous state. It should be noted that increasing the number of times of opening is a concept including changing from a closed state to an open state.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 3 is a rear view of the pachinko gaming machine 1 as seen from the back side.

  As shown in FIG. 3, on the back side of the pachinko gaming machine 1, there are a variable display control unit 49 including a display control board 80 on which a display control microcomputer for controlling the variable display device 9 is mounted, a game control microcomputer, and the like. A mounted game control board (main board) 31 and a sound / lamp control board 70 on which a sound / lamp control microcomputer is mounted are installed. Further, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed.

  Further, a power supply substrate 910 and a touch sensor substrate 91 on which a power supply circuit for generating DC30V, DC21V, DC12V, and DC5V is mounted are provided. Although most of the power supply substrate 910 overlaps with the main substrate 31, there is an exposed portion that is exposed so as to be visible from the outside without overlapping the main substrate 31. The exposed portion is supplied with the main board 31 and each electrical component control board (display control board 80 and payout control board 37) in the pachinko gaming machine 11 and each electrical component (electric power) provided in the pachinko gaming machine 1. There is provided a power switch as a power supply permission means for executing or shutting off the power supply to the component operating by this. Furthermore, a replaceable fuse is provided inside the power switch in the exposed portion (inside the substrate).

  An electrical component control means including an electrical component control microcomputer is mounted on the electrical component control board. The electrical component control means is an electrical component (game device: ball payout device 97, variable display device 9, lamp) provided in the pachinko gaming machine 1 in accordance with a command signal (control signal) as a command from the game control means or the like. And light emitters such as LEDs, speakers 27, etc.). Hereinafter, description may be made by including the main board 31 in the electric component control board. In that case, the electrical component control means mounted on the electrical component control board includes a game control means and means for controlling the electrical components provided in the pachinko gaming machine 1 in accordance with a command signal from the game control means and the like. Each of them. A substrate on which a microcomputer other than the main substrate 31 is mounted may be referred to as a sub-substrate.

  On the back side of the pachinko gaming machine 1, a terminal board 160 having terminals for outputting various information to the outside of the pachinko gaming machine 1 is installed above. The terminal board 160 includes at least a ball break terminal for introducing the output of the ball break detection switch 167 and outputting it externally, a prize ball terminal for outputting prize ball information (prize ball number signal) and a ball. A ball lending terminal for externally outputting lending information (ball lending number signal) is provided. Near the center, an information terminal board (information output board) 36 provided with terminals for outputting various information from the main board 31 to the outside of the pachinko gaming machine 1 is installed.

  The game balls stored in the storage tank 38 pass through the guide rail 39 and reach the ball payout device covered with the payout case 40A via the curve rod. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage. In the vicinity of the head). When the ball break detection switch 167 detects a shortage of game balls, the game balls are replenished to the pachinko gaming machine 1 from the replenishment mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning prizes or game balls based on ball lending requests are paid out and the hitting ball supply tray 3 becomes full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. When the game ball is further paid out, a sensing lever (not shown) presses a full tank switch (not shown) as a storage state detection means, and the full tank switch as a storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device is stopped, the operation of the ball payout device is stopped, and the driving of the ball hitting device is also stopped.

  FIG. 4 is a block diagram illustrating an example of a circuit configuration in the main board 31. 4 also shows a payout control board 37, an interface board 66, a relay board 77, a display control board 80, and a sound / lamp control board 70 mounted on the pachinko gaming machine 1. The main board 31 includes a game control microcomputer 560 that is a basic circuit (corresponding to a game control means) for controlling the pachinko gaming machine 1 according to a program, a gate switch 32a, a start port switch 14a, a V winning switch 22, a count An input driver circuit 58 for supplying signals from the switch 23, winning a prize opening switches 29a, 30a, 33a, 39a and all winning counting switches 34 to the game control microcomputer 560, a solenoid 16 for opening / closing the variable winning ball apparatus 15, and a special A solenoid 21 for opening and closing the variable winning ball apparatus 20 and an output circuit 59 for driving a solenoid 21A for switching a route in the special winning opening according to a command from the game control microcomputer 560 are mounted.

  It should be noted that switches such as the gate switch 32a, the start port switch 14a, the V winning switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, the all winning count switch 34, and the like may be referred to as sensors. . That is, the name of the game medium detection means is not limited as long as it is a game medium detection means (game ball detection means in this example) that can detect a game ball. Each of the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a for detecting the winning is also a winning detecting means for detecting the winning of the game ball in the winning area. Even if a pass gate such as the gate 32 is used, a game ball enters the pass gate if the prize ball is paid out, and a switch (for example, a switch provided in the pass gate (for example, The gate switch 32a) becomes a winning detection means. Furthermore, a game ball that has won the V winning area is detected by the V winning switch 22 and also by the count switch 23. Therefore, the number of game balls won in the special winning opening corresponds to the number detected by the count switch 23. However, the game balls won in the V prize area are detected only by the V prize switch 22, and the number of game balls won in the big prize opening is determined by the number detected by the V prize switch 22 and the number detected by the count switch 23. You may make it become the sum. Further, the V winning area may not be provided, and a continuation right may always be generated in rounds other than the final round.

  The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as a storage means (variation data storage means for storing fluctuation data) used as a work memory, and a program. Therefore, it includes a CPU 56 that performs a control operation and an I / O port unit 506. The ROM 54, the RAM 55, and the I / O port unit 506 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 and the I / O port unit 506 may be external or built-in.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54. Therefore, the game control microcomputer 560 is specifically executed (or performs processing) hereinafter. The CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  The RAM 55 is a backup RAM as a non-volatile storage means, part or all of which is backed up by a backup power source created on the power supply substrate 910. That is, even if the power supply to the pachinko gaming machine 1 is stopped, a part or all of the contents of the RAM 55 is stored for a predetermined period (until the backup power supply cannot be supplied because the capacitor as the backup power supply is discharged). The In particular, at least data (special symbol process flag, etc.) corresponding to the game state, that is, the control state of the game control means, and data indicating the number of unpaid winning balls are stored in the backup RAM. The data corresponding to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power is restored after a power failure or the like occurs. Further, the data corresponding to the control state is defined as the data indicating the number of unpaid prize balls and the data indicating the game progress state. In this embodiment, it is assumed that the entire RAM 55 is backed up.

  A reset signal from the power supply board 910 is input to the reset terminal of the game control microcomputer 560. The reset signal from the power supply board 910 is also input to the reset terminal of the payout control microcomputer. When the reset signal becomes high level, the game control microcomputer 560 and the payout control microcomputer become operable, and when the reset signal becomes low level, the game control microcomputer 560 and the payout control microcomputer stop operating. It becomes a state. Therefore, during the period in which the reset signal is at a high level, an allowance signal that allows the operation of the game control microcomputer 560 and the payout control microcomputer is output, and during the period in which the reset signal is at a low level, An operation stop signal for stopping the operations of the game control microcomputer 560 and the payout control microcomputer is output. Note that the reset circuit may be mounted on each electric component control board (including the main board 31), or a reset circuit is mounted on one or more of the plurality of electric component control boards, and a reset signal is output therefrom. May be supplied to another electric component control board.

  Further, a power-off signal indicating that the power supply voltage from the power supply board 910 has dropped to a predetermined value or less is input to the input port of the game control microcomputer 560 via the payout control board 37. In addition, a clear signal indicating that a clear switch for instructing to clear the contents of the RAM is operated is input to the input port of the game control microcomputer 560.

  The clear signal is branched in the main board 31 and is also supplied to the payout control board 37. Note that the state of the clear signal input by the game control microcomputer 560 via the input port may be output to the payout control board 37 via the output port.

  The game control microcomputer 560 transmits an effect control command (effect control signal) as a first control signal for instructing the sound / lamp control board 70 to perform display control, sound control, and effect control including lamp control. To do. The sound / lamp control board 70 receives the effect control command from the game control microcomputer 560 via the relay board 77, and performs the sound / lamp control microcomputer 700 for effect control including sound control and lamp control. And electric parts, such as I / O port part 78, are carried.

  The sound / lamp control microcomputer 700 includes a ROM 74 for storing sound control and lamp programs, a RAM 75 used as a work memory, and a CPU 76 for performing sound control and lamp control control operations according to the program. . This sound / lamp control microcomputer 700 responds to an effect control command transmitted from the main board 31 with a prize ball lamp 51, a ball break lamp 52, a decoration lamp 25, a game effect lamp 40, a top frame lamp 28a, and a left frame lamp 28a. Control related to various effects such as control of the frame lamp 28b and the right frame lamp 28c (lamp control) and game sound generation control (sound control) using the speaker 27 is performed. Further, the sound / lamp control microcomputer 700 sends a display control command as a second control signal for controlling the variable display device 9 to the display control board 80 based on the effect control command transmitted from the main board 31. Control for transmission is also performed.

  The display control board 80 receives a display control command from the sound / lamp control microcomputer 700 and performs display control in the variable display device 9, and an I / O port unit 87. Etc. are mounted. The display control microcomputer 800 includes a ROM 84 that stores a display control program and the like, a RAM 85 that is used as a work memory, and a CPU 86 that performs a display control operation according to the program. This display control microcomputer 800 performs control related to various display effects such as variable display of the variable display device 9 in accordance with a display control command transmitted from the sound / lamp control microcomputer 700. Specifically, the following control is performed. In addition to the display control microcomputer 800, the display control board 80 is mounted with a VDP, a character ROM, and a VRAM (not shown). The VDP is a processing device having a display control function for performing image display and a high-speed drawing function, and performs display control of the variable display unit. CPU 86 reads necessary data from character ROM in accordance with the received effect control command. The character ROM is for storing image data to be displayed on the variable display device 9 in advance.

  Then, the CPU 86 outputs the data read from the character ROM to the VDP. The VDP operates based on data input from the CPU 86. Each VDP has a two-dimensional address space independent of the CPU 86, and VRAM is mapped there. The VDP generates image data to be displayed on the variable display device 9 according to the image data of the character ROM, and the VDP expands the image data in the VRAM. VRAM is a frame buffer memory for expanding image data generated by VDP. The image data developed in the VRAM is output to the variable display device 9.

  In the sound / lamp control microcomputer 700 according to the present embodiment, the sound output means and the light emission means are controlled in response to the effect display on the variation display device 9 performed in this way. The sound / lamp control microcomputer 700 is not limited to this, and only controls the sound output means or controls the light emitting means in response to the effect display on the variable display device 9. There may be.

  Next, it is determined whether to make a big hit or out of the pachinko gaming machine 1 shown in this embodiment, whether to make a probable change state, determination of a change pattern in the change display (whether to reach a reach state) The processing procedure for the control contents such as determination of the stop symbol of the special symbol and the determination of the special symbol will be briefly described.

  Whether to win or not (big hit determination) is determined using a random number circuit 503 (also referred to as random R or random R1) as will be described later. When it is determined that a big hit is made by the big hit determination, the determination (probability change determination) of whether or not to be in the probability variation state uses the count value (random value) of a random counter for probability change determination (also referred to as random R2). It is done. This random counter is for randomly determining whether or not a probability variation state is to be generated when it is determined to be a big hit in the big hit determination, and is within a predetermined numerical range (for example, 0 to 19). Numerical data updating means for updating numerical data. When the value of the counter extracted at a predetermined timing such as at the time of starting winning a prize matches a predetermined certainty variation determination value, it is determined to be in the certain variation state. . On the other hand, when it is determined that the jackpot determination is out of the range, such a determination is not performed and the probability variation state is not controlled.

  In addition, the symbol determination in the special symbol variation display is performed using a count value (random number value) of a random counter for special symbol determination (also referred to as random R3). This random counter is for determining a stop symbol of a special symbol, and is a numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 4). The stop symbol of the special symbol is determined based on the counter value extracted from the random R3 at a predetermined timing (for example, at the time of starting winning a prize) before the start of variation. For example, when it is determined by the probability variation determination that the probability variation state is set, a special symbol stop symbol is determined from predetermined probability variation big hit symbols based on the counter value extracted from the random R3. When it is determined that the probability variation big hit is not determined by the probability variation determination, a special symbol stop symbol is determined from predetermined non-probable variation big winning symbols based on the counter value extracted from the random R3. Further, when it is determined that the game is to be lost by the big hit determination, a special symbol stop symbol is determined from predetermined loss symbols based on the counter value extracted from the random R3. The process of determining the special symbol stop symbol will be specifically described with reference to FIG.

  Further, the variation pattern for specifying the variation display variation time in the special symbol display 8 and the variation display device 9 uses a count value (random number value) of a random counter for determining the variation pattern (also referred to as random R4). These are selected and determined from a plurality of types of variation patterns. This random counter is for determining a fluctuation pattern at random, and is a numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 99). Are extracted at a predetermined timing. There are multiple types of variation patterns for when a big hit is determined by the big hit determination and when it is determined that a big hit is determined to be a big hit. Based on the relationship between the type and numerical data, the variation executed by the variation pattern corresponding to the numerical data that matches the counter value extracted from the random counter at a predetermined timing before starting the variation of the special symbol, such as at the time of starting winning It is determined as a pattern. Note that there are a plurality of types of variation patterns in the variation display device 9 when it is determined that the big hit is determined by the big hit determination and when it is determined that the big hit is determined to be lost. A variation pattern for specifying a variation time during which a reach state can be generated in the variation display is included.

  As described above, the big hit determination function is realized by a numerical data update function using the random number circuit 503 as a hardware circuit built in the game control microcomputer 560. The probability variation determination function, the reach determination function, the variation pattern determination function, and the stop symbol determination function are realized by a numerical data update function using software of the game control microcomputer 560.

  FIG. 5 shows a circuit configuration of the main board 31, a signal line of an effect control command transmitted from the main board 31 to the sound / lamp control board 70, and a display transmitted from the sound / lamp control board 70 to the display control board 80. It is a block diagram which shows the signal line of a control command.

  As shown in FIG. 5, wiring from the start port switch 14a is connected to the main board 31. The main board 31 is also provided with wiring from a special variable winning ball apparatus 20 having a large winning opening, and various switches 29a, 30a, 33a, 39a for detecting a winning of a game ball to other winning holes. It is connected. Further, the main board 31 is connected to a solenoid 16 for opening and closing the variable winning ball apparatus 15, a solenoid 21 for opening and closing the special variable winning ball apparatus 20, and a wiring to the solenoid 21A for switching the path in the special winning opening. .

  The main board 31 includes a game control microcomputer 560, an input driver circuit 58, and an output circuit 59. The game control microcomputer 560 includes a clock circuit 501, a reset controller 502 that functions as system reset means, random number circuits 503a and 503b, a ROM 54 that stores a game control program, a RAM 55 that is used as a work memory, and a program. A CPU 56 that operates, a CTC 504 that sends an interrupt request signal to the CPU, and an I / O port 506 are incorporated.

The clock circuit 501 outputs a system clock signal to the CPU 56, and outputs a reference clock signal CLK having a predetermined period generated by dividing the system clock signal by 2 ⁷ (= 128) to the random number circuits 503a and 503b. . When a low level signal is input for a predetermined period, the reset controller 502 outputs a predetermined initialization signal to the CPU 56 and the random number circuits 503a and 503b to reset the game control microcomputer 560.

  Further, as shown in FIG. 5, the game control microcomputer 560 is equipped with two random number circuits 503a and 503b having different ranges of values of random numbers that can be generated. The random number circuit 503a is a random number circuit (hereinafter also referred to as a 12-bit random number circuit) that generates a 12-bit pseudo-random number. The 12-bit random number circuit 503a has a function of generating a random number having a value in a range that can be generated by 12 bits (that is, a range from 1 to 4095). The random number circuit 503b is a random number circuit (hereinafter also referred to as a 16-bit random number circuit) that generates a 16-bit pseudo-random number. The 16-bit random number circuit 503b has a function of generating a random number having a value in a range that can be generated by 16 bits (that is, a range from 1 to 65535). In this embodiment, the case where the game control microcomputer 560 includes two random number circuits is described. However, the game control microcomputer 560 may include three or more random number circuits. In this embodiment, when the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are comprehensively expressed, or when indicating either the 12-bit random number circuit 503a or the 16-bit random number circuit 503b, This is called a random number circuit 503.

  Between the main board 31 and the sound / lamp control board 70, eight signal lines AD0 to AD7 for transmitting an effect control command as a first control signal, and an effect control for transmitting a strobe signal A signal line for the INT signal is provided. Further, between the sound / lamp control board 70 and the display control board 80, eight signal lines BD0 to BD7 for transmitting a display control command as a second control signal, and a strobe signal are transmitted. The display control INT signal signal line is provided.

  The sound / lamp control microcomputer 700 receives effect control commands from AD0 to AD7 at the capture timing indicated by the effect control INT signal. The sound / lamp control microcomputer 700 determines an effect to be executed based on the received effect control command, and performs sound control and lamp control to be performed in response to the determined effect. Drive signals and various lamp drive signals. Further, the sound / lamp control microcomputer 700 transmits a display control command indicating the display control of the variation display device 9 to be performed in response to the determined presentation using the signal lines BD0 to BD7, and also performs display control. An INT signal is transmitted.

  The display control microcomputer 800 receives display control commands from the BD0 to BD7 at the capturing timing indicated by the display control INT signal. Then, the display control microcomputer 800 controls the display of the variable display device 9 in accordance with the received display control command. In such a configuration, when the effect determined based on the effect control command is performed in the variable display device 9 by the display control microcomputer 800, the sound / lamp control microcomputer 700 generates the effect in the variable display device 9. Sound control and lamp control are performed in accordance with the above. In other words, by the action of the specific means executed by the sound / lamp control microcomputer 700, the presentation is determined based on the presentation control command as the first control signal, and the display control content for executing the presentation is shown. 2 A display control command as a control signal is specified. The specified display control command is transmitted to the display control microcomputer 800 by the sound / lamp control microcomputer 700. The sound / lamp control microcomputer 700 performs sound control and lamp control corresponding to the display control contents. As a result, it is possible to perform a sound effect or a lamp effect that is consistent (synchronized) with the display effect in the variable display device 9.

  Next, the configuration of the random number circuit 503 will be described. FIG. 6 is a block diagram illustrating a configuration example of the random number circuit 503. In this embodiment, the basic configurations of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are the same. 6, the random number circuit 503 includes a counter 521, a comparator 522, a count value permutation changing circuit 523, a clock signal output circuit 524, a count value update signal output circuit 525, a random value read signal output circuit 526, and a random number update. A system selection signal output circuit 527, a selector 528, a random number circuit activation signal output circuit 530, a random value storage circuit 531, an inversion circuit 532, a latch signal generation circuit 533, and a timer circuit 534 are included.

  The random number circuit 503 determines whether or not the display result of the variation display of the identification information is a specific display result (for example, whether or not the combination of the display symbols of the special symbol display 8 is a jackpot symbol). Generate random numbers for judgment. When the game control microcomputer 560 determines that the specific display result is based on the random number generated by the random number circuit 503, the game state is shifted to a specific game state (for example, a big hit game state) advantageous to the player. . It should be noted that a random number for determination other than the jackpot symbol, such as a random number for probability variation determination for determining whether or not the random number generated by the random number circuit 503 is a probability variation, or a random number for variation pattern determination for determining a variation pattern for a special symbol. It may be used as

  The counter 521 receives a predetermined signal selected by the selector 528 and outputs a count value C in response to the signal input from the selector 528. In this case, the counter 521 inputs a predetermined initial value, and cyclically updates the count value C from the initial value to a predetermined final value according to a certain rule, and outputs it. Further, when the count value C is updated to the final value, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. When a notification signal is output from the counter 521, the initial value is updated by the CPU.

  The counter 521 counts up the count value C by one from “0” to “4095” every time a signal is input from the selector 528 (each time a rising edge in the signal from the selector 528 is input). Further, when the counter 521 counts up the count value C to “4095”, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. Then, the CPU 56 inputs a notification signal from the counter 521 and updates the initial value. Then, the counter 521 counts up the count value C again from the initial value updated by the CPU 56 to “4095”. Further, when counting up to “4095”, the counter 521 starts counting from “0” again. Then, the counter 521 outputs a notification signal to the CPU 56 when it counts up to a value (final value) immediately before the updated initial value. In this embodiment, the comparator 522 outputs a notification signal to the counter 521 when all count values are input, as will be described later. In this case, when the notification signal is input from the comparator 522, the counter 521 resets the count value to “0”.

  The comparator 522 determines whether the input count value is larger than the random number maximum value set in the random number maximum value setting register 535, and the count value is larger than the random number maximum value (exceeded the random number maximum value). ), A notification signal may be output to the counter 521. In this case, for example, when the comparator 522 determines that the count value exceeds the random number maximum value, the notification signal is output to the counter 521 before the clock signal output circuit 524 next outputs the random number generation clock signal SI1. . For example, consider a case where the random number maximum value “256” is set in the random number maximum value setting register 535. In this case, when the counter 521 counts up from “0” to “256” and further outputs the count value “257”, the comparator 522 causes the input count value “257” to exceed the random number maximum value “256”. A notification signal is output to the counter 521. When the notification signal is input from the comparator 522, the counter 521 updates the count value to “258” and outputs it without waiting for the input of the random number generation clock signal SI1 from the clock signal output circuit 524. By repeatedly executing the above processing, the comparator 522 determines that the count value exceeds the random number maximum value while inputting from the count value “257” to “4095”, and stores the count value in the repeat counter 521. Output a notification signal. The counter 521 repeatedly updates the count value without waiting for the input of the random number generation clock signal SI1 from the clock signal output circuit 524 while the notification signal is input from the comparator 522. By doing so, until the clock signal output circuit 524 next outputs the random number generation clock signal SI1, the count value is controlled to be counted up from “257” to “4095” at a high speed, Control is performed so that random numbers from “257” to “4095” are skipped (not stored in the random number storage circuit 531).

  The count value permutation change circuit 523 includes a count value permutation change register (RSC) 536, an update rule selection register (RRC) 542, and an update rule memory 543. The count value permutation change register 536 stores count value permutation change data “01h” for changing the permutation (order of arrangement from the initial value to the final value), which is the update order of the count value C counted up by the counter 521. . When the numerical value permutation change data “01h” is stored in the count value permutation change register 536, the count value permutation change circuit 523 displays the count value C permutation that the counter 521 counts up and updates. The permutation is changed to a different permutation from when “01h” is not stored. In this case, when the count value permutation change data “01h” is stored, the count value permutation change circuit 523 switches the update rule used for changing the count value permutation. When the counter 521 starts updating the count value after switching the update rule used for changing the count value permutation, the count value permutation change data in the count value permutation change register (RSC) 536 is “01h” by the CPU 56. ”To the initial value“ 0 (= 00h) ”(cleared).

  FIG. 7 is an explanatory diagram illustrating an example of the update rule selection register 542. The update rule selection register 542 is a register that sets an update rule used for rearranging the order of count values output from the counter 521 (changing the permutation). By setting a register value in the update rule selection register 542, an update rule used for changing the permutation of count values output by the counter 521 is set. As shown in FIG. 7, the update rule selection register 542 is an 8-bit register, and the initial value is set to “0 (= 00h)”. The update rule selection register 542 is configured in a state where bits 0 to 3 can be written and read. In addition, the update rule selection register 542 is configured in a state where bits 4 to 7 cannot be written or read. Therefore, even if control is performed to write a value to bits 4 to 7 of update rule selection register 542, the value read from bits 4 to 7 is all “0 (= 0000b)”.

  The value (register value) of the update rule selection register 542 is changed from “0 (= 00h)” to “0” when the count value permutation change data “01h” is written in the count value permutation change register 536. 15 (= 0Fh) "is updated cyclically. That is, each time the count value permutation data “01h” is written in the count value permutation change register 536, the register value of the update rule selection register 542 is incremented by “1” from “0”, and when it becomes “15”, Return to "0".

  FIG. 8 is an explanatory diagram showing an example of the update rule memory 543. As shown in FIG. 8, the update rule memory 543 stores the value (register value) of the update rule selection register 542 and the count value update rule in association with each other. In the example shown in FIG. 8, for example, when the register value 1 is set in the update rule selection register 542, it can be seen that the permutation of the count values output by the counter 521 is changed using the update rule B. In FIG. 8, the update rule A is the same update rule as that for the counter 521 to update the count value C, and is stored in the update rule memory 543 in association with the register value “0”. Also, in the update rule memory 543, update rules B to P different from the update rule in which the counter 521 updates the count value C are stored in association with the register values “1” to “15”.

  When the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 first receives the final count value “4095” from the counter 521 first. Until then, the count value is output as it is according to the currently set update rule. The count value permutation changing circuit 523 changes the count value update rule when the final value “4095” of the count value is input from the counter 521. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 inputs the final value after the change (the value immediately before the initial value) from the counter 521, and updates the count value. Will be changed.

  The count value permutation change circuit 523 selects an update rule corresponding to the register value of the update rule selection register 542 from the update rule memory 543, and sets it as an update rule used for changing the count value permutation. When the counter 521 starts updating the count value again from the initial value “0” again, the count value permutation changing circuit 523 changes the permutation from the initial value of the count value to the final value according to the set update rule. change. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 starts updating the count value in order from the changed initial value by the counter 521, according to the set update rule. The permutation from the initial value to the final value of the count value is changed. Then, the count value permutation changing circuit 523 outputs a count value according to the changed permutation.

  In this embodiment, when the maximum random number value to be generated is limited by setting the random number maximum value in the random number maximum value setting register 535 described later, the count value permutation changing circuit 523 counts The value C is limited to the maximum random number or less, and the permutation is changed and output. For example, it is assumed that the random number maximum value “256” is set in the random number maximum value setting register 535, and the count value permutation change circuit 523 changes the update rule A to the update rule B to change the permutation of the count values. Shall. In this case, the count value permutation changing circuit 523 changes the count value permutation to “256 →” according to the update rule B based on the random number maximum value “256” set in the random number maximum value setting register 535 of the comparator 522. Change to “255 →... → 0” and output.

  As described above, when the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 switches the update rule to use the permutation of the count value C. Change to output. Therefore, the randomness of the random number generated by the random number circuit 503 can be improved.

  FIG. 9 is an explanatory diagram illustrating an example in which the count value permutation changing circuit 523 changes the permutation of count values output from the counter 521. As shown in FIG. 9, the CPU 56 writes the count value permutation change data “01h” into the count value permutation change register 536 at a predetermined timing. Then, 1 is added to the register value of the update rule selection register 542. For example, the register value of the update rule selection register 542 is updated from “0” to “1”. When the register value is updated, the count value permutation changing circuit 523 updates the “update rule A” corresponding to the register value “0” before the update until the final value “4095” of the count value is input from the counter 521 for the first time. The count value is updated according to "." At this time, the count value permutation changing circuit 523 outputs count values in a permutation of “0 → 1 →... → 4095” according to the update rule A.

  When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects “update rule B” corresponding to the updated register value “1” from the update rule memory 543. To set. When the count value permutation changing circuit 523 starts to input count values after the initial value “0” again from the counter 521, the count value permutation changing circuit 523 changes and outputs the permutation of the count values according to the “update rule B” selected and set. In this example, the count value permutation changing circuit 523 changes the permutation from “0 → 1 →... → 4095” to “4095 → 4094 →... → 0” and outputs the count value.

  Thereafter, the count value permutation change register 536 is reset in response to the count value permutation change circuit 523 starting the count value update operation in accordance with the updated update rule, as will be described later. Then, until the count value permutation change data “01h” is written to the count value permutation change register 536 next time, the count value permutation change circuit 523 is a permutation that remains “4095 → 4094 →. Continue to output the count value.

  When the count value permutation change data “01h” is written again to the count value permutation change register 536 by the CPU 56, the register value of the count value permutation change register 536 is updated from “1” to “2”. When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects and sets “update rule C” corresponding to the register value “2” from the update rule memory 543. . When the count value permutation changing circuit 523 starts to input count values after the initial value “0” again from the counter 521, the count value permutation changing circuit 523 updates and outputs the count value permutation according to the selected “update rule C”. In this example, the count value permutation changing circuit 523 changes the permutation from “4095 → 4094 →... → 0” to “1 → 3 →... → 4095 → 0 →. Is output.

  As described above, the count value permutation register 536 is reset, and then the count value permutation data “01h” is written again into the count value permutation change register 536, whereby the permutation of the count values can be further changed.

  FIG. 10 is an explanatory diagram illustrating an example of the count value permutation change register 536. The count value permutation change register 536 is a register that sets count value permutation change data “01h” for changing the permutation of count values counted up by the counter 521. As shown in FIG. 10, the count value permutation change register 536 is a readable 8-bit register, and the initial value is set to “0 (= 00h)”. Further, count value permutation change register 536 is configured such that only bit 0 can be written and read. That is, count value permutation change register 536 is configured such that bits 1 to 7 cannot be written or read. Therefore, even if control is performed to write values to bits 1 to 7 of count value permutation change register 536, the values read from bits 1 to 7 are all “0 (= 0000000b)”.

  Note that the value of the count value permutation change register 536 is reset by the CPU 56 in response to the count value permutation change circuit 523 starting the update operation of the count value according to the updated update rule. In this case, the CPU 56 returns the value written in the count value permutation change register 536 from the count value permutation change data “01h” to the initial value “0 (= 00h)”.

  The comparator 522 includes a random number maximum value setting register (RMX) 535 that stores random number maximum value setting data for designating the maximum value of random R (random number maximum value). The comparator 522 limits the update range of the count value updated by the counter 521 in accordance with the random number maximum value indicated in the random number maximum value setting data stored in the random number maximum value setting register 535. The comparator 522 compares the count value input from the counter 521 with the random number maximum value (for example, “256”) indicated by the random number maximum value setting data (for example, “00FFh”) stored in the random number maximum value setting register 535. To do. When the comparator 522 determines that the input count value is equal to or less than the random number maximum value, the comparator 522 outputs the input count value to the random value storage circuit 531.

  Specifically, the comparator 522 performs the following control. The comparator 522 obtains the initial value of the count value from the CPU 56 when updating the initial value of the count value, and obtains the number of count values from the initial value to the maximum random number. For example, when the initial value of the count value is “157” and the maximum random number value is “256”, the comparator 522 calculates the number of count values from the initial value to the maximum random number value as “100”. Further, the comparator 522 counts up how many count values are input from the initial value as the count values are input from the count value permutation changing circuit 523. When the number of input count values from the initial value reaches “100”, the comparator 522 determines that all count values from the initial value “157” to the maximum value “256” have been input. Then, the comparator 522 outputs a notification signal indicating that all count values have been input to the counter 521. By determining based on the number of count values, even when the count value permutation circuit 523 has changed the count value permutation, the comparator 522 limits the update range of the count value to the maximum random number or less. When all count values are input, a notification signal can be output to the counter 521.

  An operation in which the comparator 522 limits the update range of the count value will be described. In this example, a case where the count value permutation changing circuit 523 selects the update rule A and the random number maximum value “256” is set in the random number maximum value setting register 535 will be described.

  While the counter 521 is updating the count value from “0” to “256”, the count value permutation changing circuit 523 updates based on the random number maximum value “256” set in the random number maximum value setting register 535. In accordance with rule A, the count values from “0” to “256” are output to the comparator 522 as they are. In this case, the count value permutation changing circuit 523 receives the value of the random number maximum value “256” from the comparator 522, determines whether the count value input from the counter 521 is larger than the random number maximum value, and the update rule is changed. Even when it is set (for example, update rule B), the count values from “257” to “4095” are compared based on the random number maximum value “256” set in the random number maximum value setting register 535. The data is not output to the device 522. For example, when the counter value is updated to the final value “256” when the initial value is set to “0”, the counter 521 outputs a notification signal to the CPU 56. When the notification signal is output, the CPU 56 changes the initial value of the count value of the counter 521. In this example, it is assumed that the initial value is changed to “50” by the CPU 56.

  While the count values from “0” to “255” are input from the count value permutation changing circuit 523 based on the update rule A, the comparator 522 receives the count value that is less than or equal to the random number maximum value “256”. Therefore, the input count value is output to the random value storage circuit 531 as it is. Next, when the count value input from the count value permutation change circuit 523 reaches “256”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 receives an initial value (“0” in this example) of the count value from the CPU 56 when changing the initial value of the count value, and the random number maximum value (the main value) from the initial value “0”. In the example, the number of count values up to “256” (in this example, “257”) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 257, a notification signal indicating that all count values have been input is output to counter 521. In this example, since the CPU 56 changes the initial value to “50”, the counter 521 does not reset the count value even when the notification signal is input from the comparator 522, and the changed initial value “50”. The count value is updated. As will be described later, the initial value is changed based on an ID number for identifying the game control microcomputer 560.

  While the counter 521 updates the count value from the changed initial value “50” to “256”, the count value permutation changing circuit 523 sets the random number maximum value “256” set in the random number maximum value setting register 535. In accordance with the update rule A, the count values from “50” to “256” are output to the comparator 522 as they are. Further, the count value permutation changing circuit 523 does not output the count values from “257” to “4095” to the comparator 522 based on the random number maximum value “256” set in the random number maximum value setting register 535. When the count value to be updated by the counter 521 makes one round (when updated 257 times), if the count value permutation change data is written in the count value permutation change register 536, the count value permutation change circuit 523 , Change the permutation of count values and output. For example, when the update rule is changed to the update rule B, the count value permutation changing circuit 523 changes the count value permutation from “256 → 255 →... 50” and outputs the result.

  While the count values from “256” to “50” are input from the count value permutation changing circuit 523, the comparator 522 outputs the input count value as it is to the random value storage circuit 531. Next, when the count value input from the count value permutation changing circuit 523 reaches “50”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 receives the initial count value (“50” in this example) from the CPU 56 when the initial count value is changed, and the random number maximum value (this In the example, the number of count values up to “256” (in this example, “207”) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 207, a notification signal indicating that all count values have been input is output to counter 521.

  Even when the count value permutation changing circuit 523 changes the count value permutation, the comparator 522 outputs a notification signal to the counter 521 when the number of count values reaches 207. By doing so, even if the permutation of the count values is changed, the notification signal is counted based on the input of all the count values from the initial value “50” to the maximum value “256”. 521 can be output.

  When the notification signal is input from the comparator 522, the counter 521 resets the initial value of the count value and returns it to “0”. Then, the counter 521 updates the count value from “0”. When the value of the counter 521 is updated again from “0”, the count value permutation changing circuit 523 outputs the count values from “49” to “0” to the comparator 522 based on the count value from the counter 521. The comparator 522 outputs the count value to the random value storage circuit 531 based on the count value input from the count value permutation changing circuit 523. When the counter 521 updates the count value to the final value (“49” in this example), the counter 521 outputs a notification signal to the CPU 56. When the notification signal is output, the initial value of the count value of the counter 521 is changed again by the CPU 56.

  By repeating the operation as described above, the comparator 522 causes the counter 521 to continuously count up the count value from “0” to the random number maximum value “256”, and the value from “0” to “256”. Is stored in the random value storage circuit 531 as a random R (random number value). That is, the comparator 522 limits the update range of the count value to the random number maximum value “256” or less, and causes the counter 521 to update the count value.

  FIG. 11 is an explanatory diagram showing an example of the random number maximum value setting register 535. FIG. 11A shows an example of the random number maximum value setting register 535 installed in the 12-bit random number circuit 503a. FIG. 11B shows an example of the random number maximum value setting register 535 installed in the 16-bit random number circuit 503b. First, the random number maximum value setting register 535 mounted in the 12-bit random number circuit 503a will be described. As shown in FIG. 11A, in the 12-bit random number circuit 503a, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “4095 (= 0FFFh)”. The random number maximum value setting register 535 is configured so that bits 0 to 11 can be written and read. The random number maximum value setting register 535 is configured such that bits 12 to 15 cannot be written or read. Therefore, in the 12-bit random number circuit 503a, even if control is performed to write a value to bits 12 to 15 of the random number maximum value setting register 535, all the values read from bits 12 to 15 are “0 (= 0000b) ".

  The random number maximum value set in the random number maximum value setting register 535 has a predetermined lower limit value. When random number maximum value setting data “0000h” to “00FEh” designating a value smaller than the lower limit value “256” is written in the random number maximum value setting register 535, the CPU 56 stores the initial value in the random number maximum value setting register 535. The random number maximum value setting data “0FFFh” specifying “4095” is reset. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “4095”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to the predetermined value “4095”. The CPU 56 controls the random number maximum value setting register 535 in which the random number maximum value setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  Next, the random number maximum value setting register 535 mounted in the 16-bit random number circuit 503b will be described. As shown in FIG. 11B, in the 16-bit random number circuit 503b, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “65535 (= FFFFh)”. In the 16-bit random number circuit 503b, the random number maximum value setting register 535 is configured in a state in which all the bits 0 to 15 can be written and read.

  When random number maximum value setting data “0000h” to “00FEh” for designating a value smaller than the lower limit “256” is written in the random number maximum value setting register 535, the CPU 56 stores the random number maximum value setting register 535 in the random number maximum value setting register 535. The random number maximum value setting data “FFFFh” specifying the initial value “65535” is reset. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “65535”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to a predetermined value “65535”. The CPU 56 controls the random number maximum value setting register 535 in which the random number maximum value setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  The clock signal output circuit 524 includes a cycle setting register (RPS) 537 for storing cycle setting data for designating the cycle of the clock signal output to the selector 528 and the inverting circuit 532 (that is, the count value update cycle). The clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 mounted on the game control microcomputer 560 based on the cycle setting data stored in the cycle setting register 537, and generates a random number circuit. A clock signal (random number generating clock signal SI1) used to generate a random number value is generated inside 503. By doing so, the clock signal output circuit 524 operates to output the random number generation clock signal SI1 for updating the count value C to the counter 521 on condition that the clock signal has been input a predetermined number of times. . The period setting data is data for setting how many times the reference clock signal CLK input from the clock circuit 501 is to be divided. The clock output circuit 524 outputs the generated random number generating clock signal SI1 to the selector 528 and the inverting circuit 532. For example, when the cycle setting data “0Fh (= 16)” is written in the cycle setting register 537, the clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 by 16, and generates a random number. A clock signal SI1 is generated. In this case, the cycle of the random number generating clock signal SI1 generated by the clock signal output circuit 524 is “cycle of system clock signal × 128 × 16”.

  FIG. 12 is an explanatory diagram showing an example of the cycle setting register 537. As shown in FIG. 12, the cycle setting register 537 is an 8-bit register, and the initial value is set to “256 (= FFh)”. The cycle setting register 537 is configured in a state where both writing and reading are possible.

  In addition, a predetermined lower limit value is determined for the value of the cycle setting data set in the cycle setting register 537. When period setting data “00h to 06h” designating a value smaller than the lower limit value “system clock signal period × 128 × 7” is written in the period setting register 537, the CPU 56 stores the lower limit value “ The cycle setting data “07h” specifying “cycle of system clock signal × 128 × 7” is reset. That is, the period that can be set in the period setting register 537 is from “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”, and the CPU 56 is set to a value smaller than the lower limit value. If it is determined that it is, reset the cycle setting data. The CPU 56 controls the period setting register 537 in which the period setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  Note that the clock signal output circuit 524 may output the reference clock signal CLK to the counter 521 and the inverting circuit 532 without setting the period setting data in the period setting register 537. In this case, the CPU 56 does not need to perform processing for re-setting the value of the cycle setting data set in the cycle setting register 537 by comparing with the lower limit value. The counter 521 updates the count value C every time the reference clock signal CLK is input from the clock signal output circuit 524.

  The count value update signal output circuit 525 includes a count value update register (RGN) 538 that stores count value update data “01h”. The count value update data is data for requesting update of the count value. Count value update signal output circuit 525 outputs count value update signal SI 3 to selector 528 in response to count value update data “01h” being written to count value update register 538.

  FIG. 13 is an explanatory diagram illustrating an example of the count value update register 538. As shown in FIG. 13, the count value update register 538 is an unreadable 8-bit register and is configured so that only bit 0 can be written. Therefore, even if control is performed to write a value to bit 1 to bit 7 of count value update register 538, it is invalidated.

  The random value read signal output circuit 526 includes a random value take-in register (RLT) 539 for storing random value take-in data “01h”. The random value acquisition data is data for requesting acquisition of the count value to the random value storage circuit 531. The random value read signal output circuit 526 latches a random value read signal for requesting reading of the random value in response to the random value fetch data “01h” being written in the random value fetch register 539. The data is output to the generation circuit 533.

  FIG. 14 is an explanatory diagram showing an example of the random value fetch register 539. As shown in FIG. 14, the random value fetch register 539 is an unreadable 8-bit register. The random value fetch register 539 is configured so that only bit 0 can be written. That is, even if control is performed to write a value to bits 1 to 7 of the random value fetch register 539, it is invalidated.

  The random number update method selection signal output circuit 527 includes a random number update method selection register (RTS) 540 that stores random number update method selection data. The random number update method selection data is data for designating one of the random number update methods that is a method for updating the value of the random R. The random number update method selection signal output circuit 527 corresponds to the random number update method specified by the written random number update method selection data when the random number update method selection data is written in the random number update method selection register 540. The random number update method selection signal to be output is output to the selector 528 and the latch signal generation circuit 533.

  FIG. 15A is an explanatory diagram illustrating an example of the random number update method selection register 540. As shown in FIG. 15A, the random number update method selection register 540 is an 8-bit register, and the initial value is set to “00h”. The random number update method selection register 540 is configured in a state where bits 0 to 1 can be written and read. The random number update method selection register 540 is configured in a state where bits 2 to 7 cannot be written or read. Therefore, even if control is performed to write values to bits 2 to 7 of the random number update method selection register 540, the values read from bits 2 to 7 are all “0 (= 000000b)”.

  FIG. 15B is an explanatory diagram of an example of random number update method selection data written to the random number update method selection register 540. As shown in FIG. 15B, the random number update method selection data is composed of 2-bit data. The random number update method selection data “01b” is used to specify the first random number update method. The random number update method selection data “10b” is used to specify the second random number update method. In this embodiment, the first random number update method is a method of updating the count value triggered by the output of the count value update signal SI3 from the count value update signal output circuit 525. The second random number update method is a method of updating the count value triggered by the output of the random number generation clock signal SI1 from the clock signal output circuit 524. Further, when the random number update method selection data “01b” or “10b” is written in the random number update method selection register 540, the random number circuit 503 is ready to be activated. On the other hand, when the random number update method selection data “00b” or “11b” is written to the random number update method selection register 540, the random number circuit 503 cannot be activated.

  The selector 528 selects either the count value update signal SI 3 output from the count value update signal output circuit 525 or the random number generation clock signal SI 1 output from the clock signal output circuit 524 and outputs the selected signal to the counter 521. When a random number update method selection signal (also referred to as a first random number update method selection signal) corresponding to the first random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a count value update signal. The count value update signal SI3 output from the circuit 525 is selected and output to the counter 521. On the other hand, when a random number update method selection signal (also referred to as a second random number update method selection signal) corresponding to the second random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a clock signal. The random number generation clock signal SI 1 output from the circuit 524 is selected and output to the counter 521. When the first update method selection signal is input from the random number update method selection signal output circuit 527, the selector 528 receives a clock signal according to the count value update signal SI3 output from the count value update signal output circuit 525. A numerical value update instruction signal for instructing update of numerical data synchronized with the random number generation clock signal SI1 output from the output circuit 524 may be output to the counter 521.

  The random number circuit activation signal output circuit 530 includes a random number circuit activation register (RST) 541 that stores random number circuit activation data “80h”. The random circuit activation data is data for requesting activation of the random number circuit 503. When random number circuit activation data “80h” is written in the random number circuit activation register 541, the random number circuit activation signal output circuit 530 outputs a predetermined random number circuit activation signal to the counter 521 and the clock signal output circuit 537. The clock signal output circuit 524 is turned on. The random number circuit 503 is activated by starting the count value updating operation by the counter 521 and the internal clock signal output operation by the clock signal output circuit 524.

  FIG. 16 is an explanatory diagram illustrating an example of the random number circuit activation register 541. As shown in FIG. 16, the random number circuit activation register 541 is an 8-bit register, and the initial value is set to “00h”. The random number circuit activation register 541 is configured such that only bit 7 can be written and read. The random number circuit activation register 541 is configured in a state in which bits 0 to 6 cannot be written or read. In other words, even if control is performed to write a value to bits 0 to 6 of the random number circuit activation register 541, it is invalid, and all values read from bits 0 to 6 are “0 (= 000000b)”.

  The random value storage circuit 531 is, for example, a 16-bit register, and stores a random R value that is a random number used in the jackpot determination in the game control process. The random value storage circuit 531 stores the count value C output from the counter 521 via the comparator 522 as a random R value in response to the input of the latch signal SL from the latch signal generation circuit 533. Each time the latch signal SL is input from the latch signal generation circuit 533, the random value storage circuit 531 reads the count value C updated by the counter 521 and stores the random R value.

  FIG. 17 is a circuit diagram showing a configuration example of the random value storage circuit 531. As shown in FIG. 17, the random value storage circuit 531 includes two AND circuits 201 and 203, two NOT circuits 202 and 204, 16 flip-flop circuits 2101 to 2116, and 16 OR circuits. 2201-2216.

  As shown in FIG. 17, the input terminal of the AND circuit 201 is connected to the output terminal of the latch signal generation circuit 533 and the output terminal of the NOT circuit 204, and the output terminal is connected to the input terminal of the NOT circuit 202 and the flip-flop circuit 2101. Are connected to clock terminals Clk1 to Clk16. The input terminal of the NOT circuit 202 is connected to the output terminal of the AND circuit 201, and the output terminal is connected to one input terminal of the AND circuit 203.

  The input terminal of the AND circuit 203 is connected to the output terminal of the NOT circuit 202 and the CPU 56 mounted on the game control microcomputer 560, and the output terminal is connected to the input terminal of the NOT circuit 204. The input terminal of the NOT circuit 204 is connected to the output terminal of the AND circuit 203, and the output terminal is connected to one input terminal of the AND circuit 201 and one input terminal of the OR circuits 2201 to 2216.

  Input terminals D1 to D16 of the flip-flop circuits 2101 to 2116 are connected to an output terminal of the comparator 522. The clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 are connected to the output terminal of the AND circuit 201, and the output terminals Q1 to Q16 are connected to the other input terminals of the OR circuits 2201 to 2216.

  The input terminals of the OR circuits 2201 to 2216 are connected to the output terminal of the NOT circuit 204 and the output terminals of the flip-flop circuits 2101 to 2116, and the output terminals are connected to the CPU 56 mounted on the game control microcomputer 560. .

  The operation of the random value storage circuit 531 will be described. FIG. 18 is a timing chart showing the timing at which each signal is input to the random value storage circuit 531 and the timing at which the random value storage circuit 531 outputs each signal. As shown in FIG. 18, when the output control signal SC (high level signal in this example) is not input from the CPU 56 mounted on the game control microcomputer 560 (that is, to one input terminal of the AND circuit 203). When the latch signal SL is input from the latch signal generation circuit 533 (when the input is at a low level) (at the timings T1, T2, and T7 in the example shown in FIG. 18), the two input terminals of the AND circuit 201 are connected. Both inputs are high. Therefore, the signal SR output from the output terminal of the AND circuit 201 is at a high level. The signal SR output from the AND circuit 201 is input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116.

  The flip-flop circuits 2101 to 2116 respond to the rising edges of the signal SR input from the clock terminals Clk1 to Clk16, and receive the bit data C1 to C1 of the count value C input from the comparator 522 via the input terminals D1 to D16. C16 is latched and stored as bit data R1 to R16 of a random value. The flip-flop circuits 2101 to 2116 output random R bit data R1 to R16 to be stored from the output terminals Q1 to Q16.

  When the output control signal SC is not input (in the example shown in FIG. 18, the period up to the timing T3 and the period after the timing T6), the input to one input terminal of the AND circuit 203 is at the low level. The signal SG output from the output terminal of the circuit 203 is at a low level. The signal SG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at a high level, the OR is input regardless of whether the signal input to the other input terminal is at a high level or a low level. The circuits 2201 to 2216 output high level signals. That is, the signals SO1 to SO16 output from the OR circuits 2201 to 2216 are all at a high level regardless of whether the values of the input random R bit data R1 to R16 are “0” or “1”. (“1”). By doing so, the value output from the random value storage circuit 531 is always “65535 (= 1111111111111111b)”, and the random R cannot be read from the random value storage circuit 531. That is, even if an attempt is made to read a random number from the random value storage circuit 531, only the same value “65535” can always be read from the random value storage circuit 531, and when the output control signal SC is not input, the random value storage circuit 531. Is in a non-readable (disabled) state. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the game control microcomputer 560 reads the value “65535”, it cannot determine whether the value is a random number or is unreadable. Therefore, in the determination table for each big hit determination shown in FIG. 27, when the random R is “65535”, it may be set to determine “lost” in advance.

  When the output control signal SC is input from the CPU 56 when the latch signal SL is not input from the latch signal generation circuit 533 (in the example shown in FIG. 18, the period from the timing T4 to the timing T6), Since the inputs to the two input terminals are both at the high level, the signal SG output from the output terminal of the AND circuit 203 is at the high level. The signal SG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a low level signal. A low level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one input terminal of the OR circuits 2201 to 2216 is at a low level, when the signal input to the other input terminal is at a high level, the output from the output terminals of the OR circuits 2201 to 2216 is high. A level signal is output. In addition, when a signal input to the other input terminal of the OR circuits 2201 to 2216 is at a low level, a low level signal is output from the OR circuits 2201 to 2216. That is, the values of the random R bit data R1 to R16 input to the other input terminals of the OR circuits 2201 to 2216 are unchanged from the output terminals of the OR circuits 2201 to 2216 (that is, the values of the bit data R1 to R16 are “ “1” is output when it is “1” and “0” when it is “0”). By doing so, random R can be read from the random value storage circuit 531. That is, when the output control signal SC is input, the random value storage circuit 531 is in a readable (enable) state.

  However, if the latch signal SL is input from the latch signal generation circuit 533 before the output control signal SC is input from the CPU 56, the input to one input terminal of the AND circuit 203 is at a low level. Even if the output control signal SC is input while the signal SL is being input (in the example shown in FIG. 18, the period from the timing T3 to the timing T4), the signal SG output from the output terminal of the AND circuit 203. Remains low. The signal SG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at a high level, the OR is input regardless of whether the signal input to the other input terminal is at a high level or a low level. Signals SO1 to SO16 output from circuits 2201 to 2216 are all at a high level. Even though the output control signal SC is input, the random R cannot be read from the random value storage circuit 531. That is, when the latch signal SL is input, the random value storage circuit 531 cannot receive the output control signal SC. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the game control microcomputer 560 reads the value “65535”, it cannot determine whether the value is a random number or is unreadable. Therefore, in the determination table for each big hit determination shown in FIG. 27, when the random R is “65535”, it may be set to determine “lost” in advance.

  In addition, when the output control signal SC is input from the CPU 56 before the latch signal SL is input from the latch signal generation circuit 533, the input to one input terminal of the AND circuit 201 is at a low level. Even if the latch signal SL is input while the control signal SC is being input (timing T5 in the example shown in FIG. 18), the signal SR output from the output terminal of the AND circuit 201 remains at the low level. It becomes. Therefore, the signal SR input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 does not rise from the low level to the high level, and the random R bit data R1 to R16 stored in the flip-flop circuits 2101 to 2116. Is not updated despite the latch signal SL being input. That is, when the output control signal SC is input, the random value storage circuit 531 cannot receive the latch signal SL.

  The inverting circuit 532 generates the inverted clock signal SI2 in which the polarity of the clock signal is inverted by inverting the signal level in the random number generating clock signal SI1 input from the clock signal output circuit 524. Here, inverting the polarity of a signal means, for example, inverting a low level signal to a high level signal in a signal that can take two polarities such as a low level and a high level, or a high level signal. The signal polarity is changed to the opposite polarity, such as inverting the signal to a low level signal. Further, the inverting circuit 532 outputs the generated inverted clock signal SI2 to the latch signal generating circuit 533.

  The latch signal generation circuit 533 is configured using a selector, a flip-flop circuit, and the like. The latch signal generation circuit 533 receives the random number read signal from the random number read signal output circuit 526 and the inverted clock signal SI2 from the inversion circuit 532, and stores the random value in the random value storage circuit 531. SL is output. The latch signal generation circuit 533 outputs the latch signal SL in accordance with the random value update method designated by the random number update method selection signal from the random number update method selection signal output circuit 527. In this case, when the first random number update method selection signal output circuit 527 receives the first random number update method selection signal output circuit 527, the latch signal generation circuit 533 selects the inverted clock signal SI2 output from the inversion circuit 532, and the latch signal It outputs to the random value storage circuit 531 as SL. On the other hand, when the second random number update method selection signal is input from the random number update method selection signal output circuit 527, the latch signal generation circuit 533 inverts the random value read signal output from the random value read signal output circuit 526. In synchronization with the rising edge of the inverted clock signal SI2 output from the circuit 532, the latch signal SL is output to the random value storage circuit 531.

  The timer circuit 534 inputs a winning detection signal SS indicating that a winning of a game ball to the starting port 14 has been detected from the starting port switch 14a. The timer circuit 534 measures the time during which the winning detection signal SS is continuously input from the start port switch 14a. Then, when the measurement time reaches a predetermined period (for example, 3 ms), the timer circuit 534 writes the random number value capture data “01h” into the random value capture register 539 of the random value read signal output circuit 526. For example, the timer circuit 534 is configured by an up counter or a down counter that is activated in response to the input of a high level signal. The timer circuit 534 receives the reference clock signal CLK sequentially input from the clock circuit 501 while the input from the start port switch 14a is at a high level (that is, while the winning detection signal SS is continuously input). Count up or down. Then, when the count value to be counted up or down reaches a value corresponding to 3 ms, the timer circuit 534 determines that the winning detection signal SS is input from the start port switch 14a, and receives the random number value capture data “01h”. Write to the random value fetch register 539.

  FIG. 19 is an explanatory diagram showing an example of an address map of a storage area in the game control microcomputer 560. As shown in FIG. 19, the area from address 0000h to address 1FFFh in the storage area of the game control microcomputer 560 is allocated to the ROM 54. An area from addresses 7E00h to 7FFFh is allocated to the RAM 55. Further, the area from address FD00h to address FE00h is allocated to a built-in register such as the random number maximum value setting register 535.

  As shown in FIG. 19, the area from address 0000h to 1FFFh allocated to the ROM 54 includes a user program area and a user program management area. In the user program area in the area of addresses 0000h to 1F7Fh, a program (user program) 550 created in advance by a user (for example, the producer of the pachinko gaming machine 1) is stored. Further, data (user program execution data) necessary for the CPU 56 to execute the user program 550 is stored in the user program management area in the area of addresses 1F80h to 1FFFh. Of the areas 7E00h to 7FFFh allocated to the RAM 55, the areas 7E00h to 7EFFh are unused areas, and the areas 7EFFh to 7FFFh are used as work areas.

  FIG. 20 is an explanatory diagram showing an example of an address map in the user program management area. As shown in FIG. 20, in the area of address 1F97h, among the initial value changing methods that are methods for changing the initial value input to the counter 521, the initial value changing method selected by the user is designated. The initial value change method setting data is stored. Further, in the areas 1F98h and 1F99h, RAM address data for specifying an address in the RAM 55 (designated RAM address) designated in advance by the user among addresses 7EFFh to 7FFFh allocated to the RAM 55 is stored. The In this case, of the values indicating the designated RAM address, the lower value of the designated RAM address is stored in the 1F98h address, and the higher value of the designated RAM address is stored in the 1F99h address.

  FIG. 21 is an explanatory diagram of an example of initial value change method setting data. As shown in FIG. 21, the initial value change data is composed of 8-bit data. The initial value change data “00h” is data specifying that the initial value is not changed as the initial value change method. In this embodiment, when the initial value change data “00h” is set, the counter 521 of the random number circuit 503 updates the count value from a predetermined initial value “0” to a predetermined final value. Become. Further, the initial value change data “01h” is data specifying that the initial value input to the counter 521 is changed to a value based on an ID number for identifying the game control microcomputer 560 as an initial value change method. It is. In this embodiment, when the initial value change data “01h” is set, the initial value of the counter value updated by the counter 521 is changed from “0” to a value based on the ID number. The count value is updated from the initial value to a predetermined final value.

  The user program 550 stored in the user program area will be described. FIG. 22 is an explanatory diagram showing a configuration example of the user program 550. As shown in FIG. 22, the user program 550 includes a random number circuit setting program 551 composed of a plurality of types of program modules, a display result determination program 552, a count value permutation change program 554, and a random value update program 555. Including.

  The random number circuit setting program 551 is a program for causing the random number circuit 503 to execute a random number circuit setting process for performing an initial setting for updating the random R value. That is, the CPU 56 functions as a random number circuit setting unit by executing processing according to the random number circuit setting program 551.

  FIG. 23 is an explanatory diagram showing a configuration example of the random number circuit setting program 551. As shown in FIG. 23, the random number circuit setting program 551 includes a random number maximum value setting module 551a, a random number update method selection module 551b, a cycle setting module 551c, a random number circuit activation module 551d, as a plurality of types of program modules. An initial value changing module 551e and a random number circuit selecting module 551f are included.

  The random number maximum value setting module 551a is a program module for causing the random number circuit 503 to set the maximum value of the random R preset by the user (for example, the manufacturer of the pachinko gaming machine 1). The CPU 56 executes processing in accordance with the random number maximum value setting module 551a, thereby writing random number maximum value setting data for specifying the maximum value of the random R preset by the user into the random number maximum value setting register 535. By doing so, the CPU 56 sets the maximum value of the random R preset by the user in the random number circuit 503. For example, when “255” is set in advance as the maximum value of the random R by the user, the CPU 56 writes the random number maximum value setting data “00FFh” in the random number maximum value setting register 535 and the random R maximum value “255”. Is set in the random number circuit 503.

  The random number update method selection module 551b is a program module for causing the random number circuit 503 to set the random number update method (first random number update method or second random number update method) selected by the user. The CPU 56 writes the random number update method selection data “01b” or “10b” for designating the random number update method selected by the user in the random number update method selection register 540 by executing processing according to the random number update method selection module 551b. Include. By doing so, the CPU 56 sets the random number update method selected by the user in the random number circuit 503. Therefore, the game control microcomputer 560 has a function of selecting either the first random number update method or the second random number update method as the random number update method used by the random number circuit 503 for the random number update.

  The cycle setting module 551c is a program for causing the random number circuit 503 to set the cycle of the internal clock signal preset by the user (that is, the cycle in which the clock signal output circuit 524 outputs the clock signal to the selector 528 and the inverting circuit 532). It is a module. The CPU 56 executes processing according to the cycle setting module 551c to write cycle setting data for designating the cycle of the internal clock signal preset by the user in the cycle setting register 537. By doing so, the CPU 56 sets the cycle of the internal clock signal preset by the user in the random number circuit 503. For example, when the period of the internal clock signal is set in advance by the user as “system clock signal period × 128 × 16”, the CPU 56 writes the period setting data “0Fh” in the period setting register 537 to Is set in the random number circuit 503. The cycle of the system clock signal × 128 × 16.

  The random number circuit activation module 551d is a program module for activating the random number circuit 503. The CPU 56 activates the random number circuit 503 by executing processing according to the random number circuit activation module 551d and writing the random number circuit activation data “80h” to the random number circuit activation register 541.

  The initial value change module 551e is a program module for changing the initial value of the count value updated by the counter 521. The CPU 56 functions as an initial value changing unit by executing processing according to the initial value changing module 551e. The CPU 56 executes the initial value changing module 551e to change the initial value of the count value updated by the counter 521 by the initial value changing method selected by the user. By doing so, the game control microcomputer 560 has a function of selecting an initial value changing method.

  When the initial value change method setting data “01h” is stored in the area 1F97h in the user program management area, the CPU 56 sets the initial value of the count value as a unique ID assigned to each game control microcomputer 560. The value is calculated based on the number.

  For example, the game control microcomputer 560 associates, in a predetermined storage area of the RAM 55, the ID number of the game control microcomputer 560 with a calculated value obtained by performing a predetermined calculation based on the ID number. I remember it. In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the calculated value “150” obtained by adding the predetermined value “50” to the ID number “100” is set in advance as the ID number. Are stored in association with each other. Further, for example, the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100” is stored in advance in association with the ID number. For example, only a predetermined value may be stored in advance in association with the ID number. Then, the game control microcomputer 560 uses the value “150” obtained by adding the ID number (eg, “100” to the predetermined value (eg, “50”) stored in advance as the initial value of the count value. In addition, the game control microcomputer 560 uses a value “50” obtained by subtracting a predetermined value (for example, “50”) stored in advance from the ID number (for example, “100”) as the initial count value. It may be a value.

  When the initial value changing method setting data “01h” is stored, the CPU 56 changes the initial value of the count value to the calculated value based on the ID number stored in advance. By doing so, the randomness of the random number generated by the random number circuit 503 can be further improved, and the initial value of the random number can be made difficult to recognize simply by looking at the ID number of the game control microcomputer 560. . Therefore, it is possible to more reliably prevent the transition condition to the big hit state from being illegally established by an action such as generating a capture signal using a radio signal to the pachinko gaming machine 1. Can be improved.

  Further, for example, when initial value change method setting data “01h” is stored, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, adds the predetermined value to the ID number). The initial value of the count value is changed to the calculated value obtained. In this case, for example, the CPU 56 may calculate a value that is randomly changed using a random number as an ID number, thereby randomly updating a value used for the calculation and obtaining an initial value. By doing so, the randomness of the random numbers generated by the random number circuit 503 can be further improved.

  The random number circuit selection module 551f is a program module for setting a random number circuit to be used when executing a timer interrupt process including a game control process from among the random number circuits 503 built in the game control microcomputer 560. The CPU 56 executes processing according to the random number circuit selection module 551f, so that any one of the two random number circuits (12-bit random number circuit 503a and 16-bit random number circuit 503b) built in the game control microcomputer 560 is selected. Is used when timer interrupt processing is executed. For example, the CPU 56 uses a 12-bit random number circuit 503a or 16 as a random number circuit used when executing a timer interrupt process according to a predetermined set value (a value set in advance by the user) stored in a predetermined storage area of the RAM 55. The bit random number circuit 503b is set.

  Note that both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b may be set as random number circuits used when the timer interrupt process is executed. In this case, for example, the game control microcomputer may perform a jackpot determination based on a random number generated by the 12-bit random number circuit 503a and may perform a probability change determination based on the random number generated by the 16-bit random number circuit 503b. . The random value storage circuit 531 exists in each of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b (that is, a random number storage circuit that stores a random number for 12 bits and a random number storage circuit that stores a random number for 16 bits) And exist separately). When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, the game control microcomputer 560 outputs the random number read from the 12-bit random number circuit 503a and the random number read from the 16-bit random number circuit 503b. , And stored in separate buffer areas provided in the RAM 55. Therefore, even when the timing for reading the random number from the 12-bit random number circuit 503a and the timing for reading the random number from the 16-bit random number circuit 503b are the same, two different random numbers can be extracted and stored in different buffer areas. it can.

  The random value update program 555 is a program for updating the value of the random R stored in the random value storage circuit 531 when the first random number update method is selected as the random number update method. The CPU 56 functions as a random value updating means by executing processing according to the random value updating program 555. The CPU 56 counts the counter 521 by executing the random value update program 555 and writing the count value update data “01h” into the count value update register 538 when the first random number update method is selected. The value is updated, and the value of the random R stored in the random value storage circuit 531 is updated. When the second random number update method is selected as the random number update method, the counter 521 is updated with the random number generation clock signal output from the clock signal output circuit 537, and the random value storage circuit 531 is updated. The value of random R stored in is updated.

  The display result determination program 552 is a program for determining whether or not the display result on the special symbol display 8 is a jackpot symbol. The CPU 56 functions as a display result determination unit by executing processing according to the display result determination program 552.

  The CPU 56 executes processing in accordance with the display result determination program 552 in response to the fact that the game ball has won the variable winning ball device 15 and the condition (execution condition) for executing the variable symbol display is established. Then, the CPU 56 reads the updated random R value from the random value storage circuit 531, and determines whether or not the display result on the special symbol display 8 is a jackpot symbol.

  FIG. 24 is an explanatory diagram illustrating an operation in which the CPU 56 updates the random R value or reads the random R value when the first random number update method is selected. As shown in FIG. 24, when the first random number update method is selected, the CPU 56 writes the count value update data “01h” into the count value update register 538 so that the random value storage circuit 531 stores the count value update data “01h”. The value of random R (for example, “2”) is updated. Then, the CPU 56 receives a random R value from the random value storage circuit 531 in response to a condition (execution condition) for the game ball winning the variable winning ball device 15 and executing the special symbol variation display being established. (For example, “2”) is read.

  When the random R value stored in the random value storage circuit 531 is further updated, an interval equal to or longer than the period of the system clock signal output from the clock circuit 501 has elapsed since the random R value was updated at the previous update. Sometimes, the count value update data “01h” must be written to the count value update register 538. This is because it is necessary to secure time for reading the updated random value R from the random value storage circuit 531.

  FIG. 25 is an explanatory diagram illustrating an operation in which the CPU 56 updates the random R value or reads the random R value when the second random number update method is selected. As shown in FIG. 25, when the second random number update method is selected, the CPU 56 writes the random number value take-in command “01h” into the random value take-in register 539, thereby outputting the count output from the counter 521. A value (for example, “2”) is taken into the random value storage circuit 531 to update the random R value stored in the random value storage circuit 531. Then, the CPU 56 reads the updated random R value (for example, “2”) from the random value storage circuit 531.

  Specifically, when the second random number update method is selected, the counter 521 updates the count value C using the input of the random number generation clock signal SI1 as a trigger. After that, when the random value fetch command “01h” is written to the random value fetch register 539, the latch signal generation circuit 533 outputs the latch signal SL to the random value storage circuit 531. Then, the random value storage circuit 531 reads and stores the count value output from the counter 521 when the latch signal SL is input. Then, the CPU 56 reads the value of random R stored in the random value storage circuit 531.

  If the CPU 56 does not write the random value acquisition command “01h” to the random value acquisition register 539, the random value storage circuit 531 will update the random value updated by the counter 521 even if the counter 521 updates the count value. Is not read. For example, the CPU 56 writes a random value take-in command “01h” into the random value take-in register 539, causes the count value “3” output from the counter 521 to be taken into the random value store circuit 531, and the random value store circuit 531 Assume that the stored random R value “3” is updated. In this case, unless the CPU 56 writes the random value fetch command “01h” again in the random value fetch register 539, the count value output from the counter 521 is updated from “3” to “4” or “5”. However, the random value stored in the random value storage circuit 531 is not updated, and the random value read from the random value storage circuit 531 remains “3”.

  The count value permutation change program 554 writes the count value permutation change data “01h” to the count value permutation change register 536, and executes count value permutation change processing for changing the permutation of the count values stored in the random value storage circuit 531. It is a program to do. The CPU 56 functions as numerical data permutation changing means by executing processing according to the count value permutation changing program 554. The CPU 56 executes the count value permutation change program 554 and writes the count value permutation change data “01h” into the count value permutation change register 536, so that the count value permutation change circuit 523 outputs the random number value storage circuit 531. Change the permutation of input count values.

  Further, as shown in FIG. 26, the game control microcomputer 560 includes a special figure holding memory 570, a jackpot determination table memory 571, a flag memory 572, a start winning port switch timer memory 573, and a variation pattern determination. And a table memory 574.

  In the special figure holding memory 570, the game ball wins the variable winning ball apparatus 15 and the execution condition for the special symbol variation display is established, but the variation display start condition is not yet established (for example, the special symbol display device 8 is a memory for storing pending data including the number of times the execution condition of the variable display is satisfied. The special figure holding memory 570 includes four entries, and each entry includes a holding number and a random R read from the random value storage circuit 531 according to the winning order in the order in which the game balls win the variable winning ball device 15. A value is stored in association with each other. In addition, whenever the special symbol variation display on the special symbol display 8 is finished once or the big hit gaming state is terminated, the variation display start condition based on the top information of the special symbol holding memory 570 is set. The change display based on the top information of the special figure holding memory 570 is executed. In this case, when the start condition for the special symbol variation display is satisfied, the information registered in the second or lower place in the special figure holding memory 570 is advanced by one place. Further, when a game ball newly wins the variable winning ball device 15 during the special symbol variation display, the value of the random R read from the random value storage circuit 531 based on the new winning is a special figure. It is registered in an empty entry in the reserved memory 570.

  The jackpot determination table memory 571 stores a plurality of jackpot determination tables used by the CPU 56 to determine whether or not the display result of the special symbol display 8 is a jackpot symbol. Specifically, as shown in FIG. 27, the big hit determination table memory 571 includes a normal big hit determination table used in a gaming state (referred to as a normal state) other than the probability changed state, and a probable time big hit used in the probability changed state. Stores the judgment table. When the big hit determination is performed using the determination table shown in FIG. 27, the probability of determining a big hit depends on the random number maximum value set in the random number maximum value setting register 535. In this case, for example, if the set random number maximum value is too small, the difference in the probability of determining a big hit between the case where the normal big hit determination table is used and the case where the probability variation big hit determination table is used is small. As a result, the player's interest in the game is diminished. Therefore, a plurality of determination tables (a plurality of normal time big hit determination tables and a plurality of probability variation big hit determination tables) may be stored in the big hit determination table memory 571 in association with the random number circuit 503 and the maximum random number. . The game control microcomputer 560 uses the random number circuit 503 to be used and the determination table corresponding to the maximum random number among the determination tables stored in the jackpot determination table memory 571 according to the display result determination program 552. It may be determined whether or not the display result of the special symbol display 8 is a jackpot symbol. By doing so, even if the type of random number circuit 503 to be used and the maximum random number value are different, it is possible to control so that the probability of determining a big hit is somewhat the same.

  Here, the normal jackpot determination table and the probability change jackpot determination table stored in the jackpot determination table memory 571 will be described with reference to FIG.

  In the normal big hit determination table, values that can be extracted from the random R1 are preliminarily assigned to values that are determined to be different from the values that are determined to be big hits as values that are normally looked up. The symbol command and the symbol content can be specified correspondingly. In the normal big hit determination table, when the value from the random R1 is “3”, the determination is made to make a big hit, and when the value is other than “3”, the determination is made to make a shift. Is set.

  In addition, the probability change big hit determination table is assigned in advance to a value that can be extracted from the random R1 as a value that is determined to be a big hit as a value that is looked up at the time of probability change, Corresponding to the distribution, the symbol command and symbol content can be specified. The probability change big hit determination table makes a big hit determination when the value from the random R1 is “3, 7, 79, 103, 107”, and other than “3, 7, 79, 103, 107”. When the value is a value, the distribution is set so that the determination is made to be shifted.

  FIG. 27 further shows a probability variation determination table used to determine whether or not to control to the probability variation state when it is determined that a big hit is made. The probability variation determination table makes a decision to make a big hit with a probability variation symbol when the value from the random R2 is “0 to 9”, and makes a decision to make a big hit with a non-probability variation symbol when it is “10 to 19”. Distribution is set to do.

  Note that the game control microcomputer 560 transmits a symbol command “8100h” as an effect control command to the sound / lamp control microcomputer 700 when it is determined not to be a big hit by the big hit determination, and the big hit When the decision to make a non-probable variation symbol jackpot is made by the judgment and the probability variation determination, the symbol command “811lh” is transmitted as an effect control command, and when the decision to make a probability variation symbol big hit is made by the jackpot determination and the probability variation determination A symbol command “8102h” is transmitted as an effect control command.

  Returning to FIG. 26, the flag memory 572 is set with various flags used in the game control process for controlling the progress of the game. For example, in the flag memory 572, a probability change flag indicating that the gaming state is a probability change state and a big hit flag indicating that the game state is a big hit state are set.

  The start port switch timer memory 573 stores a timer value that is added or cleared in accordance with the winning detection signal SS input from the start port switch 14a.

  The variation pattern determination table memory 574 stores a variation pattern determination table used by the CPU 56 to determine a variation pattern for specifying the variation display variation time in the special symbol display 8 and the variation display device 9. Here, the variation pattern determination table stored in the variation pattern determination table memory 574 will be described with reference to FIG. As the variation pattern in the present embodiment, one variation pattern is determined based on the state of the big hit flag and the value of the random R4 that are set when it is determined that the big hit is made by the big hit determination.

  When the big hit flag is set to the on state, the big hit table is referenced. The big hit table is determined as a fluctuation pattern in which one fluctuation pattern per normal reach having a fluctuation time of “20 seconds” is executed when the value of the random R4 is in the range of “0-9”. 2 fluctuation patterns per normal reach having a fluctuation time of “25 seconds” when the fluctuation time is within the range of “2” is determined as a fluctuation pattern to be executed. One variation pattern is determined as a variation pattern to be executed, and when it is within the range of “40 to 64”, two variation patterns per super reach having a variation time of “45 seconds” are determined as a variation pattern to be performed. The distribution is set so that the fluctuation pattern per first re-lottery with the fluctuation time of “70 seconds” is determined as the fluctuation pattern to be executed when the fluctuation is within the range of “ That. In this way, the table for the big hit is more than the ratio of determining one fluctuation pattern per normal reach, two fluctuation patterns per normal reach, one fluctuation pattern per super reach, two fluctuation patterns per super reach, and a fluctuation pattern per primary re-draw. In order, the distribution is set so that the ratio determined as the variation pattern to be executed increases.

  On the other hand, when the big hit flag is not set to the on state, the loss time table is referred to. The loss time table is determined as a fluctuation pattern that is executed by the normal deviation fluctuation pattern having a fluctuation time of “10 seconds” when the value of the random R4 is within the range of “0 to 79”. When the fluctuation range is within the range, the normal reach deviation of “15 seconds” is determined as the fluctuation pattern to be executed, and when the fluctuation range is within the range of “88 to 94”, the normal reach deviation fluctuation time of “20 seconds” is two fluctuations. The pattern is determined as a variation pattern to be executed, and when it is within the range of “93 to 96”, the super reach with a variation time of “30 seconds” is determined as the variation pattern to be executed, and the variation pattern of “97 to 99” is determined. The distribution is determined so that the fluctuation pattern is determined as the fluctuation pattern to be executed when the fluctuation pattern is “40 seconds” when the fluctuation time is within the range. It is constant. In this way, in the deviation table, the ratio of normal deviation deviation patterns is the highest. Normal reach deviation 1 fluctuation pattern, normal reach deviation 2 fluctuation pattern, super reach deviation 1 fluctuation pattern, super reach deviation 2 fluctuation pattern in this order. The distribution is set so that the ratio determined as the variation pattern to be executed is low.

  The game control microcomputer 560 uses a loss time table, and when a normal deviation fluctuation pattern is determined as a fluctuation pattern, a fluctuation pattern command of “8000h” is transmitted as an effect control command, and normal reach is one deviation fluctuation. When the pattern is determined, a variation pattern command of “8001h” is transmitted as an effect control command, and when a normal reach loss 2 variation pattern is determined, a variation pattern command of “8002h” is transmitted as an effect control command. When the deviation 1 variation pattern is determined, a variation pattern command “8003h” is transmitted as the effect control command, and when the super reach disagreement 2 variation pattern is determined, the variation control command “8004h” is determined. Pattern command is sent. The game control microcomputer 560 uses a big hit table, and when a variation pattern is determined as one variation pattern per normal reach, a variation pattern command of “8010h” is transmitted as an effect control command, and 2 per normal reach. When the variation pattern is determined, a variation pattern command of “8011h” is transmitted as an effect control command, and when one variation pattern per super reach is determined, a variation pattern command of “8012h” is transmitted as an effect control command, When two variation patterns per super reach are determined, a variation pattern command of “8013h” is transmitted as an effect control command. When a variation pattern per primary re-lottery is determined, a variation pattern of “8014h” is defined as an effect control command. Command is sent.

  Next, the operation of the pachinko gaming machine 1 will be described. 29 and 30 show the main processing executed by the game control microcomputer 560 in response to the start of power supply to the pachinko gaming machine 1 and the reset signal to the game control microcomputer 560 becoming high level. It is a flowchart which shows. When the input level of the reset terminal to which the reset signal is input becomes high level, the game control microcomputer 560 executes a security check process that is a process for confirming whether the contents of the program are valid, The main processing after S (hereinafter simply referred to as S) 1 is started. In the main process, the game control microcomputer 560 first performs necessary initial settings.

  In the initial setting process, the game control microcomputer 560 first sets the interruption prohibited (S1). Next, an interrupt mode for maskable interrupts is set (S2), and a stack pointer designation address is set in the stack pointer (S3). In S2, an address synthesized from the value (1 byte) of the specific register (I register) of the game control microcomputer 560 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is Set to the mode that indicates the included address. When a maskable interrupt occurs, the game control microcomputer 560 automatically sets the interrupt disabled state and saves the contents of the program counter in the stack.

  Next, the built-in device register is set (initialized) (S4). By the process of S4, the CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits), are set (initialized).

  The game control microcomputer 560 used in this embodiment also incorporates an I / O port (PIO) and a timer / counter circuit (CTC) 504.

  Next, it is confirmed whether or not the power-off signal is in an OFF state according to the state of bit 0 of the input port 1 (S5). When power supply to the pachinko gaming machine 1 is started, the output voltage of various power sources such as a + 5V power source gradually reaches a specified value, but the power-off signal is not output by the processing of S5 (that is, By confirming that the power supply voltage is stable, the game control microcomputer 560 can confirm that the power supply voltage is stable.

  When the power-off signal is on, the game control microcomputer 560 turns off the power-off signal again after a delay time of a predetermined period (for example, 0.1 second) (S80). Check if it exists. If the power-off signal is off, the RAM 55 is set to an accessible state (S6), and the process proceeds to a clear signal check process.

  When the power-off signal is in the on state, software delay processing for delaying the start timing of the gaming device control processing (game control processing) for controlling the progress of the game by software may be executed. By such software delay processing, the start timing of the game control processing can be delayed as compared with the case where the software delay processing is not executed. When the delay process is executed, a situation occurs in which another control board cannot receive a command transmitted from the game control board (main board 31) with respect to another control board (for example, the payout control board 37). Can be prevented.

  Note that the game control microcomputer 560 may confirm the state of the clear signal only once through the input port 0, but may confirm the state of the clear signal a plurality of times. For example, if it is confirmed that the state of the clear signal is OFF, a delay time of a predetermined time (for example, 0.1 seconds) is set, and then the state of the clear signal is reconfirmed. If it is confirmed that the clear signal is in the on state at that time, it is determined that the clear signal is in the on state. Further, at this time, if it is confirmed that the state of the clear signal is the off state, after a delay time of a predetermined time, the state of the clear signal may be confirmed again. Here, the number of reconfirmations is not limited to once or twice, but may be three or more times. It is also possible to check twice and check again when the check results do not match.

  Next, the game control microcomputer 560 checks whether or not the clear switch-on flag is set (S7). If the clear switch on flag is not set, data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) is performed when power supply to the pachinko gaming machine 1 is stopped. It is confirmed whether or not (S8). When power supply stops, processing for protecting data in the backup RAM area is performed. When it is confirmed that such power supply stop processing has been performed, the game control microcomputer 560 performs the power supply stop processing, that is, stores the control state at the time of power supply stop. It is determined that When it is confirmed that the power supply stop process is not being performed, the game control microcomputer 560 executes an initialization process.

  Whether or not the power supply stop process has been performed is determined based on the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process depending on the execution of the power supply stop process (for example, 2). ) Is confirmed by whether or not. Note that such a confirmation method is merely an example. For example, a flag indicating that the power supply stop process has been executed is set in the backup flag area in the power supply stop process, and the flag is set in S8. If it is confirmed that the power supply is stopped, it may be determined that the power supply stop process has been performed.

  If it is determined that the control state at the time of stopping power supply is stored, the game control microcomputer 560 performs data check (parity check in this example) in the backup RAM area (S9). Clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count becomes 0, the game control microcomputer 560 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as a checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area may be different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process (the processes of S10 to S14) that is executed when the power is turned on is not performed when the power supply is stopped. To do.

  If the check result is normal, the game control microcomputer 560 returns the game state restoration process for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. To do. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (S91), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (S92). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. By the processing of S91 and S92, the saved contents remain as they are in the portion of the work area that should not be initialized. The parts that should not be initialized include, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, etc.), the area where the output state of the output port is saved (output port buffer), unpaid prize balls This is the part where data indicating the number is set.

  Further, the game control microcomputer 560 sets the head address of the backup command transmission table stored in the ROM 54 as a pointer (S93), and proceeds to S15.

  In the initialization process, the game control microcomputer 560 first performs a RAM clear process (S10). Note that the predetermined data may be left as it is without initializing the entire area of the RAM 55. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (S11), and the contents of the initialization setting table are sequentially set in the work area (S12).

  By the processing of S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, etc. Accordingly, an initial value is set in a flag for selectively performing processing. In addition, a bit corresponding to the output port that outputs the connection confirmation signal in the output port buffer is set (corresponding to the ON state of the connection confirmation signal).

  The game control microcomputer 560 sets the initial address of the initialization command transmission table stored in the ROM 54 as a pointer (S13), and issues an initialization command for initializing the sub-board according to the contents. Processing to transmit to the sub-board is executed (S14). As an initialization command, a command indicating an initial symbol displayed on the variable display device 9 or an initialization command to the payout control board 37 can be used.

  Further, the game control microcomputer 560 executes random number circuit setting processing for initial setting of the random number circuits 503a and 503b (S15). In this case, the CPU 56 performs settings according to the random number circuit setting program 551 to update each random number circuit 503a, 503b with the random R value.

  The game control microcomputer 560 sets a timer interrupt setting for setting a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). Processing is executed (S16). That is, for example, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the timer interrupt setting is completed, the game control microcomputer 560 repeatedly executes the display random number update process (S18). The game control microcomputer 560 disables the interrupt when the display random number update process is executed (S17), and enters the interrupt enable state when the display random number update process ends (S19). Note that the display random number is a random number R3 that is a random counter for determining a special symbol and a random number R4 that is a random counter for determining a variation pattern. The display random number update process is a random number for display. This is a process of updating the count value of the counter for occurrence.

  Note that when the display random number update process is executed, the interrupt disabled state is executed because the display random number update process is also executed in the timer interrupt process described later. This is to avoid doing so. That is, if the timer interrupt is generated during the processing of S18 and the count value of the counter for generating the display random number is updated during the timer interrupt processing, the continuity of the count value is impaired. There is. However, such an inconvenience does not occur if the interrupt is prohibited during the process of S18.

  As described above, the game store clerk and the like can easily perform the initial operation by starting the power supply to the pachinko gaming machine 1 (for example, turning on the power switch) while the clear switch is turned on and the clear signal is output. Can be executed. That is, RAM clear or the like can be performed.

  Next, the random number circuit setting process (S15) in the main process will be described. FIG. 31 is a flowchart showing random number circuit setting processing. In the random number circuit setting process, the CPU 56 first executes the process according to the random number circuit selection module 551f included in the random number circuit setting program 551, and from among the random number circuits 503a and 503b built in the game control microcomputer 560, A random number circuit used when executing a timer interrupt process including a game control process is set (S151). For example, the game control microcomputer 560 stores, in advance, predetermined information in the RAM 55 for specifying the random number circuit 503 used when executing the timer interrupt process set by the user (for example, the manufacturer of the pachinko gaming machine 1). It is memorized in the area. Then, the CPU 56 selects either the 12-bit random number circuit 503a or the 16-bit random number circuit 503b in accordance with the designation information stored in the predetermined storage area of the RAM 55, and the selected random number circuit is executed when the timer interrupt process is executed. Set as the random number circuit to be used. Note that both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b may be set as random number circuits used when the timer interrupt process is executed. In this case, for example, the game control microcomputer may perform a jackpot determination based on a random number generated by the 12-bit random number circuit 503a and may perform a probability change determination based on the random number generated by the 16-bit random number circuit 503b. .

  When the random number circuit 503 used in S151 is set, the game control microcomputer 560 stops the operation of the counter 521 and the clock signal output circuit 524, for example, so that the counter 521 of the random number circuit that is set not to be used. Does not update the count value C. Also, for example, the game control microcomputer 560 updates the count value C of the counter 521 of the random number circuit that is set not to be used, but the game control microcomputer 560 does not output the output control signal SC. The random number value storage circuit 531 may be controlled so as not to read the random number. Further, for example, the game control microcomputer 560 prevents the random value fetch data “01h” from being written in the random value fetch register 539 of the random number circuit that is set not to use the latch control signal generation circuit 533. However, the latch signal SL may be controlled not to be output to the random value storage circuit 531.

  As described above, by setting the random number circuit 503 to be used, it is possible to appropriately set the range of random number values to be generated. Further, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer 560 can be reduced. For example, when a big hit determination is performed using a determination value including a determination value including “1” and “100” as a determination value for a big hit, the big hit is determined with a predetermined big hit probability (for example, 1/100). In this case, the number of types of determination values to be processed is smaller when the random number by the 12-bit random number circuit 503a is used than when the random number by the 16-bit random number circuit 503b is used, and the game control microcomputer 560 is used. The control burden is reduced.

  Further, the CPU 56 executes processing according to the random number maximum value setting module 551a included in the random number circuit setting program 551, and stores random number maximum value setting data for specifying a random number maximum value preset by the user as a random number maximum value setting register. Write to 535 (S152). By doing so, the random number maximum value of random R preset by the user is set in the random number circuit 503. When the 12-bit random number circuit 503a is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value that specifies the random number maximum value (any value from “0” to “4095”). Data is written into the random number maximum value setting register 535 of the 12-bit random number circuit 503a. When the 16-bit random number circuit 503b is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value that specifies the maximum random number value (any value from “0” to “65535”). Data is written into the random number maximum value setting register 535 of the 16-bit random number circuit 503b.

  In this embodiment, when “0” to “255” are set as the random number maximum value, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later. Even when control is performed to write a value greater than “256” as the random number maximum value, values “0” to “255” are set in the random number maximum value setting register 535 due to garbled data or the like. If this happens, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later.

  As described above, since the maximum value of the random number to be generated is set in advance in the random number maximum value setting register 535 in S152, a random number having a value larger than the range of random numbers used during the execution of the timer interrupt process is generated. And the processing load on the random number circuit 503 and the game control microcomputer 560 can be reduced.

  Further, the CPU 56 checks whether or not the random number maximum value set in the random number maximum value setting register 535 in S152 is less than or equal to a predetermined lower limit value. The random number maximum value resetting process is executed to reset the random number maximum value set to (S153).

  Further, the CPU 56 executes processing in accordance with the initial value changing module 551e included in the random number circuit setting program 551, and executes initial value changing processing for changing the initial value of the count value updated by the counter 521 of the random number circuit 503 ( S154).

  Further, the CPU 56 executes processing in accordance with the random number update method selection module 551b included in the random number circuit setting program 551, and writes the random number update method selection data into the random number update method selection register 540 (S155). By doing so, the random number update method of the random number circuit 503 is set. It is assumed that the CPU 56 writes the random number update method selection data “10h” into the random number update method selection register 540. That is, in this embodiment, the second random number update method is set as the random number update method of the random number circuit 503.

  In addition, the CPU 56 executes processing according to the cycle setting module 551c included in the random number circuit setting program 551, and sets cycle setting data (what is the reference clock signal) that specifies the cycle of the random number generating clock signal SI1 preset by the user. Data for setting whether to divide frequency) is written to the cycle setting register 537 (S156). By doing so, the cycle of the random number generating clock signal SI1 preset by the user is set in the random number circuit 503.

  Further, the CPU 56 sets whether or not to update the initial value input to the counter 521 when the count value is updated to a predetermined final value by the counter 521 of the random number circuit 503 (S157). For example, the game control microcomputer 560 sets in advance by the user a set value indicating whether or not to update the initial value input to the counter 521 when the counter 521 updates the count value to a predetermined final value. And stored in a predetermined area of the RAM 55. Whether the CPU 56 updates the initial value input to the counter 521 when the counter 521 updates the count value to a predetermined final value according to a predetermined set value stored in a predetermined storage area of the RAM 55. Set whether or not. When determining that the initial value input to the counter 521 is updated in S157, the CPU 56 indicates that the initial value is updated when the count value is updated to a predetermined final value (when a notification signal is input from the counter 521). Set the initial value update flag shown.

  Further, the CPU 56 sets whether or not to change the permutation of the count values updated by the counter 521 when the count values are updated to a predetermined final value by the counter 521 of the random number circuit 503 (S158). For example, the game control microcomputer 560 sets in advance a set value indicating whether or not to change the permutation of the count values output by the counter 521 when the counter 521 updates the count value to a predetermined final value. Is stored in a predetermined area of the RAM 55. Then, the CPU 56 changes the permutation of count values output by the counter 521 when the counter 521 updates the count value to a predetermined final value according to a predetermined set value stored in a predetermined storage area of the RAM 55. Set whether or not to do. If the CPU 56 determines in S158 that the count value permutation output by the counter 521 is to be changed, the CPU 56 sets a count value permutation change flag indicating that the count value permutation is changed when the count value is updated to a predetermined final value. set. In this embodiment, a case will be described in which the count value permutation change flag is set in S158 according to a predetermined set value. Then, the CPU 56 changes the permutation of the count values output by the counter 521 based on the fact that the count value permutation change flag is set in the count value permutation changing process described later.

  Then, the CPU 56 executes processing according to the random number circuit activation module 551d included in the random number circuit setting program 551, and writes the random number circuit activation data “80h” into the random number circuit activation register 541 (S159). By doing so, the game control microcomputer 560 activates the random number circuit 503.

  Next, the random number maximum value resetting process (S153) in the random number circuit setting process will be described. FIG. 32 is a flowchart showing the random number maximum value resetting process. In the random number maximum value resetting process, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 (S153a). When the 12-bit random number circuit 503a is set as the random number circuit used when executing the timer interrupt process, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 of the 12-bit random number circuit 503a. When the 16-bit random number circuit 503b is set as the random number circuit used when the timer interrupt process is executed, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 of the 16-bit random number circuit 503b.

  The game control microcomputer 560 determines whether or not the read random number maximum value is equal to or less than a predetermined lower limit value (S153b). When the 12-bit random number circuit 503a is set, the maximum random number that can be set in the 12-bit random number circuit 503a is from “256” to “4095”, so the CPU 56 sets the random number maximum value setting register 535 of the 12-bit random number circuit 503a. It is determined whether or not the maximum random number read from is lower limit value “256” or less. When the 16-bit random number circuit 503b is set, the maximum random number that can be set in the 16-bit random number circuit 503b is from “256” to “65535”. Therefore, the CPU 56 sets the random number maximum value of the 16-bit random number circuit 503b. It is determined whether or not the maximum random number read from the register 535 is equal to or lower than the lower limit “256”.

  If the read random number maximum value is less than or equal to the lower limit value, the game control microcomputer 560 resets the random number maximum value set in the random number maximum value setting register 535 to a predetermined value (S153c). When the 12-bit random number circuit 503a is set, if the random number maximum value read from the random number maximum value setting register 535 of the 12-bit random number circuit 503a is determined to be less than or equal to the lower limit value “256”, the CPU 56 The random number maximum value set in 535 is reset to the predetermined value “4095”. When the 16-bit random number circuit 503b is set, if the random number maximum value read from the random number maximum value setting register 535 of the 16-bit random number circuit 503b is determined to be less than or equal to the lower limit value “256”, the CPU 56 The random number maximum value set in the setting register 535 is reset to the predetermined value “65535”.

  As described above, when the random number maximum value set in the random number maximum value setting register 535 is equal to or smaller than the predetermined lower limit value, the random number maximum value is reset to a predetermined value. For this reason, an excessively small value may be set as the maximum random number due to malfunction of the game control microcomputer 560 or an action such as generating a capture signal using a radio signal to the pachinko gaming machine 1. Can be prevented. Therefore, it is possible to prevent a situation in which a random number having an excessively small value range from the minimum value to the maximum value is generated.

  Next, the initial value changing process (S154) in the random number circuit setting process will be described. FIG. 33 is a flowchart showing the initial value changing process. In the initial value changing process, the CPU 56 first reads the initial value changing method setting data stored in the area 1F97h in the user program execution data area, and specifies the initial value changing method selected by the user. In this case, the CPU 56 determines whether or not the value of the read initial value changing method setting data is “01h” (S154a), thereby specifying the initial value changing method selected by the user.

  When the value of the initial value change method setting data is “01h”, the CPU 56 sets the initial value input to the counter 521 of the random number circuit 503 to a value set based on the ID number unique to the game control microcomputer 560. Change (S154b). For example, the game control microcomputer 560 associates, in a predetermined storage area of the RAM 55, the ID number of the game control microcomputer 560 with a calculated value obtained by performing a predetermined calculation based on the ID number. I remember it. In S154b, the CPU 56 changes the initial value of the count value to the calculated value based on the ID number stored in advance. Further, for example, in S154b, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, the ID number (for example, “100”)) and sets the predetermined value (for example, “100”). The initial value of the count value is set to the calculated value (for example, “200”) obtained by addition. When the initial value input to the counter 521 is changed, the CPU 56 sets an initial value change flag indicating that the initial value of the count value has been changed (S154c).

  The game control microcomputer 560 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503 when changing the initial value input to the counter 521 in S154b, and sets it based on the ID number. It is determined whether or not the obtained value is greater than or equal to the maximum random number. If it is determined that the value set based on the ID number is equal to or greater than the maximum random number, the game control microcomputer 560 does not change the initial value input to the counter 521 (for example, the initial value is “0”). Do not change). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  When the value of the initial value change method setting data is not “01h” in S154a (that is, the value of the initial value change method setting data stored in the area of address 1F97h in the user program execution data area is “00h”) ), The CPU 56 does not change the initial value of the count value, ends the initial value changing process as it is, and proceeds to S155.

  By executing the random number circuit setting process, various signals are input to the random number circuit 503 when the timer interrupt process including the game control process is performed, and various signals are generated in the random number circuit 503. FIG. 34 is a timing chart showing the timing at which each signal is input to the random number circuit 503 and the timing at which each signal is generated in the random number circuit 503.

  As shown in FIG. 34, the clock circuit 501 increases the signal level of the output terminal from the low level to the high level at predetermined intervals (timing T11, T21,... Shown in FIG. 34). A reference clock signal CLK (see FIG. 34A) is input to 503.

  The clock signal output circuit 524 divides the reference clock signal CLK supplied from the clock circuit 501 to generate a random number generation clock signal SI1 (see FIG. 34B). For example, the clock signal output circuit 524 raises the signal level of the output terminal from the low level to the high level at timings T11, T12,..., And changes the signal level from the high level to the low level at timings T21, T22,. To output a random number generating clock signal SI1.

  In the example shown in FIG. 34, for ease of explanation, the clock signal output circuit 524 divides the reference clock signal CLK by two to generate the random number generating clock signal SI1. However, in the actual random number circuit, the period that can be set in the period setting register 537 is from “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”. Therefore, in an actual random number circuit, the clock signal output circuit 524 is set in the cycle setting register 537 in a range from “system clock signal cycle × 128 × 7” to “system clock signal cycle × 128 × 256”. The reference clock signal CLK is divided by a division ratio corresponding to the cycle setting data “07h” to “FFh” to generate a random number generating clock signal SI1. The random number generating clock signal SI 1 generated by the clock signal output circuit 524 is output to the selector 528 and the inverting circuit 532.

  In this embodiment, since the second random number update method is set in the random number circuit setting process, the second random number update method selection signal is input from the random number update method selection signal output circuit 527 to the selector 528. When the second random number update method selection signal output circuit 527 receives the second random number update method selection signal output circuit 527, the selector 528 selects the random number generation clock signal SI1 input from the clock signal output circuit 524 and outputs it to the counter 521. . Each time the rising edge of the random number generating clock signal SI1 supplied from the selector 528 is input, the counter 521 updates the count value C and outputs it to the count value permutation changing circuit 523.

  The inversion circuit 532 generates the inverted clock signal SI2 (see FIG. 34C) by inverting the signal level of the random number generation clock signal SI1 input from the clock signal output circuit 524. For example, the inverting circuit 532 decreases the signal level of the output terminal from the high level to the low level at timings T11, T12,..., And changes the signal level from the low level to the high level at timings T21, T22,. As a result, the inverted clock signal SI2 is output. Further, the inverted clock signal SI <b> 2 generated by the inverting circuit 532 is output to the latch signal generating circuit 533.

  When a predetermined time (for example, 3 milliseconds) elapses after the winning detection signal SS (see FIG. 34D) is input to the latch circuit generation circuit 533, the random number value read signal output circuit 526 receives a disturbance. A numerical reading signal is input. For example, when the signal level of the output terminal of the random number read signal output circuit 526 rises from a low level to a high level, the random value read signal is input to the latch signal generation circuit 533. The latch signal generation circuit 533 inverts the random value read signal input from the random value read signal output circuit 526 in response to the input of the second random number update method selection signal from the random number update method selection signal output circuit 527. In synchronization with the rising edge of the inverted clock signal SI2 supplied from 532, the latch signal SL (see FIG. 34E) is output.

  As described above, the random number circuit 503 updates the count value C at the timings T11, T12, T13..., And outputs the latch signal SL at the timing T22 different from the timings T11, T12, T13. The random number value is stored in 531.

  Next, the game control process will be described. FIG. 35 is a flowchart showing the timer interrupt process. When a timer interrupt occurs during execution of the main process, specifically, during a period when interrupts are permitted during the execution of the loop process of S17 to S19, the game control microcomputer 560 causes the timer interrupt to occur. The game control process is executed in the timer interrupt process activated in response to the occurrence of the game. In the timer interrupt process, the game control microcomputer 560 first executes a power-off process (power-off detection process) for detecting whether or not a power-off signal is output (whether or not it is turned on) ( S20). Next, detection signals from switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input through the switch circuit 58, and the state of these is determined (switches). Process: S21). Specifically, if the state of the input port for inputting the detection signal of each switch is ON, the value of the switch timer provided corresponding to each switch is incremented by one.

  Next, the game control microcomputer 560 confirms whether the initial value is updated when the count value is updated to a predetermined final value in the random number circuit setting process (see S157), and the random number is set. Processing for updating the initial value input to the counter 521 of the circuit 503 is performed (initial value updating processing: S22). Further, the game control microcomputer 560 performs a process of updating the count value of the counter for generating the display random number (display random number update process: S23). Further, the game control microcomputer 560 performs a process of updating the count value of the probability variation determination counter used for determining whether or not to control to the probability variation state when it is determined that the big hit (random probability probability determination random number). Update process: S23a). The random R3 and R4 are updated by S18 and S23, and the random R2 is updated by S23a.

  When the initial value updating process and the display random number updating process are performed, the game control microcomputer 560 causes the count value permutation changing circuit 523 to change the count value permutation output from the counter 521 of the random number circuit 503. (S24). In this embodiment, whether or not to execute the count value permutation change process is determined depending on whether or not the count value permutation change flag is set in S158 of the random number circuit setting process. Then, the game control microcomputer 560 executes a count value permutation change process based on the fact that the count value permutation change flag is set.

  Furthermore, the game control microcomputer 560 performs a special symbol process (S25). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, the normal symbol process is performed (S26). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the game control microcomputer 560 performs a process of sending an effect control command by setting an effect control command related to the effect in a predetermined area of the RAM 55 in synchronization with the change of the special symbol (effect control command control process: S27). In addition, that the effect is synchronized with the change of the special symbol means, for example, that the change time (variation display period) of the decorative symbol is the same.

  Further, the game control microcomputer 560 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (S28).

  Further, the game control microcomputer 560 executes prize ball processing for setting the number of prize balls based on detection signals from the prize opening switches 29a, 30a, 33a, 39a, etc. (S29). Specifically, a payout command signal such as a prize ball number signal indicating the number of prize balls is output to the payout control board 37 in response to winning detection based on turning on the prize opening switches 29a, 30a, 33a, 39a, etc. . The payout control microcomputer 370 mounted on the payout control board 37 drives the ball payout device 97 in response to receiving a prize ball number signal indicating the number of prize balls.

  Then, the game control microcomputer 560 executes a storage process for checking increase / decrease in the number of reserved memories (S30). In addition, a test terminal process, which is a process for outputting a test signal for enabling the control state of the pachinko gaming machine 1 to be confirmed outside the pachinko gaming machine 1, is executed (S31). Further, in this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the game control microcomputer 560 is related to the solenoid in the RAM area of the output port 2. Is output to the output port (S32: solenoid output processing). Thereafter, the game control microcomputer 560 sets the interrupt permitted state (S33), and ends the process.

  With the above control, in this embodiment, the game control process is started periodically (for example, every 2 ms). In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set. It may be executed in the main process based on the setting. Further, the processes of S21 to S32 (except S28 and S31) correspond to a game control process for controlling the progress of the game.

  In addition, the game control microcomputer 560 executes a process of counting the number of times the timer interrupt process has been executed. Each time the game control microcomputer 560 executes the timer interrupt process, the game control microcomputer 560 counts up an interrupt number counter indicating the number of times the timer interrupt process has been executed. For example, when the game control microcomputer 560 completes the solenoid output process in S32, the game control microcomputer 560 adds 1 to the value of an interrupt counter indicating the number of times the timer interrupt process has been executed.

  Also, for example, in the timer interrupt process, the switch process (see S21), the effect control command control process (see S27), and the interrupt count process (the number of times the timer interrupt process described above has been executed) in the game control process Only the process of counting the game (see S322 described later) may be executed, and the other processes of the game control process may be executed in the main process. In this case, in the loop process from S17 to S19 in the main process, the CPU 56 of the game control microcomputer 560 executes the processes of S22 to S26 and S29 to S33 (except S31) in the game control process. (The above interrupt count processing is not included). When the CPU 56 detects that the timer interrupt count has reached a predetermined number (for example, 3 times) after counting the interrupt count as described above in the timer interrupt process (see S322), the random number circuit From 503, it is determined that the condition for reading the random number value is satisfied, and a random number read flag indicating that the condition for reading the random number value is satisfied is set. In the main process, the CPU 56 determines whether or not the random number read flag is set when executing the start port switch passing process (see S312) in the special symbol process (see S25). Is set, the output control signal SC is output to the random value storage circuit 531 of the random number circuit 503 (see S323), and the random R value stored as the random value in the random value storage circuit 531 is read. (See S324). Then, in the main process, the CPU 56 determines whether or not to make a big hit based on the read random number value when executing the special symbol normal process (see S300) in the special symbol process (see S25). Become.

  Next, the initial value update process (S22) in the timer interrupt process will be described. FIG. 36 is a flowchart showing the initial value update processing. In the initial value update process, the game control microcomputer 560 checks the state of the notification signal indicating that the count value C output from the counter 521 of the random number circuit 503 has been updated to the final value (S220). When it is detected that the notification signal is turned on, the game control microcomputer 560 checks whether or not the initial value update flag is set (S221). That is, the game control microcomputer 560 checks whether or not the setting for updating the initial value is made when the count value is updated to a predetermined final value in the random number circuit setting process (see S157).

  When the initial value update flag is set, the game control microcomputer 560 determines to update the initial value input to the counter 521 when the counter 521 of the random number circuit 503 updates the count value to a predetermined final value. To do. If the initial value update flag is set, the game control microcomputer 560 checks whether the initial value change flag is set (S222). That is, the game control microcomputer 560 determines whether or not the initial value of the count value is currently changed (that is, whether or not it is changed to a value based on the ID number of the game control microcomputer 560).

  When the initial value change flag is set (that is, the initial value is currently changed to a value based on the ID number of the game control microcomputer 560), the game control microcomputer 560 inputs the initial value to the counter 521. The value is returned to the original value (for example, “1”) from the value based on the ID number of the game control microcomputer 560 (S223). Then, the game control microcomputer 560 resets the initial value change flag (S224), and ends the initial value update process.

  When the initial value change flag is not set (that is, the initial value is not currently changed), the game control microcomputer 560 uses the initial value input to the counter 521 as the ID number of the game control microcomputer 560. The value is changed to a base value (S225). In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the initial value input to the counter 521 is calculated by adding a predetermined value “100” to the ID number “100”. Change to the value “200”. Further, for example, the initial value input to the counter 521 is changed to the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100”. Then, the game control microcomputer 560 sets an initial value change flag (S226) and ends the initial value update process.

  When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, in S225, the game control microcomputer 560 uses the random number read from one random number circuit (for example, the 12-bit random number circuit 503a). An initial value input to the counter 521 may be obtained by adding the ID number as a predetermined value. Then, the game control microcomputer 560 may use the random number read from the other one (for example, the 16-bit random number circuit 503b) as the random number for determining the big hit.

  When the game control microcomputer 560 updates the initial value input to the counter 521 in S225, the game control microcomputer 560 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503 and sets it based on the ID number. It is determined whether or not the obtained value is greater than or equal to the maximum random number. When it is determined that the value set based on the ID number is equal to or greater than the maximum random number, the game control microcomputer 560 does not update the initial value input to the counter 521 with the predetermined value (for example, the predetermined value “ 0 ”is not updated). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  If it is determined in S220 that the notification signal is in an off state, or if it is determined in S221 that the initial value update flag is not set, the game control microcomputer 560 updates the initial value input to the counter 521. The initial value update process is terminated without any processing, and the process proceeds to S23.

  Next, the count value permutation change process (S24) in the timer interrupt process will be described. FIG. 37 is a flowchart showing the count value permutation change process. The game control microcomputer 560 executes the count value permutation change process by executing the process according to the count value permutation change program 554. In the count value permutation changing process, the game control microcomputer 560 checks the state of the notification signal indicating that the count value C output from the counter 521 of the random number circuit 503 has been updated to the final value (S241). When it is detected that the notification signal is in the on state, the game control microcomputer 560 checks whether or not the count value permutation change flag is set (S242). That is, whether or not the game control microcomputer 560 is set to change the permutation of the count values updated by the counter 521 when the count values are updated to a predetermined final value in the random number circuit setting process ( Check S158).

  When the count value permutation change flag is set, the game control microcomputer 560 displays the permutation of the count values updated by the counter 521 when the counter 521 of the random number circuit 503 updates the count value to a predetermined final value. Judge to change. Then, the game control microcomputer 560 writes the count value permutation change data “01h” in the count value permutation change register 536 (S243). That is, the game control microcomputer 560 causes the count value permutation change circuit 523 to change the permutation of the count values C input to the random value storage circuit 531 by writing the count value permutation change data “01h”.

  As described above, in the count value permutation changing process, when the random number is updated to a predetermined final value, the permutation of the count value updated by the counter 521 is changed, so that the randomness generated by the random number circuit 503 is more random. Can be improved.

  Next, the special symbol process (S25) in the main process will be described. FIG. 38 is a flowchart showing an example of a special symbol process processing program executed by the game control microcomputer 560. When performing the special symbol process, the game control microcomputer 560 performs a variation shortening timer subtraction process (S310), and detects that a game ball has won the start winning opening 14 provided in the game board 6. If the start opening switch 14a is turned on, that is, if a start winning that causes the game ball to win the start winning opening 14 is generated (S311), after the start opening switch passing process (S312) is performed, the internal state is set. In response, any one of S300 to S308 is performed. The variation shortening timer is a timer for setting the variation time when the variation time of the special symbol is shortened.

  Special symbol normal processing (S300): State in which special symbol variation display can be started (for example, since the symbol variation has not been made in the special symbol display 8 and the previous symbol variation in the special symbol display 8 has ended) Wait until the predetermined period has passed and the game is not in a big hit game. When the special symbol variation display can be started, the start winning memory number for the special symbol is confirmed. If the start winning memorization number is not 0, it is determined whether or not the result of the special symbol variation display is a big hit based on the random R generated by the random number circuit 503. Then, the internal state (special symbol process flag) is updated to shift to S301.

  Special symbol stop symbol setting process (S301): A special symbol stop symbol after the change display of the special symbol is determined. Then, the symbol command is transmitted to the sound / lamp control microcomputer 700, and the internal state (special symbol process flag) is updated to shift to S302.

  Fluctuation time setting process (S302): The fluctuation pattern is determined, and the fluctuation time in the fluctuation pattern (fluctuation time: the time from the start of fluctuation display until the display result is derived and displayed (stop display)) It is determined to be the display variation time. In addition, a variation pattern command is transmitted to the sound / lamp control microcomputer 700, and a variation time timer for measuring the variation time of the special symbol (elapsed time from the start of variation display) is started. Then, the internal state (special symbol process flag) is updated to shift to S303.

  Special symbol variation process (S303): When a predetermined time (time indicated by the variation time timer in S302) elapses, the internal state (special symbol process flag) is updated to shift to S304.

  Special symbol stop process (S304): A symbol confirmation command used to instruct the stop of the decorative symbol is transmitted to the sound / lamp control board 70. Moreover, the special symbol in the special symbol display 8 is stopped. If the stop symbol of the special symbol is a jackpot symbol, the internal state (special symbol process flag) is updated to shift to S305. Otherwise, the internal state is updated to shift to S300. It should be noted that the symbol confirmation command may not be transmitted. In this case, the sound / lamp control board 70 sets the change time in the change time timer based on the change pattern command from the main board 31 and updates the change time timer to thereby change the change time of the decorative pattern. What is necessary is just to perform the process which stops monitoring a decoration symbol independently when it determines with the fluctuation | variation time having passed.

  Preliminary winning opening opening process (S305): Control for opening the large winning opening is started. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big winning opening) and a flag (a flag used when detecting winning in the winning opening) are initialized, and the solenoid 21 is driven. Open the big prize opening. Also, the process timer sets the execution time of the big prize opening opening process and sets the big hit flag. Then, the internal state (special symbol process flag) is updated to shift to S306.

  Processing for opening a special prize opening (S306): Control for sending a presentation control command for round display of the special prize opening to the sound / lamp control board 70 and closing conditions for the special prize opening (for example, a predetermined number (for example, 10 To confirm that the game balls have won). When the closing condition of the big prize opening is satisfied, the internal state is updated to shift to S307.

  Specific area valid time processing (S307): Monitors whether or not the V winning switch 22 has passed, and performs processing for confirming that the big hit gaming state continuation condition is satisfied. If the condition for continuing the big hit gaming state is satisfied and there are still remaining rounds, the internal state is updated to shift to S305. Further, when the big hit gaming state continuation condition is not satisfied within a predetermined effective time, or when all rounds are finished, the internal state is updated to shift to S308.

  Big hit end process (S308): Control is performed to cause the effect control means to perform display control for notifying the player that the big hit gaming state has ended. Then, the internal state is updated to shift to S300.

  FIG. 39 is a flowchart showing the start port switch passage process (S312). In the start-port switch passing process, the game control microcomputer 560 has reached the maximum value of 4, which is the start-winning memory number indicated by the start-winning counter (or the start-winning memory number stored in the special figure holding memory 570). (S321). If the start winning memory number has not reached 4, the game control microcomputer 560 determines whether or not the number of executions of the timer interruption process indicated by the interruption execution number counter has reached a predetermined number (for example, 3 times). Is confirmed (S322). When it is detected that the game ball has won the start winning opening 14, the game control microcomputer 560 resets the interrupt execution counter. Then, the game control microcomputer 560 checks whether or not the interrupt execution number counter has reached a predetermined number after the game ball has won the start winning opening 14.

  The value preset as the predetermined number of times in S322 is determined as follows. As described above, the timer circuit 534 of the random number circuit 503 measures the time that the winning detection signal SS is continuously input from the start port switch 14a, and detects that the measurement time has reached a predetermined period, Write numerical data “01h”. In this embodiment, a predetermined period (for example, 3 ms) measured by the timer circuit 534 is a period in which a predetermined number of timer interrupt processes are executed (for example, when a timer interrupt process every 2 ms is executed three times). The predetermined number of times (for example, 3 times) used in S322 is set so as to be shorter than 6 ms). By setting in such a manner, it is possible to prevent the random number from being read again after the random number is read and before the value of the random number stored in the random value storage circuit 531 is updated. It is possible to prevent the random number having the same value as the random number read from the circuit 531 from being read again.

  When the number of executions of the timer interrupt process has reached a predetermined number, the CPU 56 can output the output control signal SC to the random number storage circuit 531 of the specified random number circuit 503 and read the random number storage circuit 531 (enable). The state is controlled (S323).

  The CPU 56 reads the value of the random R1 stored as the random number value from the random value storage circuit 531 of the random number circuit 503 (S324). At this time, the CPU 56 further reads random values R2 to R4. Further, the CPU 56 stores the values of the random R1 to R4 read in S324 in a predetermined buffer area provided in the RAM 55, for example (S325). Further, when the values of random R1 to R4 are stored in the buffer area, the CPU 56 stops outputting the output control signal SC to the random value storage circuit 531 and controls the random value storage circuit 531 to be in an unreadable (disabled) state. (S326). Further, the CPU 56 resets the interrupt execution number counter (S327). Then, the CPU 56 sets the values of the random R1 to R4 stored in the predetermined buffer area to the top of the empty entry in the special figure reservation memory 570 (S328), and adds 1 to the start winning counter count number. The stored number is increased by 1 (S329).

  If the start prize is stored in S321 but the maximum value of 4 has been reached, and if the number of executions of the timer interrupt process has not reached the predetermined number in S322, the start port switch passing process is terminated.

  As described above, the timer interrupt process has been executed a predetermined number of times in reading the random R from the random value storage circuit 531 in the start-port switch passing process (that is, while the timer interrupt process is executed a predetermined number of times). The random number is read from the random value storage circuit 531 on condition that the winning detection signal SS is continuously input). Therefore, it is possible to prevent the random number from being read again after the random number is read and before the value of the random number stored in the random value storage circuit 531 is updated. Further, it is possible to prevent the random number having the same value as the random number read from the previous random number value storage circuit 531 from being read again.

  Next, the special symbol normal process (S300) in the special symbol process will be described. FIG. 40 is a flowchart showing a special symbol normal process executed when the big hit game is finished. In the special symbol normal processing, the game control microcomputer 560 is in a state where the variation of the special symbol can be started (for example, when the value of the special symbol process flag is a value indicating S300) (S380), The random numbers R1 to R4 stored in correspondence with the holding number “1” are read from the special figure holding memory 570 (S381). In this case, the game control microcomputer 560 decrements the number of reserved memories by decrementing the count of the start winning counter by 1, and the second to fourth entries (holding number “2”) in the special figure holding memory 570. To “4”), the value of random R is shifted upward by one entry (S382).

  Further, the game control microcomputer 560 checks whether or not the probability variation flag is set (S383). That is, the game control microcomputer 560 confirms whether or not the game state is controlled to the certain change state. If the probability change flag is not set, the game control microcomputer 560 determines that the game state is a normal state other than the probability change state, and determines whether or not the display result of the special symbol display 8 is a jackpot symbol. As a table to be used for this, a normal jackpot determination table (see FIG. 27) is set (S384). When the probability change flag is set, the game control microcomputer 560 determines that the game state is a probability change state and determines whether or not the display result of the special symbol display 8 is a big hit symbol. As a table used for the above, a probability change big hit determination table (see FIG. 27) is set (S385).

  The game control microcomputer 560 determines whether or not the display result of the special symbol display 8 is a jackpot symbol based on the value of the random R1 stored in the predetermined buffer area in the start port switch passing process (S386). ). In this case, the game control microcomputer 560 determines whether or not to win, using the normal jackpot determination table set in S384 or the probability change jackpot determination table set in S385.

  If it is determined that the display result of the special symbol display 8 is a big hit symbol, the game control microcomputer 560 turns on a big hit flag indicating that it is a big hit state (S387). If the display result of the special symbol display 8 is determined not to be a big hit symbol, the game control microcomputer 560 turns off the big hit flag (S388). Then, the game control microcomputer 560 updates the value of the special symbol process flag to a value corresponding to the special symbol stop symbol setting process (S389).

  As described above, in this embodiment, the random number circuit 503 is initially set (random number circuit setting process) from the start of power-on to the pachinko gaming machine 1 until the timer interrupt is set. In the random number circuit setting process, a value based on an ID number unique to the game control microcomputer 560 is set as an initial value of the random number. Therefore, the randomness of the random number generated by the random number circuit 503 can be improved. In addition, since randomness of random numbers can be improved, the timing of random number generation can be made difficult to be recognized by a player or a game store, and a capture signal using a radio signal is generated for the pachinko gaming machine 1. Accordingly, it is possible to prevent the condition for shifting to the specific gaming state such as the big hit state from being illegally established.

  In this embodiment, the inverting circuit 532 of the random number circuit 503 generates the inverted clock signal SI2 whose polarity is inverted, and outputs a latch signal for instructing storage of the random number in synchronization with the inverted clock signal SI2. . Therefore, the timing for updating the random number and the timing for storing the random number in the random value storage circuit 531 can be shifted, and the generated random number can be stored stably and reliably.

  Next, the special symbol stop symbol setting process (S301) in the special symbol process process will be described. FIG. 41 is a flowchart showing a special symbol stop symbol setting process. In the special symbol stop symbol setting process, first, in S390, it is determined whether or not the big hit flag is set to the on state. When it is determined that the big hit flag is set to the on state, it is determined in S391 whether or not the value of the random R2 is a value within the range of “10 to 19”. That is, it is determined whether or not the probability variation big hit is generated.

  When it is determined in S391 that the value of random R2 read in S381 is a value within the range of “10 to 19”, the value of random R3 read in S381 is changed from “3, 7”, which is a probability variation symbol, in S392. A process of determining a jackpot symbol is performed based on this. For example, when the read random R3 value is 0, 2, or 4, the probability variation symbol “3” is determined as the big hit symbol, and when the read random R3 value is 1 or 3, the probability variation symbol is used. A process of determining a certain “7” as a big hit symbol is performed. In S393, a process of setting a probability variation big hit symbol command as a symbol command to be transmitted to the sound / lamp control board 70 is performed.

  On the other hand, when it is determined in S391 that the value of the random R2 read in S381 is not within the range of “10 to 19”, the random value read in S381 from “1, 5, 9” which is a non-probability variable symbol in S394. A process of determining a jackpot symbol based on the value of R3 is performed. For example, when the value of the read random R3 is 0 or 3, “1” that is a non-probable variable is determined as a jackpot symbol, and when the value of the read random R3 is 1 or 4, the non-probable variable “5” is determined. "Is determined as a jackpot symbol, and when the value of the read random R3 is 2," 9 "which is a non-probability variable symbol is determined as a jackpot symbol. In S395, a process of setting a non-probable big hit symbol command as a symbol command to be transmitted to the sound / lamp control board 70 is performed.

  When it is determined in S390 that the big hit flag is not set to the ON state, the lost symbol is determined based on the random R3 value read in S381 from "0, 2, 4, 6, 8" which is the lost symbol in S396. Processing is performed. For example, when the value of the read random R3 is 0, “0” is determined as the off symbol, and when the value of the read random R3 is 1, “2” is determined as the off symbol and the value of the read random R3 is determined. “4” is determined as an off symbol when the value of 2 is 2, “6” is determined as an off symbol when the value of the read random R3 is 3, and “8” when the value of the read random R3 is 4. The process of determining as a symbol that is removed is performed. In S397, a process of setting a symbol command that is not a symbol command to be transmitted to the sound / lamp control board 70 is performed.

  In S398, a process of setting the symbol determined in any of S392, S394, or S396 as a scheduled stop symbol is performed. In S399, processing for updating the value of the special symbol process flag to a value corresponding to the variation time setting processing is performed.

  The setting of the symbol command is specifically performed by setting the symbol command data in the buffer of the RAM 55. When the symbol command is set in this way, the symbol command is output in S27 of FIG.

  Next, the variation time setting process (S302) in the special symbol process will be described. FIG. 42 is a flowchart showing the variation time setting process. In the variation time setting process, first, in S401, it is determined whether or not the big hit flag is set to an on state. When it is determined that the big hit flag is set to the on state, in S402, the big hit table described with reference to FIG. 28 is looked up. On the other hand, when it is determined in S401 that the big hit flag is not set, the process of looking up the loss time table described in FIG. 28 is performed in S403.

  In S404, a process for determining a variation pattern is performed using the table looked up in S402 or S403 according to the value from the random R3 read in S381.

  In S405, a process of setting a variation pattern command corresponding to the variation pattern determined in S404 as a variation pattern command to be transmitted to the sound / lamp control microcomputer 700 is performed. In S406, based on the variation pattern determined in S405, a process of updating the value of the special symbol process flag to a value corresponding to the special symbol variation process for starting a new variation display on the special symbol display 8 is performed. To end the variation pattern setting process.

  Note that the setting of the variation pattern command is specifically performed by setting the variation pattern command data in the buffer of the RAM 55. When the variation pattern command is set in this way, the variation pattern command is output in S27 of FIG.

  Next, the operation of the sound / lamp control microcomputer 700 will be described. FIG. 43 is a flowchart showing a sound / lamp control main process executed by the sound / lamp control microcomputer 700. In the sound / lamp control main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, initializing a timer for determining the activation control activation interval, and the like (S501).

  When the initialization process is completed, the sound / lamp control microcomputer 700 monitors a timer interrupt flag (S502). When a timer interrupt occurs, the sound / lamp control microcomputer 700 sets “1” as the value of the timer interrupt flag in the timer interrupt process. If “1” is set as the value of the timer interrupt flag in S502, the sound / lamp control microcomputer 700 clears the value of the timer interrupt flag (S503) and executes the following effect control processing. .

  A timer interrupt occurs every 33 ms, for example. That is, the sound / lamp control process is started, for example, every 33 ms. In the timer interrupt process in this embodiment, only the process of setting “1” as the value of the timer interrupt flag is performed, and the specific sound / lamp control is executed in the main process. The sound / lamp control process may be executed in the process.

  In the effect control process, first, a command analysis process for analyzing the received effect control command is executed (S504). Next, an effect to be executed is determined from a plurality of types of effects based on the received effect control command, and a process of setting a display control command corresponding to the determined effect is executed (S505). And the process which transmits the set display control command to the microcomputer 800 for display control is performed (S506).

  Also, a sound control process for performing sound control based on the effect determined according to the received effect control command (a process for executing sound control by selecting a process corresponding to the control state) is executed (S507). . Further, lamp control (prize ball lamp 51, ball break lamp 52, decoration lamp 25, game effect lamp 40, top frame lamp 28a, left frame lamp 28b, and right frame based on the effect determined according to the received effect control command. A lamp control process for controlling the lamp 28c (a process for executing a lamp control by selecting a process corresponding to the control state) is executed (S508).

  Next, a random number update process for updating a predetermined random counter is executed (S509). In the random number update process, for example, an effect determination random counter (also referred to as RS1) for determining an effect to be executed from a plurality of effects, a symbol determination random counter (left) for determining a combination of stop symbols (The symbol determination is RS2-1, the middle symbol determination is RS2-2, and the right symbol determination is also referred to as RS2-3.) Secondary re-lottery display used to determine whether or not to perform secondary re-lottery display Various random counters such as a random counter for determination (also referred to as RS3) and a temporary counter for determining temporary stop symbols (also referred to as RS4) for determining a combination of temporary stop symbols to be temporarily stopped in the re-lottery display are updated. The Thereafter, the process returns to S502 for checking the timer interrupt flag.

  Here, the various random counters updated in the random number update process of S509 will be described in detail. FIG. 44 is a diagram for explaining various random counters used by the sound / lamp control microcomputer 700 for effect control. FIG. 44 shows four types of random counters, random counters RS1 to RS4.

  First, the random RS1 is a random counter for updating a count value used to randomly determine which effect is to be executed based on the variation pattern command among the effect control commands transmitted from the game control microcomputer 560. It is. The random RS1 is updated every 33 msec, updated from 0 and updated to 99 which is the upper limit, and then updated from 0 again.

  Random RS2-1 to Random RS2-3 update the count value used to randomly determine which symbol is to be stopped based on the symbol command among the effect control commands transmitted from the game control microcomputer 560. It is a random counter for. Random RS2-1 to Random RS2-3 are updated from 0 and updated from 0 after being updated to 9 which is the upper limit thereof. RS2-1 is updated every 33 msec. Also, the random RS2-2 is incremented by one for each carry of the random R2-1. Random RS2-3 is incremented by one for each carry of random RS2-2.

  In this embodiment, when the probability variation big hit symbol command is input from the game control microcomputer 560, the stop symbol is changed from the odd symbol so that the combination of the three odd numbers of decorative symbols is stopped and displayed. It is determined. In addition, when the non-probable big hit symbol command is input from the game control microcomputer 560, the stop symbol is determined from the even number of decorative symbols so that the combination of the three sets of even number of decorative symbols is stopped and displayed. .

  When the variation pattern command input from the game control microcomputer 560 to the sound / lamp control microcomputer 700 is a variation pattern command for generating a reach state, the right symbol is determined using RS2-1. Then, a process for forcibly determining the same symbol as the left symbol as a stop symbol is performed.

  Random RS3 is a random counter for secondary re-lottery determination used to determine whether or not to perform secondary re-lottery display, and is updated from 0 and updated up to 9, which is the upper limit, and then 0 again. Is added and updated. The random RS3 is incremented by 1 every timer interrupt, that is, every 33 msec.

  Random RS4 randomly determines which symbol is temporarily stopped as a jackpot symbol based on the variation pattern command of the effect control command transmitted from the game control microcomputer 560 and the result of the secondary re-lottery determination described later. This is a random counter for updating the count value used for this purpose. The random RS4 is updated every 33 msec, updated from 0, updated to 9 which is the upper limit thereof, and then updated from 0 again.

  FIG. 45 is a flowchart showing a subroutine program of command analysis processing in which the sound / lamp control microcomputer 700 analyzes the effect control command input from the game control microcomputer 53.

  First, in S510, an effect control command received by the sound / lamp control microcomputer 700 is temporarily stored in a storage area provided in the RAM 75 mounted on the sound / lamp control microcomputer 700. A process is performed to determine whether or not there is a new received command in the command receiving buffer.

  When it is determined that there is a new received command in S510, the received command is read in S512, and in S513, it is determined whether or not the read command is a symbol command. If it is determined in S513 that the command is a symbol command, processing for setting a flag corresponding to the symbol command is performed in S514, and the process proceeds to S515. When the symbol command is a non-probability variable big hit command, the big hit flag is set to an on state, and when it is a probable variable big hit command, the probable variable big hit flag is set to an on state.

  On the other hand, when it is determined in S513 that the command is not a symbol command, processing for determining whether or not the command is a variation pattern command is performed in S515. When it is determined in S515 that the command is a variation pattern command, processing for setting an effect start flag for starting an effect such as variable display is performed in S516. On the other hand, when it is determined in S515 that it is not a variation pattern command, in S517, it is determined whether or not it is a symbol determination command used for stopping the symbol. When it is determined in S517 that the received command is a symbol confirmation command, a stop flag is set in S518, and a command for instructing stoppage of the ornament symbol is transmitted to the display control microcomputer 800. The process for identifying and setting the stop command is performed, and the command analysis process is terminated. When the symbol confirmation command is received as an effect control command in this way, the relationship between the symbol confirmation command and the stop command is associated with one to one, and for example, transmitted in response to the reception of the symbol confirmation command. The display control command to be transmitted is specified in correspondence with the received effect control command, such as specifying the stop command to be performed. The set stop command is transmitted to the display control microcomputer 800 in S506.

  On the other hand, when it is determined in S517 that the received command is not a symbol determination command, a flag corresponding to the received command is set in S519 and the command analysis process is terminated.

  FIG. 46 is a flowchart showing a subroutine program of command setting processing for setting various commands when the effect start flag is set in S516 of FIG.

  First, in S520, a process for determining whether or not an effect start flag is set is performed. If it is determined in S520 that the effect start flag is not set to the on state, the command setting process is terminated. On the other hand, when it is determined in S520 that the effect start flag is set, processing of reading the values of random RS1 to random RS4 and storing them in a predetermined buffer area is performed in S520a. Then, a secondary re-lottery determination process for determining whether or not the secondary re-lottery display is performed is performed in S521, and a decorative symbol command setting process for setting a combination of decorative symbols to be stopped in the variable display device 9 in S522. In S523, a decoration variation pattern command setting process for setting a decoration variation pattern for specifying the variation pattern of the decoration symbol in the variation display device 9 is performed, and the command setting process is terminated.

  FIG. 47 is a flowchart for explaining the secondary re-lottery determination process (S521) of the command setting process.

  In the secondary re-lottery determination process, first, a process of determining whether or not the big hit flag is set in S530 is performed. When it is determined that the big hit flag is not set to the on state, the secondary re-lottery determination process is terminated. On the other hand, when it is determined in S530 that the big hit flag is set in the on state, in S531, it is determined whether or not the probability variation big hit flag is set in the on state. When it is determined in S531 that the probability variation big hit flag is set to the on state, processing is performed in S532 to determine whether or not the value read from random RS3 to S520a is an odd value. When it is determined in S532 that the number is not an odd number, the secondary re-lottery determination process is terminated. On the other hand, when it is determined in S532 that the number is an odd number, processing for setting a secondary re-lottery display command for performing secondary re-lottery display is performed in S534, and the secondary re-lottery determination processing ends.

  On the other hand, when it is determined in S531 that the probability variation big hit flag is not set to the ON state, in S533, it is determined whether the value read out from the random RS3 to S520a is any one of “1, 3, 5” Is done. When it is determined in S533 that it is not one of “1, 3, 5”, the secondary re-lottery determination process is terminated. On the other hand, when it is determined in S533 that it is one of “1, 3, 5”, the process proceeds to S534 described above.

  In the present embodiment, as described in S531 to S534, when the probability variation big hit flag is set to the on state, the secondary re-lottery display command is compared with the case where it is not set. By increasing the number of values to be set, the ratio of executing the secondary re-lottery display is increased.

  FIG. 48 is a flowchart for explaining the decorative symbol command setting process (S522) of the command setting process.

  In the decorative symbol command setting process, first, in S540, a process of determining whether or not the big hit flag is set to the on state is performed. When it is determined that the big hit flag is not set to the ON state, a process of determining a combination of symbols that are out of stop as a stop symbol in S549 using the values of random RS2-1 to random RS2-3 read in S520a is performed. It is. In addition, when the stop symbol corresponding to random RS2-1 to random RS2-3 coincides with the combination of the jackpot symbol by chance, each stop symbol is determined by being corrected so as to be a losing symbol. Further, when the variation pattern specified from the variation pattern command transmitted from the game control microcomputer 560 is a variation pattern that generates a reach state, each of the left and right sides is determined using the value of the random RS2-1. The stop symbols are determined to match.

  On the other hand, when it is determined in S540 that the big hit flag is set, whether or not the fluctuation pattern command received in S541 is a fluctuation pattern command for specifying a fluctuation pattern per primary re-lottery for performing the primary re-lottery display. A process for discriminating is performed. When it is determined in S541 that the variation pattern command per primary re-lottery is determined, a process for determining whether or not the secondary re-lottery display is determined in the secondary re-lottery determination process described in FIG. 47 in S542 is performed. Done. When it is determined in S542 that the secondary re-lottery display is to be performed, in S544, a process of determining a combination of non-probable large hit symbols as the first and second temporary stop symbols using the value of the random RS4 read in S520a is performed. . Here, the first temporary stop symbol means a decorative symbol that is temporarily stopped before the first re-lottery display is performed, and the second temporary stop symbol is temporarily stopped before the second re-lottery display is performed. A decorative pattern.

  On the other hand, when it is determined in S542 that the secondary re-lottery display is not performed, in S542a, a process of determining the combination of the non-probable variation big hit symbol as the first temporary stop symbol using the value of the random RS4 read in S520a is performed. .

  If it is determined in S541 that the variation pattern command is not per primary re-lottery, it is determined in S543 whether or not the secondary re-lottery display is determined in the secondary re-lottery determination process described in FIG. Is done. When it is determined in S543 that the secondary re-lottery display is not performed, the process proceeds to S546. On the other hand, when it is determined in S543 that the secondary re-lottery display is to be performed, a process of determining the combination of the non-probable variation big hit symbol as the second temporary stop symbol in S545 using the value of the random RS4 read in S520a is performed.

  In S546, processing for determining whether or not the probability variation big hit flag is set to the on state is performed. When it is determined in S546 that the probability variation jackpot flag is set to the on state, processing is performed in S547 to determine the combination of probability variation jackpot symbols as the stop symbol using the value of the random RS2-1 read in S520a. On the other hand, when it is determined in S546 that the probability variation big hit flag is not set to the ON state, processing for determining a combination of non-probable big hit symbols as a stop symbol using the value of the random RS2-1 read in S520a as a stop symbol in S548. Done.

  In S550, the first and second temporary stop symbol commands for specifying the decorative symbol determined in S544, the first temporary stop symbol command for specifying the decorative symbol determined in S542a, and determined in S545 A process of setting a second temporary stop symbol command for specifying a decorative symbol and a stop symbol command for specifying a decorative symbol determined in any of S547 to S549 is performed, and the decorative symbol command setting process is terminated.

  FIG. 49 is a flowchart for explaining a decoration variation pattern command setting process (S523) in the command setting process.

  In the decoration variation pattern command setting process, first, a process of looking up a table corresponding to the variation pattern command received in S551 is performed. In S552, a process for determining a decoration variation pattern is performed using the table looked up in S551 in accordance with the value of the random RS1 read in S520a.

  Here, the table looked up in S551 will be described. FIG. 50 is a diagram for explaining a decoration variation pattern determination table used to determine a decoration variation pattern. As the decoration variation pattern in the present embodiment, one decoration variation pattern is determined based on the variation pattern command transmitted from the game control microcomputer 560 and the value of the random RS1.

  When the variation pattern command received from the game control microcomputer 560 is “8000h”, the table for 8000 hours is referred to. In the 8000 o'clock table, when the value of the random RS1 is in the range of “0 to 69”, the ornamental normal deviation variation pattern without notice is determined, and when the value of the random RS1 is in the range of “70 to 89”, the notice 1 is executed. When the notice 1 decoration normal deviation variation pattern is determined and is within the range of “90 to 96”, the notice 2 decoration normal deviation variation pattern is determined and is within the range of “97 to 99”. The distribution is set so that the variation pattern of the normal deviation 3 for performing the advance notice 3 is determined.

  When the variation pattern command received from the game control microcomputer 560 is “8001h”, the table for 8001 is referred to. In the 8001 o'clock table, when the value of the random RS1 is in the range of “0 to 64”, the normal reach deviating 1 variation pattern without notice is determined, and when the random RS1 value is in the range of “65 to 84”, the notice 1 is displayed. Preliminary 1-decoration normal reach deviating 1 variation pattern to be executed is determined, and the 2-division normal reach deviating 1 deviating pattern is determined when it is within the range of “85 to 93”, and within the range of “94 to 99” At this time, the distribution is set so that the 1-variation pattern is determined to be out of the normal-reach 3 decoration for executing the advance notice 3. Note that the notice 1 to notice 3 are performed in different modes, such as the character that appears, the timing of appearance, and the type of background image. That is, the variation display means, the sound output means, and the light emission means are controlled in different modes depending on which of the notice 1 to notice 3 is executed.

  When the variation pattern command received from the game control microcomputer 560 is “8002h”, the 8002 hour table is referred to. In the 8002 o'clock table, when the value of the random RS1 is in the range of “0 to 59”, the decorative normal reach deviation 2 variation pattern without notice is determined, and when the random RS1 value is in the range of “60 to 80”, the notice 1 is displayed. Preliminary 1-decoration normal reach deviating 2 variation pattern to be executed is determined, and when 2-division pattern is within the range of “81-92”, the 2-division normal reach deviating 2-variation pattern is determined and within the range of “93-99” At this time, the distribution is set so that the notice 3 decoration for executing the notice 3 and the normal reach deviating 2 variation pattern are determined.

  When the variation pattern command received from the game control microcomputer 560 is “8002h”, the 8002 hour table is referred to. In the 8002 o'clock table, when the value of the random RS1 is in the range of “0 to 59”, the decorative normal reach deviation 2 variation pattern without notice is determined, and when the random RS1 value is in the range of “60 to 80”, the notice 1 is displayed. Preliminary 1-decoration normal reach deviating 2 variation pattern to be executed is determined, and when 2-division pattern is within the range of “81-92”, the 2-division normal reach deviating 2-variation pattern is determined and within the range of “93-99” At this time, the distribution is set so that the notice 3 decoration for executing the notice 3 and the normal reach deviating 2 variation pattern are determined.

  Hereinafter, similarly, a table corresponding to the variation pattern command received from the game control microcomputer 560 is referred to, and based on which range the value of the random RS1 belongs, no notice, notice 1, notice 2, or A decoration variation pattern for executing the notice 3 is determined. In the present embodiment, the sound / lamp control microcomputer 700 refers to the decoration variation pattern determination table and determines the decoration variation pattern based on the value of the random RS1, thereby determining the effect.

  In the decoration variation pattern determination table in the present embodiment, any one of the notices 1 to 3 is executed when the variation pattern command received from the game control microcomputer 560 is any one of “8000h to 8004h”. One of the notices 1 to 3 is executed when the variation pattern command received from the game control microcomputer 560 is one of “8010h to 8014h” rather than the ratio at which the decoration variation pattern to be determined is determined. The distribution is set so that the ratio at which the decoration variation pattern is determined is high.

  In the parentheses below the random RS1 values distributed for each table in FIG. 50, a decoration as a second control signal transmitted from the sound / lamp control microcomputer 700 to the display control microcomputer 800 is displayed. A variation pattern command is shown. For example, when the 8002 o'clock table is referenced and the random RS1 value is within the range of “0 to 59” and the normal reach deviating unrecognized two-variation pattern is determined, the display control command “9008h” When the pattern command is transmitted and the notice 1 decoration normal reach out of the range of “60 to 80” is determined, the decoration change pattern command “9009h” is transmitted as the display control command. When the two-variation pattern of the two-way normal reach that determines the second notice is executed within the range of “81 to 92”, a decoration change pattern command of “900 Ah” is transmitted as a display control command, and “93 to 99” Run notice 3 within range 3 Decorative variation pattern command "900Bh" is transmitted as the display control command when it is. Similarly, when another table is referred to, a decoration variation pattern command corresponding to the determined decoration variation pattern is transmitted.

  Returning to FIG. 49, in S553, a process for setting a decoration variation pattern command corresponding to the decoration variation pattern determined in S552 is performed as a decoration variation pattern command to be transmitted to the display control microcomputer 800, and decoration variation pattern command setting is performed. The process ends.

  Next, the operation of the display control microcomputer 800 will be described. FIG. 51 is a flowchart showing a display control main process executed by the display control microcomputer 800. In the display control main process, first, an initialization process is performed for clearing the RAM area, setting various initial values, initializing a timer for determining the activation control activation interval, and the like (S601).

  When the initialization process is completed, the display control microcomputer 800 monitors the timer interrupt flag (S602). When a timer interrupt occurs, the display control microcomputer 800 sets “1” as the value of the timer interrupt flag in the timer interrupt process. If “1” is set as the value of the timer interrupt flag in S602, the display control microcomputer 800 clears the value of the timer interrupt flag (S603), and executes the following display control processing.

  A timer interrupt occurs every 33 ms, for example. That is, the display control process is activated every 33 ms, for example. In the timer interrupt process in this embodiment, only the process of setting “1” as the value of the timer interrupt flag is performed, and the specific display control process is executed in the main process. The display control process may be executed in

  In the display control process, first, a power-off process for monitoring whether or not a power-off signal is output is executed (S604). Next, command analysis processing for analyzing the received display control command is executed (S605). Next, display control process processing is performed (S606). In the display control process, the process corresponding to the current control state (display control process flag) is selected from the processes corresponding to the control state, and the display control of the variable display device 9 is executed.

  Next, a random number update process for updating a predetermined random counter is executed (S607). Thereafter, the process returns to the process of checking the timer interrupt flag in S602. The display control INT signal from the sound / lamp control board 70 is input to the interrupt terminal of the display control microcomputer 800. For example, when the INT signal from the sound / lamp control board 70 is turned on, an INT interrupt is generated in the display control microcomputer 800. The display control microcomputer 800 executes display control command reception processing in the interrupt processing. In the display control command reception process, the display control microcomputer 800 stores the received display control command data in a command reception buffer provided in the RAM 85, analyzes the command based on the command data, and performs various processes. Execute the process.

  Next, the display control process according to S606 in FIG. 51 will be described. FIG. 52 is a flowchart showing display control process processing. In the display control process, any one of S700 to S706 is executed according to the value of the display control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (S700): It is confirmed whether or not a decoration variation pattern command has been received. If it is confirmed that a decoration variation pattern command has been received, the value of the display control process flag is set to a value corresponding to S701. Update to

  Symbol variation start processing (S701): The variation time is set in the variation time timer in response to the ornament variation pattern command, and the variation of the ornament symbols (left, middle and right symbols) in the variation display device 9 is started. Thereafter, the value of the display control process flag is updated to a value corresponding to S702.

  Symbol variation processing (S702): Controls the switching timing of each variation state (variation speed, advance notice, background image, primary re-lottery display, etc.) constituting the ornament variation pattern in the variation display device 9, and is set Monitor the end of the variable time. Then, when the variation time set in the variation time timer is over, the left, middle, and right symbols of the decorative symbol are temporarily stopped, and the control is performed so that the symbol is swaying without confirming the display result. Do. Thereafter, the value of the display control process flag is updated to a value corresponding to S703. The primary re-lottery display described above is executed in the symbol variation process. That is, when the first and second temporary stop symbol commands for specifying the decorative symbol determined in S544 described with reference to FIG. 48 are received, the received first temporary stop symbol command is displayed in the symbol changing process. After temporarily stopping the corresponding decorative symbol, a process of temporarily stopping the decorative symbol corresponding to the second temporary stop symbol command by performing the first re-lottery display is performed. 48, when the first temporary stop symbol command for specifying the decorative symbol determined in S542a described in FIG. 48 is received, the symbol corresponding to the received first temporary stop symbol command in the symbol variation processing. After the symbol is temporarily stopped, a process for temporarily stopping the decorative symbol corresponding to the stop symbol command is performed by performing the first re-lottery display. When the second temporary stop symbol command for specifying the decorative symbol determined in S545 described in FIG. 48 is received, the symbol corresponding to the received second temporary stop symbol command is displayed in the symbol variation processing. Processing to temporarily stop the symbol is performed.

  Symbol stop waiting process (S703): If the stop command is received after the variation time specified by the ornament variation pattern command has elapsed, the variation of the ornament symbol on the variation display device 9 is stopped (the above-mentioned fluctuation variation state is stopped). ) And control to display the stop symbol to confirm the stop symbol. Even when the secondary re-lottery display is performed, in the symbol stop waiting process, a process of stopping the decorative symbol corresponding to the second temporary stop symbol command is performed. Thereafter, when the stop symbol of the decorative symbol on the variable display device 9 is a combination of the big hit symbol, the value of the display control process flag is updated to a value according to S704, and the display control of the big hit gaming state is performed. On the other hand, when the stop symbol of the decorative symbol on the variable display device 9 is a combination of symbols that are out of sync, the value of the display control process flag is updated to a value corresponding to S700.

  Big hit display processing (S704): After the end of the decorative symbol change time on the variable display device 9, display at the start of the big hit. Thereafter, the value of the display control process flag is updated to a value corresponding to S705.

  Big hit game processing (S705): Control for displaying a big hit game effect, which is a display for producing an effect during the big hit game. For example, display for performing effects during the big hit game such as various effects during each round in the big hit gaming state and various effects during the interval period between the rounds is executed. When the big hit game processing ends, the value of the display control process flag is updated to a value according to S706. The secondary re-lottery display described above is executed in the big hit game processing. That is, the second temporary stop symbol command for specifying the decorative symbol determined in S544 described in FIG. 48 or the second temporary stop symbol command for specifying the decorative symbol determined in S545 is received. Sometimes, during the big hit game process, a secondary re-lottery display is performed to stop the decorative symbol corresponding to the stop symbol command.

  Big hit game end process (S706): Ending display is performed as an effect when the big hit game state is ended. Thereafter, the value of the display control process flag is updated to a value corresponding to S700.

  Next, the symbol variation start process in S701 of FIG. 52 will be described. FIG. 53 is a flowchart showing the symbol variation start process (S701) of FIG. In the symbol variation start process, the display control microcomputer 800 performs the following process. First, data for performing a variation display with a decoration variation pattern corresponding to the received decoration variation pattern command is set (S711). Specifically, in S711, a decoration variation pattern is set by selecting and setting data used for variation display with a decoration variation pattern corresponding to the received decoration variation pattern command. Then, the fluctuation time corresponding to the received fluctuation pattern command is set in the fluctuation time timer for measuring the fluctuation time in the fluctuation display device 9, and the time of the fluctuation time timer (measurement of the fluctuation time) is started ( S712).

  Next, the variation display of the decorative symbol for deriving and displaying the display result on the variation display device 9 is started with the variation pattern set in S712 (S713). Then, the display control process flag is updated to a value corresponding to the symbol changing process (S702) (S714), and the process returns. In this way, the start of variation of the decorative pattern with the variation pattern set according to the variation pattern command is executed while being managed by the variation time set according to the variation pattern command.

  In response to such a display control command, after the decorative symbol variation display is started in the symbol variation start processing, decorative symbol display control is performed according to the display control process of FIG. In the sound / lamp control microcomputer 700, a command that is a basis for determining a decoration variation pattern command for instructing a variation display of a decoration symbol, and is in accordance with an effect control command that is a basis for determining an effect. 43, the sound control process corresponding to the display state of the decorative symbol is performed by the sound control process of S507 in FIG. 43, and the lamp control corresponding to the display state of the decorative symbol is performed in the lamp control process of S508 of FIG. Thereby, it is possible to perform a consistent effect between the display effect by the variable display device 9, the sound effect by the speaker 27, and the light effect by various lamps.

[Second Embodiment]
In the first embodiment, the clock signal input to the latch signal generation circuit 533 is inverted, and the timing for updating the random number is shifted from the timing for storing the random number in the random value storage circuit 531, but the latch signal generation circuit The clock signal input to 533 may be delayed. Hereinafter, a second embodiment in which a clock signal input to the latch signal generation circuit 533 is delayed will be described.

  In the present embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from those of the first embodiment will be mainly described.

  FIG. 54 is a block diagram illustrating another configuration example of the random number circuit 503. In this embodiment, the basic configurations of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are the same. As shown in FIG. 54, this embodiment is different from the first embodiment in that the random number circuit 503 includes a delay circuit 532A instead of the inverting circuit 532 shown in FIG.

  The delay circuit 532A delays the random number generation clock signal SI1 input from the clock signal output circuit 524, thereby generating a delayed clock signal SI4 obtained by delaying the clock signal. Further, the delay circuit 532A outputs the generated delayed clock signal SI4 to the latch signal generation circuit 533. Therefore, in this embodiment, the latch signal generation circuit 533 outputs a latch signal to the random value storage circuit 531 in synchronization with the delayed clock signal SI4 obtained by delaying the random number generation clock signal SI1.

  The basic functions of the constituent elements of the random number circuit 503 other than the delay circuit 532A are the same as those functions described in the first embodiment.

  As described above, in this embodiment, the delay circuit 532A of the random number circuit 503 generates the delayed clock signal SI4 and outputs a latch signal for instructing storage of the random number in synchronization with the delayed clock signal SI4. . Therefore, the timing for updating the random number and the timing for storing the random number in the random value storage circuit 531 can be shifted, and the generated random number can be stored stably and reliably.

[Application examples of other gaming machines]
Next, the overall configuration of a slot machine (slot machine), which is another example of the pachinko gaming machine 1 in each embodiment described above, will be described. FIG. 55 is a front view of the slot machine as seen from the front.

  As shown in FIG. 55, in the slot machine 600, a game panel 601 is detachably attached near the center. In addition, near the center of the front surface of the game panel 601, a variable display device 602 that displays various types of symbols in a variable manner is provided. In this embodiment, the variable display device 602 has three symbol display areas “left”, “middle”, and “right”, and the symbol display reels 602a, 602b, and 602c correspond to the symbol display areas, respectively. Is provided.

  Below the game panel 601, there is provided an operation table 620 on which various input switches for the player to perform various operations are arranged. On the back side of the operation table 620, a BET switch 621 for betting (putting) coins one by one, and a MAXBET switch 622 for betting coins by the maximum number (three in this example) that can be placed in one game. A settlement switch 623 and a coin insertion slot 624 are provided. Coins inserted into the coin insertion slot 624 are detected by an inserted coin sensor (not shown).

  On the front side of the operation table 620, a start switch 625, a left reel stop switch 626a, a middle reel stop switch 626b, a right reel stop switch 626c, and a coin jam elimination switch 627 are provided. Lamps 628a and 628b are provided on the right and left sides of the operation table 620, respectively. Below the operation table 620, a speaker 630 for outputting sound effects and the like is provided.

  On the upper part of the game panel 601, an image display device (LCD: liquid crystal display device) 640 for notifying a player of a game method, a game state, and the like is provided. For example, when a winning occurs, an image in which a character performs a predetermined action is displayed on the image display device 640 to notify the player that a winning flag described later is set. Two speakers 641L and 641R that emit sound effects are provided on the left and right of the image display device 640.

  The winning combinations generated in the slot machine 600 include a small winning combination, a replay winning, a big bonus winning, and a regular bonus winning. In the slot machine 600, random numbers are extracted at the timing when the start switch 625 is operated, and it is determined whether or not the winning of any winning combination is allowed. The fact that winnings are allowed is said to be “winning internally”. When an internal winning is made, a winning flag indicating that is set in the slot machine 600. In the game with the winning flag set, the reels 602a to 602c are controlled so that the winning combination corresponding to the winning flag can be drawn. On the other hand, in a game in which the winning flag is not set, the reels 602a to 602c are controlled so that no winning is generated.

  Note that the game control microcomputer that controls the progress of the game of the slot machine 600 incorporates a random number circuit (12-bit random number circuit and 16-bit random number circuit) that generates random numbers. Further, the game control microcomputer extracts the random number (random R) generated by the random number circuit at the timing when the start switch 625 is operated. For example, when the start switch 625 is pressed, the game control microcomputer 560 inputs the detection signal SS from the start switch 625. When the timer circuit 534 of the random number circuit detects that the detection signal SS has been input continuously for a predetermined time, the random number value capture data “01h” is written in the random value capture register 539 and the latch signal generation circuit 533 is written. Outputs the latch signal SL to the random value storage circuit 531. When the latch signal SL is input, the random value storage circuit 531 reads and stores the count value updated by the counter 521. In addition, when the game control microcomputer 560 detects that the detection signal SS is continuously input a predetermined number of times (for example, three times), it outputs the output control signal SC to the random number value storage circuit of the random number circuit, A random value (random R) is extracted from the random number circuit. Then, the game control microcomputer determines whether or not the winning is allowed based on the extracted random R.

Next, an outline of the game provided by the slot machine will be described.
For example, when a multiplier is set by inserting a coin from the coin insertion slot 624 and pressing the BET switch 621 or the MAXBET switch 622, the operation of the start switch 625 becomes effective. When the player operates the start switch 625, the symbol display reels 602a to 602c provided in the variable display device 602 start rotating. In addition, when a regular bonus prize or a big bonus prize is internally won at the timing when the start switch 625 is operated, for example, a screen on which a predetermined character performs a predetermined action is displayed on the image display device 640. Thus, the player or the like is notified that the internal winning is made.

  When a predetermined time elapses after the symbol display reels 602a to 602c start rotating, the operations of the reel stop switches 626a to 626c become effective. In this state, if the player presses one of the reel stop switches 626a to 626c, the rotation of the reel corresponding to the operated stop switch is stopped. When the symbol display reels 602a to 602c are left for a predetermined period or longer without being stopped, the symbol display reels 602a to 602c are automatically stopped.

  When all the symbol display reels 602a to 602c are stopped, the symbol display reels 602a to 602c displayed on the variable display device 602 are determined according to the number of symbols in the upper, middle and lower three symbols. Whether or not a prize is won is determined by a combination of symbols positioned on a valid winning line. When the multiplying number is 1, only the middle one horizontal winning line in the variable display device 602 is valid. When the multiplying number is 2, the top three, the middle, and the bottom three pay lines in the variable display device 602 are valid. When the number of multiplications is 3, a total of five pay lines of three horizontal rows and two diagonal diagonal lines in the variable display device 602 are effective lines.

  When a combination of symbols on the active line becomes a specific display mode determined in advance and a winning occurs, a predetermined game effect is made by sound, light, display on the image display device 640, etc., and the winning is generated The game according to is started.

  In the slot machine 600, the effect control means mounted on the slot machine 600 controls the display of the image display device 640 provided in the slot machine 600. The image display device 640 displays various kinds of information such as a decorative pattern change display and a display for notifying a game state and a game method under the control of the effect control means. Various information such as a decorative display of a decorative pattern and a display for notifying a game state and a game method are displayed by a movie image, and the display control of the movie image is performed by the image display device 640. do it.

Next, main effects obtained by the embodiment described above will be described.
(1) The sound / lamp control microcomputer 700 is based on the presentation control command from the game control microcomputer 560, the secondary re-lottery determination process (S521), the decorative design command setting process (S522), and the decorative variation pattern. Predetermined arithmetic processing such as command setting processing (S523) is performed, and a display control command is specified and output to the display control microcomputer 800, whereby display control of the variable display device 9 is performed on the display control microcomputer 800. Can be made. Then, the game control microcomputer 560 performs initial setting of the random number circuit 503 from the start of power-on to the pachinko gaming machine 1 until the timer interrupt setting is performed, as in S15 of FIG. Since the value based on the ID number for identifying the game control microcomputer 560 in the initial setting is set as the initial value of the random number as in S154b of FIG. 33, the random number generated by the random number circuit 503 The randomness of can be improved. In addition, since randomness of random numbers can be improved, the timing of random number generation can be made difficult to be recognized by a player or a game store, and by generating a capture signal using a radio signal to a gaming machine It is possible to prevent the condition for shifting to the big hit gaming state from being illegally established.

  (2) The latch signal generation circuit 533 outputs a latch signal for storing the random number value in the random value storage circuit 531 in synchronization with the inverted clock signal obtained by inverting the polarity of the clock signal by the inversion circuit 532 in FIG. Thus, the timing for updating the random number value and the timing for storing the random number value in the random value storage circuit 531 can be shifted, and the generated random number value can be stored stably and reliably.

  (3) The delay circuit 532A of FIG. 54 is configured to output a latch signal for storing a random value in the random value storage circuit 531 from the latch signal generation circuit 533 in synchronization with the delayed clock signal. The timing for updating the random value and the timing for storing the random value in the random value storage circuit 531 can be shifted, and the generated random value can be stored stably and reliably.

  (4) When the sound / lamp control microcomputer 700 specifies that the variable display on the variable display device 9 is to be stopped by receiving the symbol confirmation command from the game control microcomputer 560 (YES in S517). Then, a stop command for stopping the fluctuation display in the fluctuation display device 9 is set (S518) and output to the display control microcomputer 800 (S506), and the display control microcomputer 800 stops the display of the fluctuating symbols and displays them. Control to derive and display the result is performed (S703). Thus, even when there is an error in the recognition of the variation time between the game control microcomputer 560 and the sound / lamp control microcomputer 700, the sound / lamp control microcomputer 700 stops the variation display. The timing can be adjusted.

  (5) The sound / lamp control microcomputer 700 is based on the presentation control command from the game control microcomputer 560, the secondary re-lottery determination process (S521), the decoration symbol command setting process (S522), and the decoration variation pattern. Command setting processing (S523) is performed, and the set display control command is output to the display control microcomputer 800, and the speaker 27, the prize ball lamp 51, the ball-out lamp 52, the decoration lamp 25, the ceiling lamp 28a, the left The frame lamp 28b, the right frame lamp 28c, etc. are controlled (S507, S508). Then, the display control microcomputer 800 performs display control of the variable display device 9 based on the received display control command. As a result, it is possible to achieve a consistent effect between the variable display device 9, the speaker 27, the prize ball lamp 51, the ball break lamp 52, the decoration lamp 25, the top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the like. Can be performed.

  (6) Whether a plurality of random number circuits having different ranges of numerical data that can be updated, such as the 12-bit random number circuit 503a and the 16-bit random number circuit 503b shown in FIG. Since it is configured, the range of the random value to be generated can be appropriately set by setting only the random number circuit to be used. Therefore, for example, when game control processing is performed using only random numbers generated by one of the two random number circuits 503a and 503b, unnecessary processing such as reading random numbers from a random number circuit that is not used for processing can be omitted. It is possible to reduce the control burden of the game control microcomputer 560.

  (7) Since S153c in FIG. 32 is configured to preset a value as the maximum value of the range in which the numerical data is updated, a value larger than the range of random numbers used during the execution of the timer interrupt process is set. Generation of random values can be prevented, and the processing load on the random number circuit 503 and the game control microcomputer 560 can be reduced. Further, when the set maximum value is equal to or less than a predetermined lower limit value, the maximum value is set again. Therefore, malfunction of the game control microcomputer 560 or a capture signal using a radio signal is set. It is possible to prevent an excessively small value from being set as the maximum value of the random number value by an action such as causing the pachinko gaming machine 1 to be generated.

  (8) Since the counter 521 is configured to preset the number of input clock signals, which is a condition for updating the numerical data, by S156 in FIG. 31, the randomness of the random number generated by the random number circuit is further improved. be able to.

  (9) Since S156 in FIG. 31 is configured to set the initial value based on the value calculated by the calculation using the ID number unique to the game control microcomputer 560, the random number circuit 503 generates the value. The randomness of random numbers can be further improved. Therefore, it is possible to make it difficult to recognize the initial value of the random number value only by looking at the ID number, and it is possible to improve the security.

  (10) When the numerical data generated by the random number circuit 503 is updated to the final value, the initial value is updated according to S220 to S226 in FIG. 36. Therefore, the random number generated by the random number circuit 503 is random. The sex can be further improved.

  (11) The latch signal generation circuit 533 in FIG. 6 latches the random value read signal output from the random value read signal output circuit 526 in synchronization with the rising edge of the inverted clock signal SI2 output from the inversion circuit 532. As shown to be output to the random value storage circuit 531 as the signal SL, when the random value storage circuit 531 stores the random value based on the output of the latch signal, the winning is continuously performed for a predetermined period. Since the latch signal is output on condition that the detection signal SS is input, the generation of the noise is erroneously recognized as the input of the winning detection signal SS, the latch signal SL is output, and the generated random value Can be prevented from being stored. In addition, the possibility that a latch signal is output by an action such as generating a capture signal using a radio signal to the pachinko gaming machine 1 and a random number value generated by an illegal latch signal is stored is reduced. be able to.

  (12) The latch signal generation circuit 533 synchronizes the random value read signal output from the random value read signal output circuit 526 with the rising edge of the inverted clock signal SI2 output from the inversion circuit 532 as the latch signal SL. As shown in FIG. 6, outputting to the random value storage circuit 531, when reading the random R value stored as the random value from the random value storage circuit 531, a timer interruption process is executed a predetermined number of times. Since the random number value is read from the random value storage circuit 531 on condition that the winning detection signal SS is continuously input, the random number value is read and stored in the random value storage circuit 531. It is possible to prevent the random number value from being read again before the random number value to be updated is updated. For this reason, it is possible to prevent the random value having the same value as the random value read from the random value storage circuit 531 from being read out last time from being read again.

  (13) As shown in S24 of FIG. 35, when the numerical data of the random number circuit 503 is updated to the final value, the count value permutation changing circuit 523 changes the permutation of the count values output by the counter 521 of the random number circuit 503. Since the arrangement order from the initial value to the final value is updated, the randomness of the random number value generated by the random number circuit 503 can be further improved.

  (14) Generally, when it is inspected whether or not the game control microcomputer 560 is a regular microcomputer, the inside of the microcomputer is imaged by X-rays, and the regular microcomputer is based on the imaging result. A test is performed to determine if the computer is a computer. Therefore, whether or not the game control microcomputer 560 includes the random number circuit 503 can be determined based on the X-ray imaging result. Therefore, by adopting a structure in which the random number circuit 503 is incorporated in the game control microcomputer 560, when the microcomputer is counterfeited, the counterfeiter of the random number circuit 503 considers that an imaging inspection is performed by X-rays. Since it is necessary to make even counterfeit, it can be made difficult to forge.

Next, modifications and feature points of the embodiment described above are listed below.
(1) In the above-described embodiment, in order to perform presentation control including display control, sound control, and lamp control, two boards of a sound / lamp control board 70 and a display control board 80 are provided. In the example, the sound / lamp control board 70 receives the effect control command from the main board 31 and transmits the display control command from the sound / lamp control board 70 to the display control board 80 based on the received command. However, the present invention is not limited to this, and the display control board 80 receives the effect control command from the main board 31, and the sound control and lamp control are performed from the display control board 80 to the sound / lamp control board 70 based on the received command. A sound / lamp control command for instructing the command may be transmitted.

  (2) In the above-described embodiment, two boards, the sound / lamp control board 70 and the display control board 80, are provided in order to perform presentation control including display control, sound control, and lamp control. An example is shown. However, the present invention is not limited to this, and one effect control board on which one effect control microcomputer that performs overall display control, sound control, and lamp control is mounted may be provided.

  (3) In the embodiment described above, based on the fact that the symbol confirmation command for specifying that the decorative symbol variation display is to be stopped is transmitted from the game control microcomputer 560 to the sound / lamp control microcomputer 700, The example which stopped the change display of a decoration design was shown. However, the present invention is not limited to this, and it may be configured such that the decorative symbol variation display is stopped without using the symbol confirmation command. In that case, each of the sound / lamp control microcomputer 700 and the display control microcomputer 800 monitors whether or not the fluctuation time specified by the fluctuation pattern command has elapsed after the start of the fluctuation display. When the time has elapsed, control is performed so as to stop the variation display of the decorative symbols.

  (4) In the above-described embodiment, the designation of the first temporary stop symbol in the primary re-lottery display and the second temporary stop symbol in the secondary re-lottery display are different from the decoration pattern command and the stop symbol command. An example is shown in which a temporary stop symbol command and a second temporary stop symbol command are used, that is, a temporary stop symbol designation dedicated command is used. However, it is not performed by the command for exclusive use of the temporary stop symbol design in this way, but by the existing command such as the decoration variation pattern command or the stop symbol command or the like, the first temporary stop symbol and the secondary re-display in the primary re-lottery display. You may make it designate the 2nd temporary stop symbol in a lottery display.

  (5) As a method for changing the initial value of the random value, when the initial value input to the counter 521 is changed to a value based on the ID number for identifying the game control microcomputer 560, the ID is used as the initial value of the random value. The number value may be used as it is, or a value obtained by performing a predetermined calculation using the ID number may be used.

  (6) The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front surface of the game board in the state which removed the glass door frame. It is the rear view which looked at the pachinko gaming machine 1 from the back. It is a block diagram which shows the structural example of a game control board (main board). FIG. 4 is a block diagram showing a circuit configuration of a main board, a signal line of an effect control command transmitted from the main board to the effect control board, and a signal line of a display control command transmitted from the sound / lamp control board to the display control board. . It is a block diagram which shows the structural example of a random number circuit. It is explanatory drawing which shows the example of an update rule selection register. It is explanatory drawing which shows the example of an update rule memory. It is explanatory drawing which shows the example in case a count value permutation change circuit changes the permutation of the count value which a counter outputs. It is explanatory drawing which shows the example of a count value permutation change register. It is explanatory drawing which shows the example of a random number maximum value setting register. It is explanatory drawing which shows the example of a period setting register. It is explanatory drawing which shows the example of a count value update register. It is explanatory drawing which shows the example of a random value taking-in register. It is explanatory drawing of an example of the random number update system selection register and the random number update system selection data written in the random number update system selection register. It is explanatory drawing which shows the example of a random number circuit starting register. It is a circuit diagram which shows one structural example of a random value memory circuit. It is a timing chart which shows the timing when each signal is input into a random value storage circuit, and the timing when a random value storage circuit outputs each signal. It is explanatory drawing which shows an example of the address map of the storage area in the microcomputer for game control. It is explanatory drawing which shows an example of the address map in a user program management area. It is explanatory drawing which shows an example of initial value change system setting data. It is explanatory drawing which shows the structural example of a user program. It is explanatory drawing which shows the structural example of a random number circuit setting program. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 1st random number update system is selected. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 2nd random number update system is selected. It is explanatory drawing which shows each memory with which the microcomputer for game control is provided. It is explanatory drawing which shows the example of the table memory for jackpot determination. It is explanatory drawing which shows the example of the table memory for fluctuation pattern determination. It is a flowchart which shows the main process which the microcomputer for game control performs. It is a flowchart which shows the main process which the microcomputer for game control performs. It is a flowchart which shows a random circuit setting process. It is a flowchart which shows a random number maximum value reset process. It is a flowchart which shows an initial value change process. It is a timing chart which shows the timing when each signal is input into a random number circuit, and the timing when each signal is generated in a random number circuit. It is a flowchart which shows a timer interruption process. It is a flowchart which shows an initial value update process. It is a flowchart which shows a count value permutation change process. It is a flowchart which shows an example of a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol stop symbol setting process. It is a flowchart which shows a change time setting process. It is a flowchart which shows a sound / lamp control main process. It is a figure for demonstrating the various random counters which the microcomputer for sound and lamp control uses for presentation control. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command setting process. It is a flowchart which shows a secondary re-lottery determination process. It is a flowchart which shows a decoration symbol command setting process. It is a flowchart which shows a decoration variation pattern command setting process. It is a figure for demonstrating the decoration variation pattern determination table used in order to determine a decoration variation pattern. It is a flowchart which shows a display control main process. It is a flowchart which shows a display control process process. It is a flowchart which shows a symbol variation start process. It is a block diagram which shows the other structural example of a random number circuit. It is the front view which looked at the slot machine from the front.

Explanation of symbols

  1 pachinko machine, 31 game control board (main board), 56 CPU, 503a 12-bit random number circuit, 503b 16-bit random number circuit, 521 counter, 522 comparator, 523 counter value permutation circuit, 528 selector, 511 random value storage Circuit, 532 inversion circuit, 532A delay circuit, 533 latch signal generation circuit, 560 microcomputer for game control, 910 power supply board.

Claims (12)

Fluctuation display means capable of variably displaying a plurality of types of identification information that can identify each of them, and after a predetermined variation display execution condition is established, the variation of the identification information is performed based on the establishment of the variation display start condition. A gaming machine that starts display and shifts to a specific gaming state advantageous to the player when the display result of the variation display of the identification information becomes a specific display result,
A game control microcomputer that incorporates a random number circuit for generating a random number and executes a game control process for controlling the progress of the game;
A first effect control microcomputer for controlling at least one of the sound output means or the light emitting means;
A second effect control microcomputer for performing display control of the variation display means,
The random number circuit includes:
Clock signal generating means for generating and outputting a clock signal of a predetermined period;
Numeric value updating means for updating numeric data according to a predetermined order from a predetermined initial value to a predetermined final value in a predetermined range in which the numerical data can be updated based on the input of the clock signal;
Random number storage means for storing numerical data updated by the numerical value updating means as a random value,
The game control microcomputer is:
As the random number circuit, a plurality of random number circuits having different predetermined ranges of numerical data that can be updated by the numerical value updating means are built-in,
Random number circuit initial setting means for initial setting of the random number circuit when power supply to the gaming machine is started;
Interrupt setting means for setting to generate a timer interrupt every predetermined time after the random number circuit initial setting means performs the initial setting of the random number circuit;
An interrupt process executing means for executing a timer interrupt process including the game control process when the timer interrupt occurs;
In the timer interrupt processing by the interrupt processing execution means, random number reading means for reading a random value stored in the random number storage means when a condition for execution of variation display is satisfied,
A display for determining whether or not the display result of the variation display of the identification information is a specific display result by determining whether or not the random number value read by the random number reading means matches a predetermined determination value. A result determination means;
Control signal output means for outputting a first control signal used to execute an effect based on the determination result of the display result determination means to the first effect control microcomputer;
The random number circuit initial setting means includes:
Prior Symbol initialization, the predetermined initial value of the numerical data the numeric updating means for updating, based on the microcomputer identification information for identifying the gaming control microcomputer assigned to each of the game control microcomputer Set
In the initial setting, a usable random number circuit is set from a plurality of random number circuits built in the game control microcomputer,
The game control microcomputer further includes random number stopping means for stopping the function of a random number circuit other than the random number circuit set to be usable by the random number circuit initial setting means,
The first effect control microcomputer is:
Specifying means for specifying a second control signal based on the first control signal output from the control signal output means;
Output means for outputting the second control signal to the second effect control microcomputer;
The gaming machine characterized in that the second effect control microcomputer performs display control of the variation display means based on the second control signal. The random number circuit includes:
Clock signal inversion means for inverting the polarity of the clock signal output by the clock signal generation means;
When the execution condition of the variation display of the identification information is satisfied, a latch signal for storing numerical data updated by the numerical value updating means is output in synchronization with the clock signal inverted by the clock signal inversion means. Latch signal output means,
The numerical value updating means updates the numerical data based on the input of the clock signal,
The gaming machine according to claim 1, wherein the random number storage unit stores the numerical data as a random number value based on a latch signal output by the latch signal output unit. The random number circuit includes:
Clock signal delay means for delaying the clock signal output by the clock signal generation means;
A latch signal for storing numerical data updated by the numerical value updating means is output in synchronization with the clock signal delayed by the clock signal delay means when the execution condition for the variable display of the identification information is satisfied. Latch signal output means,
The numerical value updating means updates the numerical data based on the input of the clock signal,
The gaming machine according to claim 1, wherein the random number storage unit stores the numerical data as a random number value based on a latch signal output by the latch signal output unit. The game control microcomputer is:
Stop timing monitoring means for monitoring a stop timing for stopping and displaying the display result of the variable display based on the variable display time set for each variable display;
Stop timing determination means for determining whether or not the stop timing is based on the monitoring result of the stop timing monitoring means,
The control signal output means, when the stop timing determination means determines that it is the stop timing, uses the first effect control as a first control signal for a stop command used to stop the variable display. And further includes a stop command output means for outputting to the microcomputer.
The specifying means specifies a stop command for controlling to stop the fluctuation display in the fluctuation display means from the stop command;
The said output means outputs the stop command specified by the said specifying means to the said 2nd production control microcomputer as a said 2nd control signal, The Claim 1 characterized by the above-mentioned. Game machines. The first effect control microcomputer has effect determination means for determining an effect to be executed from among a plurality of effects determined in advance based on the first control signal,
5. The gaming machine according to claim 1, wherein the specifying unit specifies the second control signal corresponding to the effect determined by the effect determining unit. In the initial setting, the random number circuit initial setting means has a numerical value maximum value register in which a value as a maximum value in a predetermined range in which numerical data is updated is set in a numerical data range that can be updated by the numerical value updating means. Set a predetermined maximum value at
The numerical value updating means includes
Set value determining means for determining whether or not the predetermined maximum value set by the random number circuit initial setting means is equal to or less than a predetermined lower limit value;
The numerical value maximum value register can be updated by the numerical value updating means when it is determined that the predetermined maximum value set in the numerical value maximum value register is not more than the predetermined lower limit value by the set value determining means. characterized in that it comprises a maximum value resetting means for resetting the predetermined value in the range of numerical data, the gaming machine according to any of claims 1 to 5. The numerical value updating means updates numerical data on the condition that the clock signal has been input a predetermined number of times,
The random number circuit initial setting means, in the initial setting, and sets the number of inputs of the clock signal the numeric updating means is a condition for updating the numerical data, to any of claims 1 to 6 The gaming machine described. The game control microcomputer further includes numerical operation means for calculating a predetermined initial value of numerical data set by the random number circuit initial setting means using the microcomputer identification information,
The gaming machine according to any one of claims 1 to 7 , wherein the random number circuit initial setting means sets an initial value based on a value calculated by calculation by the numerical value calculation means. Whether the random number circuit initial setting means changes the predetermined initial value set by the random number circuit initial setting means when the numerical data is updated to a predetermined final value by the numerical value updating means in the initial setting. Set
The random number circuit includes:
A notification signal output means for outputting a notification signal indicating that the numerical data is updated to the predetermined final value when the numerical data is updated to the predetermined final value by the numerical value updating means;
And an initial value changing means for changing the value of the predetermined initial value when the initial value is changed by the random number circuit initial setting means based on the output of the notification signal. The gaming machine according to any one of claims 1 to 8 , characterized in that. It further comprises a winning detection means for detecting that the game medium has won a winning area in the gaming area, and that the execution condition of the variable display is satisfied, and outputting a winning detection signal,
4. The latch signal output unit according to claim 2, wherein the latch signal output unit outputs the latch signal on condition that a winning detection signal is continuously input from the winning detection unit for a predetermined period. Game machines. It further comprises a winning detection means for detecting that the game medium has won a winning area in the gaming area, and that the execution condition of the variable display is satisfied, and outputting a winning detection signal,
The latch signal output means outputs the latch signal on condition that the winning detection signal is continuously input from the winning detection means for a predetermined period,
The random number reading means continues on the condition that the timer interrupt processing is executed a predetermined number of times by the interrupt processing execution means, and the random number storage means is provided on condition that a winning detection signal is input from the winning detection means. Read the random value to be stored
4. The gaming machine according to claim 2, wherein the predetermined period is shorter than a period in which the predetermined number of times of the timer interrupt processing are executed. In the initial setting, the random number circuit initial setting means sets whether or not to change the order of values from a predetermined initial value to a predetermined final value of the numerical data updated by the numerical value updating means. Including means,
The random number circuit includes:
A notification signal output means for outputting a notification signal indicating that the numerical data is updated to the predetermined final value when the numerical data is updated to the predetermined final value by the numerical value updating means;
Based on the output of the notification signal, when the random number circuit initial setting means is set to change the arrangement order of the numerical data from the predetermined initial value to the predetermined final value, characterized in that the said predetermined initial value of the numerical data numerical updating means for updating further comprises a numerical order changing means for changing the order of up to a predetermined final value, of claims 1 to 1 1 A gaming machine according to any one of the above.

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