JP4829480B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device such as an IGBT mounted on a mold type IGBT (Gate Insulated Bipolar Transistor) module, for example, a transfer mold type IPM (Intelligent Power Module).

  Gate-insulated semiconductor devices such as IGBTs are widely used in power converters such as inverters because they have both high-speed operation of MOSFETs (metal oxide semiconductor field effect transistors) and low on-voltages of bipolar transistors. ing.

By the way, as a condition for improving the performance of these gate insulating semiconductor devices,
1) reduction of on-voltage, 2) reduction of switching loss, and 3) improvement of short-circuit tolerance. However, since all these three conditions are in a trade-off relationship, it is very difficult to make all the improvements. For example, in order to reduce the on-voltage, it is necessary to increase the current-carrying capacity of the MOS portion of the IGBT, but the short-circuit current that flows during a short-circuit increases. The breakdown at the time of short circuit occurs when the time integral value of the short circuit current and the collector-emitter voltage exceeds the critical point, so the increase of the short circuit current decreases the short circuit withstand capability, i.e., from when the short circuit current starts to break Time will be shortened.

  Therefore, in recent years, an intelligent power module (hereinafter referred to as IPM) has been developed, and an IGBT with a current sense function shown in FIG. 5 is used. In the figure, the portion through which the main current flows is composed of the gate region 4, the collector region on the back surface thereof, and the emitter region 2, and a current in which a current sensing portion 6 independent of the emitter region 2 is formed. In general, one sense portion is formed on one chip, and its position is usually formed on the outer peripheral portion of the chip in consideration of easy connection of wires.

  In this IPM, the current that flows through the IGBT when the load is short-circuited is detected by the sense current that flows through the current sensing unit. When a current that exceeds a certain set value flows, the gate voltage of the IGBT is lowered by an external control circuit to cut off the current. The IGBT is not easily destroyed even if the on-state voltage is lowered by increasing the current-carrying capability of the MOS section. For this reason, the IGBT mounted on the IPM has a higher degree of freedom of needle setting than the IGBT mounted on a module without a normal short circuit protection function, and can simultaneously reduce the on-voltage and the switching loss. .

  In this type of mold type IGBT, as shown in Patent Document 1, it has been proposed to arrange a current detection cell at the center surrounded by the emitter cell region in order to enable precise sense current detection.

  Japanese Patent Application Laid-Open No. 2004-228561 proposes arranging a plurality of current senses in different temperature distributions, particularly in the peripheral region, in order to accurately sense the sense current.

JP-A-8-46193 JP-A-11-74370

  By the way, when the IPM IGBT chip is directly hardened with a mold resin, a plurality of moldings can be performed at once by injecting the heat-pressed resin into a closed heating mold and press-molding. The adoption of the transfer mold method, which is excellent in productivity, has been adopted. According to the knowledge of the inventors, the stress that the IGBT chip mounted on the transfer mold type IPM receives from the mold is even within the chip surface. Instead, the outer periphery of the chip is extremely large. If the stress applied to the region through which the main current flows and the region through which the current sense flows are different, the output characteristics are also different due to the piezoelectric effect. For this reason, it has been found that the ratio of the main current and the sense current is different and the protection function of the IPM may malfunction.

  In addition, when a transfer mold type IGBT is actually used, the mold resin repeatedly expands and contracts due to the rise and fall of the chip temperature, so unstable stress is applied to the chip, and electric energy is generated during the resin expansion process. Since the on-resistance of the MOS changes due to the piezo effect that the charging current flows through absorption or accumulation, the on-voltage decreases. For this reason, it has been found that the ratio of the main current and the sense current is different and the protection function of the IPM may malfunction.

  Accordingly, an object of the present invention is to prevent a difference in the on-voltage between the main emitter region and the current sense region when the chip receives stress from the mold resin. For example, the malfunction of the short circuit protection function of the IPM and the short circuit withstand capability can be prevented. It is an object of the present invention to provide a semiconductor device that can prevent a decrease.

  According to a first aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor chip having a current sensing cell; and a control circuit for protecting the chip by limiting a current flowing through the semiconductor chip when a sense current of the current sensing cell exceeds a predetermined value. A plurality of current sensing cells are provided near the center and the outer periphery of the semiconductor chip, and the control circuit performs the protection when the average value of the sense current exceeds the predetermined value. It is to provide a semiconductor device.

The second invention is a semiconductor chip having a non-coating portion is present, and the current sensing cell uncoated region and a coating the chip surface for co computing a protective film to protect the chip from external stress, the current sensing cell surface The area ratio between the first coating region and the first non-coating region is equal to the area ratio between the second coating region and the second non-coating region on the cell surface other than the current sensing cell. An object of the present invention is to provide a semiconductor device characterized by the above.

  According to the first invention, since the sense current of the current sense portion is averaged, even when the chip receives stress from the mold resin, a difference occurs in the on-voltage between the main emitter region and the current sense region. Is prevented.

  According to the second invention, by matching the ratio of the resin coating area and the non-coating area ratio of the main emitter region and the current sense region, the effect when the chip receives stress from the mold resin is made the same. It is possible to prevent a difference in the on-voltage between the emitter region and the current sense region. Therefore, it is possible to prevent malfunction of the short circuit protection function of the IPM and a decrease in short circuit tolerance.

Embodiment 1 FIG.
FIG. 1A is a plan view of a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along an aluminum line. In the figure, reference numeral 1 denotes a card ring region, an emitter electrode 2 is provided on the front surface, a collector region 9 is provided on the back surface, and a gate electrode 4 a extending from the gate pad 4 is provided in the central opening of the emitter electrode 2. A main emitter cell portion 3 is provided on the emitter electrode 2, and a first current sense cell portion 6-1 is formed outside the emitter electrode on the outer periphery via a current sense pad 5. In the present invention, separately from the first current sense cell unit 6-1. A second current sense cell portion 6-2 is provided in the center portion of the emitter electrode 2 via a current sense pad 5. Current sense cell portions 6-1 and 6-2 are formed of a portion where a MOS for flowing current is formed and a wire pad region for connecting the MOS and a wire connected by aluminum.

  In the current sense cell portions 6-1 and 6-2, MOSs having the same structure as the MOSs arranged in the main emitter region of the IGBT are arranged, and these MOSs operate with the same gate applied voltage. ing. The MOS of the main emitter region and the MOS of the current sensing portion are separated and independent from each other, and the area of the MOS of the sensing portion is designed to be about 1 / 10,000 of the area of the MOS of the main emitter region.

  With this design, a current of about 1 / 10,000 of the main emitter region flows through the current sensing portion. If a short circuit protection is to be performed by the external control circuit 10 when a current of 3 times the rated current flows in the main emitter region at the time of a short circuit, the current flowing in the current sense part is continuously monitored and the current sense part is rated. The protection circuit is set to operate when a current of 3 / 10,000 times the current flows.

  In the above configuration, the first current sense unit 6-1 is disposed near the outer periphery of the chip that receives a large stress from the outside, and the two second current sense units 6-2 are disposed near the center where the stress is relatively small. By calculating the average value of the currents flowing through the two current senses by the external circuit 10, it is possible to suppress variations in the sense output characteristics that change due to the external stress applied to the current sense portion. Therefore, it is difficult for the IPM protection function to malfunction. The number of current senses may be two or more.

Embodiment 2.
In FIG. 2, as in the first embodiment, there are two or more current sense cell portions, but the emitter pad region for connecting the emitter of the second current sense portion 6-2 and the external electrode is common. .

  That is, as in the first embodiment, one of the current sense cells 6-1 is provided near the outer periphery of the chip where the stress received from the outside is large via the current sense pad 5, but near the center where the stress is relatively small. The second current sensing portion 6-2 is directly disposed on the emitter electrode 2. These two current sense cell portions 6-1 and 6-2 are connected in a circuit on the chip by aluminum wiring, and only one current sense pad 5 is not arranged.

  In order to transmit a current sense signal to an external control circuit, it is necessary to connect the external control circuit and the current sense pad with an aluminum wire, but in this structure, only a wire is connected to one current sense pad. Good. The signal extracted from this is the sum of the signals output from the two current sense cells, and this has a relatively low on-voltage (a large stress is applied to the chip) and a relatively high on-voltage. It can be regarded as the average value of the torrent sense characteristic at the center of the chip (the stress applied to the chip is small).

  For this reason, even when the stress that the chip receives from the resin around the chip differs depending on the position of the chip, the main characteristics and the output characteristics of the current sense can be made uniform. As a result, the short circuit protection operation by the external control circuit is accurately performed.

Embodiment 3.
Fig. 3 shows the case where the chip surface is coated with a resin such as polyimide in order to relieve the stress that the chip receives from the mold resin of the case in an IGBT with a current sense function mounted on a transfer mold type IGBT module. This is an example. Since the resin such as polyimide is coated on the part other than the wire bonding area, the ratio of the area coated with the polyimide resin on the current sense cell to the area not coated is coated with the polyimide resin on the cell other than the current sense cell. The ratio of the area to be coated and the area not to be coated is almost the same. FIG. 4 is an enlarged view of a current sensing portion of the plan view of the semiconductor device of FIG.

  In the figure, reference numeral 1 denotes a card ring region. An emitter electrode 2 is provided on the front surface, a collector region is provided on the back surface, and a gate electrode 4 a extending from the gate pad 4 is provided at the central opening of the emitter electrode 2. A main emitter cell portion 3 is provided on the emitter electrode 2, and a first current sense cell portion 6-1 is formed outside the emitter electrode on the outer periphery via a current sense pad 5. In this case, the chip surface may be coated with polyimide or the like in order to relieve the stress that the chip receives from the resin, but only the regions 8-2 and 8-3 for bonding the emitter wire are etched with polyimide to open windows. It is normal to leave. This portion is called an emitter pad.

  In this case, the portion not covered with polyimide is subjected to a greater stress than the portion covered with polyimide. In the main part of the IGBT, cells are also arranged under the emitter pad, but the on-voltage of this part is lower than the on-voltage of cells in other areas. For this reason, the on-voltage of the whole chip solidified with the mold resin varies depending on the area ratio of the portion coated with polyimide and the portion not coated with polyimide.

  When the current sensing IGBT is coated with polyimide, the current sensing pad 5 is usually not coated with polyimide in order to connect wires, but the current sensing cell 6-1 is entirely coated with polyimide. While the main cell part is polyimide-coated for some part of the whole, the current sensing part is entirely polyimide coated, so the main part and the current sensing part are turned on due to the difference in stress described above. The voltage may be different.

  In order to prevent this, it is necessary to make the area ratio of the polyimide coated on the current sense cell 6 the same as the area ratio of the polyimide coated on the main emitter cell portion. Therefore, by providing as in 8-4, a polyimide-coated portion and a non-coated portion are also formed on the current sense cell. Further, while 8-4 is provided, a polyimide opening region 8-1 is provided not only in the pad portions 8-2 and 8-3 of the emitter region but also in the gate pad 4.

  In the above embodiment, the present invention is applied to the case where the current sense is provided in the vicinity of the outer periphery, but the current sense is provided not only in the vicinity of the outer periphery but also in the vicinity of the first embodiment. The emitter of the current sense near the center is connected to the external electrode. This embodiment can also be applied to the second embodiment in which the emitter pad region for common is used.

The top view and sectional drawing of the semiconductor device which show 1st Embodiment of this invention, The top view of the semiconductor device which shows 2nd Embodiment of this invention. The top view of the semiconductor device which shows 3rd Embodiment of this invention. The enlarged view of the electric current sense part of the top view of the semiconductor device which shows 3rd Embodiment of this invention. The top view of the conventional semiconductor device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Guard ring area | region, 2 Emitter electrode, 3 Main emitter cell part, 4 Gate pad, 5 Current sense pad, 6 Current sense cell part, 7 Polyimide application | coating area, 8-1-8-4 Polyimide opening area, 10 External control circuit.

Claims (1)

Chip exists non-coating portion not coated region and coating the chip surface for co computing with a protective film for protecting the external stress, and a semiconductor chip having a current sensing cell, the first on the current sensing cell surface The area ratio between the coating region and the first non-coating region is equal to the area ratio between the second coating region on the cell surface other than the current sensing cell and the second non-coating region. Semiconductor device.

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