JP4845285B2

JP4845285B2 - MOSFET drive circuit

Info

Publication number: JP4845285B2
Application number: JP2001136998A
Authority: JP
Inventors: 公禎小林; 豊関根
Original assignee: Shindengen Electric Manufacturing Co Ltd
Current assignee: Shindengen Electric Manufacturing Co Ltd
Priority date: 2001-05-08
Filing date: 2001-05-08
Publication date: 2011-12-28
Anticipated expiration: 2021-05-08
Also published as: JP2002330590A

Description

【０００１】
【発明の属する技術分野】
本発明は同期整流方式のＤＣ／ＤＣコンバータのＭＯＳＦＥＴ駆動回路に関するものである。
【０００２】
【従来の技術】
図６に従来のＭＯＳＦＥＴ駆動回路を示し、このＭＯＳＦＥＴ駆動回路の動作波形図を図５に破線で示す。
７はトランス、８は主スイッチＭＯＳＦＥＴ、３はパルス発振回路、９は二次の整流ＭＯＳＦＥＴ、１０は二次の転流ＭＯＳＦＥＴ、１１は出力チョーク、１２は平滑コンデンサ、１８は転流側制御ＭＯＳＦＥＴ、１３は二次のダイオード、１４は二次の抵抗である。
【０００３】
従来のＭＯＳＦＥＴ駆動回路は、一次−二次間が絶縁されたトランス７の一次巻線、二次巻線及び三次巻線からなる同期整流回路であり、転流ＭＯＳＦＥＴ１０のゲート・ソース間に転流側制御ＭＯＳＦＥＴ１８のドレイン・ソースを接続してある。また、トランス７の一次巻線に主スイッチＭＯＳＦＥＴ８を接続し、主スイッチＭＯＳＦＥＴ８のゲート・ソース間に、主スイッチＭＯＳＦＥＴ８を駆動させるパルス発振回路３を接続してある。
【０００４】
出力チョーク１１と平滑コンデンサ１２との直列回路に転流ＭＯＳＦＥＴ１０を並列に接続し、この転流ＭＯＳＦＥＴ１０の一端をトランス７の二次巻線の一方側に直列に接続し、その他端を、整流ＭＯＳＦＥＴ９を介して二次巻線の他方側に接続してある。また、整流ＭＯＳＦＥＴ９のゲートをトランス７の二次巻線と出力チョーク１１との間に設けた接続部に接続してある。さらに、転流ＭＯＳＦＥＴ１０のゲートをトランス７の三次巻線の一方側に接続し、この三次巻線の他方側にダイオード１３と抵抗１４とを並列に接続した回路を接続し、この回路を転流側のＭＯＳＦＥＴ１０，１８のソース側に接続してある。なお、ダイオード１３のカソードとトランス７の三次巻線とが接続してある。転流側制御ＭＯＳＦＥＴ１８のゲート・ソース間にトランス７の四次巻線を接続してある。
【０００５】
以上のように構成してあるＭＯＳＦＥＴ駆動回路は、以下のように動作する。パルス発振回路３から出力される矩形波パルスにより主スイッチＭＯＳＦＥＴ８がオンする時、二次側は、転流ＭＯＳＦＥＴ１０がオン、整流ＭＯＳＦＥＴ９がオフ状態である。主スイッチＭＯＳＦＥＴ８のオンにより転流ＭＯＳＦＥＴ１０がオフ、整流ＭＯＳＦＥＴ９がオンするが、この時、主スイッチＭＯＳＦＥＴ８と転流ＭＯＳＦＥＴ１０のオン期間がごく短期間動作遅れにより重なるため、この期間、トランス７を介して二次側に転流ＭＯＳＦＥＴ１０−整流ＭＯＳＦＥＴ９のルートで二次側貫通電流が流れる。その直後に転流ＭＯＳＦＥＴ１０がオフすると、短絡状態は解除され、整流ＭＯＳＦＥＴ９−転流ＭＯＳＦＥＴ１０のルートの貫通電流は出力チョーク１１及び平滑コンデンサ１２に流れる。
【０００６】
【発明が解決しようとする課題】
従来のＭＯＳＦＥＴ駆動回路は、パルス発生回路３から出力される駆動用の矩形波パルスを直接主スイッチＭＯＳＦＥＴ８のゲートへ入力してある。そのため、充電時定数が小さく、主スイッチＭＯＳＦＥＴ８は極めて短い遅れ時間でＯＮ状態になり、高効率化のために二次側に同期整流回路を採用している場合などには、二次側整流回路の低いインピーダンスのみによって制御される貫通電流が発生するという課題が生じた。また、貫通電流により、同期整流用素子に印加するサージ電圧も増加するため、耐圧オーバーを引き起こすおそれもあった。
【０００７】
本発明は、上記課題に鑑みてなされたものであり、貫通電流を抑制し、整流素子に印加するサージ電圧を低減するＭＯＳＦＥＴ駆動回路を提供するものである。
【０００８】
【課題を解決するための手段】
請求項１の発明は、主スイッチ駆動回路を設けたことにより、主スイッチを駆動する際、主スイッチのＭＯＳＦＥＴの非飽和領域を利用し、一次側のスイッチで電圧を持たせながらＯＮさせることで、貫通電流を抑制し、さらに、整流素子に印加するサージ電圧を低減させることを可能にした。
【０００９】
請求項３、４又は５の発明は、主スイッチ駆動回路と事前パルス回路とを設けたことにより、電力効率向上を可能にした。
【００１０】
【発明の実施の形態】
以下、本発明に係るＭＯＳＦＥＴ駆動回路の好ましい実施の形態を図面に基づいて説明する。
図１は本発明に係るＭＯＳＦＥＴ駆動回路の好ましい実施の形態を示す回路図である。
【００１１】
本実施例のＭＯＳＦＥＴ駆動回路は、上記従来例と同様に、一次−二次間が絶縁されたトランス７の一次巻線、二次巻線及び三次巻線からなる同期整流回路であり、転流ＭＯＳＦＥＴ１０のゲート・ソース間に転流側制御ＭＯＳＦＥＴ１８のドレイン・ソースを接続してある。
【００１２】
出力チョーク１１と平滑コンデンサ１２との直列回路に転流ＭＯＳＦＥＴ１０を並列に接続し、この転流ＭＯＳＦＥＴ１０の一端をトランス７の二次巻線の一方側に直列に接続し、その他端を、整流ＭＯＳＦＥＴ９を介して二次巻線の他方側に接続してある。また、整流ＭＯＳＦＥＴ９のゲートをトランス７の二次巻線と出力チョーク１１との間に設けた接続部に接続してある。さらに、転流ＭＯＳＦＥＴ１０のゲートをトランス７の三次巻線の一方側に接続し、この三次巻線の他方側にダイオード１３と抵抗１４とを並列に接続した回路を接続し、この回路を転流側のＭＯＳＦＥＴ１０，１８のソース側に接続してある。なお、ダイオード１３のカソードとトランス７の三次巻線とが接続してある。転流側制御ＭＯＳＦＥＴ１８のゲート・ソース間にトランス７の四次巻線を接続してある。
【００１３】
本実施例は、一次側に主スイッチ駆動回路１を設けてあることに特徴を有する。主スイッチ駆動回路１はトランス７の一次巻線に接続した主スイッチＭＯＳＦＥＴ８のゲートに接続してあり、この主スイッチ駆動回路１は、インダクタ４とコンデンサ５とダイオード６とをそれぞれ並列に接続し、このダイオード６はアノードが主スイッチＭＯＳＦＥＴ８のゲートに接続される向きに接続してある。また、主スイッチ駆動回路１と主スイッチＭＯＳＦＥＴ８のソースの間にパルス発振回路３を接続してある。なお、本実施例のパルス発振回路３を集積回路で構成してある（以下「集積回路３」という。）。
【００１４】
本実施例は以上のように構成し、以下のような作用をする。
先ず、主スイッチＭＯＳＦＥＴ８がオンすると、集積回路３から矩形波パルスが出力される。そして、このパルス電圧は主スイッチ駆動回路１のコンデンサ５と主スイッチＭＯＳＦＥＴ８の内部コンデンサで分圧され、主スイッチＭＯＳＦＥＴ８のゲートに印加される。この時、コンデンサ５を主スイッチＭＯＳＦＥＴ８のゲート閾値電圧Ｖｔｈになるように容量選定すれば、非飽和領域による貫通電流抑制効果が得られる。その後、主スイッチＭＯＳＦＥＴ８のゲート閾値電圧Ｖｔｈから主スイッチ駆動回路１のインダクタ４とコンデンサ５及び主スイッチＭＯＳＦＥＴ８の内部コンデンサの共振作用でゲート電圧は上昇し、パルス電圧の波高値まで上昇する。その際の時間は、インダクタ４の値の選択で制御でき、大きくする程共振周波数が低くなるため緩やかに上昇する。
【００１５】
この際二次側は、整流ＭＯＳＦＥＴ９がオンし、転流ＭＯＳＦＥＴ１０がオフするが、主スイッチＭＯＳＦＥＴ８と転流ＭＯＳＦＥＴ１０のオン期間がごく短期間動作遅れにより重なるため、この期間、前述のようにトランス７を介して二次側に転流ＭＯＳＦＥＴ１０−整流ＭＯＳＦＥＴ９のルートで二次側貫通電流が流れようとする。
しかし、本実施例においては、主スイッチ駆動に非飽和領域による貫通電流抑制効果があるため、二次側貫通電流は制限される。従って、転流ＭＯＳＦＥＴ１０がオフし短絡状態は解除されても、二次側の電圧が急激に上昇せずに抑制され、転流ＭＯＳＦＥＴ１０の耐圧オーバーは発生しない。
【００１６】
図２は、図１とは別のＭＯＳＦＥＴ駆動回路の実施形態を示す回路図であり、この実施例の方式による動作波形図を図５に実線で示してある。この実施例は前記実施例と略同様であるが、事前パルス送出回路２を設けてあることに特徴を有する。本実施例のＭＯＳＦＥＴ駆動回路にトランス７とは別にパルストランス１５を設け、このパルストランス１５の一次巻線と並列にダイオード１７を設け、このダイオード１７のカソードをコンデンサ１６の一端に接続し、このコンデンサ１６の他端を主スイッチ駆動回路１とパルス発振回路３との間に接続してある。このように構成した回路に直列に且つダイオード１７のカソードと接続する向きにコンデンサ１６を接続し、これらを集積回路３と並列に接続するとともに、転流側制御ＭＯＳＦＥＴ１８のゲートと転流ＭＯＳＦＥＴ１０のソースの間にパルストランス１５の二次巻線を接続してある。
【００１７】
本実施例は以上のように構成し、以下のような作用をする。
先ず、主スイッチＭＯＳＦＥＴ８がオンすると、集積回路３から矩形波パルスが出力される。そして、このパルス電圧は主スイッチ駆動回路１のコンデンサ５と主スイッチＭＯＳＦＥＴ８の内部コンデンサで分圧され、主スイッチＭＯＳＦＥＴ８のゲートに印加される。この時、コンデンサ５を主スイッチＭＯＳＦＥＴ８のゲート閾値電圧Ｖｔｈになるように容量選定すれば、非飽和領域による貫通電流抑制効果が得られる。その後、主スイッチＭＯＳＦＥＴ８のゲート閾値電圧Ｖｔｈから主スイッチ駆動回路１のインダクタ４とコンデンサ５及び主スイッチＭＯＳＦＥＴ８の内部コンデンサの共振作用でゲート電圧は上昇し、パルス電圧の波高値まで上昇する。その際の時間は、インダクタ４の値の選択で制御でき、大きくする程共振周波数が低くなるため緩やかに上昇する。
【００１８】
集積回路３から矩形波パルスが出力されると、事前パルス送出回路２を構成するパルストランス１５に電流が流れ、転流側制御ＭＯＳＦＥＴ１８がオンする。これに伴い転流ＭＯＳＦＥＴ１０はオフする。また、主スイッチＭＯＳＦＥＴ８がオンすることにより、整流ＭＯＳＦＥＴ９がオンする。転流ＭＯＳＦＥＴ１０は前述したように事前パルス送出回路２の作用によりオフする。即ち、本実施例により、主スイッチＭＯＳＦＥＴ８に非飽和領域を持たせることにより、転流ＭＯＳＦＥＴ１０の電圧を抑制することができるとともに、事前パルス送出回路２の作用により、主スイッチＭＯＳＦＥＴ８、整流ＭＯＳＦＥＴ９及び転流ＭＯＳＦＥＴ１０のＯＮ／ＯＦＦ切り替えをスムーズに行うことができ、選り二次側貫通電流を低減可能とし電力効率を向上させることができる。
【００１９】
図３は、前記実施例とは別のＭＯＳＦＥＴ駆動回路の実施形態を示す回路図である。この実施例は前記実施例と略同様であるが、図２図示実施例とは異なる構成の事前パルス送出回路２を設けてあることに特徴を有する。本実施例のＭＯＳＦＥＴ駆動回路にパルストランス１５を設け、このパルストランス１５の一次巻線と主スイッチ駆動回路１との間にコンデンサ１６を接続し、このコンデンサ１６とパルストランス１５の一次巻線をパルス発振回路３と並列に接続してある。また、転流側制御ＭＯＳＦＥＴ１８のゲートと転流ＭＯＳＦＥＴ１０のソースの間にパルストランス１５の二次巻線を接続し、この二次巻線と並列にダイオード１９を設け、カソードが転流側制御ＭＯＳＦＥＴ１８のゲートに接続される向きに、このダイオード１９を接続してある。なお、作用については、図３図示実施例と略同様である。
【００２０】
図４は、前記実施例とは別のＭＯＳＦＥＴ駆動回路の実施形態を示す回路図である。この実施例は図２図示実施例と略同様に構成してあり、主トランス駆動回路１のインダクタ４を、パルストランス１５の巻線にし、主トランス駆動回路１と事前パルス送出回路２とを一体化してあることを特徴とする。なお、作用については、図２及び図３図示実施例と略同様である。なお、図４図示実施例と略同様に構成し、主トランス駆動回路１のインダクタ４を、パルストランス１５の巻線にすることも可能である。
【００２１】
【発明の効果】
本発明の効果としては、
請求項1の発明により、主スイッチ駆動回路を設けたことにより、主スイッチを駆動する際、主スイッチのＭＯＳＦＥＴの非飽和領域を利用し、一次側のスイッチで電圧を持たせながらＯＮさせることで、貫通電流を抑制し、さらに、二次側整流素子に印加するサージ電圧を低減させることを可能にした。加えて、主スイッチ駆動回路のコンデンサ及び主スイッチＭＯＳＦＥＴの内部コンデンサの電圧を制御することができ、主スイッチ駆動回路のコンデンサを主スイッチＭＯＳＦＥＴのゲート閾値電圧になるように容量選定することにより非飽和領域による貫通電流抑制効果を得ることを可能にした。
【００２２】
請求項３、４又は５の発明は、主スイッチ駆動回路と事前パルス回路とを設けたことにより、電力効率向上を可能にした。
【図面の簡単な説明】
【図１】本発明に係るＭＯＳＦＥＴ駆動回路の好ましい実施の形態を示す回路図である。
【図２】図１図示実施例とは別のＭＯＳＦＥＴ駆動回路の回路図である。
【図３】前記実施例とは別のＭＯＳＦＥＴ駆動回路の回路図である。
【図４】前記実施例とは別のＭＯＳＦＥＴ駆動回路の回路図である。
【図５】本発明の方式及び従来の方式による動作波形図である。
【図６】従来のＭＯＳＦＥＴ駆動回路の回路図である。
【符号の説明】
１主スイッチ駆動回路
２事前パルス送出回路
３パルス発振回路
４インダクタ
５コンデンサ
６ダイオード
７トランス
８主スイッチＭＯＳＦＥＴ
９整流ＭＯＳＦＥＴ
１０転流ＭＯＳＦＥＴ
１１出力チョーク
１２平滑コンデンサ
１３ダイオード
１４抵抗
１５パルストランス
１６コンデンサ
１７ダイオード
１８転流側制御ＭＯＳＦＥＴ
１９ダイオード
２０主スイッチ駆動回路１と事前パルス送出回路２とを一体化した回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a MOSFET drive circuit for a synchronous rectification DC / DC converter.
[0002]
[Prior art]
FIG. 6 shows a conventional MOSFET drive circuit, and an operation waveform diagram of the MOSFET drive circuit is shown by a broken line in FIG.
7 is a transformer, 8 is a main switch MOSFET, 3 is a pulse oscillation circuit, 9 is a secondary rectification MOSFET, 10 is a secondary commutation MOSFET, 11 is an output choke, 12 is a smoothing capacitor, and 18 is a commutation side control MOSFET. , 13 is a secondary diode, and 14 is a secondary resistor.
[0003]
The conventional MOSFET drive circuit is a synchronous rectifier circuit including a primary winding, a secondary winding, and a tertiary winding of a transformer 7 that is insulated between the primary and secondary, and is commutated between the gate and source of the commutation MOSFET 10. The drain and source of the side control MOSFET 18 are connected. Further, the main switch MOSFET 8 is connected to the primary winding of the transformer 7, and the pulse oscillation circuit 3 for driving the main switch MOSFET 8 is connected between the gate and the source of the main switch MOSFET 8.
[0004]
The commutation MOSFET 10 is connected in parallel to the series circuit of the output choke 11 and the smoothing capacitor 12, one end of the commutation MOSFET 10 is connected in series to one side of the secondary winding of the transformer 7, and the other end is connected to the rectification MOSFET 9. It is connected to the other side of the secondary winding via The gate of the rectifying MOSFET 9 is connected to a connection portion provided between the secondary winding of the transformer 7 and the output choke 11. Further, the gate of the commutation MOSFET 10 is connected to one side of the tertiary winding of the transformer 7, and a circuit in which a diode 13 and a resistor 14 are connected in parallel is connected to the other side of the tertiary winding. Side MOSFETs 10 and 18 are connected to the source side. The cathode of the diode 13 and the tertiary winding of the transformer 7 are connected. The quaternary winding of the transformer 7 is connected between the gate and source of the commutation side control MOSFET 18.
[0005]
The MOSFET drive circuit configured as described above operates as follows. When the main switch MOSFET 8 is turned on by the rectangular wave pulse output from the pulse oscillation circuit 3, the commutation MOSFET 10 is on and the rectification MOSFET 9 is off on the secondary side. When the main switch MOSFET 8 is turned on, the commutation MOSFET 10 is turned off and the rectification MOSFET 9 is turned on. At this time, the on period of the main switch MOSFET 8 and the commutation MOSFET 10 overlaps due to an operation delay for a very short time. A secondary side through current flows through the route of the commutation MOSFET 10 to the rectification MOSFET 9 on the secondary side. When the commutation MOSFET 10 is turned off immediately after that, the short-circuit state is released, and the through current of the route of the rectification MOSFET 9 -commutation MOSFET 10 flows to the output choke 11 and the smoothing capacitor 12.
[0006]
[Problems to be solved by the invention]
In the conventional MOSFET driving circuit, a driving rectangular wave pulse output from the pulse generating circuit 3 is directly input to the gate of the main switch MOSFET 8. Therefore, when the charging time constant is small, the main switch MOSFET 8 is turned on with a very short delay time, and a synchronous rectifier circuit is adopted on the secondary side for high efficiency, the secondary side rectifier circuit is used. This causes a problem that a through current controlled only by a low impedance is generated. Further, the surge voltage applied to the synchronous rectification element due to the through current also increases, and there is a possibility of causing a breakdown voltage over.
[0007]
The present invention has been made in view of the above problems, and provides a MOSFET drive circuit that suppresses a through current and reduces a surge voltage applied to a rectifying element.
[0008]
[Means for Solving the Problems]
According to the first aspect of the present invention, by providing the main switch drive circuit, when the main switch is driven, the non-saturated region of the MOSFET of the main switch is used, and the primary switch is turned on while holding the voltage. In addition, the through current can be suppressed, and the surge voltage applied to the rectifying element can be reduced.
[0009]
According to the invention of claim 3, 4 or 5, by providing the main switch driving circuit and the pre-pulse circuit, the power efficiency can be improved.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, preferred embodiments of a MOSFET drive circuit according to the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram showing a preferred embodiment of a MOSFET drive circuit according to the present invention.
[0011]
The MOSFET drive circuit of this embodiment is a synchronous rectifier circuit composed of a primary winding, a secondary winding, and a tertiary winding of a transformer 7 in which the primary and secondary are insulated, as in the conventional example. The drain and source of the commutation side control MOSFET 18 are connected between the gate and source of the MOSFET 10.
[0012]
The commutation MOSFET 10 is connected in parallel to the series circuit of the output choke 11 and the smoothing capacitor 12, one end of the commutation MOSFET 10 is connected in series to one side of the secondary winding of the transformer 7, and the other end is connected to the rectification MOSFET 9. It is connected to the other side of the secondary winding via The gate of the rectifying MOSFET 9 is connected to a connection portion provided between the secondary winding of the transformer 7 and the output choke 11. Further, the gate of the commutation MOSFET 10 is connected to one side of the tertiary winding of the transformer 7, and a circuit in which a diode 13 and a resistor 14 are connected in parallel is connected to the other side of the tertiary winding. Side MOSFETs 10 and 18 are connected to the source side. The cathode of the diode 13 and the tertiary winding of the transformer 7 are connected. The quaternary winding of the transformer 7 is connected between the gate and source of the commutation side control MOSFET 18.
[0013]
The present embodiment is characterized in that the main switch drive circuit 1 is provided on the primary side. The main switch drive circuit 1 is connected to the gate of the main switch MOSFET 8 connected to the primary winding of the transformer 7, and the main switch drive circuit 1 connects the inductor 4, the capacitor 5 and the diode 6 in parallel, The diode 6 is connected in the direction in which the anode is connected to the gate of the main switch MOSFET 8. Further, the pulse oscillation circuit 3 is connected between the main switch drive circuit 1 and the source of the main switch MOSFET 8. Note that the pulse oscillation circuit 3 of the present embodiment is constituted by an integrated circuit (hereinafter referred to as “integrated circuit 3”).
[0014]
The present embodiment is configured as described above and operates as follows.
First, when the main switch MOSFET 8 is turned on, a rectangular wave pulse is output from the integrated circuit 3. The pulse voltage is divided by the capacitor 5 of the main switch drive circuit 1 and the internal capacitor of the main switch MOSFET 8 and applied to the gate of the main switch MOSFET 8. At this time, if the capacitance of the capacitor 5 is selected so as to be the gate threshold voltage Vth of the main switch MOSFET 8, a through current suppression effect due to the non-saturation region can be obtained. Thereafter, the gate voltage rises from the gate threshold voltage Vth of the main switch MOSFET 8 by the resonance action of the inductor 4 and the capacitor 5 of the main switch drive circuit 1 and the internal capacitor of the main switch MOSFET 8, and rises to the peak value of the pulse voltage. The time at that time can be controlled by selecting the value of the inductor 4, and the resonance frequency is lowered as the value is increased.
[0015]
At this time, on the secondary side, the rectification MOSFET 9 is turned on and the commutation MOSFET 10 is turned off. However, since the on period of the main switch MOSFET 8 and the commutation MOSFET 10 overlaps due to an operation delay for a very short period, the transformer 7 is in this period as described above. Through the secondary side, a secondary side through current tends to flow in the route of the commutation MOSFET 10 and the rectification MOSFET 9.
However, in this embodiment, since the main switch drive has a through current suppression effect due to the non-saturated region, the secondary side through current is limited. Therefore, even if the commutation MOSFET 10 is turned off and the short-circuit state is released, the secondary-side voltage is suppressed without rapidly increasing, and the commutation MOSFET 10 does not exceed the breakdown voltage.
[0016]
FIG. 2 is a circuit diagram showing an embodiment of a MOSFET drive circuit different from FIG. 1, and an operation waveform diagram according to the system of this example is shown by a solid line in FIG. This embodiment is substantially the same as the previous embodiment, but is characterized in that a pre-pulse transmission circuit 2 is provided. In the MOSFET drive circuit of this embodiment, a pulse transformer 15 is provided separately from the transformer 7 , a diode 17 is provided in parallel with the primary winding of the pulse transformer 15, and the cathode of the diode 17 is connected to one end of the capacitor 16. The other end of the capacitor 16 is connected between the main switch drive circuit 1 and the pulse oscillation circuit 3. A capacitor 16 is connected in series with the circuit configured as described above in a direction to be connected to the cathode of the diode 17, and these are connected in parallel with the integrated circuit 3, and the gate of the commutation side control MOSFET 18 and the source of the commutation MOSFET 10 are connected. The secondary winding of the pulse transformer 15 is connected between the two.
[0017]
The present embodiment is configured as described above and operates as follows.
First, when the main switch MOSFET 8 is turned on, a rectangular wave pulse is output from the integrated circuit 3. The pulse voltage is divided by the capacitor 5 of the main switch drive circuit 1 and the internal capacitor of the main switch MOSFET 8 and applied to the gate of the main switch MOSFET 8. At this time, if the capacitance of the capacitor 5 is selected so as to be the gate threshold voltage Vth of the main switch MOSFET 8, a through current suppression effect due to the non-saturation region can be obtained. Thereafter, the gate voltage rises from the gate threshold voltage Vth of the main switch MOSFET 8 by the resonance action of the inductor 4 and the capacitor 5 of the main switch drive circuit 1 and the internal capacitor of the main switch MOSFET 8, and rises to the peak value of the pulse voltage. The time at that time can be controlled by selecting the value of the inductor 4, and the resonance frequency is lowered as the value is increased.
[0018]
When a rectangular wave pulse is output from the integrated circuit 3, a current flows through the pulse transformer 15 constituting the pre-pulse transmission circuit 2, and the commutation side control MOSFET 18 is turned on. Along with this, the commutation MOSFET 10 is turned off. Further, when the main switch MOSFET 8 is turned on, the rectifying MOSFET 9 is turned on. The commutation MOSFET 10 is turned off by the action of the pre-pulse sending circuit 2 as described above. That is, according to the present embodiment, the voltage of the commutation MOSFET 10 can be suppressed by providing the main switch MOSFET 8 with the non-saturation region, and the main switch MOSFET 8, the rectification MOSFET 9, and the commutation MOSFET 9 can be controlled by the action of the pre-pulse sending circuit 2. The on / off switching of the current MOSFET 10 can be performed smoothly, and the secondary side through current can be reduced and the power efficiency can be improved.
[0019]
FIG. 3 is a circuit diagram showing an embodiment of a MOSFET drive circuit different from the above embodiment. This embodiment is substantially the same as the previous embodiment, but is characterized in that a pre-pulse transmission circuit 2 having a configuration different from the embodiment shown in FIG. 2 is provided. A pulse transformer 15 is provided in the MOSFET drive circuit of the present embodiment, a capacitor 16 is connected between the primary winding of the pulse transformer 15 and the main switch drive circuit 1, and the primary winding of the capacitor 16 and the pulse transformer 15 is connected. The pulse oscillation circuit 3 is connected in parallel. Further, a secondary winding of the pulse transformer 15 is connected between the gate of the commutation side control MOSFET 18 and the source of the commutation MOSFET 10, a diode 19 is provided in parallel with the secondary winding, and the cathode is the commutation side control MOSFET 18. This diode 19 is connected in the direction to be connected to the gate. The operation is substantially the same as in the embodiment shown in FIG.
[0020]
FIG. 4 is a circuit diagram showing an embodiment of a MOSFET drive circuit different from the above embodiment. This embodiment is configured in substantially the same manner as the embodiment shown in FIG. 2, and the inductor 4 of the main transformer drive circuit 1 is used as the winding of the pulse transformer 15, and the main transformer drive circuit 1 and the pre-pulse sending circuit 2 are integrated. It is characterized by having become. The operation is substantially the same as in the embodiment shown in FIGS. It is also possible to configure substantially the same as the embodiment shown in FIG. 4, and the inductor 4 of the main transformer drive circuit 1 can be a winding of the pulse transformer 15.
[0021]
【The invention's effect】
As an effect of the present invention,
According to the invention of claim 1, by providing the main switch drive circuit, when driving the main switch, the non-saturated region of the MOSFET of the main switch is used and the primary side switch is turned on while holding the voltage. The through current is suppressed, and the surge voltage applied to the secondary side rectifying element can be reduced. In addition, the voltage of the capacitor of the main switch drive circuit and the internal capacitor of the main switch MOSFET can be controlled, and the capacitor of the main switch drive circuit is desaturated by selecting the capacitance so that it becomes the gate threshold voltage of the main switch MOSFET It was possible to obtain a through current suppression effect by the region.
[0022]
According to the invention of claim 3, 4 or 5, by providing the main switch driving circuit and the pre-pulse circuit, the power efficiency can be improved.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a preferred embodiment of a MOSFET drive circuit according to the present invention.
FIG. 2 is a circuit diagram of a MOSFET drive circuit different from the embodiment shown in FIG. 1;
FIG. 3 is a circuit diagram of a MOSFET driving circuit different from the embodiment.
FIG. 4 is a circuit diagram of a MOSFET driving circuit different from the embodiment.
FIG. 5 is an operation waveform diagram according to the method of the present invention and the conventional method.
FIG. 6 is a circuit diagram of a conventional MOSFET drive circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Main switch drive circuit 2 Prior pulse sending circuit 3 Pulse oscillation circuit 4 Inductor 5 Capacitor 6 Diode 7 Transformer 8 Main switch MOSFET
9 Rectifier MOSFET
10 Commutation MOSFET
11 Output Choke 12 Smoothing Capacitor 13 Diode 14 Resistor 15 Pulse Transformer 16 Capacitor 17 Diode 18 Commutation Side Control MOSFET
19 Diode 20 A circuit in which the main switch driving circuit 1 and the pre-pulse sending circuit 2 are integrated.

Claims

In a synchronous rectifier circuit including a primary winding, a secondary winding, and a tertiary winding of a transformer that is insulated between a primary and a secondary, one end of the secondary winding is connected to a drain of a commutation MOSFET, and the secondary The other end of the winding is connected to the drain of the rectification MOSFET, the source of the commutation MOSFET is connected to the source of the rectification MOSFET, and one end of the tertiary winding is connected to the gate of the commutation MOSFET, The other end of the tertiary winding is connected to the cathode of the diode, the anode of the diode is connected between the source of the commutation MOSFET and the source of the rectification MOSFET, and the commutation is performed between the gate and the source of the commutation MOSFET. The drain and source of the side control MOSFET are connected, the quaternary winding of the transformer is connected between the gate and source of the commutation side control MOSFET, and the transformer The main switch MOSFET is connected to the primary winding of the switch, and the main switch drive circuit configured by connecting the inductor, the capacitor, and the diode in parallel to each other is connected to the gate of the main switch MOSFET. A MOSFET drive circuit, wherein a pulse oscillation circuit is connected between the circuit and the source of the main switch MOSFET.

2. The MOSFET drive circuit according to claim 1, wherein the pulse oscillation circuit is constituted by an integrated circuit.

3. The MOSFET drive circuit according to claim 1, wherein a pulse transformer is provided separately from the transformer, a diode is provided in parallel with the primary winding of the pulse transformer, and one end of a capacitor is connected to the cathode of the diode. The other end of the capacitor is connected between the main switch drive circuit and the pulse oscillation circuit, and the secondary winding of the pulse transformer is connected between the gate of the commutation side control MOSFET and the source of the commutation MOSFET. A MOSFET drive circuit comprising a pre-pulse sending circuit configured to be connected.

3. The MOSFET drive circuit according to claim 1 or 2, wherein a pulse transformer is provided separately from the transformer, a capacitor is connected between a primary winding of the pulse transformer and the main switch drive circuit, and the capacitor and the pulse A primary winding of the transformer is connected in parallel with the pulse oscillation circuit, and a secondary winding of the pulse transformer is connected between the gate of the commutation side control MOSFET and the source of the commutation MOSFET. A MOSFET provided with a pre-pulse sending circuit configured by connecting a diode in parallel with a winding and connecting the diode in a direction in which the cathode is connected to the gate of the commutation side control MOSFET Driving circuit.

5. The MOSFET drive circuit according to claim 3, wherein the inductor of the main transformer drive circuit is a winding of the pulse transformer, and the main transformer drive circuit and the pre-pulse sending circuit are integrated. Characteristic MOSFET drive circuit.